61
61
#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset)))
63
63
/* 8-bit hardware registers */
64
#define CR0 CTL_REG(0x0000)
65
#define CR1 CTL_REG(0x0004)
66
#define CR2 CTL_REG(0x0008)
67
#define CR3 CTL_REG(0x000C)
64
#define ZD_CR0 CTL_REG(0x0000)
65
#define ZD_CR1 CTL_REG(0x0004)
66
#define ZD_CR2 CTL_REG(0x0008)
67
#define ZD_CR3 CTL_REG(0x000C)
69
#define CR5 CTL_REG(0x0010)
69
#define ZD_CR5 CTL_REG(0x0010)
70
70
/* bit 5: if set short preamble used
71
71
* bit 6: filter band - Japan channel 14 on, else off
73
#define CR6 CTL_REG(0x0014)
74
#define CR7 CTL_REG(0x0018)
75
#define CR8 CTL_REG(0x001C)
77
#define CR4 CTL_REG(0x0020)
79
#define CR9 CTL_REG(0x0024)
80
/* bit 2: antenna switch (together with CR10) */
81
#define CR10 CTL_REG(0x0028)
82
/* bit 1: antenna switch (together with CR9)
83
* RF2959 controls with CR11 radion on and off
73
#define ZD_CR6 CTL_REG(0x0014)
74
#define ZD_CR7 CTL_REG(0x0018)
75
#define ZD_CR8 CTL_REG(0x001C)
77
#define ZD_CR4 CTL_REG(0x0020)
79
#define ZD_CR9 CTL_REG(0x0024)
80
/* bit 2: antenna switch (together with ZD_CR10) */
81
#define ZD_CR10 CTL_REG(0x0028)
82
/* bit 1: antenna switch (together with ZD_CR9)
83
* RF2959 controls with ZD_CR11 radion on and off
85
#define CR11 CTL_REG(0x002C)
85
#define ZD_CR11 CTL_REG(0x002C)
86
86
/* bit 6: TX power control for OFDM
87
* RF2959 controls with CR10 radio on and off
89
#define CR12 CTL_REG(0x0030)
90
#define CR13 CTL_REG(0x0034)
91
#define CR14 CTL_REG(0x0038)
92
#define CR15 CTL_REG(0x003C)
93
#define CR16 CTL_REG(0x0040)
94
#define CR17 CTL_REG(0x0044)
95
#define CR18 CTL_REG(0x0048)
96
#define CR19 CTL_REG(0x004C)
97
#define CR20 CTL_REG(0x0050)
98
#define CR21 CTL_REG(0x0054)
99
#define CR22 CTL_REG(0x0058)
100
#define CR23 CTL_REG(0x005C)
101
#define CR24 CTL_REG(0x0060) /* CCA threshold */
102
#define CR25 CTL_REG(0x0064)
103
#define CR26 CTL_REG(0x0068)
104
#define CR27 CTL_REG(0x006C)
105
#define CR28 CTL_REG(0x0070)
106
#define CR29 CTL_REG(0x0074)
107
#define CR30 CTL_REG(0x0078)
108
#define CR31 CTL_REG(0x007C) /* TX power control for RF in CCK mode */
109
#define CR32 CTL_REG(0x0080)
110
#define CR33 CTL_REG(0x0084)
111
#define CR34 CTL_REG(0x0088)
112
#define CR35 CTL_REG(0x008C)
113
#define CR36 CTL_REG(0x0090)
114
#define CR37 CTL_REG(0x0094)
115
#define CR38 CTL_REG(0x0098)
116
#define CR39 CTL_REG(0x009C)
117
#define CR40 CTL_REG(0x00A0)
118
#define CR41 CTL_REG(0x00A4)
119
#define CR42 CTL_REG(0x00A8)
120
#define CR43 CTL_REG(0x00AC)
121
#define CR44 CTL_REG(0x00B0)
122
#define CR45 CTL_REG(0x00B4)
123
#define CR46 CTL_REG(0x00B8)
124
#define CR47 CTL_REG(0x00BC) /* CCK baseband gain
125
* (patch value might be in EEPROM)
127
#define CR48 CTL_REG(0x00C0)
128
#define CR49 CTL_REG(0x00C4)
129
#define CR50 CTL_REG(0x00C8)
130
#define CR51 CTL_REG(0x00CC) /* TX power control for RF in 6-36M modes */
131
#define CR52 CTL_REG(0x00D0) /* TX power control for RF in 48M mode */
132
#define CR53 CTL_REG(0x00D4) /* TX power control for RF in 54M mode */
133
#define CR54 CTL_REG(0x00D8)
134
#define CR55 CTL_REG(0x00DC)
135
#define CR56 CTL_REG(0x00E0)
136
#define CR57 CTL_REG(0x00E4)
137
#define CR58 CTL_REG(0x00E8)
138
#define CR59 CTL_REG(0x00EC)
139
#define CR60 CTL_REG(0x00F0)
140
#define CR61 CTL_REG(0x00F4)
141
#define CR62 CTL_REG(0x00F8)
142
#define CR63 CTL_REG(0x00FC)
143
#define CR64 CTL_REG(0x0100)
144
#define CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
145
#define CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
146
#define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
147
#define CR68 CTL_REG(0x0110) /* CCK calibration */
148
#define CR69 CTL_REG(0x0114)
149
#define CR70 CTL_REG(0x0118)
150
#define CR71 CTL_REG(0x011C)
151
#define CR72 CTL_REG(0x0120)
152
#define CR73 CTL_REG(0x0124)
153
#define CR74 CTL_REG(0x0128)
154
#define CR75 CTL_REG(0x012C)
155
#define CR76 CTL_REG(0x0130)
156
#define CR77 CTL_REG(0x0134)
157
#define CR78 CTL_REG(0x0138)
158
#define CR79 CTL_REG(0x013C)
159
#define CR80 CTL_REG(0x0140)
160
#define CR81 CTL_REG(0x0144)
161
#define CR82 CTL_REG(0x0148)
162
#define CR83 CTL_REG(0x014C)
163
#define CR84 CTL_REG(0x0150)
164
#define CR85 CTL_REG(0x0154)
165
#define CR86 CTL_REG(0x0158)
166
#define CR87 CTL_REG(0x015C)
167
#define CR88 CTL_REG(0x0160)
168
#define CR89 CTL_REG(0x0164)
169
#define CR90 CTL_REG(0x0168)
170
#define CR91 CTL_REG(0x016C)
171
#define CR92 CTL_REG(0x0170)
172
#define CR93 CTL_REG(0x0174)
173
#define CR94 CTL_REG(0x0178)
174
#define CR95 CTL_REG(0x017C)
175
#define CR96 CTL_REG(0x0180)
176
#define CR97 CTL_REG(0x0184)
177
#define CR98 CTL_REG(0x0188)
178
#define CR99 CTL_REG(0x018C)
179
#define CR100 CTL_REG(0x0190)
180
#define CR101 CTL_REG(0x0194)
181
#define CR102 CTL_REG(0x0198)
182
#define CR103 CTL_REG(0x019C)
183
#define CR104 CTL_REG(0x01A0)
184
#define CR105 CTL_REG(0x01A4)
185
#define CR106 CTL_REG(0x01A8)
186
#define CR107 CTL_REG(0x01AC)
187
#define CR108 CTL_REG(0x01B0)
188
#define CR109 CTL_REG(0x01B4)
189
#define CR110 CTL_REG(0x01B8)
190
#define CR111 CTL_REG(0x01BC)
191
#define CR112 CTL_REG(0x01C0)
192
#define CR113 CTL_REG(0x01C4)
193
#define CR114 CTL_REG(0x01C8)
194
#define CR115 CTL_REG(0x01CC)
195
#define CR116 CTL_REG(0x01D0)
196
#define CR117 CTL_REG(0x01D4)
197
#define CR118 CTL_REG(0x01D8)
198
#define CR119 CTL_REG(0x01DC)
199
#define CR120 CTL_REG(0x01E0)
200
#define CR121 CTL_REG(0x01E4)
201
#define CR122 CTL_REG(0x01E8)
202
#define CR123 CTL_REG(0x01EC)
203
#define CR124 CTL_REG(0x01F0)
204
#define CR125 CTL_REG(0x01F4)
205
#define CR126 CTL_REG(0x01F8)
206
#define CR127 CTL_REG(0x01FC)
207
#define CR128 CTL_REG(0x0200)
208
#define CR129 CTL_REG(0x0204)
209
#define CR130 CTL_REG(0x0208)
210
#define CR131 CTL_REG(0x020C)
211
#define CR132 CTL_REG(0x0210)
212
#define CR133 CTL_REG(0x0214)
213
#define CR134 CTL_REG(0x0218)
214
#define CR135 CTL_REG(0x021C)
215
#define CR136 CTL_REG(0x0220)
216
#define CR137 CTL_REG(0x0224)
217
#define CR138 CTL_REG(0x0228)
218
#define CR139 CTL_REG(0x022C)
219
#define CR140 CTL_REG(0x0230)
220
#define CR141 CTL_REG(0x0234)
221
#define CR142 CTL_REG(0x0238)
222
#define CR143 CTL_REG(0x023C)
223
#define CR144 CTL_REG(0x0240)
224
#define CR145 CTL_REG(0x0244)
225
#define CR146 CTL_REG(0x0248)
226
#define CR147 CTL_REG(0x024C)
227
#define CR148 CTL_REG(0x0250)
228
#define CR149 CTL_REG(0x0254)
229
#define CR150 CTL_REG(0x0258)
230
#define CR151 CTL_REG(0x025C)
231
#define CR152 CTL_REG(0x0260)
232
#define CR153 CTL_REG(0x0264)
233
#define CR154 CTL_REG(0x0268)
234
#define CR155 CTL_REG(0x026C)
235
#define CR156 CTL_REG(0x0270)
236
#define CR157 CTL_REG(0x0274)
237
#define CR158 CTL_REG(0x0278)
238
#define CR159 CTL_REG(0x027C)
239
#define CR160 CTL_REG(0x0280)
240
#define CR161 CTL_REG(0x0284)
241
#define CR162 CTL_REG(0x0288)
242
#define CR163 CTL_REG(0x028C)
243
#define CR164 CTL_REG(0x0290)
244
#define CR165 CTL_REG(0x0294)
245
#define CR166 CTL_REG(0x0298)
246
#define CR167 CTL_REG(0x029C)
247
#define CR168 CTL_REG(0x02A0)
248
#define CR169 CTL_REG(0x02A4)
249
#define CR170 CTL_REG(0x02A8)
250
#define CR171 CTL_REG(0x02AC)
251
#define CR172 CTL_REG(0x02B0)
252
#define CR173 CTL_REG(0x02B4)
253
#define CR174 CTL_REG(0x02B8)
254
#define CR175 CTL_REG(0x02BC)
255
#define CR176 CTL_REG(0x02C0)
256
#define CR177 CTL_REG(0x02C4)
257
#define CR178 CTL_REG(0x02C8)
258
#define CR179 CTL_REG(0x02CC)
259
#define CR180 CTL_REG(0x02D0)
260
#define CR181 CTL_REG(0x02D4)
261
#define CR182 CTL_REG(0x02D8)
262
#define CR183 CTL_REG(0x02DC)
263
#define CR184 CTL_REG(0x02E0)
264
#define CR185 CTL_REG(0x02E4)
265
#define CR186 CTL_REG(0x02E8)
266
#define CR187 CTL_REG(0x02EC)
267
#define CR188 CTL_REG(0x02F0)
268
#define CR189 CTL_REG(0x02F4)
269
#define CR190 CTL_REG(0x02F8)
270
#define CR191 CTL_REG(0x02FC)
271
#define CR192 CTL_REG(0x0300)
272
#define CR193 CTL_REG(0x0304)
273
#define CR194 CTL_REG(0x0308)
274
#define CR195 CTL_REG(0x030C)
275
#define CR196 CTL_REG(0x0310)
276
#define CR197 CTL_REG(0x0314)
277
#define CR198 CTL_REG(0x0318)
278
#define CR199 CTL_REG(0x031C)
279
#define CR200 CTL_REG(0x0320)
280
#define CR201 CTL_REG(0x0324)
281
#define CR202 CTL_REG(0x0328)
282
#define CR203 CTL_REG(0x032C) /* I2C bus template value & flash control */
283
#define CR204 CTL_REG(0x0330)
284
#define CR205 CTL_REG(0x0334)
285
#define CR206 CTL_REG(0x0338)
286
#define CR207 CTL_REG(0x033C)
287
#define CR208 CTL_REG(0x0340)
288
#define CR209 CTL_REG(0x0344)
289
#define CR210 CTL_REG(0x0348)
290
#define CR211 CTL_REG(0x034C)
291
#define CR212 CTL_REG(0x0350)
292
#define CR213 CTL_REG(0x0354)
293
#define CR214 CTL_REG(0x0358)
294
#define CR215 CTL_REG(0x035C)
295
#define CR216 CTL_REG(0x0360)
296
#define CR217 CTL_REG(0x0364)
297
#define CR218 CTL_REG(0x0368)
298
#define CR219 CTL_REG(0x036C)
299
#define CR220 CTL_REG(0x0370)
300
#define CR221 CTL_REG(0x0374)
301
#define CR222 CTL_REG(0x0378)
302
#define CR223 CTL_REG(0x037C)
303
#define CR224 CTL_REG(0x0380)
304
#define CR225 CTL_REG(0x0384)
305
#define CR226 CTL_REG(0x0388)
306
#define CR227 CTL_REG(0x038C)
307
#define CR228 CTL_REG(0x0390)
308
#define CR229 CTL_REG(0x0394)
309
#define CR230 CTL_REG(0x0398)
310
#define CR231 CTL_REG(0x039C)
311
#define CR232 CTL_REG(0x03A0)
312
#define CR233 CTL_REG(0x03A4)
313
#define CR234 CTL_REG(0x03A8)
314
#define CR235 CTL_REG(0x03AC)
315
#define CR236 CTL_REG(0x03B0)
317
#define CR240 CTL_REG(0x03C0)
318
/* bit 7: host-controlled RF register writes
319
* CR241-CR245: for hardware controlled writing of RF bits, not needed for
322
#define CR241 CTL_REG(0x03C4)
323
#define CR242 CTL_REG(0x03C8)
324
#define CR243 CTL_REG(0x03CC)
325
#define CR244 CTL_REG(0x03D0)
326
#define CR245 CTL_REG(0x03D4)
328
#define CR251 CTL_REG(0x03EC) /* only used for activation and deactivation of
329
* Airoha RFs AL2230 and AL7230B
331
#define CR252 CTL_REG(0x03F0)
332
#define CR253 CTL_REG(0x03F4)
333
#define CR254 CTL_REG(0x03F8)
334
#define CR255 CTL_REG(0x03FC)
87
* RF2959 controls with ZD_CR10 radio on and off
89
#define ZD_CR12 CTL_REG(0x0030)
90
#define ZD_CR13 CTL_REG(0x0034)
91
#define ZD_CR14 CTL_REG(0x0038)
92
#define ZD_CR15 CTL_REG(0x003C)
93
#define ZD_CR16 CTL_REG(0x0040)
94
#define ZD_CR17 CTL_REG(0x0044)
95
#define ZD_CR18 CTL_REG(0x0048)
96
#define ZD_CR19 CTL_REG(0x004C)
97
#define ZD_CR20 CTL_REG(0x0050)
98
#define ZD_CR21 CTL_REG(0x0054)
99
#define ZD_CR22 CTL_REG(0x0058)
100
#define ZD_CR23 CTL_REG(0x005C)
101
#define ZD_CR24 CTL_REG(0x0060) /* CCA threshold */
102
#define ZD_CR25 CTL_REG(0x0064)
103
#define ZD_CR26 CTL_REG(0x0068)
104
#define ZD_CR27 CTL_REG(0x006C)
105
#define ZD_CR28 CTL_REG(0x0070)
106
#define ZD_CR29 CTL_REG(0x0074)
107
#define ZD_CR30 CTL_REG(0x0078)
108
#define ZD_CR31 CTL_REG(0x007C) /* TX power control for RF in
111
#define ZD_CR32 CTL_REG(0x0080)
112
#define ZD_CR33 CTL_REG(0x0084)
113
#define ZD_CR34 CTL_REG(0x0088)
114
#define ZD_CR35 CTL_REG(0x008C)
115
#define ZD_CR36 CTL_REG(0x0090)
116
#define ZD_CR37 CTL_REG(0x0094)
117
#define ZD_CR38 CTL_REG(0x0098)
118
#define ZD_CR39 CTL_REG(0x009C)
119
#define ZD_CR40 CTL_REG(0x00A0)
120
#define ZD_CR41 CTL_REG(0x00A4)
121
#define ZD_CR42 CTL_REG(0x00A8)
122
#define ZD_CR43 CTL_REG(0x00AC)
123
#define ZD_CR44 CTL_REG(0x00B0)
124
#define ZD_CR45 CTL_REG(0x00B4)
125
#define ZD_CR46 CTL_REG(0x00B8)
126
#define ZD_CR47 CTL_REG(0x00BC) /* CCK baseband gain
127
* (patch value might be in EEPROM)
129
#define ZD_CR48 CTL_REG(0x00C0)
130
#define ZD_CR49 CTL_REG(0x00C4)
131
#define ZD_CR50 CTL_REG(0x00C8)
132
#define ZD_CR51 CTL_REG(0x00CC) /* TX power control for RF in
135
#define ZD_CR52 CTL_REG(0x00D0) /* TX power control for RF in
138
#define ZD_CR53 CTL_REG(0x00D4) /* TX power control for RF in
141
#define ZD_CR54 CTL_REG(0x00D8)
142
#define ZD_CR55 CTL_REG(0x00DC)
143
#define ZD_CR56 CTL_REG(0x00E0)
144
#define ZD_CR57 CTL_REG(0x00E4)
145
#define ZD_CR58 CTL_REG(0x00E8)
146
#define ZD_CR59 CTL_REG(0x00EC)
147
#define ZD_CR60 CTL_REG(0x00F0)
148
#define ZD_CR61 CTL_REG(0x00F4)
149
#define ZD_CR62 CTL_REG(0x00F8)
150
#define ZD_CR63 CTL_REG(0x00FC)
151
#define ZD_CR64 CTL_REG(0x0100)
152
#define ZD_CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
153
#define ZD_CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
154
#define ZD_CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
155
#define ZD_CR68 CTL_REG(0x0110) /* CCK calibration */
156
#define ZD_CR69 CTL_REG(0x0114)
157
#define ZD_CR70 CTL_REG(0x0118)
158
#define ZD_CR71 CTL_REG(0x011C)
159
#define ZD_CR72 CTL_REG(0x0120)
160
#define ZD_CR73 CTL_REG(0x0124)
161
#define ZD_CR74 CTL_REG(0x0128)
162
#define ZD_CR75 CTL_REG(0x012C)
163
#define ZD_CR76 CTL_REG(0x0130)
164
#define ZD_CR77 CTL_REG(0x0134)
165
#define ZD_CR78 CTL_REG(0x0138)
166
#define ZD_CR79 CTL_REG(0x013C)
167
#define ZD_CR80 CTL_REG(0x0140)
168
#define ZD_CR81 CTL_REG(0x0144)
169
#define ZD_CR82 CTL_REG(0x0148)
170
#define ZD_CR83 CTL_REG(0x014C)
171
#define ZD_CR84 CTL_REG(0x0150)
172
#define ZD_CR85 CTL_REG(0x0154)
173
#define ZD_CR86 CTL_REG(0x0158)
174
#define ZD_CR87 CTL_REG(0x015C)
175
#define ZD_CR88 CTL_REG(0x0160)
176
#define ZD_CR89 CTL_REG(0x0164)
177
#define ZD_CR90 CTL_REG(0x0168)
178
#define ZD_CR91 CTL_REG(0x016C)
179
#define ZD_CR92 CTL_REG(0x0170)
180
#define ZD_CR93 CTL_REG(0x0174)
181
#define ZD_CR94 CTL_REG(0x0178)
182
#define ZD_CR95 CTL_REG(0x017C)
183
#define ZD_CR96 CTL_REG(0x0180)
184
#define ZD_CR97 CTL_REG(0x0184)
185
#define ZD_CR98 CTL_REG(0x0188)
186
#define ZD_CR99 CTL_REG(0x018C)
187
#define ZD_CR100 CTL_REG(0x0190)
188
#define ZD_CR101 CTL_REG(0x0194)
189
#define ZD_CR102 CTL_REG(0x0198)
190
#define ZD_CR103 CTL_REG(0x019C)
191
#define ZD_CR104 CTL_REG(0x01A0)
192
#define ZD_CR105 CTL_REG(0x01A4)
193
#define ZD_CR106 CTL_REG(0x01A8)
194
#define ZD_CR107 CTL_REG(0x01AC)
195
#define ZD_CR108 CTL_REG(0x01B0)
196
#define ZD_CR109 CTL_REG(0x01B4)
197
#define ZD_CR110 CTL_REG(0x01B8)
198
#define ZD_CR111 CTL_REG(0x01BC)
199
#define ZD_CR112 CTL_REG(0x01C0)
200
#define ZD_CR113 CTL_REG(0x01C4)
201
#define ZD_CR114 CTL_REG(0x01C8)
202
#define ZD_CR115 CTL_REG(0x01CC)
203
#define ZD_CR116 CTL_REG(0x01D0)
204
#define ZD_CR117 CTL_REG(0x01D4)
205
#define ZD_CR118 CTL_REG(0x01D8)
206
#define ZD_CR119 CTL_REG(0x01DC)
207
#define ZD_CR120 CTL_REG(0x01E0)
208
#define ZD_CR121 CTL_REG(0x01E4)
209
#define ZD_CR122 CTL_REG(0x01E8)
210
#define ZD_CR123 CTL_REG(0x01EC)
211
#define ZD_CR124 CTL_REG(0x01F0)
212
#define ZD_CR125 CTL_REG(0x01F4)
213
#define ZD_CR126 CTL_REG(0x01F8)
214
#define ZD_CR127 CTL_REG(0x01FC)
215
#define ZD_CR128 CTL_REG(0x0200)
216
#define ZD_CR129 CTL_REG(0x0204)
217
#define ZD_CR130 CTL_REG(0x0208)
218
#define ZD_CR131 CTL_REG(0x020C)
219
#define ZD_CR132 CTL_REG(0x0210)
220
#define ZD_CR133 CTL_REG(0x0214)
221
#define ZD_CR134 CTL_REG(0x0218)
222
#define ZD_CR135 CTL_REG(0x021C)
223
#define ZD_CR136 CTL_REG(0x0220)
224
#define ZD_CR137 CTL_REG(0x0224)
225
#define ZD_CR138 CTL_REG(0x0228)
226
#define ZD_CR139 CTL_REG(0x022C)
227
#define ZD_CR140 CTL_REG(0x0230)
228
#define ZD_CR141 CTL_REG(0x0234)
229
#define ZD_CR142 CTL_REG(0x0238)
230
#define ZD_CR143 CTL_REG(0x023C)
231
#define ZD_CR144 CTL_REG(0x0240)
232
#define ZD_CR145 CTL_REG(0x0244)
233
#define ZD_CR146 CTL_REG(0x0248)
234
#define ZD_CR147 CTL_REG(0x024C)
235
#define ZD_CR148 CTL_REG(0x0250)
236
#define ZD_CR149 CTL_REG(0x0254)
237
#define ZD_CR150 CTL_REG(0x0258)
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#define ZD_CR151 CTL_REG(0x025C)
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#define ZD_CR152 CTL_REG(0x0260)
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#define ZD_CR153 CTL_REG(0x0264)
241
#define ZD_CR154 CTL_REG(0x0268)
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#define ZD_CR155 CTL_REG(0x026C)
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#define ZD_CR156 CTL_REG(0x0270)
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#define ZD_CR157 CTL_REG(0x0274)
245
#define ZD_CR158 CTL_REG(0x0278)
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#define ZD_CR159 CTL_REG(0x027C)
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#define ZD_CR160 CTL_REG(0x0280)
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#define ZD_CR161 CTL_REG(0x0284)
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#define ZD_CR162 CTL_REG(0x0288)
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#define ZD_CR163 CTL_REG(0x028C)
251
#define ZD_CR164 CTL_REG(0x0290)
252
#define ZD_CR165 CTL_REG(0x0294)
253
#define ZD_CR166 CTL_REG(0x0298)
254
#define ZD_CR167 CTL_REG(0x029C)
255
#define ZD_CR168 CTL_REG(0x02A0)
256
#define ZD_CR169 CTL_REG(0x02A4)
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#define ZD_CR170 CTL_REG(0x02A8)
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#define ZD_CR171 CTL_REG(0x02AC)
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#define ZD_CR172 CTL_REG(0x02B0)
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#define ZD_CR173 CTL_REG(0x02B4)
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#define ZD_CR174 CTL_REG(0x02B8)
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#define ZD_CR175 CTL_REG(0x02BC)
263
#define ZD_CR176 CTL_REG(0x02C0)
264
#define ZD_CR177 CTL_REG(0x02C4)
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#define ZD_CR178 CTL_REG(0x02C8)
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#define ZD_CR179 CTL_REG(0x02CC)
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#define ZD_CR180 CTL_REG(0x02D0)
268
#define ZD_CR181 CTL_REG(0x02D4)
269
#define ZD_CR182 CTL_REG(0x02D8)
270
#define ZD_CR183 CTL_REG(0x02DC)
271
#define ZD_CR184 CTL_REG(0x02E0)
272
#define ZD_CR185 CTL_REG(0x02E4)
273
#define ZD_CR186 CTL_REG(0x02E8)
274
#define ZD_CR187 CTL_REG(0x02EC)
275
#define ZD_CR188 CTL_REG(0x02F0)
276
#define ZD_CR189 CTL_REG(0x02F4)
277
#define ZD_CR190 CTL_REG(0x02F8)
278
#define ZD_CR191 CTL_REG(0x02FC)
279
#define ZD_CR192 CTL_REG(0x0300)
280
#define ZD_CR193 CTL_REG(0x0304)
281
#define ZD_CR194 CTL_REG(0x0308)
282
#define ZD_CR195 CTL_REG(0x030C)
283
#define ZD_CR196 CTL_REG(0x0310)
284
#define ZD_CR197 CTL_REG(0x0314)
285
#define ZD_CR198 CTL_REG(0x0318)
286
#define ZD_CR199 CTL_REG(0x031C)
287
#define ZD_CR200 CTL_REG(0x0320)
288
#define ZD_CR201 CTL_REG(0x0324)
289
#define ZD_CR202 CTL_REG(0x0328)
290
#define ZD_CR203 CTL_REG(0x032C) /* I2C bus template value & flash
293
#define ZD_CR204 CTL_REG(0x0330)
294
#define ZD_CR205 CTL_REG(0x0334)
295
#define ZD_CR206 CTL_REG(0x0338)
296
#define ZD_CR207 CTL_REG(0x033C)
297
#define ZD_CR208 CTL_REG(0x0340)
298
#define ZD_CR209 CTL_REG(0x0344)
299
#define ZD_CR210 CTL_REG(0x0348)
300
#define ZD_CR211 CTL_REG(0x034C)
301
#define ZD_CR212 CTL_REG(0x0350)
302
#define ZD_CR213 CTL_REG(0x0354)
303
#define ZD_CR214 CTL_REG(0x0358)
304
#define ZD_CR215 CTL_REG(0x035C)
305
#define ZD_CR216 CTL_REG(0x0360)
306
#define ZD_CR217 CTL_REG(0x0364)
307
#define ZD_CR218 CTL_REG(0x0368)
308
#define ZD_CR219 CTL_REG(0x036C)
309
#define ZD_CR220 CTL_REG(0x0370)
310
#define ZD_CR221 CTL_REG(0x0374)
311
#define ZD_CR222 CTL_REG(0x0378)
312
#define ZD_CR223 CTL_REG(0x037C)
313
#define ZD_CR224 CTL_REG(0x0380)
314
#define ZD_CR225 CTL_REG(0x0384)
315
#define ZD_CR226 CTL_REG(0x0388)
316
#define ZD_CR227 CTL_REG(0x038C)
317
#define ZD_CR228 CTL_REG(0x0390)
318
#define ZD_CR229 CTL_REG(0x0394)
319
#define ZD_CR230 CTL_REG(0x0398)
320
#define ZD_CR231 CTL_REG(0x039C)
321
#define ZD_CR232 CTL_REG(0x03A0)
322
#define ZD_CR233 CTL_REG(0x03A4)
323
#define ZD_CR234 CTL_REG(0x03A8)
324
#define ZD_CR235 CTL_REG(0x03AC)
325
#define ZD_CR236 CTL_REG(0x03B0)
327
#define ZD_CR240 CTL_REG(0x03C0)
328
/* bit 7: host-controlled RF register writes
329
* ZD_CR241-ZD_CR245: for hardware controlled writing of RF bits, not needed for
332
#define ZD_CR241 CTL_REG(0x03C4)
333
#define ZD_CR242 CTL_REG(0x03C8)
334
#define ZD_CR243 CTL_REG(0x03CC)
335
#define ZD_CR244 CTL_REG(0x03D0)
336
#define ZD_CR245 CTL_REG(0x03D4)
338
#define ZD_CR251 CTL_REG(0x03EC) /* only used for activation and
339
* deactivation of Airoha RFs AL2230
342
#define ZD_CR252 CTL_REG(0x03F0)
343
#define ZD_CR253 CTL_REG(0x03F4)
344
#define ZD_CR254 CTL_REG(0x03F8)
345
#define ZD_CR255 CTL_REG(0x03FC)
336
347
#define CR_MAX_PHY_REG 255