538
539
lcdc_write_chan(ch, LDPMR, 0);
540
541
board_cfg = &ch->cfg.board_cfg;
541
if (board_cfg->setup_sys)
542
ret = board_cfg->setup_sys(board_cfg->board_data, ch,
543
&sh_mobile_lcdc_sys_bus_ops);
542
if (board_cfg->setup_sys) {
543
ret = board_cfg->setup_sys(board_cfg->board_data,
544
ch, &sh_mobile_lcdc_sys_bus_ops);
548
550
/* word and long word swap */
599
604
lcdc_write_chan(ch, LDDFR, tmp);
606
base_addr_y = ch->info->fix.smem_start;
607
base_addr_c = base_addr_y +
609
ch->info->var.yres_virtual;
610
pitch = ch->info->fix.line_length;
612
/* test if we can enable meram */
613
if (ch->cfg.meram_cfg && priv->meram_dev &&
614
priv->meram_dev->ops) {
615
struct sh_mobile_meram_cfg *cfg;
616
struct sh_mobile_meram_info *mdev;
617
unsigned long icb_addr_y, icb_addr_c;
621
cfg = ch->cfg.meram_cfg;
622
mdev = priv->meram_dev;
623
/* we need to de-init configured ICBs before we
624
* we can re-initialize them.
626
if (ch->meram_enabled)
627
mdev->ops->meram_unregister(mdev, cfg);
629
ch->meram_enabled = 0;
631
if (ch->info->var.nonstd) {
632
if (ch->info->var.bits_per_pixel == 24)
633
pf = SH_MOBILE_MERAM_PF_NV24;
635
pf = SH_MOBILE_MERAM_PF_NV;
637
pf = SH_MOBILE_MERAM_PF_RGB;
640
ret = mdev->ops->meram_register(mdev, cfg, pitch,
649
/* set LDSA1R value */
650
base_addr_y = icb_addr_y;
653
/* set LDSA2R value if required */
655
base_addr_c = icb_addr_c;
657
ch->meram_enabled = 1;
601
661
/* point out our frame buffer */
602
lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
662
lcdc_write_chan(ch, LDSA1R, base_addr_y);
603
663
if (ch->info->var.nonstd)
604
lcdc_write_chan(ch, LDSA2R,
605
ch->info->fix.smem_start +
607
ch->info->var.yres_virtual);
664
lcdc_write_chan(ch, LDSA2R, base_addr_c);
609
666
/* set line size */
610
lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
667
lcdc_write_chan(ch, LDMLSR, pitch);
612
669
/* setup deferred io if SYS bus */
613
670
tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
692
749
board_cfg->display_off(board_cfg->board_data);
693
750
module_put(board_cfg->owner);
753
/* disable the meram */
754
if (ch->meram_enabled) {
755
struct sh_mobile_meram_cfg *cfg;
756
struct sh_mobile_meram_info *mdev;
757
cfg = ch->cfg.meram_cfg;
758
mdev = priv->meram_dev;
759
mdev->ops->meram_unregister(mdev, cfg);
760
ch->meram_enabled = 0;
697
765
/* stop the lcdc */
878
lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
880
lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
946
if (!ch->meram_enabled) {
947
lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
949
lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
951
struct sh_mobile_meram_cfg *cfg;
952
struct sh_mobile_meram_info *mdev;
953
unsigned long icb_addr_y, icb_addr_c;
956
cfg = ch->cfg.meram_cfg;
957
mdev = priv->meram_dev;
958
ret = mdev->ops->meram_update(mdev, cfg,
959
base_addr_y, base_addr_c,
960
&icb_addr_y, &icb_addr_c);
964
lcdc_write_chan_mirror(ch, LDSA1R, icb_addr_y);
966
lcdc_write_chan_mirror(ch, LDSA2R, icb_addr_c);
882
970
if (lcdc_chan_is_sublcd(ch))
883
971
lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);