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Viewing changes to drivers/net/wireless/ath/ath9k/ar9002_phy.c

  • Committer: Package Import Robot
  • Author(s): John Rigby, John Rigby
  • Date: 2011-09-26 10:44:23 UTC
  • Revision ID: package-import@ubuntu.com-20110926104423-3o58a3c1bj7x00rs
Tags: 3.0.0-1007.9
https://launchpad.net/bugs/826021
[ John Rigby ]

Enable crypto modules and remove crypto-modules from
exclude-module files
LP: #826021

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drivers/net/wireless/ath/ath9k/ar9002_phy.c
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/*
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 * Copyright (c) 2008-2010 Atheros Communications Inc.
 
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 * Copyright (c) 2008-2011 Atheros Communications Inc.
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 *
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 * Permission to use, copy, modify, and/or distribute this software for any
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 * purpose with or without fee is hereby granted, provided that the above
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        }
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}
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void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
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{
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        struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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        priv_ops->set_rf_regs = NULL;
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        priv_ops->rf_alloc_ext_banks = NULL;
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        priv_ops->rf_free_ext_banks = NULL;
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        priv_ops->rf_set_freq = ar9002_hw_set_channel;
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        priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate;
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        priv_ops->olc_init = ar9002_olc_init;
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        priv_ops->compute_pll_control = ar9002_hw_compute_pll_control;
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        priv_ops->do_getnf = ar9002_hw_do_getnf;
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        ar9002_hw_set_nf_limits(ah);
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}
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void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
 
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static void ar9002_hw_antdiv_comb_conf_get(struct ath_hw *ah,
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                                   struct ath_hw_antcomb_conf *antconf)
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{
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        u32 regval;
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                                 AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
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        antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
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                                  AR_PHY_9285_FAST_DIV_BIAS_S;
 
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        antconf->lna1_lna2_delta = -3;
 
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        antconf->div_group = 0;
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}
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EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_get);
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void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
 
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static void ar9002_hw_antdiv_comb_conf_set(struct ath_hw *ah,
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                                   struct ath_hw_antcomb_conf *antconf)
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{
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        u32 regval;
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        REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
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}
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EXPORT_SYMBOL(ath9k_hw_antdiv_comb_conf_set);
 
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void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
 
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{
 
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        struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
 
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        struct ath_hw_ops *ops = ath9k_hw_ops(ah);
 
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        priv_ops->set_rf_regs = NULL;
 
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        priv_ops->rf_alloc_ext_banks = NULL;
 
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        priv_ops->rf_free_ext_banks = NULL;
 
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        priv_ops->rf_set_freq = ar9002_hw_set_channel;
 
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        priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate;
 
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        priv_ops->olc_init = ar9002_olc_init;
 
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        priv_ops->compute_pll_control = ar9002_hw_compute_pll_control;
 
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        priv_ops->do_getnf = ar9002_hw_do_getnf;
 
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        ops->antdiv_comb_conf_get = ar9002_hw_antdiv_comb_conf_get;
 
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        ops->antdiv_comb_conf_set = ar9002_hw_antdiv_comb_conf_set;
 
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        ar9002_hw_set_nf_limits(ah);
 
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}