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//===- TableGen'erated file -------------------------------------*- C++ -*-===//
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// "Fast" Instruction Selector for the X86 target
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// Automatically generated file, do not edit!
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//===----------------------------------------------------------------------===//
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// FastEmit functions for ISD::Constant.
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unsigned FastEmit_ISD_Constant_MVT_i8_i(MVT RetVT, uint64_t imm0) {
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if (RetVT.SimpleTy != MVT::i8)
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return FastEmitInst_i(X86::MOV8ri, X86::GR8RegisterClass, imm0);
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unsigned FastEmit_ISD_Constant_MVT_i16_i(MVT RetVT, uint64_t imm0) {
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if (RetVT.SimpleTy != MVT::i16)
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return FastEmitInst_i(X86::MOV16ri, X86::GR16RegisterClass, imm0);
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unsigned FastEmit_ISD_Constant_MVT_i32_i(MVT RetVT, uint64_t imm0) {
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if (RetVT.SimpleTy != MVT::i32)
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return FastEmitInst_i(X86::MOV32ri, X86::GR32RegisterClass, imm0);
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unsigned FastEmit_ISD_Constant_MVT_i64_i(MVT RetVT, uint64_t imm0) {
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if (RetVT.SimpleTy != MVT::i64)
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return FastEmitInst_i(X86::MOV64ri, X86::GR64RegisterClass, imm0);
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unsigned FastEmit_ISD_Constant_i(MVT VT, MVT RetVT, uint64_t imm0) {
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switch (VT.SimpleTy) {
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case MVT::i8: return FastEmit_ISD_Constant_MVT_i8_i(RetVT, imm0);
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case MVT::i16: return FastEmit_ISD_Constant_MVT_i16_i(RetVT, imm0);
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case MVT::i32: return FastEmit_ISD_Constant_MVT_i32_i(RetVT, imm0);
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case MVT::i64: return FastEmit_ISD_Constant_MVT_i64_i(RetVT, imm0);
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// Top-level FastEmit function.
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unsigned FastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t imm0) {
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case ISD::Constant: return FastEmit_ISD_Constant_i(VT, RetVT, imm0);
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// FastEmit functions for ISD::ANY_EXTEND.
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i16_r(unsigned Op0) {
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return FastEmitInst_r(X86::MOVZX16rr8, X86::GR16RegisterClass, Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0) {
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return FastEmitInst_r(X86::MOVZX32rr8, X86::GR32RegisterClass, Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MOVZX64rr8, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i16: return FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i16_r(Op0);
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case MVT::i32: return FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i32_r(Op0);
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case MVT::i64: return FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i64_r(Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i16_MVT_i32_r(unsigned Op0) {
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return FastEmitInst_r(X86::MOVZX32rr16, X86::GR32RegisterClass, Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i16_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MOVZX64rr16, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i32: return FastEmit_ISD_ANY_EXTEND_MVT_i16_MVT_i32_r(Op0);
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case MVT::i64: return FastEmit_ISD_ANY_EXTEND_MVT_i16_MVT_i64_r(Op0);
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unsigned FastEmit_ISD_ANY_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) {
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switch (VT.SimpleTy) {
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case MVT::i8: return FastEmit_ISD_ANY_EXTEND_MVT_i8_r(RetVT, Op0);
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case MVT::i16: return FastEmit_ISD_ANY_EXTEND_MVT_i16_r(RetVT, Op0);
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// FastEmit functions for ISD::BIT_CONVERT.
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f32)
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if ((Subtarget->hasSSE2())) {
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return FastEmitInst_r(X86::MOVDI2SSrr, X86::FR32RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_f64_r(unsigned Op0) {
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if ((Subtarget->hasSSE2())) {
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return FastEmitInst_r(X86::MOV64toSDrr, X86::FR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v8i8_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64to64rr, X86::VR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v4i16_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64to64rr, X86::VR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v2i32_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64to64rr, X86::VR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v1i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64to64rr, X86::VR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v2f32_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64to64rr, X86::VR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_i64_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_f64_r(Op0);
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case MVT::v8i8: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v8i8_r(Op0);
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case MVT::v4i16: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v4i16_r(Op0);
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case MVT::v2i32: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v2i32_r(Op0);
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case MVT::v1i64: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v1i64_r(Op0);
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case MVT::v2f32: return FastEmit_ISD_BIT_CONVERT_MVT_i64_MVT_v2f32_r(Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_f32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::i32)
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if ((Subtarget->hasSSE2())) {
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return FastEmitInst_r(X86::MOVSS2DIrr, X86::GR32RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_f64_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::i64)
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if ((Subtarget->hasSSE2())) {
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return FastEmitInst_r(X86::MOVSDto64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v8i8_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64from64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v8i8_MVT_f64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVQ2FR64rr, X86::FR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v8i8_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i64: return FastEmit_ISD_BIT_CONVERT_MVT_v8i8_MVT_i64_r(Op0);
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_v8i8_MVT_f64_r(Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v4i16_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64from64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v4i16_MVT_f64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVQ2FR64rr, X86::FR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v4i16_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i64: return FastEmit_ISD_BIT_CONVERT_MVT_v4i16_MVT_i64_r(Op0);
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_v4i16_MVT_f64_r(Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v2i32_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64from64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v2i32_MVT_f64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVQ2FR64rr, X86::FR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v2i32_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i64: return FastEmit_ISD_BIT_CONVERT_MVT_v2i32_MVT_i64_r(Op0);
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_v2i32_MVT_f64_r(Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v1i64_MVT_i64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVD64from64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v1i64_MVT_f64_r(unsigned Op0) {
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return FastEmitInst_r(X86::MMX_MOVQ2FR64rr, X86::FR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v1i64_r(MVT RetVT, unsigned Op0) {
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switch (RetVT.SimpleTy) {
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case MVT::i64: return FastEmit_ISD_BIT_CONVERT_MVT_v1i64_MVT_i64_r(Op0);
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_v1i64_MVT_f64_r(Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_MVT_v2f32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::i64)
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return FastEmitInst_r(X86::MMX_MOVD64from64rr, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BIT_CONVERT_r(MVT VT, MVT RetVT, unsigned Op0) {
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switch (VT.SimpleTy) {
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case MVT::i32: return FastEmit_ISD_BIT_CONVERT_MVT_i32_r(RetVT, Op0);
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case MVT::i64: return FastEmit_ISD_BIT_CONVERT_MVT_i64_r(RetVT, Op0);
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case MVT::f32: return FastEmit_ISD_BIT_CONVERT_MVT_f32_r(RetVT, Op0);
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case MVT::f64: return FastEmit_ISD_BIT_CONVERT_MVT_f64_r(RetVT, Op0);
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case MVT::v8i8: return FastEmit_ISD_BIT_CONVERT_MVT_v8i8_r(RetVT, Op0);
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case MVT::v4i16: return FastEmit_ISD_BIT_CONVERT_MVT_v4i16_r(RetVT, Op0);
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case MVT::v2i32: return FastEmit_ISD_BIT_CONVERT_MVT_v2i32_r(RetVT, Op0);
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case MVT::v1i64: return FastEmit_ISD_BIT_CONVERT_MVT_v1i64_r(RetVT, Op0);
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case MVT::v2f32: return FastEmit_ISD_BIT_CONVERT_MVT_v2f32_r(RetVT, Op0);
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// FastEmit functions for ISD::BRIND.
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unsigned FastEmit_ISD_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::isVoid)
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return FastEmitInst_r(X86::JMP32r, X86::GR32RegisterClass, Op0);
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unsigned FastEmit_ISD_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::isVoid)
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return FastEmitInst_r(X86::JMP64r, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0) {
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switch (VT.SimpleTy) {
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case MVT::i32: return FastEmit_ISD_BRIND_MVT_i32_r(RetVT, Op0);
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case MVT::i64: return FastEmit_ISD_BRIND_MVT_i64_r(RetVT, Op0);
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// FastEmit functions for ISD::BSWAP.
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unsigned FastEmit_ISD_BSWAP_MVT_i32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::i32)
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return FastEmitInst_r(X86::BSWAP32r, X86::GR32RegisterClass, Op0);
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unsigned FastEmit_ISD_BSWAP_MVT_i64_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::i64)
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return FastEmitInst_r(X86::BSWAP64r, X86::GR64RegisterClass, Op0);
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unsigned FastEmit_ISD_BSWAP_r(MVT VT, MVT RetVT, unsigned Op0) {
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switch (VT.SimpleTy) {
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case MVT::i32: return FastEmit_ISD_BSWAP_MVT_i32_r(RetVT, Op0);
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case MVT::i64: return FastEmit_ISD_BSWAP_MVT_i64_r(RetVT, Op0);
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// FastEmit functions for ISD::FABS.
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unsigned FastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f32)
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if ((!Subtarget->hasSSE1())) {
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return FastEmitInst_r(X86::ABS_Fp32, X86::RFP32RegisterClass, Op0);
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unsigned FastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f64)
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if ((!Subtarget->hasSSE2())) {
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return FastEmitInst_r(X86::ABS_Fp64, X86::RFP64RegisterClass, Op0);
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unsigned FastEmit_ISD_FABS_MVT_f80_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f80)
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return FastEmitInst_r(X86::ABS_Fp80, X86::RFP80RegisterClass, Op0);
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unsigned FastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0) {
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switch (VT.SimpleTy) {
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case MVT::f32: return FastEmit_ISD_FABS_MVT_f32_r(RetVT, Op0);
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case MVT::f64: return FastEmit_ISD_FABS_MVT_f64_r(RetVT, Op0);
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case MVT::f80: return FastEmit_ISD_FABS_MVT_f80_r(RetVT, Op0);
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// FastEmit functions for ISD::FCOS.
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unsigned FastEmit_ISD_FCOS_MVT_f32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f32)
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if ((!Subtarget->hasSSE1())) {
339
return FastEmitInst_r(X86::COS_Fp32, X86::RFP32RegisterClass, Op0);
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unsigned FastEmit_ISD_FCOS_MVT_f64_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f64)
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if ((!Subtarget->hasSSE2())) {
348
return FastEmitInst_r(X86::COS_Fp64, X86::RFP64RegisterClass, Op0);
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unsigned FastEmit_ISD_FCOS_MVT_f80_r(MVT RetVT, unsigned Op0) {
354
if (RetVT.SimpleTy != MVT::f80)
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return FastEmitInst_r(X86::COS_Fp80, X86::RFP80RegisterClass, Op0);
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unsigned FastEmit_ISD_FCOS_r(MVT VT, MVT RetVT, unsigned Op0) {
360
switch (VT.SimpleTy) {
361
case MVT::f32: return FastEmit_ISD_FCOS_MVT_f32_r(RetVT, Op0);
362
case MVT::f64: return FastEmit_ISD_FCOS_MVT_f64_r(RetVT, Op0);
363
case MVT::f80: return FastEmit_ISD_FCOS_MVT_f80_r(RetVT, Op0);
368
// FastEmit functions for ISD::FNEG.
370
unsigned FastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0) {
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if (RetVT.SimpleTy != MVT::f32)
373
if ((!Subtarget->hasSSE1())) {
374
return FastEmitInst_r(X86::CHS_Fp32, X86::RFP32RegisterClass, Op0);
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unsigned FastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0) {
380
if (RetVT.SimpleTy != MVT::f64)
382
if ((!Subtarget->hasSSE2())) {
383
return FastEmitInst_r(X86::CHS_Fp64, X86::RFP64RegisterClass, Op0);
388
unsigned FastEmit_ISD_FNEG_MVT_f80_r(MVT RetVT, unsigned Op0) {
389
if (RetVT.SimpleTy != MVT::f80)
391
return FastEmitInst_r(X86::CHS_Fp80, X86::RFP80RegisterClass, Op0);
394
unsigned FastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0) {
395
switch (VT.SimpleTy) {
396
case MVT::f32: return FastEmit_ISD_FNEG_MVT_f32_r(RetVT, Op0);
397
case MVT::f64: return FastEmit_ISD_FNEG_MVT_f64_r(RetVT, Op0);
398
case MVT::f80: return FastEmit_ISD_FNEG_MVT_f80_r(RetVT, Op0);
403
// FastEmit functions for ISD::FP_EXTEND.
405
unsigned FastEmit_ISD_FP_EXTEND_MVT_f32_MVT_f64_r(unsigned Op0) {
406
if ((!Subtarget->hasSSE1())) {
407
return FastEmitInst_r(X86::MOV_Fp3264, X86::RFP64RegisterClass, Op0);
409
if ((Subtarget->hasSSE2())) {
410
return FastEmitInst_r(X86::CVTSS2SDrr, X86::FR64RegisterClass, Op0);
415
unsigned FastEmit_ISD_FP_EXTEND_MVT_f32_MVT_f80_r(unsigned Op0) {
416
if ((!Subtarget->hasSSE1())) {
417
return FastEmitInst_r(X86::MOV_Fp3280, X86::RFP80RegisterClass, Op0);
422
unsigned FastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0) {
423
switch (RetVT.SimpleTy) {
424
case MVT::f64: return FastEmit_ISD_FP_EXTEND_MVT_f32_MVT_f64_r(Op0);
425
case MVT::f80: return FastEmit_ISD_FP_EXTEND_MVT_f32_MVT_f80_r(Op0);
430
unsigned FastEmit_ISD_FP_EXTEND_MVT_f64_r(MVT RetVT, unsigned Op0) {
431
if (RetVT.SimpleTy != MVT::f80)
433
if ((!Subtarget->hasSSE2())) {
434
return FastEmitInst_r(X86::MOV_Fp6480, X86::RFP80RegisterClass, Op0);
439
unsigned FastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) {
440
switch (VT.SimpleTy) {
441
case MVT::f32: return FastEmit_ISD_FP_EXTEND_MVT_f32_r(RetVT, Op0);
442
case MVT::f64: return FastEmit_ISD_FP_EXTEND_MVT_f64_r(RetVT, Op0);
447
// FastEmit functions for ISD::FP_ROUND.
449
unsigned FastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0) {
450
if (RetVT.SimpleTy != MVT::f32)
452
if ((!Subtarget->hasSSE1())) {
453
return FastEmitInst_r(X86::MOV_Fp6432, X86::RFP32RegisterClass, Op0);
455
if ((Subtarget->hasSSE2())) {
456
return FastEmitInst_r(X86::CVTSD2SSrr, X86::FR32RegisterClass, Op0);
461
unsigned FastEmit_ISD_FP_ROUND_MVT_f80_MVT_f32_r(unsigned Op0) {
462
if ((!Subtarget->hasSSE1())) {
463
return FastEmitInst_r(X86::MOV_Fp8032, X86::RFP32RegisterClass, Op0);
468
unsigned FastEmit_ISD_FP_ROUND_MVT_f80_MVT_f64_r(unsigned Op0) {
469
if ((!Subtarget->hasSSE2())) {
470
return FastEmitInst_r(X86::MOV_Fp8064, X86::RFP64RegisterClass, Op0);
475
unsigned FastEmit_ISD_FP_ROUND_MVT_f80_r(MVT RetVT, unsigned Op0) {
476
switch (RetVT.SimpleTy) {
477
case MVT::f32: return FastEmit_ISD_FP_ROUND_MVT_f80_MVT_f32_r(Op0);
478
case MVT::f64: return FastEmit_ISD_FP_ROUND_MVT_f80_MVT_f64_r(Op0);
483
unsigned FastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0) {
484
switch (VT.SimpleTy) {
485
case MVT::f64: return FastEmit_ISD_FP_ROUND_MVT_f64_r(RetVT, Op0);
486
case MVT::f80: return FastEmit_ISD_FP_ROUND_MVT_f80_r(RetVT, Op0);
491
// FastEmit functions for ISD::FP_TO_SINT.
493
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(unsigned Op0) {
494
if ((Subtarget->hasSSE1())) {
495
return FastEmitInst_r(X86::CVTTSS2SIrr, X86::GR32RegisterClass, Op0);
500
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(unsigned Op0) {
501
if ((Subtarget->hasSSE1())) {
502
return FastEmitInst_r(X86::CVTTSS2SI64rr, X86::GR64RegisterClass, Op0);
507
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f32_r(MVT RetVT, unsigned Op0) {
508
switch (RetVT.SimpleTy) {
509
case MVT::i32: return FastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(Op0);
510
case MVT::i64: return FastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(Op0);
515
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(unsigned Op0) {
516
if ((Subtarget->hasSSE2())) {
517
return FastEmitInst_r(X86::CVTTSD2SIrr, X86::GR32RegisterClass, Op0);
522
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(unsigned Op0) {
523
if ((Subtarget->hasSSE2())) {
524
return FastEmitInst_r(X86::CVTTSD2SI64rr, X86::GR64RegisterClass, Op0);
529
unsigned FastEmit_ISD_FP_TO_SINT_MVT_f64_r(MVT RetVT, unsigned Op0) {
530
switch (RetVT.SimpleTy) {
531
case MVT::i32: return FastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(Op0);
532
case MVT::i64: return FastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(Op0);
537
unsigned FastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0) {
538
if (RetVT.SimpleTy != MVT::v4i32)
540
if ((Subtarget->hasSSE2())) {
541
return FastEmitInst_r(X86::Int_CVTTPS2DQrr, X86::VR128RegisterClass, Op0);
546
unsigned FastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(MVT RetVT, unsigned Op0) {
547
if (RetVT.SimpleTy != MVT::v2i32)
549
if ((Subtarget->hasSSE2())) {
550
return FastEmitInst_r(X86::Int_CVTTPD2PIrr, X86::VR64RegisterClass, Op0);
555
unsigned FastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0) {
556
switch (VT.SimpleTy) {
557
case MVT::f32: return FastEmit_ISD_FP_TO_SINT_MVT_f32_r(RetVT, Op0);
558
case MVT::f64: return FastEmit_ISD_FP_TO_SINT_MVT_f64_r(RetVT, Op0);
559
case MVT::v4f32: return FastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(RetVT, Op0);
560
case MVT::v2f64: return FastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(RetVT, Op0);
565
// FastEmit functions for ISD::FSIN.
567
unsigned FastEmit_ISD_FSIN_MVT_f32_r(MVT RetVT, unsigned Op0) {
568
if (RetVT.SimpleTy != MVT::f32)
570
if ((!Subtarget->hasSSE1())) {
571
return FastEmitInst_r(X86::SIN_Fp32, X86::RFP32RegisterClass, Op0);
576
unsigned FastEmit_ISD_FSIN_MVT_f64_r(MVT RetVT, unsigned Op0) {
577
if (RetVT.SimpleTy != MVT::f64)
579
if ((!Subtarget->hasSSE2())) {
580
return FastEmitInst_r(X86::SIN_Fp64, X86::RFP64RegisterClass, Op0);
585
unsigned FastEmit_ISD_FSIN_MVT_f80_r(MVT RetVT, unsigned Op0) {
586
if (RetVT.SimpleTy != MVT::f80)
588
return FastEmitInst_r(X86::SIN_Fp80, X86::RFP80RegisterClass, Op0);
591
unsigned FastEmit_ISD_FSIN_r(MVT VT, MVT RetVT, unsigned Op0) {
592
switch (VT.SimpleTy) {
593
case MVT::f32: return FastEmit_ISD_FSIN_MVT_f32_r(RetVT, Op0);
594
case MVT::f64: return FastEmit_ISD_FSIN_MVT_f64_r(RetVT, Op0);
595
case MVT::f80: return FastEmit_ISD_FSIN_MVT_f80_r(RetVT, Op0);
600
// FastEmit functions for ISD::FSQRT.
602
unsigned FastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0) {
603
if (RetVT.SimpleTy != MVT::f32)
605
if ((!Subtarget->hasSSE1())) {
606
return FastEmitInst_r(X86::SQRT_Fp32, X86::RFP32RegisterClass, Op0);
608
if ((Subtarget->hasSSE1())) {
609
return FastEmitInst_r(X86::SQRTSSr, X86::FR32RegisterClass, Op0);
614
unsigned FastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0) {
615
if (RetVT.SimpleTy != MVT::f64)
617
if ((!Subtarget->hasSSE2())) {
618
return FastEmitInst_r(X86::SQRT_Fp64, X86::RFP64RegisterClass, Op0);
620
if ((Subtarget->hasSSE2())) {
621
return FastEmitInst_r(X86::SQRTSDr, X86::FR64RegisterClass, Op0);
626
unsigned FastEmit_ISD_FSQRT_MVT_f80_r(MVT RetVT, unsigned Op0) {
627
if (RetVT.SimpleTy != MVT::f80)
629
return FastEmitInst_r(X86::SQRT_Fp80, X86::RFP80RegisterClass, Op0);
632
unsigned FastEmit_ISD_FSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0) {
633
if (RetVT.SimpleTy != MVT::v4f32)
635
if ((Subtarget->hasSSE1())) {
636
return FastEmitInst_r(X86::SQRTPSr, X86::VR128RegisterClass, Op0);
641
unsigned FastEmit_ISD_FSQRT_MVT_v2f64_r(MVT RetVT, unsigned Op0) {
642
if (RetVT.SimpleTy != MVT::v2f64)
644
if ((Subtarget->hasSSE2())) {
645
return FastEmitInst_r(X86::SQRTPDr, X86::VR128RegisterClass, Op0);
650
unsigned FastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0) {
651
switch (VT.SimpleTy) {
652
case MVT::f32: return FastEmit_ISD_FSQRT_MVT_f32_r(RetVT, Op0);
653
case MVT::f64: return FastEmit_ISD_FSQRT_MVT_f64_r(RetVT, Op0);
654
case MVT::f80: return FastEmit_ISD_FSQRT_MVT_f80_r(RetVT, Op0);
655
case MVT::v4f32: return FastEmit_ISD_FSQRT_MVT_v4f32_r(RetVT, Op0);
656
case MVT::v2f64: return FastEmit_ISD_FSQRT_MVT_v2f64_r(RetVT, Op0);
661
// FastEmit functions for ISD::SCALAR_TO_VECTOR.
663
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v2i32_r(unsigned Op0) {
664
if ((Subtarget->hasMMX())) {
665
return FastEmitInst_r(X86::MMX_MOVD64rr, X86::VR64RegisterClass, Op0);
670
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(unsigned Op0) {
671
if ((Subtarget->hasSSE2())) {
672
return FastEmitInst_r(X86::MOVDI2PDIrr, X86::VR128RegisterClass, Op0);
677
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(MVT RetVT, unsigned Op0) {
678
switch (RetVT.SimpleTy) {
679
case MVT::v2i32: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v2i32_r(Op0);
680
case MVT::v4i32: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(Op0);
685
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_MVT_v1i64_r(unsigned Op0) {
686
if ((Subtarget->hasMMX())) {
687
return FastEmitInst_r(X86::MMX_MOVD64rrv164, X86::VR64RegisterClass, Op0);
692
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_MVT_v2i64_r(unsigned Op0) {
693
if ((Subtarget->hasSSE2())) {
694
return FastEmitInst_r(X86::MOV64toPQIrr, X86::VR128RegisterClass, Op0);
699
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(MVT RetVT, unsigned Op0) {
700
switch (RetVT.SimpleTy) {
701
case MVT::v1i64: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_MVT_v1i64_r(Op0);
702
case MVT::v2i64: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_MVT_v2i64_r(Op0);
707
unsigned FastEmit_ISD_SCALAR_TO_VECTOR_r(MVT VT, MVT RetVT, unsigned Op0) {
708
switch (VT.SimpleTy) {
709
case MVT::i32: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(RetVT, Op0);
710
case MVT::i64: return FastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(RetVT, Op0);
715
// FastEmit functions for ISD::SIGN_EXTEND.
717
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i16_r(unsigned Op0) {
718
return FastEmitInst_r(X86::MOVSX16rr8, X86::GR16RegisterClass, Op0);
721
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0) {
722
return FastEmitInst_r(X86::MOVSX32rr8, X86::GR32RegisterClass, Op0);
725
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0) {
726
return FastEmitInst_r(X86::MOVSX64rr8, X86::GR64RegisterClass, Op0);
729
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0) {
730
switch (RetVT.SimpleTy) {
731
case MVT::i16: return FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i16_r(Op0);
732
case MVT::i32: return FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(Op0);
733
case MVT::i64: return FastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(Op0);
738
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(unsigned Op0) {
739
return FastEmitInst_r(X86::MOVSX32rr16, X86::GR32RegisterClass, Op0);
742
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(unsigned Op0) {
743
return FastEmitInst_r(X86::MOVSX64rr16, X86::GR64RegisterClass, Op0);
746
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0) {
747
switch (RetVT.SimpleTy) {
748
case MVT::i32: return FastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(Op0);
749
case MVT::i64: return FastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(Op0);
754
unsigned FastEmit_ISD_SIGN_EXTEND_MVT_i32_r(MVT RetVT, unsigned Op0) {
755
if (RetVT.SimpleTy != MVT::i64)
757
return FastEmitInst_r(X86::MOVSX64rr32, X86::GR64RegisterClass, Op0);
760
unsigned FastEmit_ISD_SIGN_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) {
761
switch (VT.SimpleTy) {
762
case MVT::i8: return FastEmit_ISD_SIGN_EXTEND_MVT_i8_r(RetVT, Op0);
763
case MVT::i16: return FastEmit_ISD_SIGN_EXTEND_MVT_i16_r(RetVT, Op0);
764
case MVT::i32: return FastEmit_ISD_SIGN_EXTEND_MVT_i32_r(RetVT, Op0);
769
// FastEmit functions for ISD::SINT_TO_FP.
771
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0) {
772
if ((Subtarget->hasSSE1())) {
773
return FastEmitInst_r(X86::CVTSI2SSrr, X86::FR32RegisterClass, Op0);
778
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0) {
779
if ((Subtarget->hasSSE2())) {
780
return FastEmitInst_r(X86::CVTSI2SDrr, X86::FR64RegisterClass, Op0);
785
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0) {
786
switch (RetVT.SimpleTy) {
787
case MVT::f32: return FastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(Op0);
788
case MVT::f64: return FastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(Op0);
793
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(unsigned Op0) {
794
if ((Subtarget->hasSSE1())) {
795
return FastEmitInst_r(X86::CVTSI2SS64rr, X86::FR32RegisterClass, Op0);
800
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(unsigned Op0) {
801
if ((Subtarget->hasSSE2())) {
802
return FastEmitInst_r(X86::CVTSI2SD64rr, X86::FR64RegisterClass, Op0);
807
unsigned FastEmit_ISD_SINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0) {
808
switch (RetVT.SimpleTy) {
809
case MVT::f32: return FastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(Op0);
810
case MVT::f64: return FastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(Op0);
815
unsigned FastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(MVT RetVT, unsigned Op0) {
816
if (RetVT.SimpleTy != MVT::v2f64)
818
if ((Subtarget->hasSSE2())) {
819
return FastEmitInst_r(X86::Int_CVTPI2PDrr, X86::VR128RegisterClass, Op0);
824
unsigned FastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0) {
825
if (RetVT.SimpleTy != MVT::v4f32)
827
if ((Subtarget->hasSSE2())) {
828
return FastEmitInst_r(X86::Int_CVTDQ2PSrr, X86::VR128RegisterClass, Op0);
833
unsigned FastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0) {
834
switch (VT.SimpleTy) {
835
case MVT::i32: return FastEmit_ISD_SINT_TO_FP_MVT_i32_r(RetVT, Op0);
836
case MVT::i64: return FastEmit_ISD_SINT_TO_FP_MVT_i64_r(RetVT, Op0);
837
case MVT::v2i32: return FastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(RetVT, Op0);
838
case MVT::v4i32: return FastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(RetVT, Op0);
843
// FastEmit functions for ISD::TRUNCATE.
845
unsigned FastEmit_ISD_TRUNCATE_MVT_i16_r(MVT RetVT, unsigned Op0) {
846
if (RetVT.SimpleTy != MVT::i8)
848
if ((Subtarget->is64Bit())) {
849
return FastEmitInst_extractsubreg(RetVT, Op0, 1);
854
unsigned FastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(unsigned Op0) {
855
if ((Subtarget->is64Bit())) {
856
return FastEmitInst_extractsubreg(MVT::i8, Op0, 1);
861
unsigned FastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(unsigned Op0) {
862
return FastEmitInst_extractsubreg(MVT::i16, Op0, 3);
865
unsigned FastEmit_ISD_TRUNCATE_MVT_i32_r(MVT RetVT, unsigned Op0) {
866
switch (RetVT.SimpleTy) {
867
case MVT::i8: return FastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(Op0);
868
case MVT::i16: return FastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(Op0);
873
unsigned FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(unsigned Op0) {
874
return FastEmitInst_extractsubreg(MVT::i8, Op0, 1);
877
unsigned FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(unsigned Op0) {
878
return FastEmitInst_extractsubreg(MVT::i16, Op0, 3);
881
unsigned FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(unsigned Op0) {
882
return FastEmitInst_extractsubreg(MVT::i32, Op0, 4);
885
unsigned FastEmit_ISD_TRUNCATE_MVT_i64_r(MVT RetVT, unsigned Op0) {
886
switch (RetVT.SimpleTy) {
887
case MVT::i8: return FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(Op0);
888
case MVT::i16: return FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(Op0);
889
case MVT::i32: return FastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(Op0);
894
unsigned FastEmit_ISD_TRUNCATE_r(MVT VT, MVT RetVT, unsigned Op0) {
895
switch (VT.SimpleTy) {
896
case MVT::i16: return FastEmit_ISD_TRUNCATE_MVT_i16_r(RetVT, Op0);
897
case MVT::i32: return FastEmit_ISD_TRUNCATE_MVT_i32_r(RetVT, Op0);
898
case MVT::i64: return FastEmit_ISD_TRUNCATE_MVT_i64_r(RetVT, Op0);
903
// FastEmit functions for ISD::ZERO_EXTEND.
905
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i16_r(unsigned Op0) {
906
return FastEmitInst_r(X86::MOVZX16rr8, X86::GR16RegisterClass, Op0);
909
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0) {
910
return FastEmitInst_r(X86::MOVZX32rr8, X86::GR32RegisterClass, Op0);
913
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0) {
914
return FastEmitInst_r(X86::MOVZX64rr8, X86::GR64RegisterClass, Op0);
917
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0) {
918
switch (RetVT.SimpleTy) {
919
case MVT::i16: return FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i16_r(Op0);
920
case MVT::i32: return FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i32_r(Op0);
921
case MVT::i64: return FastEmit_ISD_ZERO_EXTEND_MVT_i8_MVT_i64_r(Op0);
926
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i16_MVT_i32_r(unsigned Op0) {
927
return FastEmitInst_r(X86::MOVZX32rr16, X86::GR32RegisterClass, Op0);
930
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i16_MVT_i64_r(unsigned Op0) {
931
return FastEmitInst_r(X86::MOVZX64rr16, X86::GR64RegisterClass, Op0);
934
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0) {
935
switch (RetVT.SimpleTy) {
936
case MVT::i32: return FastEmit_ISD_ZERO_EXTEND_MVT_i16_MVT_i32_r(Op0);
937
case MVT::i64: return FastEmit_ISD_ZERO_EXTEND_MVT_i16_MVT_i64_r(Op0);
942
unsigned FastEmit_ISD_ZERO_EXTEND_MVT_i32_r(MVT RetVT, unsigned Op0) {
943
if (RetVT.SimpleTy != MVT::i64)
945
return FastEmitInst_r(X86::MOVZX64rr32, X86::GR64RegisterClass, Op0);
948
unsigned FastEmit_ISD_ZERO_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0) {
949
switch (VT.SimpleTy) {
950
case MVT::i8: return FastEmit_ISD_ZERO_EXTEND_MVT_i8_r(RetVT, Op0);
951
case MVT::i16: return FastEmit_ISD_ZERO_EXTEND_MVT_i16_r(RetVT, Op0);
952
case MVT::i32: return FastEmit_ISD_ZERO_EXTEND_MVT_i32_r(RetVT, Op0);
957
// FastEmit functions for X86ISD::BSF.
959
unsigned FastEmit_X86ISD_BSF_MVT_i16_r(MVT RetVT, unsigned Op0) {
960
if (RetVT.SimpleTy != MVT::i16)
962
return FastEmitInst_r(X86::BSF16rr, X86::GR16RegisterClass, Op0);
965
unsigned FastEmit_X86ISD_BSF_MVT_i32_r(MVT RetVT, unsigned Op0) {
966
if (RetVT.SimpleTy != MVT::i32)
968
return FastEmitInst_r(X86::BSF32rr, X86::GR32RegisterClass, Op0);
971
unsigned FastEmit_X86ISD_BSF_MVT_i64_r(MVT RetVT, unsigned Op0) {
972
if (RetVT.SimpleTy != MVT::i64)
974
return FastEmitInst_r(X86::BSF64rr, X86::GR64RegisterClass, Op0);
977
unsigned FastEmit_X86ISD_BSF_r(MVT VT, MVT RetVT, unsigned Op0) {
978
switch (VT.SimpleTy) {
979
case MVT::i16: return FastEmit_X86ISD_BSF_MVT_i16_r(RetVT, Op0);
980
case MVT::i32: return FastEmit_X86ISD_BSF_MVT_i32_r(RetVT, Op0);
981
case MVT::i64: return FastEmit_X86ISD_BSF_MVT_i64_r(RetVT, Op0);
986
// FastEmit functions for X86ISD::BSR.
988
unsigned FastEmit_X86ISD_BSR_MVT_i16_r(MVT RetVT, unsigned Op0) {
989
if (RetVT.SimpleTy != MVT::i16)
991
return FastEmitInst_r(X86::BSR16rr, X86::GR16RegisterClass, Op0);
994
unsigned FastEmit_X86ISD_BSR_MVT_i32_r(MVT RetVT, unsigned Op0) {
995
if (RetVT.SimpleTy != MVT::i32)
997
return FastEmitInst_r(X86::BSR32rr, X86::GR32RegisterClass, Op0);
1000
unsigned FastEmit_X86ISD_BSR_MVT_i64_r(MVT RetVT, unsigned Op0) {
1001
if (RetVT.SimpleTy != MVT::i64)
1003
return FastEmitInst_r(X86::BSR64rr, X86::GR64RegisterClass, Op0);
1006
unsigned FastEmit_X86ISD_BSR_r(MVT VT, MVT RetVT, unsigned Op0) {
1007
switch (VT.SimpleTy) {
1008
case MVT::i16: return FastEmit_X86ISD_BSR_MVT_i16_r(RetVT, Op0);
1009
case MVT::i32: return FastEmit_X86ISD_BSR_MVT_i32_r(RetVT, Op0);
1010
case MVT::i64: return FastEmit_X86ISD_BSR_MVT_i64_r(RetVT, Op0);
1015
// FastEmit functions for X86ISD::CALL.
1017
unsigned FastEmit_X86ISD_CALL_MVT_i32_r(MVT RetVT, unsigned Op0) {
1018
if (RetVT.SimpleTy != MVT::isVoid)
1020
return FastEmitInst_r(X86::CALL32r, X86::GR32RegisterClass, Op0);
1023
unsigned FastEmit_X86ISD_CALL_MVT_i64_r(MVT RetVT, unsigned Op0) {
1024
if (RetVT.SimpleTy != MVT::isVoid)
1026
if ((!Subtarget->isTargetWin64())) {
1027
return FastEmitInst_r(X86::CALL64r, X86::GR64RegisterClass, Op0);
1029
if ((Subtarget->isTargetWin64())) {
1030
return FastEmitInst_r(X86::WINCALL64r, X86::GR64RegisterClass, Op0);
1035
unsigned FastEmit_X86ISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0) {
1036
switch (VT.SimpleTy) {
1037
case MVT::i32: return FastEmit_X86ISD_CALL_MVT_i32_r(RetVT, Op0);
1038
case MVT::i64: return FastEmit_X86ISD_CALL_MVT_i64_r(RetVT, Op0);
1043
// FastEmit functions for X86ISD::DEC.
1045
unsigned FastEmit_X86ISD_DEC_MVT_i8_r(MVT RetVT, unsigned Op0) {
1046
if (RetVT.SimpleTy != MVT::i8)
1048
return FastEmitInst_r(X86::DEC8r, X86::GR8RegisterClass, Op0);
1051
unsigned FastEmit_X86ISD_DEC_MVT_i16_r(MVT RetVT, unsigned Op0) {
1052
if (RetVT.SimpleTy != MVT::i16)
1054
if ((!Subtarget->is64Bit())) {
1055
return FastEmitInst_r(X86::DEC16r, X86::GR16RegisterClass, Op0);
1057
if ((Subtarget->is64Bit())) {
1058
return FastEmitInst_r(X86::DEC64_16r, X86::GR16RegisterClass, Op0);
1063
unsigned FastEmit_X86ISD_DEC_MVT_i32_r(MVT RetVT, unsigned Op0) {
1064
if (RetVT.SimpleTy != MVT::i32)
1066
if ((!Subtarget->is64Bit())) {
1067
return FastEmitInst_r(X86::DEC32r, X86::GR32RegisterClass, Op0);
1069
if ((Subtarget->is64Bit())) {
1070
return FastEmitInst_r(X86::DEC64_32r, X86::GR32RegisterClass, Op0);
1075
unsigned FastEmit_X86ISD_DEC_MVT_i64_r(MVT RetVT, unsigned Op0) {
1076
if (RetVT.SimpleTy != MVT::i64)
1078
return FastEmitInst_r(X86::DEC64r, X86::GR64RegisterClass, Op0);
1081
unsigned FastEmit_X86ISD_DEC_r(MVT VT, MVT RetVT, unsigned Op0) {
1082
switch (VT.SimpleTy) {
1083
case MVT::i8: return FastEmit_X86ISD_DEC_MVT_i8_r(RetVT, Op0);
1084
case MVT::i16: return FastEmit_X86ISD_DEC_MVT_i16_r(RetVT, Op0);
1085
case MVT::i32: return FastEmit_X86ISD_DEC_MVT_i32_r(RetVT, Op0);
1086
case MVT::i64: return FastEmit_X86ISD_DEC_MVT_i64_r(RetVT, Op0);
1091
// FastEmit functions for X86ISD::EH_RETURN.
1093
unsigned FastEmit_X86ISD_EH_RETURN_MVT_i32_r(MVT RetVT, unsigned Op0) {
1094
if (RetVT.SimpleTy != MVT::isVoid)
1096
return FastEmitInst_r(X86::EH_RETURN, X86::GR32RegisterClass, Op0);
1099
unsigned FastEmit_X86ISD_EH_RETURN_MVT_i64_r(MVT RetVT, unsigned Op0) {
1100
if (RetVT.SimpleTy != MVT::isVoid)
1102
return FastEmitInst_r(X86::EH_RETURN64, X86::GR64RegisterClass, Op0);
1105
unsigned FastEmit_X86ISD_EH_RETURN_r(MVT VT, MVT RetVT, unsigned Op0) {
1106
switch (VT.SimpleTy) {
1107
case MVT::i32: return FastEmit_X86ISD_EH_RETURN_MVT_i32_r(RetVT, Op0);
1108
case MVT::i64: return FastEmit_X86ISD_EH_RETURN_MVT_i64_r(RetVT, Op0);
1113
// FastEmit functions for X86ISD::FRCP.
1115
unsigned FastEmit_X86ISD_FRCP_MVT_f32_r(MVT RetVT, unsigned Op0) {
1116
if (RetVT.SimpleTy != MVT::f32)
1118
if ((Subtarget->hasSSE1())) {
1119
return FastEmitInst_r(X86::RCPSSr, X86::FR32RegisterClass, Op0);
1124
unsigned FastEmit_X86ISD_FRCP_MVT_v4f32_r(MVT RetVT, unsigned Op0) {
1125
if (RetVT.SimpleTy != MVT::v4f32)
1127
if ((Subtarget->hasSSE1())) {
1128
return FastEmitInst_r(X86::RCPPSr, X86::VR128RegisterClass, Op0);
1133
unsigned FastEmit_X86ISD_FRCP_r(MVT VT, MVT RetVT, unsigned Op0) {
1134
switch (VT.SimpleTy) {
1135
case MVT::f32: return FastEmit_X86ISD_FRCP_MVT_f32_r(RetVT, Op0);
1136
case MVT::v4f32: return FastEmit_X86ISD_FRCP_MVT_v4f32_r(RetVT, Op0);
1141
// FastEmit functions for X86ISD::FRSQRT.
1143
unsigned FastEmit_X86ISD_FRSQRT_MVT_f32_r(MVT RetVT, unsigned Op0) {
1144
if (RetVT.SimpleTy != MVT::f32)
1146
if ((Subtarget->hasSSE1())) {
1147
return FastEmitInst_r(X86::RSQRTSSr, X86::FR32RegisterClass, Op0);
1152
unsigned FastEmit_X86ISD_FRSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0) {
1153
if (RetVT.SimpleTy != MVT::v4f32)
1155
if ((Subtarget->hasSSE1())) {
1156
return FastEmitInst_r(X86::RSQRTPSr, X86::VR128RegisterClass, Op0);
1161
unsigned FastEmit_X86ISD_FRSQRT_r(MVT VT, MVT RetVT, unsigned Op0) {
1162
switch (VT.SimpleTy) {
1163
case MVT::f32: return FastEmit_X86ISD_FRSQRT_MVT_f32_r(RetVT, Op0);
1164
case MVT::v4f32: return FastEmit_X86ISD_FRSQRT_MVT_v4f32_r(RetVT, Op0);
1169
// FastEmit functions for X86ISD::INC.
1171
unsigned FastEmit_X86ISD_INC_MVT_i8_r(MVT RetVT, unsigned Op0) {
1172
if (RetVT.SimpleTy != MVT::i8)
1174
return FastEmitInst_r(X86::INC8r, X86::GR8RegisterClass, Op0);
1177
unsigned FastEmit_X86ISD_INC_MVT_i16_r(MVT RetVT, unsigned Op0) {
1178
if (RetVT.SimpleTy != MVT::i16)
1180
if ((!Subtarget->is64Bit())) {
1181
return FastEmitInst_r(X86::INC16r, X86::GR16RegisterClass, Op0);
1183
if ((Subtarget->is64Bit())) {
1184
return FastEmitInst_r(X86::INC64_16r, X86::GR16RegisterClass, Op0);
1189
unsigned FastEmit_X86ISD_INC_MVT_i32_r(MVT RetVT, unsigned Op0) {
1190
if (RetVT.SimpleTy != MVT::i32)
1192
if ((!Subtarget->is64Bit())) {
1193
return FastEmitInst_r(X86::INC32r, X86::GR32RegisterClass, Op0);
1195
if ((Subtarget->is64Bit())) {
1196
return FastEmitInst_r(X86::INC64_32r, X86::GR32RegisterClass, Op0);
1201
unsigned FastEmit_X86ISD_INC_MVT_i64_r(MVT RetVT, unsigned Op0) {
1202
if (RetVT.SimpleTy != MVT::i64)
1204
return FastEmitInst_r(X86::INC64r, X86::GR64RegisterClass, Op0);
1207
unsigned FastEmit_X86ISD_INC_r(MVT VT, MVT RetVT, unsigned Op0) {
1208
switch (VT.SimpleTy) {
1209
case MVT::i8: return FastEmit_X86ISD_INC_MVT_i8_r(RetVT, Op0);
1210
case MVT::i16: return FastEmit_X86ISD_INC_MVT_i16_r(RetVT, Op0);
1211
case MVT::i32: return FastEmit_X86ISD_INC_MVT_i32_r(RetVT, Op0);
1212
case MVT::i64: return FastEmit_X86ISD_INC_MVT_i64_r(RetVT, Op0);
1217
// FastEmit functions for X86ISD::MOVQ2DQ.
1219
unsigned FastEmit_X86ISD_MOVQ2DQ_MVT_v1i64_r(MVT RetVT, unsigned Op0) {
1220
if (RetVT.SimpleTy != MVT::v2i64)
1222
return FastEmitInst_r(X86::MMX_MOVQ2DQrr, X86::VR128RegisterClass, Op0);
1225
unsigned FastEmit_X86ISD_MOVQ2DQ_r(MVT VT, MVT RetVT, unsigned Op0) {
1226
switch (VT.SimpleTy) {
1227
case MVT::v1i64: return FastEmit_X86ISD_MOVQ2DQ_MVT_v1i64_r(RetVT, Op0);
1232
// FastEmit functions for X86ISD::VZEXT_MOVL.
1234
unsigned FastEmit_X86ISD_VZEXT_MOVL_MVT_v2i64_r(MVT RetVT, unsigned Op0) {
1235
if (RetVT.SimpleTy != MVT::v2i64)
1237
if ((Subtarget->hasSSE2())) {
1238
return FastEmitInst_r(X86::MOVZPQILo2PQIrr, X86::VR128RegisterClass, Op0);
1243
unsigned FastEmit_X86ISD_VZEXT_MOVL_MVT_v2f64_r(MVT RetVT, unsigned Op0) {
1244
if (RetVT.SimpleTy != MVT::v2f64)
1246
if ((Subtarget->hasSSE2())) {
1247
return FastEmitInst_r(X86::MOVZPQILo2PQIrr, X86::VR128RegisterClass, Op0);
1252
unsigned FastEmit_X86ISD_VZEXT_MOVL_r(MVT VT, MVT RetVT, unsigned Op0) {
1253
switch (VT.SimpleTy) {
1254
case MVT::v2i64: return FastEmit_X86ISD_VZEXT_MOVL_MVT_v2i64_r(RetVT, Op0);
1255
case MVT::v2f64: return FastEmit_X86ISD_VZEXT_MOVL_MVT_v2f64_r(RetVT, Op0);
1260
// Top-level FastEmit function.
1262
unsigned FastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0) {
1264
case ISD::ANY_EXTEND: return FastEmit_ISD_ANY_EXTEND_r(VT, RetVT, Op0);
1265
case ISD::BIT_CONVERT: return FastEmit_ISD_BIT_CONVERT_r(VT, RetVT, Op0);
1266
case ISD::BRIND: return FastEmit_ISD_BRIND_r(VT, RetVT, Op0);
1267
case ISD::BSWAP: return FastEmit_ISD_BSWAP_r(VT, RetVT, Op0);
1268
case ISD::FABS: return FastEmit_ISD_FABS_r(VT, RetVT, Op0);
1269
case ISD::FCOS: return FastEmit_ISD_FCOS_r(VT, RetVT, Op0);
1270
case ISD::FNEG: return FastEmit_ISD_FNEG_r(VT, RetVT, Op0);
1271
case ISD::FP_EXTEND: return FastEmit_ISD_FP_EXTEND_r(VT, RetVT, Op0);
1272
case ISD::FP_ROUND: return FastEmit_ISD_FP_ROUND_r(VT, RetVT, Op0);
1273
case ISD::FP_TO_SINT: return FastEmit_ISD_FP_TO_SINT_r(VT, RetVT, Op0);
1274
case ISD::FSIN: return FastEmit_ISD_FSIN_r(VT, RetVT, Op0);
1275
case ISD::FSQRT: return FastEmit_ISD_FSQRT_r(VT, RetVT, Op0);
1276
case ISD::SCALAR_TO_VECTOR: return FastEmit_ISD_SCALAR_TO_VECTOR_r(VT, RetVT, Op0);
1277
case ISD::SIGN_EXTEND: return FastEmit_ISD_SIGN_EXTEND_r(VT, RetVT, Op0);
1278
case ISD::SINT_TO_FP: return FastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0);
1279
case ISD::TRUNCATE: return FastEmit_ISD_TRUNCATE_r(VT, RetVT, Op0);
1280
case ISD::ZERO_EXTEND: return FastEmit_ISD_ZERO_EXTEND_r(VT, RetVT, Op0);
1281
case X86ISD::BSF: return FastEmit_X86ISD_BSF_r(VT, RetVT, Op0);
1282
case X86ISD::BSR: return FastEmit_X86ISD_BSR_r(VT, RetVT, Op0);
1283
case X86ISD::CALL: return FastEmit_X86ISD_CALL_r(VT, RetVT, Op0);
1284
case X86ISD::DEC: return FastEmit_X86ISD_DEC_r(VT, RetVT, Op0);
1285
case X86ISD::EH_RETURN: return FastEmit_X86ISD_EH_RETURN_r(VT, RetVT, Op0);
1286
case X86ISD::FRCP: return FastEmit_X86ISD_FRCP_r(VT, RetVT, Op0);
1287
case X86ISD::FRSQRT: return FastEmit_X86ISD_FRSQRT_r(VT, RetVT, Op0);
1288
case X86ISD::INC: return FastEmit_X86ISD_INC_r(VT, RetVT, Op0);
1289
case X86ISD::MOVQ2DQ: return FastEmit_X86ISD_MOVQ2DQ_r(VT, RetVT, Op0);
1290
case X86ISD::VZEXT_MOVL: return FastEmit_X86ISD_VZEXT_MOVL_r(VT, RetVT, Op0);
1295
// FastEmit functions for ISD::ADD.
1297
unsigned FastEmit_ISD_ADD_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1298
if (RetVT.SimpleTy != MVT::i8)
1300
return FastEmitInst_ri(X86::ADD8ri, X86::GR8RegisterClass, Op0, imm1);
1303
unsigned FastEmit_ISD_ADD_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1304
if (RetVT.SimpleTy != MVT::i16)
1306
return FastEmitInst_ri(X86::ADD16ri, X86::GR16RegisterClass, Op0, imm1);
1309
unsigned FastEmit_ISD_ADD_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1310
if (RetVT.SimpleTy != MVT::i32)
1312
return FastEmitInst_ri(X86::ADD32ri, X86::GR32RegisterClass, Op0, imm1);
1315
unsigned FastEmit_ISD_ADD_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1316
switch (VT.SimpleTy) {
1317
case MVT::i8: return FastEmit_ISD_ADD_MVT_i8_ri(RetVT, Op0, imm1);
1318
case MVT::i16: return FastEmit_ISD_ADD_MVT_i16_ri(RetVT, Op0, imm1);
1319
case MVT::i32: return FastEmit_ISD_ADD_MVT_i32_ri(RetVT, Op0, imm1);
1324
// FastEmit functions for ISD::ADDC.
1326
unsigned FastEmit_ISD_ADDC_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1327
if (RetVT.SimpleTy != MVT::i32)
1329
return FastEmitInst_ri(X86::ADD32ri, X86::GR32RegisterClass, Op0, imm1);
1332
unsigned FastEmit_ISD_ADDC_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1333
switch (VT.SimpleTy) {
1334
case MVT::i32: return FastEmit_ISD_ADDC_MVT_i32_ri(RetVT, Op0, imm1);
1339
// FastEmit functions for ISD::ADDE.
1341
unsigned FastEmit_ISD_ADDE_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1342
if (RetVT.SimpleTy != MVT::i8)
1344
return FastEmitInst_ri(X86::ADC8ri, X86::GR8RegisterClass, Op0, imm1);
1347
unsigned FastEmit_ISD_ADDE_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1348
if (RetVT.SimpleTy != MVT::i16)
1350
return FastEmitInst_ri(X86::ADC16ri, X86::GR16RegisterClass, Op0, imm1);
1353
unsigned FastEmit_ISD_ADDE_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1354
if (RetVT.SimpleTy != MVT::i32)
1356
return FastEmitInst_ri(X86::ADC32ri, X86::GR32RegisterClass, Op0, imm1);
1359
unsigned FastEmit_ISD_ADDE_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1360
switch (VT.SimpleTy) {
1361
case MVT::i8: return FastEmit_ISD_ADDE_MVT_i8_ri(RetVT, Op0, imm1);
1362
case MVT::i16: return FastEmit_ISD_ADDE_MVT_i16_ri(RetVT, Op0, imm1);
1363
case MVT::i32: return FastEmit_ISD_ADDE_MVT_i32_ri(RetVT, Op0, imm1);
1368
// FastEmit functions for ISD::AND.
1370
unsigned FastEmit_ISD_AND_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1371
if (RetVT.SimpleTy != MVT::i8)
1373
return FastEmitInst_ri(X86::AND8ri, X86::GR8RegisterClass, Op0, imm1);
1376
unsigned FastEmit_ISD_AND_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1377
if (RetVT.SimpleTy != MVT::i16)
1379
return FastEmitInst_ri(X86::AND16ri, X86::GR16RegisterClass, Op0, imm1);
1382
unsigned FastEmit_ISD_AND_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1383
if (RetVT.SimpleTy != MVT::i32)
1385
return FastEmitInst_ri(X86::AND32ri, X86::GR32RegisterClass, Op0, imm1);
1388
unsigned FastEmit_ISD_AND_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1389
switch (VT.SimpleTy) {
1390
case MVT::i8: return FastEmit_ISD_AND_MVT_i8_ri(RetVT, Op0, imm1);
1391
case MVT::i16: return FastEmit_ISD_AND_MVT_i16_ri(RetVT, Op0, imm1);
1392
case MVT::i32: return FastEmit_ISD_AND_MVT_i32_ri(RetVT, Op0, imm1);
1397
// FastEmit functions for ISD::MUL.
1399
unsigned FastEmit_ISD_MUL_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1400
if (RetVT.SimpleTy != MVT::i16)
1402
return FastEmitInst_ri(X86::IMUL16rri, X86::GR16RegisterClass, Op0, imm1);
1405
unsigned FastEmit_ISD_MUL_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1406
if (RetVT.SimpleTy != MVT::i32)
1408
return FastEmitInst_ri(X86::IMUL32rri, X86::GR32RegisterClass, Op0, imm1);
1411
unsigned FastEmit_ISD_MUL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1412
switch (VT.SimpleTy) {
1413
case MVT::i16: return FastEmit_ISD_MUL_MVT_i16_ri(RetVT, Op0, imm1);
1414
case MVT::i32: return FastEmit_ISD_MUL_MVT_i32_ri(RetVT, Op0, imm1);
1419
// FastEmit functions for ISD::OR.
1421
unsigned FastEmit_ISD_OR_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1422
if (RetVT.SimpleTy != MVT::i8)
1424
return FastEmitInst_ri(X86::OR8ri, X86::GR8RegisterClass, Op0, imm1);
1427
unsigned FastEmit_ISD_OR_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1428
if (RetVT.SimpleTy != MVT::i16)
1430
return FastEmitInst_ri(X86::OR16ri, X86::GR16RegisterClass, Op0, imm1);
1433
unsigned FastEmit_ISD_OR_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1434
if (RetVT.SimpleTy != MVT::i32)
1436
return FastEmitInst_ri(X86::OR32ri, X86::GR32RegisterClass, Op0, imm1);
1439
unsigned FastEmit_ISD_OR_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1440
switch (VT.SimpleTy) {
1441
case MVT::i8: return FastEmit_ISD_OR_MVT_i8_ri(RetVT, Op0, imm1);
1442
case MVT::i16: return FastEmit_ISD_OR_MVT_i16_ri(RetVT, Op0, imm1);
1443
case MVT::i32: return FastEmit_ISD_OR_MVT_i32_ri(RetVT, Op0, imm1);
1448
// FastEmit functions for ISD::ROTL.
1450
unsigned FastEmit_ISD_ROTL_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1451
if (RetVT.SimpleTy != MVT::i8)
1453
return FastEmitInst_ri(X86::ROL8ri, X86::GR8RegisterClass, Op0, imm1);
1456
unsigned FastEmit_ISD_ROTL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1457
switch (VT.SimpleTy) {
1458
case MVT::i8: return FastEmit_ISD_ROTL_MVT_i8_ri(RetVT, Op0, imm1);
1463
// FastEmit functions for ISD::ROTR.
1465
unsigned FastEmit_ISD_ROTR_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1466
if (RetVT.SimpleTy != MVT::i8)
1468
return FastEmitInst_ri(X86::ROR8ri, X86::GR8RegisterClass, Op0, imm1);
1471
unsigned FastEmit_ISD_ROTR_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1472
switch (VT.SimpleTy) {
1473
case MVT::i8: return FastEmit_ISD_ROTR_MVT_i8_ri(RetVT, Op0, imm1);
1478
// FastEmit functions for ISD::SHL.
1480
unsigned FastEmit_ISD_SHL_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1481
if (RetVT.SimpleTy != MVT::i8)
1483
return FastEmitInst_ri(X86::SHL8ri, X86::GR8RegisterClass, Op0, imm1);
1486
unsigned FastEmit_ISD_SHL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1487
switch (VT.SimpleTy) {
1488
case MVT::i8: return FastEmit_ISD_SHL_MVT_i8_ri(RetVT, Op0, imm1);
1493
// FastEmit functions for ISD::SRA.
1495
unsigned FastEmit_ISD_SRA_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1496
if (RetVT.SimpleTy != MVT::i8)
1498
return FastEmitInst_ri(X86::SAR8ri, X86::GR8RegisterClass, Op0, imm1);
1501
unsigned FastEmit_ISD_SRA_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1502
switch (VT.SimpleTy) {
1503
case MVT::i8: return FastEmit_ISD_SRA_MVT_i8_ri(RetVT, Op0, imm1);
1508
// FastEmit functions for ISD::SRL.
1510
unsigned FastEmit_ISD_SRL_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1511
if (RetVT.SimpleTy != MVT::i8)
1513
return FastEmitInst_ri(X86::SHR8ri, X86::GR8RegisterClass, Op0, imm1);
1516
unsigned FastEmit_ISD_SRL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1517
switch (VT.SimpleTy) {
1518
case MVT::i8: return FastEmit_ISD_SRL_MVT_i8_ri(RetVT, Op0, imm1);
1523
// FastEmit functions for ISD::SUB.
1525
unsigned FastEmit_ISD_SUB_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1526
if (RetVT.SimpleTy != MVT::i8)
1528
return FastEmitInst_ri(X86::SUB8ri, X86::GR8RegisterClass, Op0, imm1);
1531
unsigned FastEmit_ISD_SUB_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1532
if (RetVT.SimpleTy != MVT::i16)
1534
return FastEmitInst_ri(X86::SUB16ri, X86::GR16RegisterClass, Op0, imm1);
1537
unsigned FastEmit_ISD_SUB_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1538
if (RetVT.SimpleTy != MVT::i32)
1540
return FastEmitInst_ri(X86::SUB32ri, X86::GR32RegisterClass, Op0, imm1);
1543
unsigned FastEmit_ISD_SUB_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1544
switch (VT.SimpleTy) {
1545
case MVT::i8: return FastEmit_ISD_SUB_MVT_i8_ri(RetVT, Op0, imm1);
1546
case MVT::i16: return FastEmit_ISD_SUB_MVT_i16_ri(RetVT, Op0, imm1);
1547
case MVT::i32: return FastEmit_ISD_SUB_MVT_i32_ri(RetVT, Op0, imm1);
1552
// FastEmit functions for ISD::SUBC.
1554
unsigned FastEmit_ISD_SUBC_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1555
if (RetVT.SimpleTy != MVT::i32)
1557
return FastEmitInst_ri(X86::SUB32ri, X86::GR32RegisterClass, Op0, imm1);
1560
unsigned FastEmit_ISD_SUBC_MVT_i64_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1561
if (RetVT.SimpleTy != MVT::i64)
1563
return FastEmitInst_ri(X86::SUB64ri32, X86::GR64RegisterClass, Op0, imm1);
1566
unsigned FastEmit_ISD_SUBC_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1567
switch (VT.SimpleTy) {
1568
case MVT::i32: return FastEmit_ISD_SUBC_MVT_i32_ri(RetVT, Op0, imm1);
1569
case MVT::i64: return FastEmit_ISD_SUBC_MVT_i64_ri(RetVT, Op0, imm1);
1574
// FastEmit functions for ISD::SUBE.
1576
unsigned FastEmit_ISD_SUBE_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1577
if (RetVT.SimpleTy != MVT::i8)
1579
return FastEmitInst_ri(X86::SBB8ri, X86::GR8RegisterClass, Op0, imm1);
1582
unsigned FastEmit_ISD_SUBE_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1583
if (RetVT.SimpleTy != MVT::i16)
1585
return FastEmitInst_ri(X86::SBB16ri, X86::GR16RegisterClass, Op0, imm1);
1588
unsigned FastEmit_ISD_SUBE_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1589
if (RetVT.SimpleTy != MVT::i32)
1591
return FastEmitInst_ri(X86::SBB32ri, X86::GR32RegisterClass, Op0, imm1);
1594
unsigned FastEmit_ISD_SUBE_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1595
switch (VT.SimpleTy) {
1596
case MVT::i8: return FastEmit_ISD_SUBE_MVT_i8_ri(RetVT, Op0, imm1);
1597
case MVT::i16: return FastEmit_ISD_SUBE_MVT_i16_ri(RetVT, Op0, imm1);
1598
case MVT::i32: return FastEmit_ISD_SUBE_MVT_i32_ri(RetVT, Op0, imm1);
1603
// FastEmit functions for ISD::XOR.
1605
unsigned FastEmit_ISD_XOR_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1606
if (RetVT.SimpleTy != MVT::i8)
1608
return FastEmitInst_ri(X86::XOR8ri, X86::GR8RegisterClass, Op0, imm1);
1611
unsigned FastEmit_ISD_XOR_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1612
if (RetVT.SimpleTy != MVT::i16)
1614
return FastEmitInst_ri(X86::XOR16ri, X86::GR16RegisterClass, Op0, imm1);
1617
unsigned FastEmit_ISD_XOR_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1618
if (RetVT.SimpleTy != MVT::i32)
1620
return FastEmitInst_ri(X86::XOR32ri, X86::GR32RegisterClass, Op0, imm1);
1623
unsigned FastEmit_ISD_XOR_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1624
switch (VT.SimpleTy) {
1625
case MVT::i8: return FastEmit_ISD_XOR_MVT_i8_ri(RetVT, Op0, imm1);
1626
case MVT::i16: return FastEmit_ISD_XOR_MVT_i16_ri(RetVT, Op0, imm1);
1627
case MVT::i32: return FastEmit_ISD_XOR_MVT_i32_ri(RetVT, Op0, imm1);
1632
// FastEmit functions for X86ISD::ADD.
1634
unsigned FastEmit_X86ISD_ADD_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1635
if (RetVT.SimpleTy != MVT::i8)
1637
return FastEmitInst_ri(X86::ADD8ri, X86::GR8RegisterClass, Op0, imm1);
1640
unsigned FastEmit_X86ISD_ADD_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1641
if (RetVT.SimpleTy != MVT::i16)
1643
return FastEmitInst_ri(X86::ADD16ri, X86::GR16RegisterClass, Op0, imm1);
1646
unsigned FastEmit_X86ISD_ADD_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1647
if (RetVT.SimpleTy != MVT::i32)
1649
return FastEmitInst_ri(X86::ADD32ri, X86::GR32RegisterClass, Op0, imm1);
1652
unsigned FastEmit_X86ISD_ADD_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1653
switch (VT.SimpleTy) {
1654
case MVT::i8: return FastEmit_X86ISD_ADD_MVT_i8_ri(RetVT, Op0, imm1);
1655
case MVT::i16: return FastEmit_X86ISD_ADD_MVT_i16_ri(RetVT, Op0, imm1);
1656
case MVT::i32: return FastEmit_X86ISD_ADD_MVT_i32_ri(RetVT, Op0, imm1);
1661
// FastEmit functions for X86ISD::AND.
1663
unsigned FastEmit_X86ISD_AND_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1664
if (RetVT.SimpleTy != MVT::i8)
1666
return FastEmitInst_ri(X86::AND8ri, X86::GR8RegisterClass, Op0, imm1);
1669
unsigned FastEmit_X86ISD_AND_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1670
if (RetVT.SimpleTy != MVT::i16)
1672
return FastEmitInst_ri(X86::AND16ri, X86::GR16RegisterClass, Op0, imm1);
1675
unsigned FastEmit_X86ISD_AND_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1676
if (RetVT.SimpleTy != MVT::i32)
1678
return FastEmitInst_ri(X86::AND32ri, X86::GR32RegisterClass, Op0, imm1);
1681
unsigned FastEmit_X86ISD_AND_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1682
switch (VT.SimpleTy) {
1683
case MVT::i8: return FastEmit_X86ISD_AND_MVT_i8_ri(RetVT, Op0, imm1);
1684
case MVT::i16: return FastEmit_X86ISD_AND_MVT_i16_ri(RetVT, Op0, imm1);
1685
case MVT::i32: return FastEmit_X86ISD_AND_MVT_i32_ri(RetVT, Op0, imm1);
1690
// FastEmit functions for X86ISD::CMP.
1692
unsigned FastEmit_X86ISD_CMP_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1693
if (RetVT.SimpleTy != MVT::isVoid)
1695
return FastEmitInst_ri(X86::CMP8ri, X86::GR8RegisterClass, Op0, imm1);
1698
unsigned FastEmit_X86ISD_CMP_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1699
if (RetVT.SimpleTy != MVT::isVoid)
1701
return FastEmitInst_ri(X86::CMP16ri, X86::GR16RegisterClass, Op0, imm1);
1704
unsigned FastEmit_X86ISD_CMP_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1705
if (RetVT.SimpleTy != MVT::isVoid)
1707
return FastEmitInst_ri(X86::CMP32ri, X86::GR32RegisterClass, Op0, imm1);
1710
unsigned FastEmit_X86ISD_CMP_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1711
switch (VT.SimpleTy) {
1712
case MVT::i8: return FastEmit_X86ISD_CMP_MVT_i8_ri(RetVT, Op0, imm1);
1713
case MVT::i16: return FastEmit_X86ISD_CMP_MVT_i16_ri(RetVT, Op0, imm1);
1714
case MVT::i32: return FastEmit_X86ISD_CMP_MVT_i32_ri(RetVT, Op0, imm1);
1719
// FastEmit functions for X86ISD::OR.
1721
unsigned FastEmit_X86ISD_OR_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1722
if (RetVT.SimpleTy != MVT::i8)
1724
return FastEmitInst_ri(X86::OR8ri, X86::GR8RegisterClass, Op0, imm1);
1727
unsigned FastEmit_X86ISD_OR_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1728
if (RetVT.SimpleTy != MVT::i16)
1730
return FastEmitInst_ri(X86::OR16ri, X86::GR16RegisterClass, Op0, imm1);
1733
unsigned FastEmit_X86ISD_OR_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1734
if (RetVT.SimpleTy != MVT::i32)
1736
return FastEmitInst_ri(X86::OR32ri, X86::GR32RegisterClass, Op0, imm1);
1739
unsigned FastEmit_X86ISD_OR_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1740
switch (VT.SimpleTy) {
1741
case MVT::i8: return FastEmit_X86ISD_OR_MVT_i8_ri(RetVT, Op0, imm1);
1742
case MVT::i16: return FastEmit_X86ISD_OR_MVT_i16_ri(RetVT, Op0, imm1);
1743
case MVT::i32: return FastEmit_X86ISD_OR_MVT_i32_ri(RetVT, Op0, imm1);
1748
// FastEmit functions for X86ISD::SMUL.
1750
unsigned FastEmit_X86ISD_SMUL_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1751
if (RetVT.SimpleTy != MVT::i16)
1753
return FastEmitInst_ri(X86::IMUL16rri, X86::GR16RegisterClass, Op0, imm1);
1756
unsigned FastEmit_X86ISD_SMUL_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1757
if (RetVT.SimpleTy != MVT::i32)
1759
return FastEmitInst_ri(X86::IMUL32rri, X86::GR32RegisterClass, Op0, imm1);
1762
unsigned FastEmit_X86ISD_SMUL_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1763
switch (VT.SimpleTy) {
1764
case MVT::i16: return FastEmit_X86ISD_SMUL_MVT_i16_ri(RetVT, Op0, imm1);
1765
case MVT::i32: return FastEmit_X86ISD_SMUL_MVT_i32_ri(RetVT, Op0, imm1);
1770
// FastEmit functions for X86ISD::SUB.
1772
unsigned FastEmit_X86ISD_SUB_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1773
if (RetVT.SimpleTy != MVT::i8)
1775
return FastEmitInst_ri(X86::SUB8ri, X86::GR8RegisterClass, Op0, imm1);
1778
unsigned FastEmit_X86ISD_SUB_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1779
if (RetVT.SimpleTy != MVT::i16)
1781
return FastEmitInst_ri(X86::SUB16ri, X86::GR16RegisterClass, Op0, imm1);
1784
unsigned FastEmit_X86ISD_SUB_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1785
if (RetVT.SimpleTy != MVT::i32)
1787
return FastEmitInst_ri(X86::SUB32ri, X86::GR32RegisterClass, Op0, imm1);
1790
unsigned FastEmit_X86ISD_SUB_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1791
switch (VT.SimpleTy) {
1792
case MVT::i8: return FastEmit_X86ISD_SUB_MVT_i8_ri(RetVT, Op0, imm1);
1793
case MVT::i16: return FastEmit_X86ISD_SUB_MVT_i16_ri(RetVT, Op0, imm1);
1794
case MVT::i32: return FastEmit_X86ISD_SUB_MVT_i32_ri(RetVT, Op0, imm1);
1799
// FastEmit functions for X86ISD::TC_RETURN.
1801
unsigned FastEmit_X86ISD_TC_RETURN_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1802
if (RetVT.SimpleTy != MVT::isVoid)
1804
return FastEmitInst_ri(X86::TCRETURNri, X86::GR32RegisterClass, Op0, imm1);
1807
unsigned FastEmit_X86ISD_TC_RETURN_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1808
switch (VT.SimpleTy) {
1809
case MVT::i32: return FastEmit_X86ISD_TC_RETURN_MVT_i32_ri(RetVT, Op0, imm1);
1814
// FastEmit functions for X86ISD::XOR.
1816
unsigned FastEmit_X86ISD_XOR_MVT_i8_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1817
if (RetVT.SimpleTy != MVT::i8)
1819
return FastEmitInst_ri(X86::XOR8ri, X86::GR8RegisterClass, Op0, imm1);
1822
unsigned FastEmit_X86ISD_XOR_MVT_i16_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1823
if (RetVT.SimpleTy != MVT::i16)
1825
return FastEmitInst_ri(X86::XOR16ri, X86::GR16RegisterClass, Op0, imm1);
1828
unsigned FastEmit_X86ISD_XOR_MVT_i32_ri(MVT RetVT, unsigned Op0, uint64_t imm1) {
1829
if (RetVT.SimpleTy != MVT::i32)
1831
return FastEmitInst_ri(X86::XOR32ri, X86::GR32RegisterClass, Op0, imm1);
1834
unsigned FastEmit_X86ISD_XOR_ri(MVT VT, MVT RetVT, unsigned Op0, uint64_t imm1) {
1835
switch (VT.SimpleTy) {
1836
case MVT::i8: return FastEmit_X86ISD_XOR_MVT_i8_ri(RetVT, Op0, imm1);
1837
case MVT::i16: return FastEmit_X86ISD_XOR_MVT_i16_ri(RetVT, Op0, imm1);
1838
case MVT::i32: return FastEmit_X86ISD_XOR_MVT_i32_ri(RetVT, Op0, imm1);
1843
// Top-level FastEmit function.
1845
unsigned FastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, uint64_t imm1) {
1847
case ISD::ADD: return FastEmit_ISD_ADD_ri(VT, RetVT, Op0, imm1);
1848
case ISD::ADDC: return FastEmit_ISD_ADDC_ri(VT, RetVT, Op0, imm1);
1849
case ISD::ADDE: return FastEmit_ISD_ADDE_ri(VT, RetVT, Op0, imm1);
1850
case ISD::AND: return FastEmit_ISD_AND_ri(VT, RetVT, Op0, imm1);
1851
case ISD::MUL: return FastEmit_ISD_MUL_ri(VT, RetVT, Op0, imm1);
1852
case ISD::OR: return FastEmit_ISD_OR_ri(VT, RetVT, Op0, imm1);
1853
case ISD::ROTL: return FastEmit_ISD_ROTL_ri(VT, RetVT, Op0, imm1);
1854
case ISD::ROTR: return FastEmit_ISD_ROTR_ri(VT, RetVT, Op0, imm1);
1855
case ISD::SHL: return FastEmit_ISD_SHL_ri(VT, RetVT, Op0, imm1);
1856
case ISD::SRA: return FastEmit_ISD_SRA_ri(VT, RetVT, Op0, imm1);
1857
case ISD::SRL: return FastEmit_ISD_SRL_ri(VT, RetVT, Op0, imm1);
1858
case ISD::SUB: return FastEmit_ISD_SUB_ri(VT, RetVT, Op0, imm1);
1859
case ISD::SUBC: return FastEmit_ISD_SUBC_ri(VT, RetVT, Op0, imm1);
1860
case ISD::SUBE: return FastEmit_ISD_SUBE_ri(VT, RetVT, Op0, imm1);
1861
case ISD::XOR: return FastEmit_ISD_XOR_ri(VT, RetVT, Op0, imm1);
1862
case X86ISD::ADD: return FastEmit_X86ISD_ADD_ri(VT, RetVT, Op0, imm1);
1863
case X86ISD::AND: return FastEmit_X86ISD_AND_ri(VT, RetVT, Op0, imm1);
1864
case X86ISD::CMP: return FastEmit_X86ISD_CMP_ri(VT, RetVT, Op0, imm1);
1865
case X86ISD::OR: return FastEmit_X86ISD_OR_ri(VT, RetVT, Op0, imm1);
1866
case X86ISD::SMUL: return FastEmit_X86ISD_SMUL_ri(VT, RetVT, Op0, imm1);
1867
case X86ISD::SUB: return FastEmit_X86ISD_SUB_ri(VT, RetVT, Op0, imm1);
1868
case X86ISD::TC_RETURN: return FastEmit_X86ISD_TC_RETURN_ri(VT, RetVT, Op0, imm1);
1869
case X86ISD::XOR: return FastEmit_X86ISD_XOR_ri(VT, RetVT, Op0, imm1);
1874
// FastEmit functions for ISD::ADD.
1876
unsigned FastEmit_ISD_ADD_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1877
if (RetVT.SimpleTy != MVT::i8)
1879
return FastEmitInst_rr(X86::ADD8rr, X86::GR8RegisterClass, Op0, Op1);
1882
unsigned FastEmit_ISD_ADD_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1883
if (RetVT.SimpleTy != MVT::i16)
1885
return FastEmitInst_rr(X86::ADD16rr, X86::GR16RegisterClass, Op0, Op1);
1888
unsigned FastEmit_ISD_ADD_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1889
if (RetVT.SimpleTy != MVT::i32)
1891
return FastEmitInst_rr(X86::ADD32rr, X86::GR32RegisterClass, Op0, Op1);
1894
unsigned FastEmit_ISD_ADD_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1895
if (RetVT.SimpleTy != MVT::i64)
1897
return FastEmitInst_rr(X86::ADD64rr, X86::GR64RegisterClass, Op0, Op1);
1900
unsigned FastEmit_ISD_ADD_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1901
if (RetVT.SimpleTy != MVT::v8i8)
1903
if ((Subtarget->hasMMX())) {
1904
return FastEmitInst_rr(X86::MMX_PADDBrr, X86::VR64RegisterClass, Op0, Op1);
1909
unsigned FastEmit_ISD_ADD_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1910
if (RetVT.SimpleTy != MVT::v16i8)
1912
if ((Subtarget->hasSSE2())) {
1913
return FastEmitInst_rr(X86::PADDBrr, X86::VR128RegisterClass, Op0, Op1);
1918
unsigned FastEmit_ISD_ADD_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1919
if (RetVT.SimpleTy != MVT::v4i16)
1921
if ((Subtarget->hasMMX())) {
1922
return FastEmitInst_rr(X86::MMX_PADDWrr, X86::VR64RegisterClass, Op0, Op1);
1927
unsigned FastEmit_ISD_ADD_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1928
if (RetVT.SimpleTy != MVT::v8i16)
1930
if ((Subtarget->hasSSE2())) {
1931
return FastEmitInst_rr(X86::PADDWrr, X86::VR128RegisterClass, Op0, Op1);
1936
unsigned FastEmit_ISD_ADD_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1937
if (RetVT.SimpleTy != MVT::v2i32)
1939
if ((Subtarget->hasMMX())) {
1940
return FastEmitInst_rr(X86::MMX_PADDDrr, X86::VR64RegisterClass, Op0, Op1);
1945
unsigned FastEmit_ISD_ADD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1946
if (RetVT.SimpleTy != MVT::v4i32)
1948
if ((Subtarget->hasSSE2())) {
1949
return FastEmitInst_rr(X86::PADDDrr, X86::VR128RegisterClass, Op0, Op1);
1954
unsigned FastEmit_ISD_ADD_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1955
if (RetVT.SimpleTy != MVT::v1i64)
1957
if ((Subtarget->hasMMX())) {
1958
return FastEmitInst_rr(X86::MMX_PADDQrr, X86::VR64RegisterClass, Op0, Op1);
1963
unsigned FastEmit_ISD_ADD_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1964
if (RetVT.SimpleTy != MVT::v2i64)
1966
if ((Subtarget->hasSSE2())) {
1967
return FastEmitInst_rr(X86::PADDQrr, X86::VR128RegisterClass, Op0, Op1);
1972
unsigned FastEmit_ISD_ADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
1973
switch (VT.SimpleTy) {
1974
case MVT::i8: return FastEmit_ISD_ADD_MVT_i8_rr(RetVT, Op0, Op1);
1975
case MVT::i16: return FastEmit_ISD_ADD_MVT_i16_rr(RetVT, Op0, Op1);
1976
case MVT::i32: return FastEmit_ISD_ADD_MVT_i32_rr(RetVT, Op0, Op1);
1977
case MVT::i64: return FastEmit_ISD_ADD_MVT_i64_rr(RetVT, Op0, Op1);
1978
case MVT::v8i8: return FastEmit_ISD_ADD_MVT_v8i8_rr(RetVT, Op0, Op1);
1979
case MVT::v16i8: return FastEmit_ISD_ADD_MVT_v16i8_rr(RetVT, Op0, Op1);
1980
case MVT::v4i16: return FastEmit_ISD_ADD_MVT_v4i16_rr(RetVT, Op0, Op1);
1981
case MVT::v8i16: return FastEmit_ISD_ADD_MVT_v8i16_rr(RetVT, Op0, Op1);
1982
case MVT::v2i32: return FastEmit_ISD_ADD_MVT_v2i32_rr(RetVT, Op0, Op1);
1983
case MVT::v4i32: return FastEmit_ISD_ADD_MVT_v4i32_rr(RetVT, Op0, Op1);
1984
case MVT::v1i64: return FastEmit_ISD_ADD_MVT_v1i64_rr(RetVT, Op0, Op1);
1985
case MVT::v2i64: return FastEmit_ISD_ADD_MVT_v2i64_rr(RetVT, Op0, Op1);
1990
// FastEmit functions for ISD::ADDC.
1992
unsigned FastEmit_ISD_ADDC_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1993
if (RetVT.SimpleTy != MVT::i32)
1995
return FastEmitInst_rr(X86::ADD32rr, X86::GR32RegisterClass, Op0, Op1);
1998
unsigned FastEmit_ISD_ADDC_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
1999
if (RetVT.SimpleTy != MVT::i64)
2001
return FastEmitInst_rr(X86::ADD64rr, X86::GR64RegisterClass, Op0, Op1);
2004
unsigned FastEmit_ISD_ADDC_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2005
switch (VT.SimpleTy) {
2006
case MVT::i32: return FastEmit_ISD_ADDC_MVT_i32_rr(RetVT, Op0, Op1);
2007
case MVT::i64: return FastEmit_ISD_ADDC_MVT_i64_rr(RetVT, Op0, Op1);
2012
// FastEmit functions for ISD::ADDE.
2014
unsigned FastEmit_ISD_ADDE_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2015
if (RetVT.SimpleTy != MVT::i8)
2017
return FastEmitInst_rr(X86::ADC8rr, X86::GR8RegisterClass, Op0, Op1);
2020
unsigned FastEmit_ISD_ADDE_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2021
if (RetVT.SimpleTy != MVT::i16)
2023
return FastEmitInst_rr(X86::ADC16rr, X86::GR16RegisterClass, Op0, Op1);
2026
unsigned FastEmit_ISD_ADDE_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2027
if (RetVT.SimpleTy != MVT::i32)
2029
return FastEmitInst_rr(X86::ADC32rr, X86::GR32RegisterClass, Op0, Op1);
2032
unsigned FastEmit_ISD_ADDE_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2033
if (RetVT.SimpleTy != MVT::i64)
2035
return FastEmitInst_rr(X86::ADC64rr, X86::GR64RegisterClass, Op0, Op1);
2038
unsigned FastEmit_ISD_ADDE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2039
switch (VT.SimpleTy) {
2040
case MVT::i8: return FastEmit_ISD_ADDE_MVT_i8_rr(RetVT, Op0, Op1);
2041
case MVT::i16: return FastEmit_ISD_ADDE_MVT_i16_rr(RetVT, Op0, Op1);
2042
case MVT::i32: return FastEmit_ISD_ADDE_MVT_i32_rr(RetVT, Op0, Op1);
2043
case MVT::i64: return FastEmit_ISD_ADDE_MVT_i64_rr(RetVT, Op0, Op1);
2048
// FastEmit functions for ISD::AND.
2050
unsigned FastEmit_ISD_AND_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2051
if (RetVT.SimpleTy != MVT::i8)
2053
return FastEmitInst_rr(X86::AND8rr, X86::GR8RegisterClass, Op0, Op1);
2056
unsigned FastEmit_ISD_AND_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2057
if (RetVT.SimpleTy != MVT::i16)
2059
return FastEmitInst_rr(X86::AND16rr, X86::GR16RegisterClass, Op0, Op1);
2062
unsigned FastEmit_ISD_AND_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2063
if (RetVT.SimpleTy != MVT::i32)
2065
return FastEmitInst_rr(X86::AND32rr, X86::GR32RegisterClass, Op0, Op1);
2068
unsigned FastEmit_ISD_AND_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2069
if (RetVT.SimpleTy != MVT::i64)
2071
return FastEmitInst_rr(X86::AND64rr, X86::GR64RegisterClass, Op0, Op1);
2074
unsigned FastEmit_ISD_AND_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2075
if (RetVT.SimpleTy != MVT::v1i64)
2077
if ((Subtarget->hasMMX())) {
2078
return FastEmitInst_rr(X86::MMX_PANDrr, X86::VR64RegisterClass, Op0, Op1);
2083
unsigned FastEmit_ISD_AND_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2084
if (RetVT.SimpleTy != MVT::v2i64)
2086
if ((Subtarget->hasSSE1())) {
2087
return FastEmitInst_rr(X86::ANDPSrr, X86::VR128RegisterClass, Op0, Op1);
2089
if ((Subtarget->hasSSE2())) {
2090
return FastEmitInst_rr(X86::PANDrr, X86::VR128RegisterClass, Op0, Op1);
2095
unsigned FastEmit_ISD_AND_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2096
switch (VT.SimpleTy) {
2097
case MVT::i8: return FastEmit_ISD_AND_MVT_i8_rr(RetVT, Op0, Op1);
2098
case MVT::i16: return FastEmit_ISD_AND_MVT_i16_rr(RetVT, Op0, Op1);
2099
case MVT::i32: return FastEmit_ISD_AND_MVT_i32_rr(RetVT, Op0, Op1);
2100
case MVT::i64: return FastEmit_ISD_AND_MVT_i64_rr(RetVT, Op0, Op1);
2101
case MVT::v1i64: return FastEmit_ISD_AND_MVT_v1i64_rr(RetVT, Op0, Op1);
2102
case MVT::v2i64: return FastEmit_ISD_AND_MVT_v2i64_rr(RetVT, Op0, Op1);
2107
// FastEmit functions for ISD::FADD.
2109
unsigned FastEmit_ISD_FADD_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2110
if (RetVT.SimpleTy != MVT::f32)
2112
if ((!Subtarget->hasSSE1())) {
2113
return FastEmitInst_rr(X86::ADD_Fp32, X86::RFP32RegisterClass, Op0, Op1);
2115
if ((Subtarget->hasSSE1())) {
2116
return FastEmitInst_rr(X86::ADDSSrr, X86::FR32RegisterClass, Op0, Op1);
2121
unsigned FastEmit_ISD_FADD_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2122
if (RetVT.SimpleTy != MVT::f64)
2124
if ((!Subtarget->hasSSE2())) {
2125
return FastEmitInst_rr(X86::ADD_Fp64, X86::RFP64RegisterClass, Op0, Op1);
2127
if ((Subtarget->hasSSE2())) {
2128
return FastEmitInst_rr(X86::ADDSDrr, X86::FR64RegisterClass, Op0, Op1);
2133
unsigned FastEmit_ISD_FADD_MVT_f80_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2134
if (RetVT.SimpleTy != MVT::f80)
2136
return FastEmitInst_rr(X86::ADD_Fp80, X86::RFP80RegisterClass, Op0, Op1);
2139
unsigned FastEmit_ISD_FADD_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2140
if (RetVT.SimpleTy != MVT::v4f32)
2142
if ((Subtarget->hasSSE1())) {
2143
return FastEmitInst_rr(X86::ADDPSrr, X86::VR128RegisterClass, Op0, Op1);
2148
unsigned FastEmit_ISD_FADD_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2149
if (RetVT.SimpleTy != MVT::v2f64)
2151
if ((Subtarget->hasSSE2())) {
2152
return FastEmitInst_rr(X86::ADDPDrr, X86::VR128RegisterClass, Op0, Op1);
2157
unsigned FastEmit_ISD_FADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2158
switch (VT.SimpleTy) {
2159
case MVT::f32: return FastEmit_ISD_FADD_MVT_f32_rr(RetVT, Op0, Op1);
2160
case MVT::f64: return FastEmit_ISD_FADD_MVT_f64_rr(RetVT, Op0, Op1);
2161
case MVT::f80: return FastEmit_ISD_FADD_MVT_f80_rr(RetVT, Op0, Op1);
2162
case MVT::v4f32: return FastEmit_ISD_FADD_MVT_v4f32_rr(RetVT, Op0, Op1);
2163
case MVT::v2f64: return FastEmit_ISD_FADD_MVT_v2f64_rr(RetVT, Op0, Op1);
2168
// FastEmit functions for ISD::FDIV.
2170
unsigned FastEmit_ISD_FDIV_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2171
if (RetVT.SimpleTy != MVT::f32)
2173
if ((!Subtarget->hasSSE1())) {
2174
return FastEmitInst_rr(X86::DIV_Fp32, X86::RFP32RegisterClass, Op0, Op1);
2176
if ((Subtarget->hasSSE1())) {
2177
return FastEmitInst_rr(X86::DIVSSrr, X86::FR32RegisterClass, Op0, Op1);
2182
unsigned FastEmit_ISD_FDIV_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2183
if (RetVT.SimpleTy != MVT::f64)
2185
if ((!Subtarget->hasSSE2())) {
2186
return FastEmitInst_rr(X86::DIV_Fp64, X86::RFP64RegisterClass, Op0, Op1);
2188
if ((Subtarget->hasSSE2())) {
2189
return FastEmitInst_rr(X86::DIVSDrr, X86::FR64RegisterClass, Op0, Op1);
2194
unsigned FastEmit_ISD_FDIV_MVT_f80_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2195
if (RetVT.SimpleTy != MVT::f80)
2197
return FastEmitInst_rr(X86::DIV_Fp80, X86::RFP80RegisterClass, Op0, Op1);
2200
unsigned FastEmit_ISD_FDIV_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2201
if (RetVT.SimpleTy != MVT::v4f32)
2203
if ((Subtarget->hasSSE1())) {
2204
return FastEmitInst_rr(X86::DIVPSrr, X86::VR128RegisterClass, Op0, Op1);
2209
unsigned FastEmit_ISD_FDIV_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2210
if (RetVT.SimpleTy != MVT::v2f64)
2212
if ((Subtarget->hasSSE2())) {
2213
return FastEmitInst_rr(X86::DIVPDrr, X86::VR128RegisterClass, Op0, Op1);
2218
unsigned FastEmit_ISD_FDIV_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2219
switch (VT.SimpleTy) {
2220
case MVT::f32: return FastEmit_ISD_FDIV_MVT_f32_rr(RetVT, Op0, Op1);
2221
case MVT::f64: return FastEmit_ISD_FDIV_MVT_f64_rr(RetVT, Op0, Op1);
2222
case MVT::f80: return FastEmit_ISD_FDIV_MVT_f80_rr(RetVT, Op0, Op1);
2223
case MVT::v4f32: return FastEmit_ISD_FDIV_MVT_v4f32_rr(RetVT, Op0, Op1);
2224
case MVT::v2f64: return FastEmit_ISD_FDIV_MVT_v2f64_rr(RetVT, Op0, Op1);
2229
// FastEmit functions for ISD::FMUL.
2231
unsigned FastEmit_ISD_FMUL_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2232
if (RetVT.SimpleTy != MVT::f32)
2234
if ((!Subtarget->hasSSE1())) {
2235
return FastEmitInst_rr(X86::MUL_Fp32, X86::RFP32RegisterClass, Op0, Op1);
2237
if ((Subtarget->hasSSE1())) {
2238
return FastEmitInst_rr(X86::MULSSrr, X86::FR32RegisterClass, Op0, Op1);
2243
unsigned FastEmit_ISD_FMUL_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2244
if (RetVT.SimpleTy != MVT::f64)
2246
if ((!Subtarget->hasSSE2())) {
2247
return FastEmitInst_rr(X86::MUL_Fp64, X86::RFP64RegisterClass, Op0, Op1);
2249
if ((Subtarget->hasSSE2())) {
2250
return FastEmitInst_rr(X86::MULSDrr, X86::FR64RegisterClass, Op0, Op1);
2255
unsigned FastEmit_ISD_FMUL_MVT_f80_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2256
if (RetVT.SimpleTy != MVT::f80)
2258
return FastEmitInst_rr(X86::MUL_Fp80, X86::RFP80RegisterClass, Op0, Op1);
2261
unsigned FastEmit_ISD_FMUL_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2262
if (RetVT.SimpleTy != MVT::v4f32)
2264
if ((Subtarget->hasSSE1())) {
2265
return FastEmitInst_rr(X86::MULPSrr, X86::VR128RegisterClass, Op0, Op1);
2270
unsigned FastEmit_ISD_FMUL_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2271
if (RetVT.SimpleTy != MVT::v2f64)
2273
if ((Subtarget->hasSSE2())) {
2274
return FastEmitInst_rr(X86::MULPDrr, X86::VR128RegisterClass, Op0, Op1);
2279
unsigned FastEmit_ISD_FMUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2280
switch (VT.SimpleTy) {
2281
case MVT::f32: return FastEmit_ISD_FMUL_MVT_f32_rr(RetVT, Op0, Op1);
2282
case MVT::f64: return FastEmit_ISD_FMUL_MVT_f64_rr(RetVT, Op0, Op1);
2283
case MVT::f80: return FastEmit_ISD_FMUL_MVT_f80_rr(RetVT, Op0, Op1);
2284
case MVT::v4f32: return FastEmit_ISD_FMUL_MVT_v4f32_rr(RetVT, Op0, Op1);
2285
case MVT::v2f64: return FastEmit_ISD_FMUL_MVT_v2f64_rr(RetVT, Op0, Op1);
2290
// FastEmit functions for ISD::FSUB.
2292
unsigned FastEmit_ISD_FSUB_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2293
if (RetVT.SimpleTy != MVT::f32)
2295
if ((!Subtarget->hasSSE1())) {
2296
return FastEmitInst_rr(X86::SUB_Fp32, X86::RFP32RegisterClass, Op0, Op1);
2298
if ((Subtarget->hasSSE1())) {
2299
return FastEmitInst_rr(X86::SUBSSrr, X86::FR32RegisterClass, Op0, Op1);
2304
unsigned FastEmit_ISD_FSUB_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2305
if (RetVT.SimpleTy != MVT::f64)
2307
if ((!Subtarget->hasSSE2())) {
2308
return FastEmitInst_rr(X86::SUB_Fp64, X86::RFP64RegisterClass, Op0, Op1);
2310
if ((Subtarget->hasSSE2())) {
2311
return FastEmitInst_rr(X86::SUBSDrr, X86::FR64RegisterClass, Op0, Op1);
2316
unsigned FastEmit_ISD_FSUB_MVT_f80_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2317
if (RetVT.SimpleTy != MVT::f80)
2319
return FastEmitInst_rr(X86::SUB_Fp80, X86::RFP80RegisterClass, Op0, Op1);
2322
unsigned FastEmit_ISD_FSUB_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2323
if (RetVT.SimpleTy != MVT::v4f32)
2325
if ((Subtarget->hasSSE1())) {
2326
return FastEmitInst_rr(X86::SUBPSrr, X86::VR128RegisterClass, Op0, Op1);
2331
unsigned FastEmit_ISD_FSUB_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2332
if (RetVT.SimpleTy != MVT::v2f64)
2334
if ((Subtarget->hasSSE2())) {
2335
return FastEmitInst_rr(X86::SUBPDrr, X86::VR128RegisterClass, Op0, Op1);
2340
unsigned FastEmit_ISD_FSUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2341
switch (VT.SimpleTy) {
2342
case MVT::f32: return FastEmit_ISD_FSUB_MVT_f32_rr(RetVT, Op0, Op1);
2343
case MVT::f64: return FastEmit_ISD_FSUB_MVT_f64_rr(RetVT, Op0, Op1);
2344
case MVT::f80: return FastEmit_ISD_FSUB_MVT_f80_rr(RetVT, Op0, Op1);
2345
case MVT::v4f32: return FastEmit_ISD_FSUB_MVT_v4f32_rr(RetVT, Op0, Op1);
2346
case MVT::v2f64: return FastEmit_ISD_FSUB_MVT_v2f64_rr(RetVT, Op0, Op1);
2351
// FastEmit functions for ISD::MUL.
2353
unsigned FastEmit_ISD_MUL_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2354
if (RetVT.SimpleTy != MVT::i8)
2356
TII.copyRegToReg(*MBB, MBB->end(), X86::AL, Op0, TM.getRegisterInfo()->getPhysicalRegisterRegClass(X86::AL), MRI.getRegClass(Op0));
2357
return FastEmitInst_r(X86::MUL8r, X86::GR8RegisterClass, Op1);
2360
unsigned FastEmit_ISD_MUL_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2361
if (RetVT.SimpleTy != MVT::i16)
2363
return FastEmitInst_rr(X86::IMUL16rr, X86::GR16RegisterClass, Op0, Op1);
2366
unsigned FastEmit_ISD_MUL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2367
if (RetVT.SimpleTy != MVT::i32)
2369
return FastEmitInst_rr(X86::IMUL32rr, X86::GR32RegisterClass, Op0, Op1);
2372
unsigned FastEmit_ISD_MUL_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2373
if (RetVT.SimpleTy != MVT::i64)
2375
return FastEmitInst_rr(X86::IMUL64rr, X86::GR64RegisterClass, Op0, Op1);
2378
unsigned FastEmit_ISD_MUL_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2379
if (RetVT.SimpleTy != MVT::v4i16)
2381
if ((Subtarget->hasMMX())) {
2382
return FastEmitInst_rr(X86::MMX_PMULLWrr, X86::VR64RegisterClass, Op0, Op1);
2387
unsigned FastEmit_ISD_MUL_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2388
if (RetVT.SimpleTy != MVT::v8i16)
2390
if ((Subtarget->hasSSE2())) {
2391
return FastEmitInst_rr(X86::PMULLWrr, X86::VR128RegisterClass, Op0, Op1);
2396
unsigned FastEmit_ISD_MUL_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2397
if (RetVT.SimpleTy != MVT::v4i32)
2399
if ((Subtarget->hasSSE41())) {
2400
return FastEmitInst_rr(X86::PMULLDrr, X86::VR128RegisterClass, Op0, Op1);
2405
unsigned FastEmit_ISD_MUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2406
switch (VT.SimpleTy) {
2407
case MVT::i8: return FastEmit_ISD_MUL_MVT_i8_rr(RetVT, Op0, Op1);
2408
case MVT::i16: return FastEmit_ISD_MUL_MVT_i16_rr(RetVT, Op0, Op1);
2409
case MVT::i32: return FastEmit_ISD_MUL_MVT_i32_rr(RetVT, Op0, Op1);
2410
case MVT::i64: return FastEmit_ISD_MUL_MVT_i64_rr(RetVT, Op0, Op1);
2411
case MVT::v4i16: return FastEmit_ISD_MUL_MVT_v4i16_rr(RetVT, Op0, Op1);
2412
case MVT::v8i16: return FastEmit_ISD_MUL_MVT_v8i16_rr(RetVT, Op0, Op1);
2413
case MVT::v4i32: return FastEmit_ISD_MUL_MVT_v4i32_rr(RetVT, Op0, Op1);
2418
// FastEmit functions for ISD::OR.
2420
unsigned FastEmit_ISD_OR_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2421
if (RetVT.SimpleTy != MVT::i8)
2423
return FastEmitInst_rr(X86::OR8rr, X86::GR8RegisterClass, Op0, Op1);
2426
unsigned FastEmit_ISD_OR_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2427
if (RetVT.SimpleTy != MVT::i16)
2429
return FastEmitInst_rr(X86::OR16rr, X86::GR16RegisterClass, Op0, Op1);
2432
unsigned FastEmit_ISD_OR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2433
if (RetVT.SimpleTy != MVT::i32)
2435
return FastEmitInst_rr(X86::OR32rr, X86::GR32RegisterClass, Op0, Op1);
2438
unsigned FastEmit_ISD_OR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2439
if (RetVT.SimpleTy != MVT::i64)
2441
return FastEmitInst_rr(X86::OR64rr, X86::GR64RegisterClass, Op0, Op1);
2444
unsigned FastEmit_ISD_OR_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2445
if (RetVT.SimpleTy != MVT::v1i64)
2447
if ((Subtarget->hasMMX())) {
2448
return FastEmitInst_rr(X86::MMX_PORrr, X86::VR64RegisterClass, Op0, Op1);
2453
unsigned FastEmit_ISD_OR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2454
if (RetVT.SimpleTy != MVT::v2i64)
2456
if ((Subtarget->hasSSE1())) {
2457
return FastEmitInst_rr(X86::ORPSrr, X86::VR128RegisterClass, Op0, Op1);
2459
if ((Subtarget->hasSSE2())) {
2460
return FastEmitInst_rr(X86::PORrr, X86::VR128RegisterClass, Op0, Op1);
2465
unsigned FastEmit_ISD_OR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2466
switch (VT.SimpleTy) {
2467
case MVT::i8: return FastEmit_ISD_OR_MVT_i8_rr(RetVT, Op0, Op1);
2468
case MVT::i16: return FastEmit_ISD_OR_MVT_i16_rr(RetVT, Op0, Op1);
2469
case MVT::i32: return FastEmit_ISD_OR_MVT_i32_rr(RetVT, Op0, Op1);
2470
case MVT::i64: return FastEmit_ISD_OR_MVT_i64_rr(RetVT, Op0, Op1);
2471
case MVT::v1i64: return FastEmit_ISD_OR_MVT_v1i64_rr(RetVT, Op0, Op1);
2472
case MVT::v2i64: return FastEmit_ISD_OR_MVT_v2i64_rr(RetVT, Op0, Op1);
2477
// FastEmit functions for ISD::SUB.
2479
unsigned FastEmit_ISD_SUB_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2480
if (RetVT.SimpleTy != MVT::i8)
2482
return FastEmitInst_rr(X86::SUB8rr, X86::GR8RegisterClass, Op0, Op1);
2485
unsigned FastEmit_ISD_SUB_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2486
if (RetVT.SimpleTy != MVT::i16)
2488
return FastEmitInst_rr(X86::SUB16rr, X86::GR16RegisterClass, Op0, Op1);
2491
unsigned FastEmit_ISD_SUB_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2492
if (RetVT.SimpleTy != MVT::i32)
2494
return FastEmitInst_rr(X86::SUB32rr, X86::GR32RegisterClass, Op0, Op1);
2497
unsigned FastEmit_ISD_SUB_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2498
if (RetVT.SimpleTy != MVT::i64)
2500
return FastEmitInst_rr(X86::SUB64rr, X86::GR64RegisterClass, Op0, Op1);
2503
unsigned FastEmit_ISD_SUB_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2504
if (RetVT.SimpleTy != MVT::v8i8)
2506
if ((Subtarget->hasMMX())) {
2507
return FastEmitInst_rr(X86::MMX_PSUBBrr, X86::VR64RegisterClass, Op0, Op1);
2512
unsigned FastEmit_ISD_SUB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2513
if (RetVT.SimpleTy != MVT::v16i8)
2515
if ((Subtarget->hasSSE2())) {
2516
return FastEmitInst_rr(X86::PSUBBrr, X86::VR128RegisterClass, Op0, Op1);
2521
unsigned FastEmit_ISD_SUB_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2522
if (RetVT.SimpleTy != MVT::v4i16)
2524
if ((Subtarget->hasMMX())) {
2525
return FastEmitInst_rr(X86::MMX_PSUBWrr, X86::VR64RegisterClass, Op0, Op1);
2530
unsigned FastEmit_ISD_SUB_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2531
if (RetVT.SimpleTy != MVT::v8i16)
2533
if ((Subtarget->hasSSE2())) {
2534
return FastEmitInst_rr(X86::PSUBWrr, X86::VR128RegisterClass, Op0, Op1);
2539
unsigned FastEmit_ISD_SUB_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2540
if (RetVT.SimpleTy != MVT::v2i32)
2542
if ((Subtarget->hasMMX())) {
2543
return FastEmitInst_rr(X86::MMX_PSUBDrr, X86::VR64RegisterClass, Op0, Op1);
2548
unsigned FastEmit_ISD_SUB_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2549
if (RetVT.SimpleTy != MVT::v4i32)
2551
if ((Subtarget->hasSSE2())) {
2552
return FastEmitInst_rr(X86::PSUBDrr, X86::VR128RegisterClass, Op0, Op1);
2557
unsigned FastEmit_ISD_SUB_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2558
if (RetVT.SimpleTy != MVT::v1i64)
2560
if ((Subtarget->hasMMX())) {
2561
return FastEmitInst_rr(X86::MMX_PSUBQrr, X86::VR64RegisterClass, Op0, Op1);
2566
unsigned FastEmit_ISD_SUB_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2567
if (RetVT.SimpleTy != MVT::v2i64)
2569
if ((Subtarget->hasSSE2())) {
2570
return FastEmitInst_rr(X86::PSUBQrr, X86::VR128RegisterClass, Op0, Op1);
2575
unsigned FastEmit_ISD_SUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2576
switch (VT.SimpleTy) {
2577
case MVT::i8: return FastEmit_ISD_SUB_MVT_i8_rr(RetVT, Op0, Op1);
2578
case MVT::i16: return FastEmit_ISD_SUB_MVT_i16_rr(RetVT, Op0, Op1);
2579
case MVT::i32: return FastEmit_ISD_SUB_MVT_i32_rr(RetVT, Op0, Op1);
2580
case MVT::i64: return FastEmit_ISD_SUB_MVT_i64_rr(RetVT, Op0, Op1);
2581
case MVT::v8i8: return FastEmit_ISD_SUB_MVT_v8i8_rr(RetVT, Op0, Op1);
2582
case MVT::v16i8: return FastEmit_ISD_SUB_MVT_v16i8_rr(RetVT, Op0, Op1);
2583
case MVT::v4i16: return FastEmit_ISD_SUB_MVT_v4i16_rr(RetVT, Op0, Op1);
2584
case MVT::v8i16: return FastEmit_ISD_SUB_MVT_v8i16_rr(RetVT, Op0, Op1);
2585
case MVT::v2i32: return FastEmit_ISD_SUB_MVT_v2i32_rr(RetVT, Op0, Op1);
2586
case MVT::v4i32: return FastEmit_ISD_SUB_MVT_v4i32_rr(RetVT, Op0, Op1);
2587
case MVT::v1i64: return FastEmit_ISD_SUB_MVT_v1i64_rr(RetVT, Op0, Op1);
2588
case MVT::v2i64: return FastEmit_ISD_SUB_MVT_v2i64_rr(RetVT, Op0, Op1);
2593
// FastEmit functions for ISD::SUBC.
2595
unsigned FastEmit_ISD_SUBC_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2596
if (RetVT.SimpleTy != MVT::i32)
2598
return FastEmitInst_rr(X86::SUB32rr, X86::GR32RegisterClass, Op0, Op1);
2601
unsigned FastEmit_ISD_SUBC_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2602
if (RetVT.SimpleTy != MVT::i64)
2604
return FastEmitInst_rr(X86::SUB64rr, X86::GR64RegisterClass, Op0, Op1);
2607
unsigned FastEmit_ISD_SUBC_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2608
switch (VT.SimpleTy) {
2609
case MVT::i32: return FastEmit_ISD_SUBC_MVT_i32_rr(RetVT, Op0, Op1);
2610
case MVT::i64: return FastEmit_ISD_SUBC_MVT_i64_rr(RetVT, Op0, Op1);
2615
// FastEmit functions for ISD::SUBE.
2617
unsigned FastEmit_ISD_SUBE_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2618
if (RetVT.SimpleTy != MVT::i8)
2620
return FastEmitInst_rr(X86::SBB8rr, X86::GR8RegisterClass, Op0, Op1);
2623
unsigned FastEmit_ISD_SUBE_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2624
if (RetVT.SimpleTy != MVT::i16)
2626
return FastEmitInst_rr(X86::SBB16rr, X86::GR16RegisterClass, Op0, Op1);
2629
unsigned FastEmit_ISD_SUBE_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2630
if (RetVT.SimpleTy != MVT::i32)
2632
return FastEmitInst_rr(X86::SBB32rr, X86::GR32RegisterClass, Op0, Op1);
2635
unsigned FastEmit_ISD_SUBE_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2636
if (RetVT.SimpleTy != MVT::i64)
2638
return FastEmitInst_rr(X86::SBB64rr, X86::GR64RegisterClass, Op0, Op1);
2641
unsigned FastEmit_ISD_SUBE_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2642
switch (VT.SimpleTy) {
2643
case MVT::i8: return FastEmit_ISD_SUBE_MVT_i8_rr(RetVT, Op0, Op1);
2644
case MVT::i16: return FastEmit_ISD_SUBE_MVT_i16_rr(RetVT, Op0, Op1);
2645
case MVT::i32: return FastEmit_ISD_SUBE_MVT_i32_rr(RetVT, Op0, Op1);
2646
case MVT::i64: return FastEmit_ISD_SUBE_MVT_i64_rr(RetVT, Op0, Op1);
2651
// FastEmit functions for ISD::XOR.
2653
unsigned FastEmit_ISD_XOR_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2654
if (RetVT.SimpleTy != MVT::i8)
2656
return FastEmitInst_rr(X86::XOR8rr, X86::GR8RegisterClass, Op0, Op1);
2659
unsigned FastEmit_ISD_XOR_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2660
if (RetVT.SimpleTy != MVT::i16)
2662
return FastEmitInst_rr(X86::XOR16rr, X86::GR16RegisterClass, Op0, Op1);
2665
unsigned FastEmit_ISD_XOR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2666
if (RetVT.SimpleTy != MVT::i32)
2668
return FastEmitInst_rr(X86::XOR32rr, X86::GR32RegisterClass, Op0, Op1);
2671
unsigned FastEmit_ISD_XOR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2672
if (RetVT.SimpleTy != MVT::i64)
2674
return FastEmitInst_rr(X86::XOR64rr, X86::GR64RegisterClass, Op0, Op1);
2677
unsigned FastEmit_ISD_XOR_MVT_v1i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2678
if (RetVT.SimpleTy != MVT::v1i64)
2680
if ((Subtarget->hasMMX())) {
2681
return FastEmitInst_rr(X86::MMX_PXORrr, X86::VR64RegisterClass, Op0, Op1);
2686
unsigned FastEmit_ISD_XOR_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2687
if (RetVT.SimpleTy != MVT::v2i64)
2689
if ((Subtarget->hasSSE1())) {
2690
return FastEmitInst_rr(X86::XORPSrr, X86::VR128RegisterClass, Op0, Op1);
2692
if ((Subtarget->hasSSE2())) {
2693
return FastEmitInst_rr(X86::PXORrr, X86::VR128RegisterClass, Op0, Op1);
2698
unsigned FastEmit_ISD_XOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2699
switch (VT.SimpleTy) {
2700
case MVT::i8: return FastEmit_ISD_XOR_MVT_i8_rr(RetVT, Op0, Op1);
2701
case MVT::i16: return FastEmit_ISD_XOR_MVT_i16_rr(RetVT, Op0, Op1);
2702
case MVT::i32: return FastEmit_ISD_XOR_MVT_i32_rr(RetVT, Op0, Op1);
2703
case MVT::i64: return FastEmit_ISD_XOR_MVT_i64_rr(RetVT, Op0, Op1);
2704
case MVT::v1i64: return FastEmit_ISD_XOR_MVT_v1i64_rr(RetVT, Op0, Op1);
2705
case MVT::v2i64: return FastEmit_ISD_XOR_MVT_v2i64_rr(RetVT, Op0, Op1);
2710
// FastEmit functions for X86ISD::ADD.
2712
unsigned FastEmit_X86ISD_ADD_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2713
if (RetVT.SimpleTy != MVT::i8)
2715
return FastEmitInst_rr(X86::ADD8rr, X86::GR8RegisterClass, Op0, Op1);
2718
unsigned FastEmit_X86ISD_ADD_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2719
if (RetVT.SimpleTy != MVT::i16)
2721
return FastEmitInst_rr(X86::ADD16rr, X86::GR16RegisterClass, Op0, Op1);
2724
unsigned FastEmit_X86ISD_ADD_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2725
if (RetVT.SimpleTy != MVT::i32)
2727
return FastEmitInst_rr(X86::ADD32rr, X86::GR32RegisterClass, Op0, Op1);
2730
unsigned FastEmit_X86ISD_ADD_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2731
if (RetVT.SimpleTy != MVT::i64)
2733
return FastEmitInst_rr(X86::ADD64rr, X86::GR64RegisterClass, Op0, Op1);
2736
unsigned FastEmit_X86ISD_ADD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2737
switch (VT.SimpleTy) {
2738
case MVT::i8: return FastEmit_X86ISD_ADD_MVT_i8_rr(RetVT, Op0, Op1);
2739
case MVT::i16: return FastEmit_X86ISD_ADD_MVT_i16_rr(RetVT, Op0, Op1);
2740
case MVT::i32: return FastEmit_X86ISD_ADD_MVT_i32_rr(RetVT, Op0, Op1);
2741
case MVT::i64: return FastEmit_X86ISD_ADD_MVT_i64_rr(RetVT, Op0, Op1);
2746
// FastEmit functions for X86ISD::AND.
2748
unsigned FastEmit_X86ISD_AND_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2749
if (RetVT.SimpleTy != MVT::i8)
2751
return FastEmitInst_rr(X86::AND8rr, X86::GR8RegisterClass, Op0, Op1);
2754
unsigned FastEmit_X86ISD_AND_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2755
if (RetVT.SimpleTy != MVT::i16)
2757
return FastEmitInst_rr(X86::AND16rr, X86::GR16RegisterClass, Op0, Op1);
2760
unsigned FastEmit_X86ISD_AND_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2761
if (RetVT.SimpleTy != MVT::i32)
2763
return FastEmitInst_rr(X86::AND32rr, X86::GR32RegisterClass, Op0, Op1);
2766
unsigned FastEmit_X86ISD_AND_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2767
if (RetVT.SimpleTy != MVT::i64)
2769
return FastEmitInst_rr(X86::AND64rr, X86::GR64RegisterClass, Op0, Op1);
2772
unsigned FastEmit_X86ISD_AND_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2773
switch (VT.SimpleTy) {
2774
case MVT::i8: return FastEmit_X86ISD_AND_MVT_i8_rr(RetVT, Op0, Op1);
2775
case MVT::i16: return FastEmit_X86ISD_AND_MVT_i16_rr(RetVT, Op0, Op1);
2776
case MVT::i32: return FastEmit_X86ISD_AND_MVT_i32_rr(RetVT, Op0, Op1);
2777
case MVT::i64: return FastEmit_X86ISD_AND_MVT_i64_rr(RetVT, Op0, Op1);
2782
// FastEmit functions for X86ISD::BT.
2784
unsigned FastEmit_X86ISD_BT_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2785
if (RetVT.SimpleTy != MVT::isVoid)
2787
return FastEmitInst_rr(X86::BT16rr, X86::GR16RegisterClass, Op0, Op1);
2790
unsigned FastEmit_X86ISD_BT_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2791
if (RetVT.SimpleTy != MVT::isVoid)
2793
return FastEmitInst_rr(X86::BT32rr, X86::GR32RegisterClass, Op0, Op1);
2796
unsigned FastEmit_X86ISD_BT_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2797
if (RetVT.SimpleTy != MVT::isVoid)
2799
return FastEmitInst_rr(X86::BT64rr, X86::GR64RegisterClass, Op0, Op1);
2802
unsigned FastEmit_X86ISD_BT_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2803
switch (VT.SimpleTy) {
2804
case MVT::i16: return FastEmit_X86ISD_BT_MVT_i16_rr(RetVT, Op0, Op1);
2805
case MVT::i32: return FastEmit_X86ISD_BT_MVT_i32_rr(RetVT, Op0, Op1);
2806
case MVT::i64: return FastEmit_X86ISD_BT_MVT_i64_rr(RetVT, Op0, Op1);
2811
// FastEmit functions for X86ISD::CMP.
2813
unsigned FastEmit_X86ISD_CMP_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2814
if (RetVT.SimpleTy != MVT::isVoid)
2816
return FastEmitInst_rr(X86::CMP8rr, X86::GR8RegisterClass, Op0, Op1);
2819
unsigned FastEmit_X86ISD_CMP_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2820
if (RetVT.SimpleTy != MVT::isVoid)
2822
return FastEmitInst_rr(X86::CMP16rr, X86::GR16RegisterClass, Op0, Op1);
2825
unsigned FastEmit_X86ISD_CMP_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2826
if (RetVT.SimpleTy != MVT::isVoid)
2828
return FastEmitInst_rr(X86::CMP32rr, X86::GR32RegisterClass, Op0, Op1);
2831
unsigned FastEmit_X86ISD_CMP_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2832
if (RetVT.SimpleTy != MVT::isVoid)
2834
return FastEmitInst_rr(X86::CMP64rr, X86::GR64RegisterClass, Op0, Op1);
2837
unsigned FastEmit_X86ISD_CMP_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2838
if (RetVT.SimpleTy != MVT::isVoid)
2840
if ((!Subtarget->hasSSE1())) {
2841
return FastEmitInst_rr(X86::UCOM_FpIr32, X86::RFP32RegisterClass, Op0, Op1);
2843
if ((Subtarget->hasSSE1())) {
2844
return FastEmitInst_rr(X86::UCOMISSrr, X86::FR32RegisterClass, Op0, Op1);
2849
unsigned FastEmit_X86ISD_CMP_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2850
if (RetVT.SimpleTy != MVT::isVoid)
2852
if ((!Subtarget->hasSSE2())) {
2853
return FastEmitInst_rr(X86::UCOM_FpIr64, X86::RFP64RegisterClass, Op0, Op1);
2855
if ((Subtarget->hasSSE2())) {
2856
return FastEmitInst_rr(X86::UCOMISDrr, X86::FR64RegisterClass, Op0, Op1);
2861
unsigned FastEmit_X86ISD_CMP_MVT_f80_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2862
if (RetVT.SimpleTy != MVT::isVoid)
2864
return FastEmitInst_rr(X86::UCOM_FpIr80, X86::RFP80RegisterClass, Op0, Op1);
2867
unsigned FastEmit_X86ISD_CMP_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2868
switch (VT.SimpleTy) {
2869
case MVT::i8: return FastEmit_X86ISD_CMP_MVT_i8_rr(RetVT, Op0, Op1);
2870
case MVT::i16: return FastEmit_X86ISD_CMP_MVT_i16_rr(RetVT, Op0, Op1);
2871
case MVT::i32: return FastEmit_X86ISD_CMP_MVT_i32_rr(RetVT, Op0, Op1);
2872
case MVT::i64: return FastEmit_X86ISD_CMP_MVT_i64_rr(RetVT, Op0, Op1);
2873
case MVT::f32: return FastEmit_X86ISD_CMP_MVT_f32_rr(RetVT, Op0, Op1);
2874
case MVT::f64: return FastEmit_X86ISD_CMP_MVT_f64_rr(RetVT, Op0, Op1);
2875
case MVT::f80: return FastEmit_X86ISD_CMP_MVT_f80_rr(RetVT, Op0, Op1);
2880
// FastEmit functions for X86ISD::COMI.
2882
unsigned FastEmit_X86ISD_COMI_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2883
if (RetVT.SimpleTy != MVT::isVoid)
2885
if ((Subtarget->hasSSE1())) {
2886
return FastEmitInst_rr(X86::Int_COMISSrr, X86::VR128RegisterClass, Op0, Op1);
2891
unsigned FastEmit_X86ISD_COMI_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2892
if (RetVT.SimpleTy != MVT::isVoid)
2894
if ((Subtarget->hasSSE2())) {
2895
return FastEmitInst_rr(X86::Int_COMISDrr, X86::VR128RegisterClass, Op0, Op1);
2900
unsigned FastEmit_X86ISD_COMI_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2901
switch (VT.SimpleTy) {
2902
case MVT::v4f32: return FastEmit_X86ISD_COMI_MVT_v4f32_rr(RetVT, Op0, Op1);
2903
case MVT::v2f64: return FastEmit_X86ISD_COMI_MVT_v2f64_rr(RetVT, Op0, Op1);
2908
// FastEmit functions for X86ISD::FAND.
2910
unsigned FastEmit_X86ISD_FAND_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2911
if (RetVT.SimpleTy != MVT::f32)
2913
if ((Subtarget->hasSSE1())) {
2914
return FastEmitInst_rr(X86::FsANDPSrr, X86::FR32RegisterClass, Op0, Op1);
2919
unsigned FastEmit_X86ISD_FAND_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2920
if (RetVT.SimpleTy != MVT::f64)
2922
if ((Subtarget->hasSSE2())) {
2923
return FastEmitInst_rr(X86::FsANDPDrr, X86::FR64RegisterClass, Op0, Op1);
2928
unsigned FastEmit_X86ISD_FAND_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2929
switch (VT.SimpleTy) {
2930
case MVT::f32: return FastEmit_X86ISD_FAND_MVT_f32_rr(RetVT, Op0, Op1);
2931
case MVT::f64: return FastEmit_X86ISD_FAND_MVT_f64_rr(RetVT, Op0, Op1);
2936
// FastEmit functions for X86ISD::FMAX.
2938
unsigned FastEmit_X86ISD_FMAX_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2939
if (RetVT.SimpleTy != MVT::f32)
2941
if ((Subtarget->hasSSE1())) {
2942
return FastEmitInst_rr(X86::MAXSSrr, X86::FR32RegisterClass, Op0, Op1);
2947
unsigned FastEmit_X86ISD_FMAX_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2948
if (RetVT.SimpleTy != MVT::f64)
2950
if ((Subtarget->hasSSE2())) {
2951
return FastEmitInst_rr(X86::MAXSDrr, X86::FR64RegisterClass, Op0, Op1);
2956
unsigned FastEmit_X86ISD_FMAX_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2957
if (RetVT.SimpleTy != MVT::v4f32)
2959
if ((Subtarget->hasSSE1())) {
2960
return FastEmitInst_rr(X86::MAXPSrr, X86::VR128RegisterClass, Op0, Op1);
2965
unsigned FastEmit_X86ISD_FMAX_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2966
if (RetVT.SimpleTy != MVT::v2f64)
2968
if ((Subtarget->hasSSE2())) {
2969
return FastEmitInst_rr(X86::MAXPDrr, X86::VR128RegisterClass, Op0, Op1);
2974
unsigned FastEmit_X86ISD_FMAX_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
2975
switch (VT.SimpleTy) {
2976
case MVT::f32: return FastEmit_X86ISD_FMAX_MVT_f32_rr(RetVT, Op0, Op1);
2977
case MVT::f64: return FastEmit_X86ISD_FMAX_MVT_f64_rr(RetVT, Op0, Op1);
2978
case MVT::v4f32: return FastEmit_X86ISD_FMAX_MVT_v4f32_rr(RetVT, Op0, Op1);
2979
case MVT::v2f64: return FastEmit_X86ISD_FMAX_MVT_v2f64_rr(RetVT, Op0, Op1);
2984
// FastEmit functions for X86ISD::FMIN.
2986
unsigned FastEmit_X86ISD_FMIN_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2987
if (RetVT.SimpleTy != MVT::f32)
2989
if ((Subtarget->hasSSE1())) {
2990
return FastEmitInst_rr(X86::MINSSrr, X86::FR32RegisterClass, Op0, Op1);
2995
unsigned FastEmit_X86ISD_FMIN_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
2996
if (RetVT.SimpleTy != MVT::f64)
2998
if ((Subtarget->hasSSE2())) {
2999
return FastEmitInst_rr(X86::MINSDrr, X86::FR64RegisterClass, Op0, Op1);
3004
unsigned FastEmit_X86ISD_FMIN_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3005
if (RetVT.SimpleTy != MVT::v4f32)
3007
if ((Subtarget->hasSSE1())) {
3008
return FastEmitInst_rr(X86::MINPSrr, X86::VR128RegisterClass, Op0, Op1);
3013
unsigned FastEmit_X86ISD_FMIN_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3014
if (RetVT.SimpleTy != MVT::v2f64)
3016
if ((Subtarget->hasSSE2())) {
3017
return FastEmitInst_rr(X86::MINPDrr, X86::VR128RegisterClass, Op0, Op1);
3022
unsigned FastEmit_X86ISD_FMIN_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3023
switch (VT.SimpleTy) {
3024
case MVT::f32: return FastEmit_X86ISD_FMIN_MVT_f32_rr(RetVT, Op0, Op1);
3025
case MVT::f64: return FastEmit_X86ISD_FMIN_MVT_f64_rr(RetVT, Op0, Op1);
3026
case MVT::v4f32: return FastEmit_X86ISD_FMIN_MVT_v4f32_rr(RetVT, Op0, Op1);
3027
case MVT::v2f64: return FastEmit_X86ISD_FMIN_MVT_v2f64_rr(RetVT, Op0, Op1);
3032
// FastEmit functions for X86ISD::FOR.
3034
unsigned FastEmit_X86ISD_FOR_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3035
if (RetVT.SimpleTy != MVT::f32)
3037
if ((Subtarget->hasSSE1())) {
3038
return FastEmitInst_rr(X86::FsORPSrr, X86::FR32RegisterClass, Op0, Op1);
3043
unsigned FastEmit_X86ISD_FOR_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3044
if (RetVT.SimpleTy != MVT::f64)
3046
if ((Subtarget->hasSSE2())) {
3047
return FastEmitInst_rr(X86::FsORPDrr, X86::FR64RegisterClass, Op0, Op1);
3052
unsigned FastEmit_X86ISD_FOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3053
switch (VT.SimpleTy) {
3054
case MVT::f32: return FastEmit_X86ISD_FOR_MVT_f32_rr(RetVT, Op0, Op1);
3055
case MVT::f64: return FastEmit_X86ISD_FOR_MVT_f64_rr(RetVT, Op0, Op1);
3060
// FastEmit functions for X86ISD::FXOR.
3062
unsigned FastEmit_X86ISD_FXOR_MVT_f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3063
if (RetVT.SimpleTy != MVT::f32)
3065
if ((Subtarget->hasSSE1())) {
3066
return FastEmitInst_rr(X86::FsXORPSrr, X86::FR32RegisterClass, Op0, Op1);
3071
unsigned FastEmit_X86ISD_FXOR_MVT_f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3072
if (RetVT.SimpleTy != MVT::f64)
3074
if ((Subtarget->hasSSE2())) {
3075
return FastEmitInst_rr(X86::FsXORPDrr, X86::FR64RegisterClass, Op0, Op1);
3080
unsigned FastEmit_X86ISD_FXOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3081
switch (VT.SimpleTy) {
3082
case MVT::f32: return FastEmit_X86ISD_FXOR_MVT_f32_rr(RetVT, Op0, Op1);
3083
case MVT::f64: return FastEmit_X86ISD_FXOR_MVT_f64_rr(RetVT, Op0, Op1);
3088
// FastEmit functions for X86ISD::OR.
3090
unsigned FastEmit_X86ISD_OR_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3091
if (RetVT.SimpleTy != MVT::i8)
3093
return FastEmitInst_rr(X86::OR8rr, X86::GR8RegisterClass, Op0, Op1);
3096
unsigned FastEmit_X86ISD_OR_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3097
if (RetVT.SimpleTy != MVT::i16)
3099
return FastEmitInst_rr(X86::OR16rr, X86::GR16RegisterClass, Op0, Op1);
3102
unsigned FastEmit_X86ISD_OR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3103
if (RetVT.SimpleTy != MVT::i32)
3105
return FastEmitInst_rr(X86::OR32rr, X86::GR32RegisterClass, Op0, Op1);
3108
unsigned FastEmit_X86ISD_OR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3109
if (RetVT.SimpleTy != MVT::i64)
3111
return FastEmitInst_rr(X86::OR64rr, X86::GR64RegisterClass, Op0, Op1);
3114
unsigned FastEmit_X86ISD_OR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3115
switch (VT.SimpleTy) {
3116
case MVT::i8: return FastEmit_X86ISD_OR_MVT_i8_rr(RetVT, Op0, Op1);
3117
case MVT::i16: return FastEmit_X86ISD_OR_MVT_i16_rr(RetVT, Op0, Op1);
3118
case MVT::i32: return FastEmit_X86ISD_OR_MVT_i32_rr(RetVT, Op0, Op1);
3119
case MVT::i64: return FastEmit_X86ISD_OR_MVT_i64_rr(RetVT, Op0, Op1);
3124
// FastEmit functions for X86ISD::PCMPEQB.
3126
unsigned FastEmit_X86ISD_PCMPEQB_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3127
if (RetVT.SimpleTy != MVT::v8i8)
3129
return FastEmitInst_rr(X86::MMX_PCMPEQBrr, X86::VR64RegisterClass, Op0, Op1);
3132
unsigned FastEmit_X86ISD_PCMPEQB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3133
if (RetVT.SimpleTy != MVT::v16i8)
3135
return FastEmitInst_rr(X86::PCMPEQBrr, X86::VR128RegisterClass, Op0, Op1);
3138
unsigned FastEmit_X86ISD_PCMPEQB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3139
switch (VT.SimpleTy) {
3140
case MVT::v8i8: return FastEmit_X86ISD_PCMPEQB_MVT_v8i8_rr(RetVT, Op0, Op1);
3141
case MVT::v16i8: return FastEmit_X86ISD_PCMPEQB_MVT_v16i8_rr(RetVT, Op0, Op1);
3146
// FastEmit functions for X86ISD::PCMPEQD.
3148
unsigned FastEmit_X86ISD_PCMPEQD_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3149
if (RetVT.SimpleTy != MVT::v2i32)
3151
return FastEmitInst_rr(X86::MMX_PCMPEQDrr, X86::VR64RegisterClass, Op0, Op1);
3154
unsigned FastEmit_X86ISD_PCMPEQD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3155
if (RetVT.SimpleTy != MVT::v4i32)
3157
return FastEmitInst_rr(X86::PCMPEQDrr, X86::VR128RegisterClass, Op0, Op1);
3160
unsigned FastEmit_X86ISD_PCMPEQD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3161
switch (VT.SimpleTy) {
3162
case MVT::v2i32: return FastEmit_X86ISD_PCMPEQD_MVT_v2i32_rr(RetVT, Op0, Op1);
3163
case MVT::v4i32: return FastEmit_X86ISD_PCMPEQD_MVT_v4i32_rr(RetVT, Op0, Op1);
3168
// FastEmit functions for X86ISD::PCMPEQQ.
3170
unsigned FastEmit_X86ISD_PCMPEQQ_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3171
if (RetVT.SimpleTy != MVT::v2i64)
3173
return FastEmitInst_rr(X86::PCMPEQQrr, X86::VR128RegisterClass, Op0, Op1);
3176
unsigned FastEmit_X86ISD_PCMPEQQ_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3177
switch (VT.SimpleTy) {
3178
case MVT::v2i64: return FastEmit_X86ISD_PCMPEQQ_MVT_v2i64_rr(RetVT, Op0, Op1);
3183
// FastEmit functions for X86ISD::PCMPEQW.
3185
unsigned FastEmit_X86ISD_PCMPEQW_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3186
if (RetVT.SimpleTy != MVT::v4i16)
3188
return FastEmitInst_rr(X86::MMX_PCMPEQWrr, X86::VR64RegisterClass, Op0, Op1);
3191
unsigned FastEmit_X86ISD_PCMPEQW_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3192
if (RetVT.SimpleTy != MVT::v8i16)
3194
return FastEmitInst_rr(X86::PCMPEQWrr, X86::VR128RegisterClass, Op0, Op1);
3197
unsigned FastEmit_X86ISD_PCMPEQW_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3198
switch (VT.SimpleTy) {
3199
case MVT::v4i16: return FastEmit_X86ISD_PCMPEQW_MVT_v4i16_rr(RetVT, Op0, Op1);
3200
case MVT::v8i16: return FastEmit_X86ISD_PCMPEQW_MVT_v8i16_rr(RetVT, Op0, Op1);
3205
// FastEmit functions for X86ISD::PCMPGTB.
3207
unsigned FastEmit_X86ISD_PCMPGTB_MVT_v8i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3208
if (RetVT.SimpleTy != MVT::v8i8)
3210
return FastEmitInst_rr(X86::MMX_PCMPGTBrr, X86::VR64RegisterClass, Op0, Op1);
3213
unsigned FastEmit_X86ISD_PCMPGTB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3214
if (RetVT.SimpleTy != MVT::v16i8)
3216
return FastEmitInst_rr(X86::PCMPGTBrr, X86::VR128RegisterClass, Op0, Op1);
3219
unsigned FastEmit_X86ISD_PCMPGTB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3220
switch (VT.SimpleTy) {
3221
case MVT::v8i8: return FastEmit_X86ISD_PCMPGTB_MVT_v8i8_rr(RetVT, Op0, Op1);
3222
case MVT::v16i8: return FastEmit_X86ISD_PCMPGTB_MVT_v16i8_rr(RetVT, Op0, Op1);
3227
// FastEmit functions for X86ISD::PCMPGTD.
3229
unsigned FastEmit_X86ISD_PCMPGTD_MVT_v2i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3230
if (RetVT.SimpleTy != MVT::v2i32)
3232
return FastEmitInst_rr(X86::MMX_PCMPGTDrr, X86::VR64RegisterClass, Op0, Op1);
3235
unsigned FastEmit_X86ISD_PCMPGTD_MVT_v4i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3236
if (RetVT.SimpleTy != MVT::v4i32)
3238
return FastEmitInst_rr(X86::PCMPGTDrr, X86::VR128RegisterClass, Op0, Op1);
3241
unsigned FastEmit_X86ISD_PCMPGTD_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3242
switch (VT.SimpleTy) {
3243
case MVT::v2i32: return FastEmit_X86ISD_PCMPGTD_MVT_v2i32_rr(RetVT, Op0, Op1);
3244
case MVT::v4i32: return FastEmit_X86ISD_PCMPGTD_MVT_v4i32_rr(RetVT, Op0, Op1);
3249
// FastEmit functions for X86ISD::PCMPGTQ.
3251
unsigned FastEmit_X86ISD_PCMPGTQ_MVT_v2i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3252
if (RetVT.SimpleTy != MVT::v2i64)
3254
return FastEmitInst_rr(X86::PCMPGTQrr, X86::VR128RegisterClass, Op0, Op1);
3257
unsigned FastEmit_X86ISD_PCMPGTQ_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3258
switch (VT.SimpleTy) {
3259
case MVT::v2i64: return FastEmit_X86ISD_PCMPGTQ_MVT_v2i64_rr(RetVT, Op0, Op1);
3264
// FastEmit functions for X86ISD::PCMPGTW.
3266
unsigned FastEmit_X86ISD_PCMPGTW_MVT_v4i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3267
if (RetVT.SimpleTy != MVT::v4i16)
3269
return FastEmitInst_rr(X86::MMX_PCMPGTWrr, X86::VR64RegisterClass, Op0, Op1);
3272
unsigned FastEmit_X86ISD_PCMPGTW_MVT_v8i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3273
if (RetVT.SimpleTy != MVT::v8i16)
3275
return FastEmitInst_rr(X86::PCMPGTWrr, X86::VR128RegisterClass, Op0, Op1);
3278
unsigned FastEmit_X86ISD_PCMPGTW_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3279
switch (VT.SimpleTy) {
3280
case MVT::v4i16: return FastEmit_X86ISD_PCMPGTW_MVT_v4i16_rr(RetVT, Op0, Op1);
3281
case MVT::v8i16: return FastEmit_X86ISD_PCMPGTW_MVT_v8i16_rr(RetVT, Op0, Op1);
3286
// FastEmit functions for X86ISD::PSHUFB.
3288
unsigned FastEmit_X86ISD_PSHUFB_MVT_v16i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3289
if (RetVT.SimpleTy != MVT::v16i8)
3291
if ((Subtarget->hasSSSE3())) {
3292
return FastEmitInst_rr(X86::PSHUFBrr128, X86::VR128RegisterClass, Op0, Op1);
3297
unsigned FastEmit_X86ISD_PSHUFB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3298
switch (VT.SimpleTy) {
3299
case MVT::v16i8: return FastEmit_X86ISD_PSHUFB_MVT_v16i8_rr(RetVT, Op0, Op1);
3304
// FastEmit functions for X86ISD::PTEST.
3306
unsigned FastEmit_X86ISD_PTEST_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3307
if (RetVT.SimpleTy != MVT::isVoid)
3309
if ((Subtarget->hasSSE41())) {
3310
return FastEmitInst_rr(X86::PTESTrr, X86::VR128RegisterClass, Op0, Op1);
3315
unsigned FastEmit_X86ISD_PTEST_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3316
switch (VT.SimpleTy) {
3317
case MVT::v4f32: return FastEmit_X86ISD_PTEST_MVT_v4f32_rr(RetVT, Op0, Op1);
3322
// FastEmit functions for X86ISD::SMUL.
3324
unsigned FastEmit_X86ISD_SMUL_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3325
if (RetVT.SimpleTy != MVT::i16)
3327
return FastEmitInst_rr(X86::IMUL16rr, X86::GR16RegisterClass, Op0, Op1);
3330
unsigned FastEmit_X86ISD_SMUL_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3331
if (RetVT.SimpleTy != MVT::i32)
3333
return FastEmitInst_rr(X86::IMUL32rr, X86::GR32RegisterClass, Op0, Op1);
3336
unsigned FastEmit_X86ISD_SMUL_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3337
if (RetVT.SimpleTy != MVT::i64)
3339
return FastEmitInst_rr(X86::IMUL64rr, X86::GR64RegisterClass, Op0, Op1);
3342
unsigned FastEmit_X86ISD_SMUL_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3343
switch (VT.SimpleTy) {
3344
case MVT::i16: return FastEmit_X86ISD_SMUL_MVT_i16_rr(RetVT, Op0, Op1);
3345
case MVT::i32: return FastEmit_X86ISD_SMUL_MVT_i32_rr(RetVT, Op0, Op1);
3346
case MVT::i64: return FastEmit_X86ISD_SMUL_MVT_i64_rr(RetVT, Op0, Op1);
3351
// FastEmit functions for X86ISD::SUB.
3353
unsigned FastEmit_X86ISD_SUB_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3354
if (RetVT.SimpleTy != MVT::i8)
3356
return FastEmitInst_rr(X86::SUB8rr, X86::GR8RegisterClass, Op0, Op1);
3359
unsigned FastEmit_X86ISD_SUB_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3360
if (RetVT.SimpleTy != MVT::i16)
3362
return FastEmitInst_rr(X86::SUB16rr, X86::GR16RegisterClass, Op0, Op1);
3365
unsigned FastEmit_X86ISD_SUB_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3366
if (RetVT.SimpleTy != MVT::i32)
3368
return FastEmitInst_rr(X86::SUB32rr, X86::GR32RegisterClass, Op0, Op1);
3371
unsigned FastEmit_X86ISD_SUB_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3372
if (RetVT.SimpleTy != MVT::i64)
3374
return FastEmitInst_rr(X86::SUB64rr, X86::GR64RegisterClass, Op0, Op1);
3377
unsigned FastEmit_X86ISD_SUB_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3378
switch (VT.SimpleTy) {
3379
case MVT::i8: return FastEmit_X86ISD_SUB_MVT_i8_rr(RetVT, Op0, Op1);
3380
case MVT::i16: return FastEmit_X86ISD_SUB_MVT_i16_rr(RetVT, Op0, Op1);
3381
case MVT::i32: return FastEmit_X86ISD_SUB_MVT_i32_rr(RetVT, Op0, Op1);
3382
case MVT::i64: return FastEmit_X86ISD_SUB_MVT_i64_rr(RetVT, Op0, Op1);
3387
// FastEmit functions for X86ISD::UCOMI.
3389
unsigned FastEmit_X86ISD_UCOMI_MVT_v4f32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3390
if (RetVT.SimpleTy != MVT::isVoid)
3392
if ((Subtarget->hasSSE1())) {
3393
return FastEmitInst_rr(X86::Int_UCOMISSrr, X86::VR128RegisterClass, Op0, Op1);
3398
unsigned FastEmit_X86ISD_UCOMI_MVT_v2f64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3399
if (RetVT.SimpleTy != MVT::isVoid)
3401
if ((Subtarget->hasSSE2())) {
3402
return FastEmitInst_rr(X86::Int_UCOMISDrr, X86::VR128RegisterClass, Op0, Op1);
3407
unsigned FastEmit_X86ISD_UCOMI_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3408
switch (VT.SimpleTy) {
3409
case MVT::v4f32: return FastEmit_X86ISD_UCOMI_MVT_v4f32_rr(RetVT, Op0, Op1);
3410
case MVT::v2f64: return FastEmit_X86ISD_UCOMI_MVT_v2f64_rr(RetVT, Op0, Op1);
3415
// FastEmit functions for X86ISD::XOR.
3417
unsigned FastEmit_X86ISD_XOR_MVT_i8_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3418
if (RetVT.SimpleTy != MVT::i8)
3420
return FastEmitInst_rr(X86::XOR8rr, X86::GR8RegisterClass, Op0, Op1);
3423
unsigned FastEmit_X86ISD_XOR_MVT_i16_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3424
if (RetVT.SimpleTy != MVT::i16)
3426
return FastEmitInst_rr(X86::XOR16rr, X86::GR16RegisterClass, Op0, Op1);
3429
unsigned FastEmit_X86ISD_XOR_MVT_i32_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3430
if (RetVT.SimpleTy != MVT::i32)
3432
return FastEmitInst_rr(X86::XOR32rr, X86::GR32RegisterClass, Op0, Op1);
3435
unsigned FastEmit_X86ISD_XOR_MVT_i64_rr(MVT RetVT, unsigned Op0, unsigned Op1) {
3436
if (RetVT.SimpleTy != MVT::i64)
3438
return FastEmitInst_rr(X86::XOR64rr, X86::GR64RegisterClass, Op0, Op1);
3441
unsigned FastEmit_X86ISD_XOR_rr(MVT VT, MVT RetVT, unsigned Op0, unsigned Op1) {
3442
switch (VT.SimpleTy) {
3443
case MVT::i8: return FastEmit_X86ISD_XOR_MVT_i8_rr(RetVT, Op0, Op1);
3444
case MVT::i16: return FastEmit_X86ISD_XOR_MVT_i16_rr(RetVT, Op0, Op1);
3445
case MVT::i32: return FastEmit_X86ISD_XOR_MVT_i32_rr(RetVT, Op0, Op1);
3446
case MVT::i64: return FastEmit_X86ISD_XOR_MVT_i64_rr(RetVT, Op0, Op1);
3451
// Top-level FastEmit function.
3453
unsigned FastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, unsigned Op1) {
3455
case ISD::ADD: return FastEmit_ISD_ADD_rr(VT, RetVT, Op0, Op1);
3456
case ISD::ADDC: return FastEmit_ISD_ADDC_rr(VT, RetVT, Op0, Op1);
3457
case ISD::ADDE: return FastEmit_ISD_ADDE_rr(VT, RetVT, Op0, Op1);
3458
case ISD::AND: return FastEmit_ISD_AND_rr(VT, RetVT, Op0, Op1);
3459
case ISD::FADD: return FastEmit_ISD_FADD_rr(VT, RetVT, Op0, Op1);
3460
case ISD::FDIV: return FastEmit_ISD_FDIV_rr(VT, RetVT, Op0, Op1);
3461
case ISD::FMUL: return FastEmit_ISD_FMUL_rr(VT, RetVT, Op0, Op1);
3462
case ISD::FSUB: return FastEmit_ISD_FSUB_rr(VT, RetVT, Op0, Op1);
3463
case ISD::MUL: return FastEmit_ISD_MUL_rr(VT, RetVT, Op0, Op1);
3464
case ISD::OR: return FastEmit_ISD_OR_rr(VT, RetVT, Op0, Op1);
3465
case ISD::SUB: return FastEmit_ISD_SUB_rr(VT, RetVT, Op0, Op1);
3466
case ISD::SUBC: return FastEmit_ISD_SUBC_rr(VT, RetVT, Op0, Op1);
3467
case ISD::SUBE: return FastEmit_ISD_SUBE_rr(VT, RetVT, Op0, Op1);
3468
case ISD::XOR: return FastEmit_ISD_XOR_rr(VT, RetVT, Op0, Op1);
3469
case X86ISD::ADD: return FastEmit_X86ISD_ADD_rr(VT, RetVT, Op0, Op1);
3470
case X86ISD::AND: return FastEmit_X86ISD_AND_rr(VT, RetVT, Op0, Op1);
3471
case X86ISD::BT: return FastEmit_X86ISD_BT_rr(VT, RetVT, Op0, Op1);
3472
case X86ISD::CMP: return FastEmit_X86ISD_CMP_rr(VT, RetVT, Op0, Op1);
3473
case X86ISD::COMI: return FastEmit_X86ISD_COMI_rr(VT, RetVT, Op0, Op1);
3474
case X86ISD::FAND: return FastEmit_X86ISD_FAND_rr(VT, RetVT, Op0, Op1);
3475
case X86ISD::FMAX: return FastEmit_X86ISD_FMAX_rr(VT, RetVT, Op0, Op1);
3476
case X86ISD::FMIN: return FastEmit_X86ISD_FMIN_rr(VT, RetVT, Op0, Op1);
3477
case X86ISD::FOR: return FastEmit_X86ISD_FOR_rr(VT, RetVT, Op0, Op1);
3478
case X86ISD::FXOR: return FastEmit_X86ISD_FXOR_rr(VT, RetVT, Op0, Op1);
3479
case X86ISD::OR: return FastEmit_X86ISD_OR_rr(VT, RetVT, Op0, Op1);
3480
case X86ISD::PCMPEQB: return FastEmit_X86ISD_PCMPEQB_rr(VT, RetVT, Op0, Op1);
3481
case X86ISD::PCMPEQD: return FastEmit_X86ISD_PCMPEQD_rr(VT, RetVT, Op0, Op1);
3482
case X86ISD::PCMPEQQ: return FastEmit_X86ISD_PCMPEQQ_rr(VT, RetVT, Op0, Op1);
3483
case X86ISD::PCMPEQW: return FastEmit_X86ISD_PCMPEQW_rr(VT, RetVT, Op0, Op1);
3484
case X86ISD::PCMPGTB: return FastEmit_X86ISD_PCMPGTB_rr(VT, RetVT, Op0, Op1);
3485
case X86ISD::PCMPGTD: return FastEmit_X86ISD_PCMPGTD_rr(VT, RetVT, Op0, Op1);
3486
case X86ISD::PCMPGTQ: return FastEmit_X86ISD_PCMPGTQ_rr(VT, RetVT, Op0, Op1);
3487
case X86ISD::PCMPGTW: return FastEmit_X86ISD_PCMPGTW_rr(VT, RetVT, Op0, Op1);
3488
case X86ISD::PSHUFB: return FastEmit_X86ISD_PSHUFB_rr(VT, RetVT, Op0, Op1);
3489
case X86ISD::PTEST: return FastEmit_X86ISD_PTEST_rr(VT, RetVT, Op0, Op1);
3490
case X86ISD::SMUL: return FastEmit_X86ISD_SMUL_rr(VT, RetVT, Op0, Op1);
3491
case X86ISD::SUB: return FastEmit_X86ISD_SUB_rr(VT, RetVT, Op0, Op1);
3492
case X86ISD::UCOMI: return FastEmit_X86ISD_UCOMI_rr(VT, RetVT, Op0, Op1);
3493
case X86ISD::XOR: return FastEmit_X86ISD_XOR_rr(VT, RetVT, Op0, Op1);