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//===-- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
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// The LLVM Compiler Infrastructure
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//===----------------------------------------------------------------------===//
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// This file contains the abstract interface for register coalescers,
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// allowing them to interact with and query register allocators.
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//===----------------------------------------------------------------------===//
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#include "llvm/System/IncludeFile.h"
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#include "llvm/CodeGen/LiveInterval.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#ifndef LLVM_CODEGEN_REGISTER_COALESCER_H
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#define LLVM_CODEGEN_REGISTER_COALESCER_H
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class MachineFunction;
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/// An abstract interface for register coalescers. Coalescers must
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/// implement this interface to be part of the coalescer analysis
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class RegisterCoalescer {
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static char ID; // Class identification, replacement for typeinfo
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RegisterCoalescer() {}
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virtual ~RegisterCoalescer(); // We want to be subclassed
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/// Run the coalescer on this function, providing interference
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/// data to query. Return whether we removed any copies.
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virtual bool coalesceFunction(MachineFunction &mf,
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RegallocQuery &ifd) = 0;
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/// Reset state. Can be used to allow a coalescer run by
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/// PassManager to be run again by the register allocator.
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virtual void reset(MachineFunction &mf) {}
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/// Register allocators must call this from their own
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/// getAnalysisUsage to cover the case where the coalescer is not
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/// a Pass in the proper sense and isn't managed by PassManager.
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/// PassManager needs to know which analyses to make available and
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/// which to invalidate when running the register allocator or any
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/// pass that might call coalescing. The long-term solution is to
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/// allow hierarchies of PassManagers.
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {}
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/// An abstract interface for register allocators to interact with
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/// This is simply an example of how to use the RegallocQuery
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/// interface. It is not meant to be used in production.
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/// class LinearScanRegallocQuery : public RegallocQuery {
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/// const LiveIntervals \&li;
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/// LinearScanRegallocQuery(LiveIntervals &intervals)
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/// : li(intervals) {}
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/// /// This is pretty slow and conservative, but since linear scan
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/// /// allocation doesn't pre-compute interference information it's
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/// /// the best we can do. Coalescers are always free to ignore this
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/// /// and implement their own discovery strategy. See
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/// /// SimpleRegisterCoalescing for an example.
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/// void getInterferences(IntervalSet &interferences,
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/// const LiveInterval &a) const {
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/// for(LiveIntervals::const_iterator iv = li.begin(),
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/// if (interfere(a, iv->second)) {
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/// interferences.insert(&iv->second);
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/// /// This is *really* slow and stupid. See above.
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/// int getNumberOfInterferences(const LiveInterval &a) const {
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/// IntervalSet intervals;
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/// getInterferences(intervals, a);
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/// return intervals.size();
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/// RegisterCoalescer &coalescer = getAnalysis<RegisterCoalescer>();
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/// // We don't reset the coalescer so if it's already been run this
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/// // takes almost no time.
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/// LinearScanRegallocQuery ifd(*li_);
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/// coalescer.coalesceFunction(fn, ifd);
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class RegallocQuery {
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typedef SmallPtrSet<const LiveInterval *, 8> IntervalSet;
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virtual ~RegallocQuery() {}
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/// Return whether two live ranges interfere.
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virtual bool interfere(const LiveInterval &a,
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const LiveInterval &b) const {
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return a.overlaps(b);
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/// Return the set of intervals that interfere with this one.
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virtual void getInterferences(IntervalSet &interferences,
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const LiveInterval &a) const = 0;
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/// This can often be cheaper than actually returning the
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virtual int getNumberOfInterferences(const LiveInterval &a) const = 0;
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/// Make any data structure updates necessary to reflect
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/// coalescing or other modifications.
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virtual void updateDataForMerge(const LiveInterval &a,
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const LiveInterval &b,
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const MachineInstr ©) {}
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/// Allow the register allocator to communicate when it doesn't
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/// want a copy coalesced. This may be due to assumptions made by
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/// the allocator about various invariants and so this question is
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/// a matter of legality, not performance. Performance decisions
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/// about which copies to coalesce should be made by the
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virtual bool isLegalToCoalesce(const MachineInstr &inst) const {
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// Because of the way .a files work, we must force the SimpleRC
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// implementation to be pulled in if the RegisterCoalescing header is
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// included. Otherwise we run the risk of RegisterCoalescing being
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// used, but the default implementation not being linked into the tool
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FORCE_DEFINING_FILE_TO_BE_LINKED(RegisterCoalescer)
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FORCE_DEFINING_FILE_TO_BE_LINKED(SimpleRegisterCoalescing)