1
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
6
define i32 @t2_const_var2_1_ok_1(i32 %lhs) {
7
;CHECK: t2_const_var2_1_ok_1:
8
;CHECK: add.w r0, r0, #11206827
9
%ret = add i32 %lhs, 11206827 ; 0x00ab00ab
13
define i32 @t2_const_var2_1_ok_2(i32 %lhs) {
14
;CHECK: t2_const_var2_1_ok_2:
15
;CHECK: add.w r0, r0, #11206656
17
%ret = add i32 %lhs, 11206843 ; 0x00ab00bb
21
define i32 @t2_const_var2_1_ok_3(i32 %lhs) {
22
;CHECK: t2_const_var2_1_ok_3:
23
;CHECK: add.w r0, r0, #11206827
24
;CHECK: add.w r0, r0, #16777216
25
%ret = add i32 %lhs, 27984043 ; 0x01ab00ab
29
define i32 @t2_const_var2_1_ok_4(i32 %lhs) {
30
;CHECK: t2_const_var2_1_ok_4:
31
;CHECK: add.w r0, r0, #16777472
32
;CHECK: add.w r0, r0, #11206827
33
%ret = add i32 %lhs, 27984299 ; 0x01ab01ab
37
define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
38
;CHECK: t2_const_var2_1_fail_1:
39
;CHECK: movw r1, #43777
42
%ret = add i32 %lhs, 28027649 ; 0x01abab01
46
; var 2.2 - 0xab00ab00
47
define i32 @t2_const_var2_2_ok_1(i32 %lhs) {
48
;CHECK: t2_const_var2_2_ok_1:
49
;CHECK: add.w r0, r0, #-1426019584
50
%ret = add i32 %lhs, 2868947712 ; 0xab00ab00
54
define i32 @t2_const_var2_2_ok_2(i32 %lhs) {
55
;CHECK: t2_const_var2_2_ok_2:
56
;CHECK: add.w r0, r0, #-1426063360
57
;CHECK: add.w r0, r0, #47616
58
%ret = add i32 %lhs, 2868951552 ; 0xab00ba00
62
define i32 @t2_const_var2_2_ok_3(i32 %lhs) {
63
;CHECK: t2_const_var2_2_ok_3:
64
;CHECK: add.w r0, r0, #-1426019584
66
%ret = add i32 %lhs, 2868947728 ; 0xab00ab10
70
define i32 @t2_const_var2_2_ok_4(i32 %lhs) {
71
;CHECK: t2_const_var2_2_ok_4:
72
;CHECK: add.w r0, r0, #-1426019584
73
;CHECK: add.w r0, r0, #1048592
74
%ret = add i32 %lhs, 2869996304 ; 0xab10ab10
78
define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
79
;CHECK: t2_const_var2_2_fail_1:
80
;CHECK: movw r1, #43792
81
;CHECK: movt r1, #4267
83
%ret = add i32 %lhs, 279685904 ; 0x10abab10
87
; var 2.3 - 0xabababab
88
define i32 @t2_const_var2_3_ok_1(i32 %lhs) {
89
;CHECK: t2_const_var2_3_ok_1:
90
;CHECK: add.w r0, r0, #-1414812757
91
%ret = add i32 %lhs, 2880154539 ; 0xabababab
95
define i32 @t2_const_var2_3_fail_1(i32 %lhs) {
96
;CHECK: t2_const_var2_3_fail_1:
97
;CHECK: movw r1, #43962
98
;CHECK: movt r1, #43947
100
%ret = add i32 %lhs, 2880154554 ; 0xabababba
104
define i32 @t2_const_var2_3_fail_2(i32 %lhs) {
105
;CHECK: t2_const_var2_3_fail_2:
106
;CHECK: movw r1, #47787
107
;CHECK: movt r1, #43947
109
%ret = add i32 %lhs, 2880158379 ; 0xababbaab
113
define i32 @t2_const_var2_3_fail_3(i32 %lhs) {
114
;CHECK: t2_const_var2_3_fail_3:
115
;CHECK: movw r1, #43947
116
;CHECK: movt r1, #43962
118
%ret = add i32 %lhs, 2881137579 ; 0xabbaabab
122
define i32 @t2_const_var2_3_fail_4(i32 %lhs) {
123
;CHECK: t2_const_var2_3_fail_4:
124
;CHECK: movw r1, #43947
125
;CHECK: movt r1, #47787
127
%ret = add i32 %lhs, 3131812779 ; 0xbaababab
132
define i32 @t2_const_var3_1_ok_1(i32 %lhs) {
133
;CHECK: t2_const_var3_1_ok_1:
134
;CHECK: add.w r0, r0, #251658240
135
%ret = add i32 %lhs, 251658240 ; 0x0F000000
139
define i32 @t2_const_var3_2_ok_1(i32 %lhs) {
140
;CHECK: t2_const_var3_2_ok_1:
141
;CHECK: add.w r0, r0, #3948544
142
%ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000
146
define i32 @t2_const_var3_2_ok_2(i32 %lhs) {
147
;CHECK: t2_const_var3_2_ok_2:
148
;CHECK: add.w r0, r0, #2097152
149
;CHECK: add.w r0, r0, #1843200
150
%ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
154
define i32 @t2_const_var3_3_ok_1(i32 %lhs) {
155
;CHECK: t2_const_var3_3_ok_1:
156
;CHECK: add.w r0, r0, #258
157
%ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010
161
define i32 @t2_const_var3_4_ok_1(i32 %lhs) {
162
;CHECK: t2_const_var3_4_ok_1:
163
;CHECK: add.w r0, r0, #-268435456
164
%ret = add i32 %lhs, 4026531840 ; 0xF0000000
168
define i32 @t2MOVTi16_ok_1(i32 %a) {
169
; CHECK: t2MOVTi16_ok_1:
170
; CHECK: movt r0, #1234
171
%1 = and i32 %a, 65535
172
%2 = shl i32 1234, 16
178
define i32 @t2MOVTi16_test_1(i32 %a) {
179
; CHECK: t2MOVTi16_test_1:
180
; CHECK: movt r0, #1234
183
%3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
184
%4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4
191
define i32 @t2MOVTi16_test_2(i32 %a) {
192
; CHECK: t2MOVTi16_test_2:
193
; CHECK: movt r0, #1234
196
%3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
199
%6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
205
define i32 @t2MOVTi16_test_3(i32 %a) {
206
; CHECK: t2MOVTi16_test_3:
207
; CHECK: movt r0, #1234
210
%3 = or i32 %1, 255 ; This gives us 0xFFFF in %3
213
%6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6
222
define i32 @f1(i32 %a) {
224
; CHECK: movs r0, #171
225
%tmp = add i32 0, 171
229
; 1179666 = 0x00120012
230
define i32 @f2(i32 %a) {
232
; CHECK: mov.w r0, #1179666
233
%tmp = add i32 0, 1179666
237
; 872428544 = 0x34003400
238
define i32 @f3(i32 %a) {
240
; CHECK: mov.w r0, #872428544
241
%tmp = add i32 0, 872428544
245
; 1448498774 = 0x56565656
246
define i32 @f4(i32 %a) {
248
; CHECK: mov.w r0, #1448498774
249
%tmp = add i32 0, 1448498774
253
; 66846720 = 0x03fc0000
254
define i32 @f5(i32 %a) {
256
; CHECK: mov.w r0, #66846720
257
%tmp = add i32 0, 66846720
261
define i32 @f6(i32 %a) {
263
;CHECK: movw r0, #65535
264
%tmp = add i32 0, 65535