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; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
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define arm_apcscc i32 @test(i32 %n) nounwind {
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%0 = icmp eq i32 %n, 1 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb.nph
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bb.nph: ; preds = %entry
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%tmp = add i32 %n, -1 ; <i32> [#uses=1]
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bb: ; preds = %bb.nph, %bb
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%indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
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%u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1]
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%1 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1]
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%tmp4 = zext i32 %1 to i64 ; <i64> [#uses=1]
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%mask = and i64 %u.05, -4294967296 ; <i64> [#uses=1]
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%ins = or i64 %tmp4, %mask ; <i64> [#uses=2]
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tail call arm_apcscc void @g(i64 %ins) nounwind
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb, %entry
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define arm_apcscc i32 @test_dead_cycle(i32 %n) nounwind {
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; CHECK: test_dead_cycle:
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%0 = icmp eq i32 %n, 1 ; <i1> [#uses=1]
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br i1 %0, label %return, label %bb.nph
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bb.nph: ; preds = %entry
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%tmp = add i32 %n, -1 ; <i32> [#uses=2]
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bb: ; preds = %bb.nph, %bb2
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%indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb2 ] ; <i32> [#uses=2]
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%u.17 = phi i64 [ undef, %bb.nph ], [ %u.0, %bb2 ] ; <i64> [#uses=2]
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%tmp9 = sub i32 %tmp, %indvar ; <i32> [#uses=1]
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%1 = icmp sgt i32 %tmp9, 1 ; <i1> [#uses=1]
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br i1 %1, label %bb1, label %bb2
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%2 = tail call arm_apcscc i32 @f() nounwind ; <i32> [#uses=1]
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%tmp6 = zext i32 %2 to i64 ; <i64> [#uses=1]
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%mask = and i64 %u.17, -4294967296 ; <i64> [#uses=1]
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%ins = or i64 %tmp6, %mask ; <i64> [#uses=1]
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tail call arm_apcscc void @g(i64 %ins) nounwind
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bb2: ; preds = %bb1, %bb
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; also check for duplicate induction variables (radar 7645034)
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; CHECK: subs r{{.*}}, #1
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; CHECK-NOT: subs r{{.*}}, #1
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%u.0 = phi i64 [ %ins, %bb1 ], [ %u.17, %bb ] ; <i64> [#uses=2]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb2, %entry
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declare arm_apcscc i32 @f()
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declare arm_apcscc void @g(i64)