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Viewing changes to libclamav/c++/llvm/include/llvm/Intrinsics.gen

  • Committer: Bazaar Package Importer
  • Author(s): Scott Kitterman
  • Date: 2010-03-12 11:30:04 UTC
  • mfrom: (0.41.1 upstream)
  • Revision ID: james.westby@ubuntu.com-20100312113004-b0fop4bkycszdd0z
Tags: 0.96~rc1+dfsg-0ubuntu1
* New upstream RC - FFE (LP: #537636):
  - Add OfficialDatabaseOnly option to clamav-base.postinst.in
  - Add LocalSocketGroup option to clamav-base.postinst.in
  - Add LocalSocketMode option to clamav-base.postinst.in
  - Add CrossFilesystems option to clamav-base.postinst.in
  - Add ClamukoScannerCount option to clamav-base.postinst.in
  - Add BytecodeSecurity opiton to clamav-base.postinst.in
  - Add DetectionStatsHostID option to clamav-freshclam.postinst.in
  - Add Bytecode option to clamav-freshclam.postinst.in
  - Add MilterSocketGroup option to clamav-milter.postinst.in
  - Add MilterSocketMode option to clamav-milter.postinst.in
  - Add ReportHostname option to clamav-milter.postinst.in
  - Bump libclamav SO version to 6.1.0 in libclamav6.install
  - Drop clamdmon from clamav.examples (no longer shipped by upstream)
  - Drop libclamav.a from libclamav-dev.install (not built by upstream)
  - Update SO version for lintian override for libclamav6
  - Add new Bytecode Testing Tool, usr/bin/clambc, to clamav.install
  - Add build-depends on python and python-setuptools for new test suite
  - Update debian/copyright for the embedded copy of llvm (using the system
    llvm is not currently feasible)

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Lines of Context:
 
1
//===- TableGen'erated file -------------------------------------*- C++ -*-===//
 
2
//
 
3
// Intrinsic Function Source Fragment
 
4
//
 
5
// Automatically generated file, do not edit!
 
6
//
 
7
//===----------------------------------------------------------------------===//
 
8
 
 
9
// Enum values for Intrinsics.h
 
10
#ifdef GET_INTRINSIC_ENUM_VALUES
 
11
    alpha_umulh,                              // llvm.alpha.umulh
 
12
    annotation,                               // llvm.annotation
 
13
    arm_neon_vabals,                          // llvm.arm.neon.vabals
 
14
    arm_neon_vabalu,                          // llvm.arm.neon.vabalu
 
15
    arm_neon_vabas,                           // llvm.arm.neon.vabas
 
16
    arm_neon_vabau,                           // llvm.arm.neon.vabau
 
17
    arm_neon_vabdls,                          // llvm.arm.neon.vabdls
 
18
    arm_neon_vabdlu,                          // llvm.arm.neon.vabdlu
 
19
    arm_neon_vabds,                           // llvm.arm.neon.vabds
 
20
    arm_neon_vabdu,                           // llvm.arm.neon.vabdu
 
21
    arm_neon_vabs,                            // llvm.arm.neon.vabs
 
22
    arm_neon_vacged,                          // llvm.arm.neon.vacged
 
23
    arm_neon_vacgeq,                          // llvm.arm.neon.vacgeq
 
24
    arm_neon_vacgtd,                          // llvm.arm.neon.vacgtd
 
25
    arm_neon_vacgtq,                          // llvm.arm.neon.vacgtq
 
26
    arm_neon_vaddhn,                          // llvm.arm.neon.vaddhn
 
27
    arm_neon_vaddls,                          // llvm.arm.neon.vaddls
 
28
    arm_neon_vaddlu,                          // llvm.arm.neon.vaddlu
 
29
    arm_neon_vaddws,                          // llvm.arm.neon.vaddws
 
30
    arm_neon_vaddwu,                          // llvm.arm.neon.vaddwu
 
31
    arm_neon_vcls,                            // llvm.arm.neon.vcls
 
32
    arm_neon_vclz,                            // llvm.arm.neon.vclz
 
33
    arm_neon_vcnt,                            // llvm.arm.neon.vcnt
 
34
    arm_neon_vcvtfp2fxs,                      // llvm.arm.neon.vcvtfp2fxs
 
35
    arm_neon_vcvtfp2fxu,                      // llvm.arm.neon.vcvtfp2fxu
 
36
    arm_neon_vcvtfxs2fp,                      // llvm.arm.neon.vcvtfxs2fp
 
37
    arm_neon_vcvtfxu2fp,                      // llvm.arm.neon.vcvtfxu2fp
 
38
    arm_neon_vhadds,                          // llvm.arm.neon.vhadds
 
39
    arm_neon_vhaddu,                          // llvm.arm.neon.vhaddu
 
40
    arm_neon_vhsubs,                          // llvm.arm.neon.vhsubs
 
41
    arm_neon_vhsubu,                          // llvm.arm.neon.vhsubu
 
42
    arm_neon_vld1,                            // llvm.arm.neon.vld1
 
43
    arm_neon_vld2,                            // llvm.arm.neon.vld2
 
44
    arm_neon_vld2lane,                        // llvm.arm.neon.vld2lane
 
45
    arm_neon_vld3,                            // llvm.arm.neon.vld3
 
46
    arm_neon_vld3lane,                        // llvm.arm.neon.vld3lane
 
47
    arm_neon_vld4,                            // llvm.arm.neon.vld4
 
48
    arm_neon_vld4lane,                        // llvm.arm.neon.vld4lane
 
49
    arm_neon_vmaxs,                           // llvm.arm.neon.vmaxs
 
50
    arm_neon_vmaxu,                           // llvm.arm.neon.vmaxu
 
51
    arm_neon_vmins,                           // llvm.arm.neon.vmins
 
52
    arm_neon_vminu,                           // llvm.arm.neon.vminu
 
53
    arm_neon_vmlals,                          // llvm.arm.neon.vmlals
 
54
    arm_neon_vmlalu,                          // llvm.arm.neon.vmlalu
 
55
    arm_neon_vmlsls,                          // llvm.arm.neon.vmlsls
 
56
    arm_neon_vmlslu,                          // llvm.arm.neon.vmlslu
 
57
    arm_neon_vmovls,                          // llvm.arm.neon.vmovls
 
58
    arm_neon_vmovlu,                          // llvm.arm.neon.vmovlu
 
59
    arm_neon_vmovn,                           // llvm.arm.neon.vmovn
 
60
    arm_neon_vmullp,                          // llvm.arm.neon.vmullp
 
61
    arm_neon_vmulls,                          // llvm.arm.neon.vmulls
 
62
    arm_neon_vmullu,                          // llvm.arm.neon.vmullu
 
63
    arm_neon_vmulp,                           // llvm.arm.neon.vmulp
 
64
    arm_neon_vpadals,                         // llvm.arm.neon.vpadals
 
65
    arm_neon_vpadalu,                         // llvm.arm.neon.vpadalu
 
66
    arm_neon_vpadd,                           // llvm.arm.neon.vpadd
 
67
    arm_neon_vpaddls,                         // llvm.arm.neon.vpaddls
 
68
    arm_neon_vpaddlu,                         // llvm.arm.neon.vpaddlu
 
69
    arm_neon_vpmaxs,                          // llvm.arm.neon.vpmaxs
 
70
    arm_neon_vpmaxu,                          // llvm.arm.neon.vpmaxu
 
71
    arm_neon_vpmins,                          // llvm.arm.neon.vpmins
 
72
    arm_neon_vpminu,                          // llvm.arm.neon.vpminu
 
73
    arm_neon_vqabs,                           // llvm.arm.neon.vqabs
 
74
    arm_neon_vqadds,                          // llvm.arm.neon.vqadds
 
75
    arm_neon_vqaddu,                          // llvm.arm.neon.vqaddu
 
76
    arm_neon_vqdmlal,                         // llvm.arm.neon.vqdmlal
 
77
    arm_neon_vqdmlsl,                         // llvm.arm.neon.vqdmlsl
 
78
    arm_neon_vqdmulh,                         // llvm.arm.neon.vqdmulh
 
79
    arm_neon_vqdmull,                         // llvm.arm.neon.vqdmull
 
80
    arm_neon_vqmovns,                         // llvm.arm.neon.vqmovns
 
81
    arm_neon_vqmovnsu,                        // llvm.arm.neon.vqmovnsu
 
82
    arm_neon_vqmovnu,                         // llvm.arm.neon.vqmovnu
 
83
    arm_neon_vqneg,                           // llvm.arm.neon.vqneg
 
84
    arm_neon_vqrdmulh,                        // llvm.arm.neon.vqrdmulh
 
85
    arm_neon_vqrshiftns,                      // llvm.arm.neon.vqrshiftns
 
86
    arm_neon_vqrshiftnsu,                     // llvm.arm.neon.vqrshiftnsu
 
87
    arm_neon_vqrshiftnu,                      // llvm.arm.neon.vqrshiftnu
 
88
    arm_neon_vqrshifts,                       // llvm.arm.neon.vqrshifts
 
89
    arm_neon_vqrshiftu,                       // llvm.arm.neon.vqrshiftu
 
90
    arm_neon_vqshiftns,                       // llvm.arm.neon.vqshiftns
 
91
    arm_neon_vqshiftnsu,                      // llvm.arm.neon.vqshiftnsu
 
92
    arm_neon_vqshiftnu,                       // llvm.arm.neon.vqshiftnu
 
93
    arm_neon_vqshifts,                        // llvm.arm.neon.vqshifts
 
94
    arm_neon_vqshiftsu,                       // llvm.arm.neon.vqshiftsu
 
95
    arm_neon_vqshiftu,                        // llvm.arm.neon.vqshiftu
 
96
    arm_neon_vqsubs,                          // llvm.arm.neon.vqsubs
 
97
    arm_neon_vqsubu,                          // llvm.arm.neon.vqsubu
 
98
    arm_neon_vraddhn,                         // llvm.arm.neon.vraddhn
 
99
    arm_neon_vrecpe,                          // llvm.arm.neon.vrecpe
 
100
    arm_neon_vrecps,                          // llvm.arm.neon.vrecps
 
101
    arm_neon_vrhadds,                         // llvm.arm.neon.vrhadds
 
102
    arm_neon_vrhaddu,                         // llvm.arm.neon.vrhaddu
 
103
    arm_neon_vrshiftn,                        // llvm.arm.neon.vrshiftn
 
104
    arm_neon_vrshifts,                        // llvm.arm.neon.vrshifts
 
105
    arm_neon_vrshiftu,                        // llvm.arm.neon.vrshiftu
 
106
    arm_neon_vrsqrte,                         // llvm.arm.neon.vrsqrte
 
107
    arm_neon_vrsqrts,                         // llvm.arm.neon.vrsqrts
 
108
    arm_neon_vrsubhn,                         // llvm.arm.neon.vrsubhn
 
109
    arm_neon_vshiftins,                       // llvm.arm.neon.vshiftins
 
110
    arm_neon_vshiftls,                        // llvm.arm.neon.vshiftls
 
111
    arm_neon_vshiftlu,                        // llvm.arm.neon.vshiftlu
 
112
    arm_neon_vshiftn,                         // llvm.arm.neon.vshiftn
 
113
    arm_neon_vshifts,                         // llvm.arm.neon.vshifts
 
114
    arm_neon_vshiftu,                         // llvm.arm.neon.vshiftu
 
115
    arm_neon_vst1,                            // llvm.arm.neon.vst1
 
116
    arm_neon_vst2,                            // llvm.arm.neon.vst2
 
117
    arm_neon_vst2lane,                        // llvm.arm.neon.vst2lane
 
118
    arm_neon_vst3,                            // llvm.arm.neon.vst3
 
119
    arm_neon_vst3lane,                        // llvm.arm.neon.vst3lane
 
120
    arm_neon_vst4,                            // llvm.arm.neon.vst4
 
121
    arm_neon_vst4lane,                        // llvm.arm.neon.vst4lane
 
122
    arm_neon_vsubhn,                          // llvm.arm.neon.vsubhn
 
123
    arm_neon_vsubls,                          // llvm.arm.neon.vsubls
 
124
    arm_neon_vsublu,                          // llvm.arm.neon.vsublu
 
125
    arm_neon_vsubws,                          // llvm.arm.neon.vsubws
 
126
    arm_neon_vsubwu,                          // llvm.arm.neon.vsubwu
 
127
    arm_neon_vtbl1,                           // llvm.arm.neon.vtbl1
 
128
    arm_neon_vtbl2,                           // llvm.arm.neon.vtbl2
 
129
    arm_neon_vtbl3,                           // llvm.arm.neon.vtbl3
 
130
    arm_neon_vtbl4,                           // llvm.arm.neon.vtbl4
 
131
    arm_neon_vtbx1,                           // llvm.arm.neon.vtbx1
 
132
    arm_neon_vtbx2,                           // llvm.arm.neon.vtbx2
 
133
    arm_neon_vtbx3,                           // llvm.arm.neon.vtbx3
 
134
    arm_neon_vtbx4,                           // llvm.arm.neon.vtbx4
 
135
    arm_thread_pointer,                       // llvm.arm.thread.pointer
 
136
    atomic_cmp_swap,                          // llvm.atomic.cmp.swap
 
137
    atomic_load_add,                          // llvm.atomic.load.add
 
138
    atomic_load_and,                          // llvm.atomic.load.and
 
139
    atomic_load_max,                          // llvm.atomic.load.max
 
140
    atomic_load_min,                          // llvm.atomic.load.min
 
141
    atomic_load_nand,                         // llvm.atomic.load.nand
 
142
    atomic_load_or,                           // llvm.atomic.load.or
 
143
    atomic_load_sub,                          // llvm.atomic.load.sub
 
144
    atomic_load_umax,                         // llvm.atomic.load.umax
 
145
    atomic_load_umin,                         // llvm.atomic.load.umin
 
146
    atomic_load_xor,                          // llvm.atomic.load.xor
 
147
    atomic_swap,                              // llvm.atomic.swap
 
148
    bswap,                                    // llvm.bswap
 
149
    convertff,                                // llvm.convertff
 
150
    convertfsi,                               // llvm.convertfsi
 
151
    convertfui,                               // llvm.convertfui
 
152
    convertsif,                               // llvm.convertsif
 
153
    convertss,                                // llvm.convertss
 
154
    convertsu,                                // llvm.convertsu
 
155
    convertuif,                               // llvm.convertuif
 
156
    convertus,                                // llvm.convertus
 
157
    convertuu,                                // llvm.convertuu
 
158
    cos,                                      // llvm.cos
 
159
    ctlz,                                     // llvm.ctlz
 
160
    ctpop,                                    // llvm.ctpop
 
161
    cttz,                                     // llvm.cttz
 
162
    dbg_declare,                              // llvm.dbg.declare
 
163
    dbg_value,                                // llvm.dbg.value
 
164
    eh_dwarf_cfa,                             // llvm.eh.dwarf.cfa
 
165
    eh_exception,                             // llvm.eh.exception
 
166
    eh_return_i32,                            // llvm.eh.return.i32
 
167
    eh_return_i64,                            // llvm.eh.return.i64
 
168
    eh_selector,                              // llvm.eh.selector
 
169
    eh_sjlj_callsite,                         // llvm.eh.sjlj.callsite
 
170
    eh_sjlj_longjmp,                          // llvm.eh.sjlj.longjmp
 
171
    eh_sjlj_lsda,                             // llvm.eh.sjlj.lsda
 
172
    eh_sjlj_setjmp,                           // llvm.eh.sjlj.setjmp
 
173
    eh_typeid_for,                            // llvm.eh.typeid.for
 
174
    eh_unwind_init,                           // llvm.eh.unwind.init
 
175
    exp,                                      // llvm.exp
 
176
    exp2,                                     // llvm.exp2
 
177
    flt_rounds,                               // llvm.flt.rounds
 
178
    frameaddress,                             // llvm.frameaddress
 
179
    gcread,                                   // llvm.gcread
 
180
    gcroot,                                   // llvm.gcroot
 
181
    gcwrite,                                  // llvm.gcwrite
 
182
    init_trampoline,                          // llvm.init.trampoline
 
183
    invariant_end,                            // llvm.invariant.end
 
184
    invariant_start,                          // llvm.invariant.start
 
185
    lifetime_end,                             // llvm.lifetime.end
 
186
    lifetime_start,                           // llvm.lifetime.start
 
187
    log,                                      // llvm.log
 
188
    log10,                                    // llvm.log10
 
189
    log2,                                     // llvm.log2
 
190
    longjmp,                                  // llvm.longjmp
 
191
    memcpy,                                   // llvm.memcpy
 
192
    memmove,                                  // llvm.memmove
 
193
    memory_barrier,                           // llvm.memory.barrier
 
194
    memset,                                   // llvm.memset
 
195
    objectsize,                               // llvm.objectsize
 
196
    pcmarker,                                 // llvm.pcmarker
 
197
    pow,                                      // llvm.pow
 
198
    powi,                                     // llvm.powi
 
199
    ppc_altivec_dss,                          // llvm.ppc.altivec.dss
 
200
    ppc_altivec_dssall,                       // llvm.ppc.altivec.dssall
 
201
    ppc_altivec_dst,                          // llvm.ppc.altivec.dst
 
202
    ppc_altivec_dstst,                        // llvm.ppc.altivec.dstst
 
203
    ppc_altivec_dststt,                       // llvm.ppc.altivec.dststt
 
204
    ppc_altivec_dstt,                         // llvm.ppc.altivec.dstt
 
205
    ppc_altivec_lvebx,                        // llvm.ppc.altivec.lvebx
 
206
    ppc_altivec_lvehx,                        // llvm.ppc.altivec.lvehx
 
207
    ppc_altivec_lvewx,                        // llvm.ppc.altivec.lvewx
 
208
    ppc_altivec_lvsl,                         // llvm.ppc.altivec.lvsl
 
209
    ppc_altivec_lvsr,                         // llvm.ppc.altivec.lvsr
 
210
    ppc_altivec_lvx,                          // llvm.ppc.altivec.lvx
 
211
    ppc_altivec_lvxl,                         // llvm.ppc.altivec.lvxl
 
212
    ppc_altivec_mfvscr,                       // llvm.ppc.altivec.mfvscr
 
213
    ppc_altivec_mtvscr,                       // llvm.ppc.altivec.mtvscr
 
214
    ppc_altivec_stvebx,                       // llvm.ppc.altivec.stvebx
 
215
    ppc_altivec_stvehx,                       // llvm.ppc.altivec.stvehx
 
216
    ppc_altivec_stvewx,                       // llvm.ppc.altivec.stvewx
 
217
    ppc_altivec_stvx,                         // llvm.ppc.altivec.stvx
 
218
    ppc_altivec_stvxl,                        // llvm.ppc.altivec.stvxl
 
219
    ppc_altivec_vaddcuw,                      // llvm.ppc.altivec.vaddcuw
 
220
    ppc_altivec_vaddsbs,                      // llvm.ppc.altivec.vaddsbs
 
221
    ppc_altivec_vaddshs,                      // llvm.ppc.altivec.vaddshs
 
222
    ppc_altivec_vaddsws,                      // llvm.ppc.altivec.vaddsws
 
223
    ppc_altivec_vaddubs,                      // llvm.ppc.altivec.vaddubs
 
224
    ppc_altivec_vadduhs,                      // llvm.ppc.altivec.vadduhs
 
225
    ppc_altivec_vadduws,                      // llvm.ppc.altivec.vadduws
 
226
    ppc_altivec_vavgsb,                       // llvm.ppc.altivec.vavgsb
 
227
    ppc_altivec_vavgsh,                       // llvm.ppc.altivec.vavgsh
 
228
    ppc_altivec_vavgsw,                       // llvm.ppc.altivec.vavgsw
 
229
    ppc_altivec_vavgub,                       // llvm.ppc.altivec.vavgub
 
230
    ppc_altivec_vavguh,                       // llvm.ppc.altivec.vavguh
 
231
    ppc_altivec_vavguw,                       // llvm.ppc.altivec.vavguw
 
232
    ppc_altivec_vcfsx,                        // llvm.ppc.altivec.vcfsx
 
233
    ppc_altivec_vcfux,                        // llvm.ppc.altivec.vcfux
 
234
    ppc_altivec_vcmpbfp,                      // llvm.ppc.altivec.vcmpbfp
 
235
    ppc_altivec_vcmpbfp_p,                    // llvm.ppc.altivec.vcmpbfp.p
 
236
    ppc_altivec_vcmpeqfp,                     // llvm.ppc.altivec.vcmpeqfp
 
237
    ppc_altivec_vcmpeqfp_p,                   // llvm.ppc.altivec.vcmpeqfp.p
 
238
    ppc_altivec_vcmpequb,                     // llvm.ppc.altivec.vcmpequb
 
239
    ppc_altivec_vcmpequb_p,                   // llvm.ppc.altivec.vcmpequb.p
 
240
    ppc_altivec_vcmpequh,                     // llvm.ppc.altivec.vcmpequh
 
241
    ppc_altivec_vcmpequh_p,                   // llvm.ppc.altivec.vcmpequh.p
 
242
    ppc_altivec_vcmpequw,                     // llvm.ppc.altivec.vcmpequw
 
243
    ppc_altivec_vcmpequw_p,                   // llvm.ppc.altivec.vcmpequw.p
 
244
    ppc_altivec_vcmpgefp,                     // llvm.ppc.altivec.vcmpgefp
 
245
    ppc_altivec_vcmpgefp_p,                   // llvm.ppc.altivec.vcmpgefp.p
 
246
    ppc_altivec_vcmpgtfp,                     // llvm.ppc.altivec.vcmpgtfp
 
247
    ppc_altivec_vcmpgtfp_p,                   // llvm.ppc.altivec.vcmpgtfp.p
 
248
    ppc_altivec_vcmpgtsb,                     // llvm.ppc.altivec.vcmpgtsb
 
249
    ppc_altivec_vcmpgtsb_p,                   // llvm.ppc.altivec.vcmpgtsb.p
 
250
    ppc_altivec_vcmpgtsh,                     // llvm.ppc.altivec.vcmpgtsh
 
251
    ppc_altivec_vcmpgtsh_p,                   // llvm.ppc.altivec.vcmpgtsh.p
 
252
    ppc_altivec_vcmpgtsw,                     // llvm.ppc.altivec.vcmpgtsw
 
253
    ppc_altivec_vcmpgtsw_p,                   // llvm.ppc.altivec.vcmpgtsw.p
 
254
    ppc_altivec_vcmpgtub,                     // llvm.ppc.altivec.vcmpgtub
 
255
    ppc_altivec_vcmpgtub_p,                   // llvm.ppc.altivec.vcmpgtub.p
 
256
    ppc_altivec_vcmpgtuh,                     // llvm.ppc.altivec.vcmpgtuh
 
257
    ppc_altivec_vcmpgtuh_p,                   // llvm.ppc.altivec.vcmpgtuh.p
 
258
    ppc_altivec_vcmpgtuw,                     // llvm.ppc.altivec.vcmpgtuw
 
259
    ppc_altivec_vcmpgtuw_p,                   // llvm.ppc.altivec.vcmpgtuw.p
 
260
    ppc_altivec_vctsxs,                       // llvm.ppc.altivec.vctsxs
 
261
    ppc_altivec_vctuxs,                       // llvm.ppc.altivec.vctuxs
 
262
    ppc_altivec_vexptefp,                     // llvm.ppc.altivec.vexptefp
 
263
    ppc_altivec_vlogefp,                      // llvm.ppc.altivec.vlogefp
 
264
    ppc_altivec_vmaddfp,                      // llvm.ppc.altivec.vmaddfp
 
265
    ppc_altivec_vmaxfp,                       // llvm.ppc.altivec.vmaxfp
 
266
    ppc_altivec_vmaxsb,                       // llvm.ppc.altivec.vmaxsb
 
267
    ppc_altivec_vmaxsh,                       // llvm.ppc.altivec.vmaxsh
 
268
    ppc_altivec_vmaxsw,                       // llvm.ppc.altivec.vmaxsw
 
269
    ppc_altivec_vmaxub,                       // llvm.ppc.altivec.vmaxub
 
270
    ppc_altivec_vmaxuh,                       // llvm.ppc.altivec.vmaxuh
 
271
    ppc_altivec_vmaxuw,                       // llvm.ppc.altivec.vmaxuw
 
272
    ppc_altivec_vmhaddshs,                    // llvm.ppc.altivec.vmhaddshs
 
273
    ppc_altivec_vmhraddshs,                   // llvm.ppc.altivec.vmhraddshs
 
274
    ppc_altivec_vminfp,                       // llvm.ppc.altivec.vminfp
 
275
    ppc_altivec_vminsb,                       // llvm.ppc.altivec.vminsb
 
276
    ppc_altivec_vminsh,                       // llvm.ppc.altivec.vminsh
 
277
    ppc_altivec_vminsw,                       // llvm.ppc.altivec.vminsw
 
278
    ppc_altivec_vminub,                       // llvm.ppc.altivec.vminub
 
279
    ppc_altivec_vminuh,                       // llvm.ppc.altivec.vminuh
 
280
    ppc_altivec_vminuw,                       // llvm.ppc.altivec.vminuw
 
281
    ppc_altivec_vmladduhm,                    // llvm.ppc.altivec.vmladduhm
 
282
    ppc_altivec_vmsummbm,                     // llvm.ppc.altivec.vmsummbm
 
283
    ppc_altivec_vmsumshm,                     // llvm.ppc.altivec.vmsumshm
 
284
    ppc_altivec_vmsumshs,                     // llvm.ppc.altivec.vmsumshs
 
285
    ppc_altivec_vmsumubm,                     // llvm.ppc.altivec.vmsumubm
 
286
    ppc_altivec_vmsumuhm,                     // llvm.ppc.altivec.vmsumuhm
 
287
    ppc_altivec_vmsumuhs,                     // llvm.ppc.altivec.vmsumuhs
 
288
    ppc_altivec_vmulesb,                      // llvm.ppc.altivec.vmulesb
 
289
    ppc_altivec_vmulesh,                      // llvm.ppc.altivec.vmulesh
 
290
    ppc_altivec_vmuleub,                      // llvm.ppc.altivec.vmuleub
 
291
    ppc_altivec_vmuleuh,                      // llvm.ppc.altivec.vmuleuh
 
292
    ppc_altivec_vmulosb,                      // llvm.ppc.altivec.vmulosb
 
293
    ppc_altivec_vmulosh,                      // llvm.ppc.altivec.vmulosh
 
294
    ppc_altivec_vmuloub,                      // llvm.ppc.altivec.vmuloub
 
295
    ppc_altivec_vmulouh,                      // llvm.ppc.altivec.vmulouh
 
296
    ppc_altivec_vnmsubfp,                     // llvm.ppc.altivec.vnmsubfp
 
297
    ppc_altivec_vperm,                        // llvm.ppc.altivec.vperm
 
298
    ppc_altivec_vpkpx,                        // llvm.ppc.altivec.vpkpx
 
299
    ppc_altivec_vpkshss,                      // llvm.ppc.altivec.vpkshss
 
300
    ppc_altivec_vpkshus,                      // llvm.ppc.altivec.vpkshus
 
301
    ppc_altivec_vpkswss,                      // llvm.ppc.altivec.vpkswss
 
302
    ppc_altivec_vpkswus,                      // llvm.ppc.altivec.vpkswus
 
303
    ppc_altivec_vpkuhus,                      // llvm.ppc.altivec.vpkuhus
 
304
    ppc_altivec_vpkuwus,                      // llvm.ppc.altivec.vpkuwus
 
305
    ppc_altivec_vrefp,                        // llvm.ppc.altivec.vrefp
 
306
    ppc_altivec_vrfim,                        // llvm.ppc.altivec.vrfim
 
307
    ppc_altivec_vrfin,                        // llvm.ppc.altivec.vrfin
 
308
    ppc_altivec_vrfip,                        // llvm.ppc.altivec.vrfip
 
309
    ppc_altivec_vrfiz,                        // llvm.ppc.altivec.vrfiz
 
310
    ppc_altivec_vrlb,                         // llvm.ppc.altivec.vrlb
 
311
    ppc_altivec_vrlh,                         // llvm.ppc.altivec.vrlh
 
312
    ppc_altivec_vrlw,                         // llvm.ppc.altivec.vrlw
 
313
    ppc_altivec_vrsqrtefp,                    // llvm.ppc.altivec.vrsqrtefp
 
314
    ppc_altivec_vsel,                         // llvm.ppc.altivec.vsel
 
315
    ppc_altivec_vsl,                          // llvm.ppc.altivec.vsl
 
316
    ppc_altivec_vslb,                         // llvm.ppc.altivec.vslb
 
317
    ppc_altivec_vslh,                         // llvm.ppc.altivec.vslh
 
318
    ppc_altivec_vslo,                         // llvm.ppc.altivec.vslo
 
319
    ppc_altivec_vslw,                         // llvm.ppc.altivec.vslw
 
320
    ppc_altivec_vsr,                          // llvm.ppc.altivec.vsr
 
321
    ppc_altivec_vsrab,                        // llvm.ppc.altivec.vsrab
 
322
    ppc_altivec_vsrah,                        // llvm.ppc.altivec.vsrah
 
323
    ppc_altivec_vsraw,                        // llvm.ppc.altivec.vsraw
 
324
    ppc_altivec_vsrb,                         // llvm.ppc.altivec.vsrb
 
325
    ppc_altivec_vsrh,                         // llvm.ppc.altivec.vsrh
 
326
    ppc_altivec_vsro,                         // llvm.ppc.altivec.vsro
 
327
    ppc_altivec_vsrw,                         // llvm.ppc.altivec.vsrw
 
328
    ppc_altivec_vsubcuw,                      // llvm.ppc.altivec.vsubcuw
 
329
    ppc_altivec_vsubsbs,                      // llvm.ppc.altivec.vsubsbs
 
330
    ppc_altivec_vsubshs,                      // llvm.ppc.altivec.vsubshs
 
331
    ppc_altivec_vsubsws,                      // llvm.ppc.altivec.vsubsws
 
332
    ppc_altivec_vsububs,                      // llvm.ppc.altivec.vsububs
 
333
    ppc_altivec_vsubuhs,                      // llvm.ppc.altivec.vsubuhs
 
334
    ppc_altivec_vsubuws,                      // llvm.ppc.altivec.vsubuws
 
335
    ppc_altivec_vsum2sws,                     // llvm.ppc.altivec.vsum2sws
 
336
    ppc_altivec_vsum4sbs,                     // llvm.ppc.altivec.vsum4sbs
 
337
    ppc_altivec_vsum4shs,                     // llvm.ppc.altivec.vsum4shs
 
338
    ppc_altivec_vsum4ubs,                     // llvm.ppc.altivec.vsum4ubs
 
339
    ppc_altivec_vsumsws,                      // llvm.ppc.altivec.vsumsws
 
340
    ppc_altivec_vupkhpx,                      // llvm.ppc.altivec.vupkhpx
 
341
    ppc_altivec_vupkhsb,                      // llvm.ppc.altivec.vupkhsb
 
342
    ppc_altivec_vupkhsh,                      // llvm.ppc.altivec.vupkhsh
 
343
    ppc_altivec_vupklpx,                      // llvm.ppc.altivec.vupklpx
 
344
    ppc_altivec_vupklsb,                      // llvm.ppc.altivec.vupklsb
 
345
    ppc_altivec_vupklsh,                      // llvm.ppc.altivec.vupklsh
 
346
    ppc_dcba,                                 // llvm.ppc.dcba
 
347
    ppc_dcbf,                                 // llvm.ppc.dcbf
 
348
    ppc_dcbi,                                 // llvm.ppc.dcbi
 
349
    ppc_dcbst,                                // llvm.ppc.dcbst
 
350
    ppc_dcbt,                                 // llvm.ppc.dcbt
 
351
    ppc_dcbtst,                               // llvm.ppc.dcbtst
 
352
    ppc_dcbz,                                 // llvm.ppc.dcbz
 
353
    ppc_dcbzl,                                // llvm.ppc.dcbzl
 
354
    ppc_sync,                                 // llvm.ppc.sync
 
355
    prefetch,                                 // llvm.prefetch
 
356
    ptr_annotation,                           // llvm.ptr.annotation
 
357
    readcyclecounter,                         // llvm.readcyclecounter
 
358
    returnaddress,                            // llvm.returnaddress
 
359
    sadd_with_overflow,                       // llvm.sadd.with.overflow
 
360
    setjmp,                                   // llvm.setjmp
 
361
    siglongjmp,                               // llvm.siglongjmp
 
362
    sigsetjmp,                                // llvm.sigsetjmp
 
363
    sin,                                      // llvm.sin
 
364
    smul_with_overflow,                       // llvm.smul.with.overflow
 
365
    spu_si_a,                                 // llvm.spu.si.a
 
366
    spu_si_addx,                              // llvm.spu.si.addx
 
367
    spu_si_ah,                                // llvm.spu.si.ah
 
368
    spu_si_ahi,                               // llvm.spu.si.ahi
 
369
    spu_si_ai,                                // llvm.spu.si.ai
 
370
    spu_si_and,                               // llvm.spu.si.and
 
371
    spu_si_andbi,                             // llvm.spu.si.andbi
 
372
    spu_si_andc,                              // llvm.spu.si.andc
 
373
    spu_si_andhi,                             // llvm.spu.si.andhi
 
374
    spu_si_andi,                              // llvm.spu.si.andi
 
375
    spu_si_bg,                                // llvm.spu.si.bg
 
376
    spu_si_bgx,                               // llvm.spu.si.bgx
 
377
    spu_si_ceq,                               // llvm.spu.si.ceq
 
378
    spu_si_ceqb,                              // llvm.spu.si.ceqb
 
379
    spu_si_ceqbi,                             // llvm.spu.si.ceqbi
 
380
    spu_si_ceqh,                              // llvm.spu.si.ceqh
 
381
    spu_si_ceqhi,                             // llvm.spu.si.ceqhi
 
382
    spu_si_ceqi,                              // llvm.spu.si.ceqi
 
383
    spu_si_cg,                                // llvm.spu.si.cg
 
384
    spu_si_cgt,                               // llvm.spu.si.cgt
 
385
    spu_si_cgtb,                              // llvm.spu.si.cgtb
 
386
    spu_si_cgtbi,                             // llvm.spu.si.cgtbi
 
387
    spu_si_cgth,                              // llvm.spu.si.cgth
 
388
    spu_si_cgthi,                             // llvm.spu.si.cgthi
 
389
    spu_si_cgti,                              // llvm.spu.si.cgti
 
390
    spu_si_cgx,                               // llvm.spu.si.cgx
 
391
    spu_si_clgt,                              // llvm.spu.si.clgt
 
392
    spu_si_clgtb,                             // llvm.spu.si.clgtb
 
393
    spu_si_clgtbi,                            // llvm.spu.si.clgtbi
 
394
    spu_si_clgth,                             // llvm.spu.si.clgth
 
395
    spu_si_clgthi,                            // llvm.spu.si.clgthi
 
396
    spu_si_clgti,                             // llvm.spu.si.clgti
 
397
    spu_si_dfa,                               // llvm.spu.si.dfa
 
398
    spu_si_dfm,                               // llvm.spu.si.dfm
 
399
    spu_si_dfma,                              // llvm.spu.si.dfma
 
400
    spu_si_dfms,                              // llvm.spu.si.dfms
 
401
    spu_si_dfnma,                             // llvm.spu.si.dfnma
 
402
    spu_si_dfnms,                             // llvm.spu.si.dfnms
 
403
    spu_si_dfs,                               // llvm.spu.si.dfs
 
404
    spu_si_fa,                                // llvm.spu.si.fa
 
405
    spu_si_fceq,                              // llvm.spu.si.fceq
 
406
    spu_si_fcgt,                              // llvm.spu.si.fcgt
 
407
    spu_si_fcmeq,                             // llvm.spu.si.fcmeq
 
408
    spu_si_fcmgt,                             // llvm.spu.si.fcmgt
 
409
    spu_si_fm,                                // llvm.spu.si.fm
 
410
    spu_si_fma,                               // llvm.spu.si.fma
 
411
    spu_si_fms,                               // llvm.spu.si.fms
 
412
    spu_si_fnms,                              // llvm.spu.si.fnms
 
413
    spu_si_fs,                                // llvm.spu.si.fs
 
414
    spu_si_fsmbi,                             // llvm.spu.si.fsmbi
 
415
    spu_si_mpy,                               // llvm.spu.si.mpy
 
416
    spu_si_mpya,                              // llvm.spu.si.mpya
 
417
    spu_si_mpyh,                              // llvm.spu.si.mpyh
 
418
    spu_si_mpyhh,                             // llvm.spu.si.mpyhh
 
419
    spu_si_mpyhha,                            // llvm.spu.si.mpyhha
 
420
    spu_si_mpyhhau,                           // llvm.spu.si.mpyhhau
 
421
    spu_si_mpyhhu,                            // llvm.spu.si.mpyhhu
 
422
    spu_si_mpyi,                              // llvm.spu.si.mpyi
 
423
    spu_si_mpys,                              // llvm.spu.si.mpys
 
424
    spu_si_mpyu,                              // llvm.spu.si.mpyu
 
425
    spu_si_mpyui,                             // llvm.spu.si.mpyui
 
426
    spu_si_nand,                              // llvm.spu.si.nand
 
427
    spu_si_nor,                               // llvm.spu.si.nor
 
428
    spu_si_or,                                // llvm.spu.si.or
 
429
    spu_si_orbi,                              // llvm.spu.si.orbi
 
430
    spu_si_orc,                               // llvm.spu.si.orc
 
431
    spu_si_orhi,                              // llvm.spu.si.orhi
 
432
    spu_si_ori,                               // llvm.spu.si.ori
 
433
    spu_si_sf,                                // llvm.spu.si.sf
 
434
    spu_si_sfh,                               // llvm.spu.si.sfh
 
435
    spu_si_sfhi,                              // llvm.spu.si.sfhi
 
436
    spu_si_sfi,                               // llvm.spu.si.sfi
 
437
    spu_si_sfx,                               // llvm.spu.si.sfx
 
438
    spu_si_shli,                              // llvm.spu.si.shli
 
439
    spu_si_shlqbi,                            // llvm.spu.si.shlqbi
 
440
    spu_si_shlqbii,                           // llvm.spu.si.shlqbii
 
441
    spu_si_shlqby,                            // llvm.spu.si.shlqby
 
442
    spu_si_shlqbyi,                           // llvm.spu.si.shlqbyi
 
443
    spu_si_xor,                               // llvm.spu.si.xor
 
444
    spu_si_xorbi,                             // llvm.spu.si.xorbi
 
445
    spu_si_xorhi,                             // llvm.spu.si.xorhi
 
446
    spu_si_xori,                              // llvm.spu.si.xori
 
447
    sqrt,                                     // llvm.sqrt
 
448
    ssub_with_overflow,                       // llvm.ssub.with.overflow
 
449
    stackprotector,                           // llvm.stackprotector
 
450
    stackrestore,                             // llvm.stackrestore
 
451
    stacksave,                                // llvm.stacksave
 
452
    trap,                                     // llvm.trap
 
453
    uadd_with_overflow,                       // llvm.uadd.with.overflow
 
454
    umul_with_overflow,                       // llvm.umul.with.overflow
 
455
    usub_with_overflow,                       // llvm.usub.with.overflow
 
456
    vacopy,                                   // llvm.va_copy
 
457
    vaend,                                    // llvm.va_end
 
458
    var_annotation,                           // llvm.var.annotation
 
459
    vastart,                                  // llvm.va_start
 
460
    x86_mmx_emms,                             // llvm.x86.mmx.emms
 
461
    x86_mmx_femms,                            // llvm.x86.mmx.femms
 
462
    x86_mmx_maskmovq,                         // llvm.x86.mmx.maskmovq
 
463
    x86_mmx_movnt_dq,                         // llvm.x86.mmx.movnt.dq
 
464
    x86_mmx_packssdw,                         // llvm.x86.mmx.packssdw
 
465
    x86_mmx_packsswb,                         // llvm.x86.mmx.packsswb
 
466
    x86_mmx_packuswb,                         // llvm.x86.mmx.packuswb
 
467
    x86_mmx_padds_b,                          // llvm.x86.mmx.padds.b
 
468
    x86_mmx_padds_w,                          // llvm.x86.mmx.padds.w
 
469
    x86_mmx_paddus_b,                         // llvm.x86.mmx.paddus.b
 
470
    x86_mmx_paddus_w,                         // llvm.x86.mmx.paddus.w
 
471
    x86_mmx_pavg_b,                           // llvm.x86.mmx.pavg.b
 
472
    x86_mmx_pavg_w,                           // llvm.x86.mmx.pavg.w
 
473
    x86_mmx_pcmpeq_b,                         // llvm.x86.mmx.pcmpeq.b
 
474
    x86_mmx_pcmpeq_d,                         // llvm.x86.mmx.pcmpeq.d
 
475
    x86_mmx_pcmpeq_w,                         // llvm.x86.mmx.pcmpeq.w
 
476
    x86_mmx_pcmpgt_b,                         // llvm.x86.mmx.pcmpgt.b
 
477
    x86_mmx_pcmpgt_d,                         // llvm.x86.mmx.pcmpgt.d
 
478
    x86_mmx_pcmpgt_w,                         // llvm.x86.mmx.pcmpgt.w
 
479
    x86_mmx_pmadd_wd,                         // llvm.x86.mmx.pmadd.wd
 
480
    x86_mmx_pmaxs_w,                          // llvm.x86.mmx.pmaxs.w
 
481
    x86_mmx_pmaxu_b,                          // llvm.x86.mmx.pmaxu.b
 
482
    x86_mmx_pmins_w,                          // llvm.x86.mmx.pmins.w
 
483
    x86_mmx_pminu_b,                          // llvm.x86.mmx.pminu.b
 
484
    x86_mmx_pmovmskb,                         // llvm.x86.mmx.pmovmskb
 
485
    x86_mmx_pmulh_w,                          // llvm.x86.mmx.pmulh.w
 
486
    x86_mmx_pmulhu_w,                         // llvm.x86.mmx.pmulhu.w
 
487
    x86_mmx_pmulu_dq,                         // llvm.x86.mmx.pmulu.dq
 
488
    x86_mmx_psad_bw,                          // llvm.x86.mmx.psad.bw
 
489
    x86_mmx_psll_d,                           // llvm.x86.mmx.psll.d
 
490
    x86_mmx_psll_q,                           // llvm.x86.mmx.psll.q
 
491
    x86_mmx_psll_w,                           // llvm.x86.mmx.psll.w
 
492
    x86_mmx_pslli_d,                          // llvm.x86.mmx.pslli.d
 
493
    x86_mmx_pslli_q,                          // llvm.x86.mmx.pslli.q
 
494
    x86_mmx_pslli_w,                          // llvm.x86.mmx.pslli.w
 
495
    x86_mmx_psra_d,                           // llvm.x86.mmx.psra.d
 
496
    x86_mmx_psra_w,                           // llvm.x86.mmx.psra.w
 
497
    x86_mmx_psrai_d,                          // llvm.x86.mmx.psrai.d
 
498
    x86_mmx_psrai_w,                          // llvm.x86.mmx.psrai.w
 
499
    x86_mmx_psrl_d,                           // llvm.x86.mmx.psrl.d
 
500
    x86_mmx_psrl_q,                           // llvm.x86.mmx.psrl.q
 
501
    x86_mmx_psrl_w,                           // llvm.x86.mmx.psrl.w
 
502
    x86_mmx_psrli_d,                          // llvm.x86.mmx.psrli.d
 
503
    x86_mmx_psrli_q,                          // llvm.x86.mmx.psrli.q
 
504
    x86_mmx_psrli_w,                          // llvm.x86.mmx.psrli.w
 
505
    x86_mmx_psubs_b,                          // llvm.x86.mmx.psubs.b
 
506
    x86_mmx_psubs_w,                          // llvm.x86.mmx.psubs.w
 
507
    x86_mmx_psubus_b,                         // llvm.x86.mmx.psubus.b
 
508
    x86_mmx_psubus_w,                         // llvm.x86.mmx.psubus.w
 
509
    x86_sse2_add_sd,                          // llvm.x86.sse2.add.sd
 
510
    x86_sse2_clflush,                         // llvm.x86.sse2.clflush
 
511
    x86_sse2_cmp_pd,                          // llvm.x86.sse2.cmp.pd
 
512
    x86_sse2_cmp_sd,                          // llvm.x86.sse2.cmp.sd
 
513
    x86_sse2_comieq_sd,                       // llvm.x86.sse2.comieq.sd
 
514
    x86_sse2_comige_sd,                       // llvm.x86.sse2.comige.sd
 
515
    x86_sse2_comigt_sd,                       // llvm.x86.sse2.comigt.sd
 
516
    x86_sse2_comile_sd,                       // llvm.x86.sse2.comile.sd
 
517
    x86_sse2_comilt_sd,                       // llvm.x86.sse2.comilt.sd
 
518
    x86_sse2_comineq_sd,                      // llvm.x86.sse2.comineq.sd
 
519
    x86_sse2_cvtdq2pd,                        // llvm.x86.sse2.cvtdq2pd
 
520
    x86_sse2_cvtdq2ps,                        // llvm.x86.sse2.cvtdq2ps
 
521
    x86_sse2_cvtpd2dq,                        // llvm.x86.sse2.cvtpd2dq
 
522
    x86_sse2_cvtpd2ps,                        // llvm.x86.sse2.cvtpd2ps
 
523
    x86_sse2_cvtps2dq,                        // llvm.x86.sse2.cvtps2dq
 
524
    x86_sse2_cvtps2pd,                        // llvm.x86.sse2.cvtps2pd
 
525
    x86_sse2_cvtsd2si,                        // llvm.x86.sse2.cvtsd2si
 
526
    x86_sse2_cvtsd2si64,                      // llvm.x86.sse2.cvtsd2si64
 
527
    x86_sse2_cvtsd2ss,                        // llvm.x86.sse2.cvtsd2ss
 
528
    x86_sse2_cvtsi2sd,                        // llvm.x86.sse2.cvtsi2sd
 
529
    x86_sse2_cvtsi642sd,                      // llvm.x86.sse2.cvtsi642sd
 
530
    x86_sse2_cvtss2sd,                        // llvm.x86.sse2.cvtss2sd
 
531
    x86_sse2_cvttpd2dq,                       // llvm.x86.sse2.cvttpd2dq
 
532
    x86_sse2_cvttps2dq,                       // llvm.x86.sse2.cvttps2dq
 
533
    x86_sse2_cvttsd2si,                       // llvm.x86.sse2.cvttsd2si
 
534
    x86_sse2_cvttsd2si64,                     // llvm.x86.sse2.cvttsd2si64
 
535
    x86_sse2_div_sd,                          // llvm.x86.sse2.div.sd
 
536
    x86_sse2_lfence,                          // llvm.x86.sse2.lfence
 
537
    x86_sse2_loadu_dq,                        // llvm.x86.sse2.loadu.dq
 
538
    x86_sse2_loadu_pd,                        // llvm.x86.sse2.loadu.pd
 
539
    x86_sse2_maskmov_dqu,                     // llvm.x86.sse2.maskmov.dqu
 
540
    x86_sse2_max_pd,                          // llvm.x86.sse2.max.pd
 
541
    x86_sse2_max_sd,                          // llvm.x86.sse2.max.sd
 
542
    x86_sse2_mfence,                          // llvm.x86.sse2.mfence
 
543
    x86_sse2_min_pd,                          // llvm.x86.sse2.min.pd
 
544
    x86_sse2_min_sd,                          // llvm.x86.sse2.min.sd
 
545
    x86_sse2_movmsk_pd,                       // llvm.x86.sse2.movmsk.pd
 
546
    x86_sse2_movnt_dq,                        // llvm.x86.sse2.movnt.dq
 
547
    x86_sse2_movnt_i,                         // llvm.x86.sse2.movnt.i
 
548
    x86_sse2_movnt_pd,                        // llvm.x86.sse2.movnt.pd
 
549
    x86_sse2_mul_sd,                          // llvm.x86.sse2.mul.sd
 
550
    x86_sse2_packssdw_128,                    // llvm.x86.sse2.packssdw.128
 
551
    x86_sse2_packsswb_128,                    // llvm.x86.sse2.packsswb.128
 
552
    x86_sse2_packuswb_128,                    // llvm.x86.sse2.packuswb.128
 
553
    x86_sse2_padds_b,                         // llvm.x86.sse2.padds.b
 
554
    x86_sse2_padds_w,                         // llvm.x86.sse2.padds.w
 
555
    x86_sse2_paddus_b,                        // llvm.x86.sse2.paddus.b
 
556
    x86_sse2_paddus_w,                        // llvm.x86.sse2.paddus.w
 
557
    x86_sse2_pavg_b,                          // llvm.x86.sse2.pavg.b
 
558
    x86_sse2_pavg_w,                          // llvm.x86.sse2.pavg.w
 
559
    x86_sse2_pcmpeq_b,                        // llvm.x86.sse2.pcmpeq.b
 
560
    x86_sse2_pcmpeq_d,                        // llvm.x86.sse2.pcmpeq.d
 
561
    x86_sse2_pcmpeq_w,                        // llvm.x86.sse2.pcmpeq.w
 
562
    x86_sse2_pcmpgt_b,                        // llvm.x86.sse2.pcmpgt.b
 
563
    x86_sse2_pcmpgt_d,                        // llvm.x86.sse2.pcmpgt.d
 
564
    x86_sse2_pcmpgt_w,                        // llvm.x86.sse2.pcmpgt.w
 
565
    x86_sse2_pmadd_wd,                        // llvm.x86.sse2.pmadd.wd
 
566
    x86_sse2_pmaxs_w,                         // llvm.x86.sse2.pmaxs.w
 
567
    x86_sse2_pmaxu_b,                         // llvm.x86.sse2.pmaxu.b
 
568
    x86_sse2_pmins_w,                         // llvm.x86.sse2.pmins.w
 
569
    x86_sse2_pminu_b,                         // llvm.x86.sse2.pminu.b
 
570
    x86_sse2_pmovmskb_128,                    // llvm.x86.sse2.pmovmskb.128
 
571
    x86_sse2_pmulh_w,                         // llvm.x86.sse2.pmulh.w
 
572
    x86_sse2_pmulhu_w,                        // llvm.x86.sse2.pmulhu.w
 
573
    x86_sse2_pmulu_dq,                        // llvm.x86.sse2.pmulu.dq
 
574
    x86_sse2_psad_bw,                         // llvm.x86.sse2.psad.bw
 
575
    x86_sse2_psll_d,                          // llvm.x86.sse2.psll.d
 
576
    x86_sse2_psll_dq,                         // llvm.x86.sse2.psll.dq
 
577
    x86_sse2_psll_dq_bs,                      // llvm.x86.sse2.psll.dq.bs
 
578
    x86_sse2_psll_q,                          // llvm.x86.sse2.psll.q
 
579
    x86_sse2_psll_w,                          // llvm.x86.sse2.psll.w
 
580
    x86_sse2_pslli_d,                         // llvm.x86.sse2.pslli.d
 
581
    x86_sse2_pslli_q,                         // llvm.x86.sse2.pslli.q
 
582
    x86_sse2_pslli_w,                         // llvm.x86.sse2.pslli.w
 
583
    x86_sse2_psra_d,                          // llvm.x86.sse2.psra.d
 
584
    x86_sse2_psra_w,                          // llvm.x86.sse2.psra.w
 
585
    x86_sse2_psrai_d,                         // llvm.x86.sse2.psrai.d
 
586
    x86_sse2_psrai_w,                         // llvm.x86.sse2.psrai.w
 
587
    x86_sse2_psrl_d,                          // llvm.x86.sse2.psrl.d
 
588
    x86_sse2_psrl_dq,                         // llvm.x86.sse2.psrl.dq
 
589
    x86_sse2_psrl_dq_bs,                      // llvm.x86.sse2.psrl.dq.bs
 
590
    x86_sse2_psrl_q,                          // llvm.x86.sse2.psrl.q
 
591
    x86_sse2_psrl_w,                          // llvm.x86.sse2.psrl.w
 
592
    x86_sse2_psrli_d,                         // llvm.x86.sse2.psrli.d
 
593
    x86_sse2_psrli_q,                         // llvm.x86.sse2.psrli.q
 
594
    x86_sse2_psrli_w,                         // llvm.x86.sse2.psrli.w
 
595
    x86_sse2_psubs_b,                         // llvm.x86.sse2.psubs.b
 
596
    x86_sse2_psubs_w,                         // llvm.x86.sse2.psubs.w
 
597
    x86_sse2_psubus_b,                        // llvm.x86.sse2.psubus.b
 
598
    x86_sse2_psubus_w,                        // llvm.x86.sse2.psubus.w
 
599
    x86_sse2_sqrt_pd,                         // llvm.x86.sse2.sqrt.pd
 
600
    x86_sse2_sqrt_sd,                         // llvm.x86.sse2.sqrt.sd
 
601
    x86_sse2_storel_dq,                       // llvm.x86.sse2.storel.dq
 
602
    x86_sse2_storeu_dq,                       // llvm.x86.sse2.storeu.dq
 
603
    x86_sse2_storeu_pd,                       // llvm.x86.sse2.storeu.pd
 
604
    x86_sse2_sub_sd,                          // llvm.x86.sse2.sub.sd
 
605
    x86_sse2_ucomieq_sd,                      // llvm.x86.sse2.ucomieq.sd
 
606
    x86_sse2_ucomige_sd,                      // llvm.x86.sse2.ucomige.sd
 
607
    x86_sse2_ucomigt_sd,                      // llvm.x86.sse2.ucomigt.sd
 
608
    x86_sse2_ucomile_sd,                      // llvm.x86.sse2.ucomile.sd
 
609
    x86_sse2_ucomilt_sd,                      // llvm.x86.sse2.ucomilt.sd
 
610
    x86_sse2_ucomineq_sd,                     // llvm.x86.sse2.ucomineq.sd
 
611
    x86_sse3_addsub_pd,                       // llvm.x86.sse3.addsub.pd
 
612
    x86_sse3_addsub_ps,                       // llvm.x86.sse3.addsub.ps
 
613
    x86_sse3_hadd_pd,                         // llvm.x86.sse3.hadd.pd
 
614
    x86_sse3_hadd_ps,                         // llvm.x86.sse3.hadd.ps
 
615
    x86_sse3_hsub_pd,                         // llvm.x86.sse3.hsub.pd
 
616
    x86_sse3_hsub_ps,                         // llvm.x86.sse3.hsub.ps
 
617
    x86_sse3_ldu_dq,                          // llvm.x86.sse3.ldu.dq
 
618
    x86_sse3_monitor,                         // llvm.x86.sse3.monitor
 
619
    x86_sse3_mwait,                           // llvm.x86.sse3.mwait
 
620
    x86_sse41_blendpd,                        // llvm.x86.sse41.blendpd
 
621
    x86_sse41_blendps,                        // llvm.x86.sse41.blendps
 
622
    x86_sse41_blendvpd,                       // llvm.x86.sse41.blendvpd
 
623
    x86_sse41_blendvps,                       // llvm.x86.sse41.blendvps
 
624
    x86_sse41_dppd,                           // llvm.x86.sse41.dppd
 
625
    x86_sse41_dpps,                           // llvm.x86.sse41.dpps
 
626
    x86_sse41_extractps,                      // llvm.x86.sse41.extractps
 
627
    x86_sse41_insertps,                       // llvm.x86.sse41.insertps
 
628
    x86_sse41_movntdqa,                       // llvm.x86.sse41.movntdqa
 
629
    x86_sse41_mpsadbw,                        // llvm.x86.sse41.mpsadbw
 
630
    x86_sse41_packusdw,                       // llvm.x86.sse41.packusdw
 
631
    x86_sse41_pblendvb,                       // llvm.x86.sse41.pblendvb
 
632
    x86_sse41_pblendw,                        // llvm.x86.sse41.pblendw
 
633
    x86_sse41_pcmpeqq,                        // llvm.x86.sse41.pcmpeqq
 
634
    x86_sse41_pextrb,                         // llvm.x86.sse41.pextrb
 
635
    x86_sse41_pextrd,                         // llvm.x86.sse41.pextrd
 
636
    x86_sse41_pextrq,                         // llvm.x86.sse41.pextrq
 
637
    x86_sse41_phminposuw,                     // llvm.x86.sse41.phminposuw
 
638
    x86_sse41_pmaxsb,                         // llvm.x86.sse41.pmaxsb
 
639
    x86_sse41_pmaxsd,                         // llvm.x86.sse41.pmaxsd
 
640
    x86_sse41_pmaxud,                         // llvm.x86.sse41.pmaxud
 
641
    x86_sse41_pmaxuw,                         // llvm.x86.sse41.pmaxuw
 
642
    x86_sse41_pminsb,                         // llvm.x86.sse41.pminsb
 
643
    x86_sse41_pminsd,                         // llvm.x86.sse41.pminsd
 
644
    x86_sse41_pminud,                         // llvm.x86.sse41.pminud
 
645
    x86_sse41_pminuw,                         // llvm.x86.sse41.pminuw
 
646
    x86_sse41_pmovsxbd,                       // llvm.x86.sse41.pmovsxbd
 
647
    x86_sse41_pmovsxbq,                       // llvm.x86.sse41.pmovsxbq
 
648
    x86_sse41_pmovsxbw,                       // llvm.x86.sse41.pmovsxbw
 
649
    x86_sse41_pmovsxdq,                       // llvm.x86.sse41.pmovsxdq
 
650
    x86_sse41_pmovsxwd,                       // llvm.x86.sse41.pmovsxwd
 
651
    x86_sse41_pmovsxwq,                       // llvm.x86.sse41.pmovsxwq
 
652
    x86_sse41_pmovzxbd,                       // llvm.x86.sse41.pmovzxbd
 
653
    x86_sse41_pmovzxbq,                       // llvm.x86.sse41.pmovzxbq
 
654
    x86_sse41_pmovzxbw,                       // llvm.x86.sse41.pmovzxbw
 
655
    x86_sse41_pmovzxdq,                       // llvm.x86.sse41.pmovzxdq
 
656
    x86_sse41_pmovzxwd,                       // llvm.x86.sse41.pmovzxwd
 
657
    x86_sse41_pmovzxwq,                       // llvm.x86.sse41.pmovzxwq
 
658
    x86_sse41_pmuldq,                         // llvm.x86.sse41.pmuldq
 
659
    x86_sse41_pmulld,                         // llvm.x86.sse41.pmulld
 
660
    x86_sse41_ptestc,                         // llvm.x86.sse41.ptestc
 
661
    x86_sse41_ptestnzc,                       // llvm.x86.sse41.ptestnzc
 
662
    x86_sse41_ptestz,                         // llvm.x86.sse41.ptestz
 
663
    x86_sse41_round_pd,                       // llvm.x86.sse41.round.pd
 
664
    x86_sse41_round_ps,                       // llvm.x86.sse41.round.ps
 
665
    x86_sse41_round_sd,                       // llvm.x86.sse41.round.sd
 
666
    x86_sse41_round_ss,                       // llvm.x86.sse41.round.ss
 
667
    x86_sse42_crc32_16,                       // llvm.x86.sse42.crc32.16
 
668
    x86_sse42_crc32_32,                       // llvm.x86.sse42.crc32.32
 
669
    x86_sse42_crc32_64,                       // llvm.x86.sse42.crc32.64
 
670
    x86_sse42_crc32_8,                        // llvm.x86.sse42.crc32.8
 
671
    x86_sse42_pcmpestri128,                   // llvm.x86.sse42.pcmpestri128
 
672
    x86_sse42_pcmpestria128,                  // llvm.x86.sse42.pcmpestria128
 
673
    x86_sse42_pcmpestric128,                  // llvm.x86.sse42.pcmpestric128
 
674
    x86_sse42_pcmpestrio128,                  // llvm.x86.sse42.pcmpestrio128
 
675
    x86_sse42_pcmpestris128,                  // llvm.x86.sse42.pcmpestris128
 
676
    x86_sse42_pcmpestriz128,                  // llvm.x86.sse42.pcmpestriz128
 
677
    x86_sse42_pcmpestrm128,                   // llvm.x86.sse42.pcmpestrm128
 
678
    x86_sse42_pcmpgtq,                        // llvm.x86.sse42.pcmpgtq
 
679
    x86_sse42_pcmpistri128,                   // llvm.x86.sse42.pcmpistri128
 
680
    x86_sse42_pcmpistria128,                  // llvm.x86.sse42.pcmpistria128
 
681
    x86_sse42_pcmpistric128,                  // llvm.x86.sse42.pcmpistric128
 
682
    x86_sse42_pcmpistrio128,                  // llvm.x86.sse42.pcmpistrio128
 
683
    x86_sse42_pcmpistris128,                  // llvm.x86.sse42.pcmpistris128
 
684
    x86_sse42_pcmpistriz128,                  // llvm.x86.sse42.pcmpistriz128
 
685
    x86_sse42_pcmpistrm128,                   // llvm.x86.sse42.pcmpistrm128
 
686
    x86_sse_add_ss,                           // llvm.x86.sse.add.ss
 
687
    x86_sse_cmp_ps,                           // llvm.x86.sse.cmp.ps
 
688
    x86_sse_cmp_ss,                           // llvm.x86.sse.cmp.ss
 
689
    x86_sse_comieq_ss,                        // llvm.x86.sse.comieq.ss
 
690
    x86_sse_comige_ss,                        // llvm.x86.sse.comige.ss
 
691
    x86_sse_comigt_ss,                        // llvm.x86.sse.comigt.ss
 
692
    x86_sse_comile_ss,                        // llvm.x86.sse.comile.ss
 
693
    x86_sse_comilt_ss,                        // llvm.x86.sse.comilt.ss
 
694
    x86_sse_comineq_ss,                       // llvm.x86.sse.comineq.ss
 
695
    x86_sse_cvtpd2pi,                         // llvm.x86.sse.cvtpd2pi
 
696
    x86_sse_cvtpi2pd,                         // llvm.x86.sse.cvtpi2pd
 
697
    x86_sse_cvtpi2ps,                         // llvm.x86.sse.cvtpi2ps
 
698
    x86_sse_cvtps2pi,                         // llvm.x86.sse.cvtps2pi
 
699
    x86_sse_cvtsi2ss,                         // llvm.x86.sse.cvtsi2ss
 
700
    x86_sse_cvtsi642ss,                       // llvm.x86.sse.cvtsi642ss
 
701
    x86_sse_cvtss2si,                         // llvm.x86.sse.cvtss2si
 
702
    x86_sse_cvtss2si64,                       // llvm.x86.sse.cvtss2si64
 
703
    x86_sse_cvttpd2pi,                        // llvm.x86.sse.cvttpd2pi
 
704
    x86_sse_cvttps2pi,                        // llvm.x86.sse.cvttps2pi
 
705
    x86_sse_cvttss2si,                        // llvm.x86.sse.cvttss2si
 
706
    x86_sse_cvttss2si64,                      // llvm.x86.sse.cvttss2si64
 
707
    x86_sse_div_ss,                           // llvm.x86.sse.div.ss
 
708
    x86_sse_ldmxcsr,                          // llvm.x86.sse.ldmxcsr
 
709
    x86_sse_loadu_ps,                         // llvm.x86.sse.loadu.ps
 
710
    x86_sse_max_ps,                           // llvm.x86.sse.max.ps
 
711
    x86_sse_max_ss,                           // llvm.x86.sse.max.ss
 
712
    x86_sse_min_ps,                           // llvm.x86.sse.min.ps
 
713
    x86_sse_min_ss,                           // llvm.x86.sse.min.ss
 
714
    x86_sse_movmsk_ps,                        // llvm.x86.sse.movmsk.ps
 
715
    x86_sse_movnt_ps,                         // llvm.x86.sse.movnt.ps
 
716
    x86_sse_mul_ss,                           // llvm.x86.sse.mul.ss
 
717
    x86_sse_rcp_ps,                           // llvm.x86.sse.rcp.ps
 
718
    x86_sse_rcp_ss,                           // llvm.x86.sse.rcp.ss
 
719
    x86_sse_rsqrt_ps,                         // llvm.x86.sse.rsqrt.ps
 
720
    x86_sse_rsqrt_ss,                         // llvm.x86.sse.rsqrt.ss
 
721
    x86_sse_sfence,                           // llvm.x86.sse.sfence
 
722
    x86_sse_sqrt_ps,                          // llvm.x86.sse.sqrt.ps
 
723
    x86_sse_sqrt_ss,                          // llvm.x86.sse.sqrt.ss
 
724
    x86_sse_stmxcsr,                          // llvm.x86.sse.stmxcsr
 
725
    x86_sse_storeu_ps,                        // llvm.x86.sse.storeu.ps
 
726
    x86_sse_sub_ss,                           // llvm.x86.sse.sub.ss
 
727
    x86_sse_ucomieq_ss,                       // llvm.x86.sse.ucomieq.ss
 
728
    x86_sse_ucomige_ss,                       // llvm.x86.sse.ucomige.ss
 
729
    x86_sse_ucomigt_ss,                       // llvm.x86.sse.ucomigt.ss
 
730
    x86_sse_ucomile_ss,                       // llvm.x86.sse.ucomile.ss
 
731
    x86_sse_ucomilt_ss,                       // llvm.x86.sse.ucomilt.ss
 
732
    x86_sse_ucomineq_ss,                      // llvm.x86.sse.ucomineq.ss
 
733
    x86_ssse3_pabs_b,                         // llvm.x86.ssse3.pabs.b
 
734
    x86_ssse3_pabs_b_128,                     // llvm.x86.ssse3.pabs.b.128
 
735
    x86_ssse3_pabs_d,                         // llvm.x86.ssse3.pabs.d
 
736
    x86_ssse3_pabs_d_128,                     // llvm.x86.ssse3.pabs.d.128
 
737
    x86_ssse3_pabs_w,                         // llvm.x86.ssse3.pabs.w
 
738
    x86_ssse3_pabs_w_128,                     // llvm.x86.ssse3.pabs.w.128
 
739
    x86_ssse3_palign_r,                       // llvm.x86.ssse3.palign.r
 
740
    x86_ssse3_palign_r_128,                   // llvm.x86.ssse3.palign.r.128
 
741
    x86_ssse3_phadd_d,                        // llvm.x86.ssse3.phadd.d
 
742
    x86_ssse3_phadd_d_128,                    // llvm.x86.ssse3.phadd.d.128
 
743
    x86_ssse3_phadd_sw,                       // llvm.x86.ssse3.phadd.sw
 
744
    x86_ssse3_phadd_sw_128,                   // llvm.x86.ssse3.phadd.sw.128
 
745
    x86_ssse3_phadd_w,                        // llvm.x86.ssse3.phadd.w
 
746
    x86_ssse3_phadd_w_128,                    // llvm.x86.ssse3.phadd.w.128
 
747
    x86_ssse3_phsub_d,                        // llvm.x86.ssse3.phsub.d
 
748
    x86_ssse3_phsub_d_128,                    // llvm.x86.ssse3.phsub.d.128
 
749
    x86_ssse3_phsub_sw,                       // llvm.x86.ssse3.phsub.sw
 
750
    x86_ssse3_phsub_sw_128,                   // llvm.x86.ssse3.phsub.sw.128
 
751
    x86_ssse3_phsub_w,                        // llvm.x86.ssse3.phsub.w
 
752
    x86_ssse3_phsub_w_128,                    // llvm.x86.ssse3.phsub.w.128
 
753
    x86_ssse3_pmadd_ub_sw,                    // llvm.x86.ssse3.pmadd.ub.sw
 
754
    x86_ssse3_pmadd_ub_sw_128,                // llvm.x86.ssse3.pmadd.ub.sw.128
 
755
    x86_ssse3_pmul_hr_sw,                     // llvm.x86.ssse3.pmul.hr.sw
 
756
    x86_ssse3_pmul_hr_sw_128,                 // llvm.x86.ssse3.pmul.hr.sw.128
 
757
    x86_ssse3_pshuf_b,                        // llvm.x86.ssse3.pshuf.b
 
758
    x86_ssse3_pshuf_b_128,                    // llvm.x86.ssse3.pshuf.b.128
 
759
    x86_ssse3_psign_b,                        // llvm.x86.ssse3.psign.b
 
760
    x86_ssse3_psign_b_128,                    // llvm.x86.ssse3.psign.b.128
 
761
    x86_ssse3_psign_d,                        // llvm.x86.ssse3.psign.d
 
762
    x86_ssse3_psign_d_128,                    // llvm.x86.ssse3.psign.d.128
 
763
    x86_ssse3_psign_w,                        // llvm.x86.ssse3.psign.w
 
764
    x86_ssse3_psign_w_128,                    // llvm.x86.ssse3.psign.w.128
 
765
    xcore_bitrev,                             // llvm.xcore.bitrev
 
766
    xcore_getid                               // llvm.xcore.getid
 
767
#endif
 
768
 
 
769
// Intrinsic ID to name table
 
770
#ifdef GET_INTRINSIC_NAME_TABLE
 
771
  // Note that entry #0 is the invalid intrinsic!
 
772
  "llvm.alpha.umulh",
 
773
  "llvm.annotation",
 
774
  "llvm.arm.neon.vabals",
 
775
  "llvm.arm.neon.vabalu",
 
776
  "llvm.arm.neon.vabas",
 
777
  "llvm.arm.neon.vabau",
 
778
  "llvm.arm.neon.vabdls",
 
779
  "llvm.arm.neon.vabdlu",
 
780
  "llvm.arm.neon.vabds",
 
781
  "llvm.arm.neon.vabdu",
 
782
  "llvm.arm.neon.vabs",
 
783
  "llvm.arm.neon.vacged",
 
784
  "llvm.arm.neon.vacgeq",
 
785
  "llvm.arm.neon.vacgtd",
 
786
  "llvm.arm.neon.vacgtq",
 
787
  "llvm.arm.neon.vaddhn",
 
788
  "llvm.arm.neon.vaddls",
 
789
  "llvm.arm.neon.vaddlu",
 
790
  "llvm.arm.neon.vaddws",
 
791
  "llvm.arm.neon.vaddwu",
 
792
  "llvm.arm.neon.vcls",
 
793
  "llvm.arm.neon.vclz",
 
794
  "llvm.arm.neon.vcnt",
 
795
  "llvm.arm.neon.vcvtfp2fxs",
 
796
  "llvm.arm.neon.vcvtfp2fxu",
 
797
  "llvm.arm.neon.vcvtfxs2fp",
 
798
  "llvm.arm.neon.vcvtfxu2fp",
 
799
  "llvm.arm.neon.vhadds",
 
800
  "llvm.arm.neon.vhaddu",
 
801
  "llvm.arm.neon.vhsubs",
 
802
  "llvm.arm.neon.vhsubu",
 
803
  "llvm.arm.neon.vld1",
 
804
  "llvm.arm.neon.vld2",
 
805
  "llvm.arm.neon.vld2lane",
 
806
  "llvm.arm.neon.vld3",
 
807
  "llvm.arm.neon.vld3lane",
 
808
  "llvm.arm.neon.vld4",
 
809
  "llvm.arm.neon.vld4lane",
 
810
  "llvm.arm.neon.vmaxs",
 
811
  "llvm.arm.neon.vmaxu",
 
812
  "llvm.arm.neon.vmins",
 
813
  "llvm.arm.neon.vminu",
 
814
  "llvm.arm.neon.vmlals",
 
815
  "llvm.arm.neon.vmlalu",
 
816
  "llvm.arm.neon.vmlsls",
 
817
  "llvm.arm.neon.vmlslu",
 
818
  "llvm.arm.neon.vmovls",
 
819
  "llvm.arm.neon.vmovlu",
 
820
  "llvm.arm.neon.vmovn",
 
821
  "llvm.arm.neon.vmullp",
 
822
  "llvm.arm.neon.vmulls",
 
823
  "llvm.arm.neon.vmullu",
 
824
  "llvm.arm.neon.vmulp",
 
825
  "llvm.arm.neon.vpadals",
 
826
  "llvm.arm.neon.vpadalu",
 
827
  "llvm.arm.neon.vpadd",
 
828
  "llvm.arm.neon.vpaddls",
 
829
  "llvm.arm.neon.vpaddlu",
 
830
  "llvm.arm.neon.vpmaxs",
 
831
  "llvm.arm.neon.vpmaxu",
 
832
  "llvm.arm.neon.vpmins",
 
833
  "llvm.arm.neon.vpminu",
 
834
  "llvm.arm.neon.vqabs",
 
835
  "llvm.arm.neon.vqadds",
 
836
  "llvm.arm.neon.vqaddu",
 
837
  "llvm.arm.neon.vqdmlal",
 
838
  "llvm.arm.neon.vqdmlsl",
 
839
  "llvm.arm.neon.vqdmulh",
 
840
  "llvm.arm.neon.vqdmull",
 
841
  "llvm.arm.neon.vqmovns",
 
842
  "llvm.arm.neon.vqmovnsu",
 
843
  "llvm.arm.neon.vqmovnu",
 
844
  "llvm.arm.neon.vqneg",
 
845
  "llvm.arm.neon.vqrdmulh",
 
846
  "llvm.arm.neon.vqrshiftns",
 
847
  "llvm.arm.neon.vqrshiftnsu",
 
848
  "llvm.arm.neon.vqrshiftnu",
 
849
  "llvm.arm.neon.vqrshifts",
 
850
  "llvm.arm.neon.vqrshiftu",
 
851
  "llvm.arm.neon.vqshiftns",
 
852
  "llvm.arm.neon.vqshiftnsu",
 
853
  "llvm.arm.neon.vqshiftnu",
 
854
  "llvm.arm.neon.vqshifts",
 
855
  "llvm.arm.neon.vqshiftsu",
 
856
  "llvm.arm.neon.vqshiftu",
 
857
  "llvm.arm.neon.vqsubs",
 
858
  "llvm.arm.neon.vqsubu",
 
859
  "llvm.arm.neon.vraddhn",
 
860
  "llvm.arm.neon.vrecpe",
 
861
  "llvm.arm.neon.vrecps",
 
862
  "llvm.arm.neon.vrhadds",
 
863
  "llvm.arm.neon.vrhaddu",
 
864
  "llvm.arm.neon.vrshiftn",
 
865
  "llvm.arm.neon.vrshifts",
 
866
  "llvm.arm.neon.vrshiftu",
 
867
  "llvm.arm.neon.vrsqrte",
 
868
  "llvm.arm.neon.vrsqrts",
 
869
  "llvm.arm.neon.vrsubhn",
 
870
  "llvm.arm.neon.vshiftins",
 
871
  "llvm.arm.neon.vshiftls",
 
872
  "llvm.arm.neon.vshiftlu",
 
873
  "llvm.arm.neon.vshiftn",
 
874
  "llvm.arm.neon.vshifts",
 
875
  "llvm.arm.neon.vshiftu",
 
876
  "llvm.arm.neon.vst1",
 
877
  "llvm.arm.neon.vst2",
 
878
  "llvm.arm.neon.vst2lane",
 
879
  "llvm.arm.neon.vst3",
 
880
  "llvm.arm.neon.vst3lane",
 
881
  "llvm.arm.neon.vst4",
 
882
  "llvm.arm.neon.vst4lane",
 
883
  "llvm.arm.neon.vsubhn",
 
884
  "llvm.arm.neon.vsubls",
 
885
  "llvm.arm.neon.vsublu",
 
886
  "llvm.arm.neon.vsubws",
 
887
  "llvm.arm.neon.vsubwu",
 
888
  "llvm.arm.neon.vtbl1",
 
889
  "llvm.arm.neon.vtbl2",
 
890
  "llvm.arm.neon.vtbl3",
 
891
  "llvm.arm.neon.vtbl4",
 
892
  "llvm.arm.neon.vtbx1",
 
893
  "llvm.arm.neon.vtbx2",
 
894
  "llvm.arm.neon.vtbx3",
 
895
  "llvm.arm.neon.vtbx4",
 
896
  "llvm.arm.thread.pointer",
 
897
  "llvm.atomic.cmp.swap",
 
898
  "llvm.atomic.load.add",
 
899
  "llvm.atomic.load.and",
 
900
  "llvm.atomic.load.max",
 
901
  "llvm.atomic.load.min",
 
902
  "llvm.atomic.load.nand",
 
903
  "llvm.atomic.load.or",
 
904
  "llvm.atomic.load.sub",
 
905
  "llvm.atomic.load.umax",
 
906
  "llvm.atomic.load.umin",
 
907
  "llvm.atomic.load.xor",
 
908
  "llvm.atomic.swap",
 
909
  "llvm.bswap",
 
910
  "llvm.convertff",
 
911
  "llvm.convertfsi",
 
912
  "llvm.convertfui",
 
913
  "llvm.convertsif",
 
914
  "llvm.convertss",
 
915
  "llvm.convertsu",
 
916
  "llvm.convertuif",
 
917
  "llvm.convertus",
 
918
  "llvm.convertuu",
 
919
  "llvm.cos",
 
920
  "llvm.ctlz",
 
921
  "llvm.ctpop",
 
922
  "llvm.cttz",
 
923
  "llvm.dbg.declare",
 
924
  "llvm.dbg.value",
 
925
  "llvm.eh.dwarf.cfa",
 
926
  "llvm.eh.exception",
 
927
  "llvm.eh.return.i32",
 
928
  "llvm.eh.return.i64",
 
929
  "llvm.eh.selector",
 
930
  "llvm.eh.sjlj.callsite",
 
931
  "llvm.eh.sjlj.longjmp",
 
932
  "llvm.eh.sjlj.lsda",
 
933
  "llvm.eh.sjlj.setjmp",
 
934
  "llvm.eh.typeid.for",
 
935
  "llvm.eh.unwind.init",
 
936
  "llvm.exp",
 
937
  "llvm.exp2",
 
938
  "llvm.flt.rounds",
 
939
  "llvm.frameaddress",
 
940
  "llvm.gcread",
 
941
  "llvm.gcroot",
 
942
  "llvm.gcwrite",
 
943
  "llvm.init.trampoline",
 
944
  "llvm.invariant.end",
 
945
  "llvm.invariant.start",
 
946
  "llvm.lifetime.end",
 
947
  "llvm.lifetime.start",
 
948
  "llvm.log",
 
949
  "llvm.log10",
 
950
  "llvm.log2",
 
951
  "llvm.longjmp",
 
952
  "llvm.memcpy",
 
953
  "llvm.memmove",
 
954
  "llvm.memory.barrier",
 
955
  "llvm.memset",
 
956
  "llvm.objectsize",
 
957
  "llvm.pcmarker",
 
958
  "llvm.pow",
 
959
  "llvm.powi",
 
960
  "llvm.ppc.altivec.dss",
 
961
  "llvm.ppc.altivec.dssall",
 
962
  "llvm.ppc.altivec.dst",
 
963
  "llvm.ppc.altivec.dstst",
 
964
  "llvm.ppc.altivec.dststt",
 
965
  "llvm.ppc.altivec.dstt",
 
966
  "llvm.ppc.altivec.lvebx",
 
967
  "llvm.ppc.altivec.lvehx",
 
968
  "llvm.ppc.altivec.lvewx",
 
969
  "llvm.ppc.altivec.lvsl",
 
970
  "llvm.ppc.altivec.lvsr",
 
971
  "llvm.ppc.altivec.lvx",
 
972
  "llvm.ppc.altivec.lvxl",
 
973
  "llvm.ppc.altivec.mfvscr",
 
974
  "llvm.ppc.altivec.mtvscr",
 
975
  "llvm.ppc.altivec.stvebx",
 
976
  "llvm.ppc.altivec.stvehx",
 
977
  "llvm.ppc.altivec.stvewx",
 
978
  "llvm.ppc.altivec.stvx",
 
979
  "llvm.ppc.altivec.stvxl",
 
980
  "llvm.ppc.altivec.vaddcuw",
 
981
  "llvm.ppc.altivec.vaddsbs",
 
982
  "llvm.ppc.altivec.vaddshs",
 
983
  "llvm.ppc.altivec.vaddsws",
 
984
  "llvm.ppc.altivec.vaddubs",
 
985
  "llvm.ppc.altivec.vadduhs",
 
986
  "llvm.ppc.altivec.vadduws",
 
987
  "llvm.ppc.altivec.vavgsb",
 
988
  "llvm.ppc.altivec.vavgsh",
 
989
  "llvm.ppc.altivec.vavgsw",
 
990
  "llvm.ppc.altivec.vavgub",
 
991
  "llvm.ppc.altivec.vavguh",
 
992
  "llvm.ppc.altivec.vavguw",
 
993
  "llvm.ppc.altivec.vcfsx",
 
994
  "llvm.ppc.altivec.vcfux",
 
995
  "llvm.ppc.altivec.vcmpbfp",
 
996
  "llvm.ppc.altivec.vcmpbfp.p",
 
997
  "llvm.ppc.altivec.vcmpeqfp",
 
998
  "llvm.ppc.altivec.vcmpeqfp.p",
 
999
  "llvm.ppc.altivec.vcmpequb",
 
1000
  "llvm.ppc.altivec.vcmpequb.p",
 
1001
  "llvm.ppc.altivec.vcmpequh",
 
1002
  "llvm.ppc.altivec.vcmpequh.p",
 
1003
  "llvm.ppc.altivec.vcmpequw",
 
1004
  "llvm.ppc.altivec.vcmpequw.p",
 
1005
  "llvm.ppc.altivec.vcmpgefp",
 
1006
  "llvm.ppc.altivec.vcmpgefp.p",
 
1007
  "llvm.ppc.altivec.vcmpgtfp",
 
1008
  "llvm.ppc.altivec.vcmpgtfp.p",
 
1009
  "llvm.ppc.altivec.vcmpgtsb",
 
1010
  "llvm.ppc.altivec.vcmpgtsb.p",
 
1011
  "llvm.ppc.altivec.vcmpgtsh",
 
1012
  "llvm.ppc.altivec.vcmpgtsh.p",
 
1013
  "llvm.ppc.altivec.vcmpgtsw",
 
1014
  "llvm.ppc.altivec.vcmpgtsw.p",
 
1015
  "llvm.ppc.altivec.vcmpgtub",
 
1016
  "llvm.ppc.altivec.vcmpgtub.p",
 
1017
  "llvm.ppc.altivec.vcmpgtuh",
 
1018
  "llvm.ppc.altivec.vcmpgtuh.p",
 
1019
  "llvm.ppc.altivec.vcmpgtuw",
 
1020
  "llvm.ppc.altivec.vcmpgtuw.p",
 
1021
  "llvm.ppc.altivec.vctsxs",
 
1022
  "llvm.ppc.altivec.vctuxs",
 
1023
  "llvm.ppc.altivec.vexptefp",
 
1024
  "llvm.ppc.altivec.vlogefp",
 
1025
  "llvm.ppc.altivec.vmaddfp",
 
1026
  "llvm.ppc.altivec.vmaxfp",
 
1027
  "llvm.ppc.altivec.vmaxsb",
 
1028
  "llvm.ppc.altivec.vmaxsh",
 
1029
  "llvm.ppc.altivec.vmaxsw",
 
1030
  "llvm.ppc.altivec.vmaxub",
 
1031
  "llvm.ppc.altivec.vmaxuh",
 
1032
  "llvm.ppc.altivec.vmaxuw",
 
1033
  "llvm.ppc.altivec.vmhaddshs",
 
1034
  "llvm.ppc.altivec.vmhraddshs",
 
1035
  "llvm.ppc.altivec.vminfp",
 
1036
  "llvm.ppc.altivec.vminsb",
 
1037
  "llvm.ppc.altivec.vminsh",
 
1038
  "llvm.ppc.altivec.vminsw",
 
1039
  "llvm.ppc.altivec.vminub",
 
1040
  "llvm.ppc.altivec.vminuh",
 
1041
  "llvm.ppc.altivec.vminuw",
 
1042
  "llvm.ppc.altivec.vmladduhm",
 
1043
  "llvm.ppc.altivec.vmsummbm",
 
1044
  "llvm.ppc.altivec.vmsumshm",
 
1045
  "llvm.ppc.altivec.vmsumshs",
 
1046
  "llvm.ppc.altivec.vmsumubm",
 
1047
  "llvm.ppc.altivec.vmsumuhm",
 
1048
  "llvm.ppc.altivec.vmsumuhs",
 
1049
  "llvm.ppc.altivec.vmulesb",
 
1050
  "llvm.ppc.altivec.vmulesh",
 
1051
  "llvm.ppc.altivec.vmuleub",
 
1052
  "llvm.ppc.altivec.vmuleuh",
 
1053
  "llvm.ppc.altivec.vmulosb",
 
1054
  "llvm.ppc.altivec.vmulosh",
 
1055
  "llvm.ppc.altivec.vmuloub",
 
1056
  "llvm.ppc.altivec.vmulouh",
 
1057
  "llvm.ppc.altivec.vnmsubfp",
 
1058
  "llvm.ppc.altivec.vperm",
 
1059
  "llvm.ppc.altivec.vpkpx",
 
1060
  "llvm.ppc.altivec.vpkshss",
 
1061
  "llvm.ppc.altivec.vpkshus",
 
1062
  "llvm.ppc.altivec.vpkswss",
 
1063
  "llvm.ppc.altivec.vpkswus",
 
1064
  "llvm.ppc.altivec.vpkuhus",
 
1065
  "llvm.ppc.altivec.vpkuwus",
 
1066
  "llvm.ppc.altivec.vrefp",
 
1067
  "llvm.ppc.altivec.vrfim",
 
1068
  "llvm.ppc.altivec.vrfin",
 
1069
  "llvm.ppc.altivec.vrfip",
 
1070
  "llvm.ppc.altivec.vrfiz",
 
1071
  "llvm.ppc.altivec.vrlb",
 
1072
  "llvm.ppc.altivec.vrlh",
 
1073
  "llvm.ppc.altivec.vrlw",
 
1074
  "llvm.ppc.altivec.vrsqrtefp",
 
1075
  "llvm.ppc.altivec.vsel",
 
1076
  "llvm.ppc.altivec.vsl",
 
1077
  "llvm.ppc.altivec.vslb",
 
1078
  "llvm.ppc.altivec.vslh",
 
1079
  "llvm.ppc.altivec.vslo",
 
1080
  "llvm.ppc.altivec.vslw",
 
1081
  "llvm.ppc.altivec.vsr",
 
1082
  "llvm.ppc.altivec.vsrab",
 
1083
  "llvm.ppc.altivec.vsrah",
 
1084
  "llvm.ppc.altivec.vsraw",
 
1085
  "llvm.ppc.altivec.vsrb",
 
1086
  "llvm.ppc.altivec.vsrh",
 
1087
  "llvm.ppc.altivec.vsro",
 
1088
  "llvm.ppc.altivec.vsrw",
 
1089
  "llvm.ppc.altivec.vsubcuw",
 
1090
  "llvm.ppc.altivec.vsubsbs",
 
1091
  "llvm.ppc.altivec.vsubshs",
 
1092
  "llvm.ppc.altivec.vsubsws",
 
1093
  "llvm.ppc.altivec.vsububs",
 
1094
  "llvm.ppc.altivec.vsubuhs",
 
1095
  "llvm.ppc.altivec.vsubuws",
 
1096
  "llvm.ppc.altivec.vsum2sws",
 
1097
  "llvm.ppc.altivec.vsum4sbs",
 
1098
  "llvm.ppc.altivec.vsum4shs",
 
1099
  "llvm.ppc.altivec.vsum4ubs",
 
1100
  "llvm.ppc.altivec.vsumsws",
 
1101
  "llvm.ppc.altivec.vupkhpx",
 
1102
  "llvm.ppc.altivec.vupkhsb",
 
1103
  "llvm.ppc.altivec.vupkhsh",
 
1104
  "llvm.ppc.altivec.vupklpx",
 
1105
  "llvm.ppc.altivec.vupklsb",
 
1106
  "llvm.ppc.altivec.vupklsh",
 
1107
  "llvm.ppc.dcba",
 
1108
  "llvm.ppc.dcbf",
 
1109
  "llvm.ppc.dcbi",
 
1110
  "llvm.ppc.dcbst",
 
1111
  "llvm.ppc.dcbt",
 
1112
  "llvm.ppc.dcbtst",
 
1113
  "llvm.ppc.dcbz",
 
1114
  "llvm.ppc.dcbzl",
 
1115
  "llvm.ppc.sync",
 
1116
  "llvm.prefetch",
 
1117
  "llvm.ptr.annotation",
 
1118
  "llvm.readcyclecounter",
 
1119
  "llvm.returnaddress",
 
1120
  "llvm.sadd.with.overflow",
 
1121
  "llvm.setjmp",
 
1122
  "llvm.siglongjmp",
 
1123
  "llvm.sigsetjmp",
 
1124
  "llvm.sin",
 
1125
  "llvm.smul.with.overflow",
 
1126
  "llvm.spu.si.a",
 
1127
  "llvm.spu.si.addx",
 
1128
  "llvm.spu.si.ah",
 
1129
  "llvm.spu.si.ahi",
 
1130
  "llvm.spu.si.ai",
 
1131
  "llvm.spu.si.and",
 
1132
  "llvm.spu.si.andbi",
 
1133
  "llvm.spu.si.andc",
 
1134
  "llvm.spu.si.andhi",
 
1135
  "llvm.spu.si.andi",
 
1136
  "llvm.spu.si.bg",
 
1137
  "llvm.spu.si.bgx",
 
1138
  "llvm.spu.si.ceq",
 
1139
  "llvm.spu.si.ceqb",
 
1140
  "llvm.spu.si.ceqbi",
 
1141
  "llvm.spu.si.ceqh",
 
1142
  "llvm.spu.si.ceqhi",
 
1143
  "llvm.spu.si.ceqi",
 
1144
  "llvm.spu.si.cg",
 
1145
  "llvm.spu.si.cgt",
 
1146
  "llvm.spu.si.cgtb",
 
1147
  "llvm.spu.si.cgtbi",
 
1148
  "llvm.spu.si.cgth",
 
1149
  "llvm.spu.si.cgthi",
 
1150
  "llvm.spu.si.cgti",
 
1151
  "llvm.spu.si.cgx",
 
1152
  "llvm.spu.si.clgt",
 
1153
  "llvm.spu.si.clgtb",
 
1154
  "llvm.spu.si.clgtbi",
 
1155
  "llvm.spu.si.clgth",
 
1156
  "llvm.spu.si.clgthi",
 
1157
  "llvm.spu.si.clgti",
 
1158
  "llvm.spu.si.dfa",
 
1159
  "llvm.spu.si.dfm",
 
1160
  "llvm.spu.si.dfma",
 
1161
  "llvm.spu.si.dfms",
 
1162
  "llvm.spu.si.dfnma",
 
1163
  "llvm.spu.si.dfnms",
 
1164
  "llvm.spu.si.dfs",
 
1165
  "llvm.spu.si.fa",
 
1166
  "llvm.spu.si.fceq",
 
1167
  "llvm.spu.si.fcgt",
 
1168
  "llvm.spu.si.fcmeq",
 
1169
  "llvm.spu.si.fcmgt",
 
1170
  "llvm.spu.si.fm",
 
1171
  "llvm.spu.si.fma",
 
1172
  "llvm.spu.si.fms",
 
1173
  "llvm.spu.si.fnms",
 
1174
  "llvm.spu.si.fs",
 
1175
  "llvm.spu.si.fsmbi",
 
1176
  "llvm.spu.si.mpy",
 
1177
  "llvm.spu.si.mpya",
 
1178
  "llvm.spu.si.mpyh",
 
1179
  "llvm.spu.si.mpyhh",
 
1180
  "llvm.spu.si.mpyhha",
 
1181
  "llvm.spu.si.mpyhhau",
 
1182
  "llvm.spu.si.mpyhhu",
 
1183
  "llvm.spu.si.mpyi",
 
1184
  "llvm.spu.si.mpys",
 
1185
  "llvm.spu.si.mpyu",
 
1186
  "llvm.spu.si.mpyui",
 
1187
  "llvm.spu.si.nand",
 
1188
  "llvm.spu.si.nor",
 
1189
  "llvm.spu.si.or",
 
1190
  "llvm.spu.si.orbi",
 
1191
  "llvm.spu.si.orc",
 
1192
  "llvm.spu.si.orhi",
 
1193
  "llvm.spu.si.ori",
 
1194
  "llvm.spu.si.sf",
 
1195
  "llvm.spu.si.sfh",
 
1196
  "llvm.spu.si.sfhi",
 
1197
  "llvm.spu.si.sfi",
 
1198
  "llvm.spu.si.sfx",
 
1199
  "llvm.spu.si.shli",
 
1200
  "llvm.spu.si.shlqbi",
 
1201
  "llvm.spu.si.shlqbii",
 
1202
  "llvm.spu.si.shlqby",
 
1203
  "llvm.spu.si.shlqbyi",
 
1204
  "llvm.spu.si.xor",
 
1205
  "llvm.spu.si.xorbi",
 
1206
  "llvm.spu.si.xorhi",
 
1207
  "llvm.spu.si.xori",
 
1208
  "llvm.sqrt",
 
1209
  "llvm.ssub.with.overflow",
 
1210
  "llvm.stackprotector",
 
1211
  "llvm.stackrestore",
 
1212
  "llvm.stacksave",
 
1213
  "llvm.trap",
 
1214
  "llvm.uadd.with.overflow",
 
1215
  "llvm.umul.with.overflow",
 
1216
  "llvm.usub.with.overflow",
 
1217
  "llvm.va_copy",
 
1218
  "llvm.va_end",
 
1219
  "llvm.var.annotation",
 
1220
  "llvm.va_start",
 
1221
  "llvm.x86.mmx.emms",
 
1222
  "llvm.x86.mmx.femms",
 
1223
  "llvm.x86.mmx.maskmovq",
 
1224
  "llvm.x86.mmx.movnt.dq",
 
1225
  "llvm.x86.mmx.packssdw",
 
1226
  "llvm.x86.mmx.packsswb",
 
1227
  "llvm.x86.mmx.packuswb",
 
1228
  "llvm.x86.mmx.padds.b",
 
1229
  "llvm.x86.mmx.padds.w",
 
1230
  "llvm.x86.mmx.paddus.b",
 
1231
  "llvm.x86.mmx.paddus.w",
 
1232
  "llvm.x86.mmx.pavg.b",
 
1233
  "llvm.x86.mmx.pavg.w",
 
1234
  "llvm.x86.mmx.pcmpeq.b",
 
1235
  "llvm.x86.mmx.pcmpeq.d",
 
1236
  "llvm.x86.mmx.pcmpeq.w",
 
1237
  "llvm.x86.mmx.pcmpgt.b",
 
1238
  "llvm.x86.mmx.pcmpgt.d",
 
1239
  "llvm.x86.mmx.pcmpgt.w",
 
1240
  "llvm.x86.mmx.pmadd.wd",
 
1241
  "llvm.x86.mmx.pmaxs.w",
 
1242
  "llvm.x86.mmx.pmaxu.b",
 
1243
  "llvm.x86.mmx.pmins.w",
 
1244
  "llvm.x86.mmx.pminu.b",
 
1245
  "llvm.x86.mmx.pmovmskb",
 
1246
  "llvm.x86.mmx.pmulh.w",
 
1247
  "llvm.x86.mmx.pmulhu.w",
 
1248
  "llvm.x86.mmx.pmulu.dq",
 
1249
  "llvm.x86.mmx.psad.bw",
 
1250
  "llvm.x86.mmx.psll.d",
 
1251
  "llvm.x86.mmx.psll.q",
 
1252
  "llvm.x86.mmx.psll.w",
 
1253
  "llvm.x86.mmx.pslli.d",
 
1254
  "llvm.x86.mmx.pslli.q",
 
1255
  "llvm.x86.mmx.pslli.w",
 
1256
  "llvm.x86.mmx.psra.d",
 
1257
  "llvm.x86.mmx.psra.w",
 
1258
  "llvm.x86.mmx.psrai.d",
 
1259
  "llvm.x86.mmx.psrai.w",
 
1260
  "llvm.x86.mmx.psrl.d",
 
1261
  "llvm.x86.mmx.psrl.q",
 
1262
  "llvm.x86.mmx.psrl.w",
 
1263
  "llvm.x86.mmx.psrli.d",
 
1264
  "llvm.x86.mmx.psrli.q",
 
1265
  "llvm.x86.mmx.psrli.w",
 
1266
  "llvm.x86.mmx.psubs.b",
 
1267
  "llvm.x86.mmx.psubs.w",
 
1268
  "llvm.x86.mmx.psubus.b",
 
1269
  "llvm.x86.mmx.psubus.w",
 
1270
  "llvm.x86.sse2.add.sd",
 
1271
  "llvm.x86.sse2.clflush",
 
1272
  "llvm.x86.sse2.cmp.pd",
 
1273
  "llvm.x86.sse2.cmp.sd",
 
1274
  "llvm.x86.sse2.comieq.sd",
 
1275
  "llvm.x86.sse2.comige.sd",
 
1276
  "llvm.x86.sse2.comigt.sd",
 
1277
  "llvm.x86.sse2.comile.sd",
 
1278
  "llvm.x86.sse2.comilt.sd",
 
1279
  "llvm.x86.sse2.comineq.sd",
 
1280
  "llvm.x86.sse2.cvtdq2pd",
 
1281
  "llvm.x86.sse2.cvtdq2ps",
 
1282
  "llvm.x86.sse2.cvtpd2dq",
 
1283
  "llvm.x86.sse2.cvtpd2ps",
 
1284
  "llvm.x86.sse2.cvtps2dq",
 
1285
  "llvm.x86.sse2.cvtps2pd",
 
1286
  "llvm.x86.sse2.cvtsd2si",
 
1287
  "llvm.x86.sse2.cvtsd2si64",
 
1288
  "llvm.x86.sse2.cvtsd2ss",
 
1289
  "llvm.x86.sse2.cvtsi2sd",
 
1290
  "llvm.x86.sse2.cvtsi642sd",
 
1291
  "llvm.x86.sse2.cvtss2sd",
 
1292
  "llvm.x86.sse2.cvttpd2dq",
 
1293
  "llvm.x86.sse2.cvttps2dq",
 
1294
  "llvm.x86.sse2.cvttsd2si",
 
1295
  "llvm.x86.sse2.cvttsd2si64",
 
1296
  "llvm.x86.sse2.div.sd",
 
1297
  "llvm.x86.sse2.lfence",
 
1298
  "llvm.x86.sse2.loadu.dq",
 
1299
  "llvm.x86.sse2.loadu.pd",
 
1300
  "llvm.x86.sse2.maskmov.dqu",
 
1301
  "llvm.x86.sse2.max.pd",
 
1302
  "llvm.x86.sse2.max.sd",
 
1303
  "llvm.x86.sse2.mfence",
 
1304
  "llvm.x86.sse2.min.pd",
 
1305
  "llvm.x86.sse2.min.sd",
 
1306
  "llvm.x86.sse2.movmsk.pd",
 
1307
  "llvm.x86.sse2.movnt.dq",
 
1308
  "llvm.x86.sse2.movnt.i",
 
1309
  "llvm.x86.sse2.movnt.pd",
 
1310
  "llvm.x86.sse2.mul.sd",
 
1311
  "llvm.x86.sse2.packssdw.128",
 
1312
  "llvm.x86.sse2.packsswb.128",
 
1313
  "llvm.x86.sse2.packuswb.128",
 
1314
  "llvm.x86.sse2.padds.b",
 
1315
  "llvm.x86.sse2.padds.w",
 
1316
  "llvm.x86.sse2.paddus.b",
 
1317
  "llvm.x86.sse2.paddus.w",
 
1318
  "llvm.x86.sse2.pavg.b",
 
1319
  "llvm.x86.sse2.pavg.w",
 
1320
  "llvm.x86.sse2.pcmpeq.b",
 
1321
  "llvm.x86.sse2.pcmpeq.d",
 
1322
  "llvm.x86.sse2.pcmpeq.w",
 
1323
  "llvm.x86.sse2.pcmpgt.b",
 
1324
  "llvm.x86.sse2.pcmpgt.d",
 
1325
  "llvm.x86.sse2.pcmpgt.w",
 
1326
  "llvm.x86.sse2.pmadd.wd",
 
1327
  "llvm.x86.sse2.pmaxs.w",
 
1328
  "llvm.x86.sse2.pmaxu.b",
 
1329
  "llvm.x86.sse2.pmins.w",
 
1330
  "llvm.x86.sse2.pminu.b",
 
1331
  "llvm.x86.sse2.pmovmskb.128",
 
1332
  "llvm.x86.sse2.pmulh.w",
 
1333
  "llvm.x86.sse2.pmulhu.w",
 
1334
  "llvm.x86.sse2.pmulu.dq",
 
1335
  "llvm.x86.sse2.psad.bw",
 
1336
  "llvm.x86.sse2.psll.d",
 
1337
  "llvm.x86.sse2.psll.dq",
 
1338
  "llvm.x86.sse2.psll.dq.bs",
 
1339
  "llvm.x86.sse2.psll.q",
 
1340
  "llvm.x86.sse2.psll.w",
 
1341
  "llvm.x86.sse2.pslli.d",
 
1342
  "llvm.x86.sse2.pslli.q",
 
1343
  "llvm.x86.sse2.pslli.w",
 
1344
  "llvm.x86.sse2.psra.d",
 
1345
  "llvm.x86.sse2.psra.w",
 
1346
  "llvm.x86.sse2.psrai.d",
 
1347
  "llvm.x86.sse2.psrai.w",
 
1348
  "llvm.x86.sse2.psrl.d",
 
1349
  "llvm.x86.sse2.psrl.dq",
 
1350
  "llvm.x86.sse2.psrl.dq.bs",
 
1351
  "llvm.x86.sse2.psrl.q",
 
1352
  "llvm.x86.sse2.psrl.w",
 
1353
  "llvm.x86.sse2.psrli.d",
 
1354
  "llvm.x86.sse2.psrli.q",
 
1355
  "llvm.x86.sse2.psrli.w",
 
1356
  "llvm.x86.sse2.psubs.b",
 
1357
  "llvm.x86.sse2.psubs.w",
 
1358
  "llvm.x86.sse2.psubus.b",
 
1359
  "llvm.x86.sse2.psubus.w",
 
1360
  "llvm.x86.sse2.sqrt.pd",
 
1361
  "llvm.x86.sse2.sqrt.sd",
 
1362
  "llvm.x86.sse2.storel.dq",
 
1363
  "llvm.x86.sse2.storeu.dq",
 
1364
  "llvm.x86.sse2.storeu.pd",
 
1365
  "llvm.x86.sse2.sub.sd",
 
1366
  "llvm.x86.sse2.ucomieq.sd",
 
1367
  "llvm.x86.sse2.ucomige.sd",
 
1368
  "llvm.x86.sse2.ucomigt.sd",
 
1369
  "llvm.x86.sse2.ucomile.sd",
 
1370
  "llvm.x86.sse2.ucomilt.sd",
 
1371
  "llvm.x86.sse2.ucomineq.sd",
 
1372
  "llvm.x86.sse3.addsub.pd",
 
1373
  "llvm.x86.sse3.addsub.ps",
 
1374
  "llvm.x86.sse3.hadd.pd",
 
1375
  "llvm.x86.sse3.hadd.ps",
 
1376
  "llvm.x86.sse3.hsub.pd",
 
1377
  "llvm.x86.sse3.hsub.ps",
 
1378
  "llvm.x86.sse3.ldu.dq",
 
1379
  "llvm.x86.sse3.monitor",
 
1380
  "llvm.x86.sse3.mwait",
 
1381
  "llvm.x86.sse41.blendpd",
 
1382
  "llvm.x86.sse41.blendps",
 
1383
  "llvm.x86.sse41.blendvpd",
 
1384
  "llvm.x86.sse41.blendvps",
 
1385
  "llvm.x86.sse41.dppd",
 
1386
  "llvm.x86.sse41.dpps",
 
1387
  "llvm.x86.sse41.extractps",
 
1388
  "llvm.x86.sse41.insertps",
 
1389
  "llvm.x86.sse41.movntdqa",
 
1390
  "llvm.x86.sse41.mpsadbw",
 
1391
  "llvm.x86.sse41.packusdw",
 
1392
  "llvm.x86.sse41.pblendvb",
 
1393
  "llvm.x86.sse41.pblendw",
 
1394
  "llvm.x86.sse41.pcmpeqq",
 
1395
  "llvm.x86.sse41.pextrb",
 
1396
  "llvm.x86.sse41.pextrd",
 
1397
  "llvm.x86.sse41.pextrq",
 
1398
  "llvm.x86.sse41.phminposuw",
 
1399
  "llvm.x86.sse41.pmaxsb",
 
1400
  "llvm.x86.sse41.pmaxsd",
 
1401
  "llvm.x86.sse41.pmaxud",
 
1402
  "llvm.x86.sse41.pmaxuw",
 
1403
  "llvm.x86.sse41.pminsb",
 
1404
  "llvm.x86.sse41.pminsd",
 
1405
  "llvm.x86.sse41.pminud",
 
1406
  "llvm.x86.sse41.pminuw",
 
1407
  "llvm.x86.sse41.pmovsxbd",
 
1408
  "llvm.x86.sse41.pmovsxbq",
 
1409
  "llvm.x86.sse41.pmovsxbw",
 
1410
  "llvm.x86.sse41.pmovsxdq",
 
1411
  "llvm.x86.sse41.pmovsxwd",
 
1412
  "llvm.x86.sse41.pmovsxwq",
 
1413
  "llvm.x86.sse41.pmovzxbd",
 
1414
  "llvm.x86.sse41.pmovzxbq",
 
1415
  "llvm.x86.sse41.pmovzxbw",
 
1416
  "llvm.x86.sse41.pmovzxdq",
 
1417
  "llvm.x86.sse41.pmovzxwd",
 
1418
  "llvm.x86.sse41.pmovzxwq",
 
1419
  "llvm.x86.sse41.pmuldq",
 
1420
  "llvm.x86.sse41.pmulld",
 
1421
  "llvm.x86.sse41.ptestc",
 
1422
  "llvm.x86.sse41.ptestnzc",
 
1423
  "llvm.x86.sse41.ptestz",
 
1424
  "llvm.x86.sse41.round.pd",
 
1425
  "llvm.x86.sse41.round.ps",
 
1426
  "llvm.x86.sse41.round.sd",
 
1427
  "llvm.x86.sse41.round.ss",
 
1428
  "llvm.x86.sse42.crc32.16",
 
1429
  "llvm.x86.sse42.crc32.32",
 
1430
  "llvm.x86.sse42.crc32.64",
 
1431
  "llvm.x86.sse42.crc32.8",
 
1432
  "llvm.x86.sse42.pcmpestri128",
 
1433
  "llvm.x86.sse42.pcmpestria128",
 
1434
  "llvm.x86.sse42.pcmpestric128",
 
1435
  "llvm.x86.sse42.pcmpestrio128",
 
1436
  "llvm.x86.sse42.pcmpestris128",
 
1437
  "llvm.x86.sse42.pcmpestriz128",
 
1438
  "llvm.x86.sse42.pcmpestrm128",
 
1439
  "llvm.x86.sse42.pcmpgtq",
 
1440
  "llvm.x86.sse42.pcmpistri128",
 
1441
  "llvm.x86.sse42.pcmpistria128",
 
1442
  "llvm.x86.sse42.pcmpistric128",
 
1443
  "llvm.x86.sse42.pcmpistrio128",
 
1444
  "llvm.x86.sse42.pcmpistris128",
 
1445
  "llvm.x86.sse42.pcmpistriz128",
 
1446
  "llvm.x86.sse42.pcmpistrm128",
 
1447
  "llvm.x86.sse.add.ss",
 
1448
  "llvm.x86.sse.cmp.ps",
 
1449
  "llvm.x86.sse.cmp.ss",
 
1450
  "llvm.x86.sse.comieq.ss",
 
1451
  "llvm.x86.sse.comige.ss",
 
1452
  "llvm.x86.sse.comigt.ss",
 
1453
  "llvm.x86.sse.comile.ss",
 
1454
  "llvm.x86.sse.comilt.ss",
 
1455
  "llvm.x86.sse.comineq.ss",
 
1456
  "llvm.x86.sse.cvtpd2pi",
 
1457
  "llvm.x86.sse.cvtpi2pd",
 
1458
  "llvm.x86.sse.cvtpi2ps",
 
1459
  "llvm.x86.sse.cvtps2pi",
 
1460
  "llvm.x86.sse.cvtsi2ss",
 
1461
  "llvm.x86.sse.cvtsi642ss",
 
1462
  "llvm.x86.sse.cvtss2si",
 
1463
  "llvm.x86.sse.cvtss2si64",
 
1464
  "llvm.x86.sse.cvttpd2pi",
 
1465
  "llvm.x86.sse.cvttps2pi",
 
1466
  "llvm.x86.sse.cvttss2si",
 
1467
  "llvm.x86.sse.cvttss2si64",
 
1468
  "llvm.x86.sse.div.ss",
 
1469
  "llvm.x86.sse.ldmxcsr",
 
1470
  "llvm.x86.sse.loadu.ps",
 
1471
  "llvm.x86.sse.max.ps",
 
1472
  "llvm.x86.sse.max.ss",
 
1473
  "llvm.x86.sse.min.ps",
 
1474
  "llvm.x86.sse.min.ss",
 
1475
  "llvm.x86.sse.movmsk.ps",
 
1476
  "llvm.x86.sse.movnt.ps",
 
1477
  "llvm.x86.sse.mul.ss",
 
1478
  "llvm.x86.sse.rcp.ps",
 
1479
  "llvm.x86.sse.rcp.ss",
 
1480
  "llvm.x86.sse.rsqrt.ps",
 
1481
  "llvm.x86.sse.rsqrt.ss",
 
1482
  "llvm.x86.sse.sfence",
 
1483
  "llvm.x86.sse.sqrt.ps",
 
1484
  "llvm.x86.sse.sqrt.ss",
 
1485
  "llvm.x86.sse.stmxcsr",
 
1486
  "llvm.x86.sse.storeu.ps",
 
1487
  "llvm.x86.sse.sub.ss",
 
1488
  "llvm.x86.sse.ucomieq.ss",
 
1489
  "llvm.x86.sse.ucomige.ss",
 
1490
  "llvm.x86.sse.ucomigt.ss",
 
1491
  "llvm.x86.sse.ucomile.ss",
 
1492
  "llvm.x86.sse.ucomilt.ss",
 
1493
  "llvm.x86.sse.ucomineq.ss",
 
1494
  "llvm.x86.ssse3.pabs.b",
 
1495
  "llvm.x86.ssse3.pabs.b.128",
 
1496
  "llvm.x86.ssse3.pabs.d",
 
1497
  "llvm.x86.ssse3.pabs.d.128",
 
1498
  "llvm.x86.ssse3.pabs.w",
 
1499
  "llvm.x86.ssse3.pabs.w.128",
 
1500
  "llvm.x86.ssse3.palign.r",
 
1501
  "llvm.x86.ssse3.palign.r.128",
 
1502
  "llvm.x86.ssse3.phadd.d",
 
1503
  "llvm.x86.ssse3.phadd.d.128",
 
1504
  "llvm.x86.ssse3.phadd.sw",
 
1505
  "llvm.x86.ssse3.phadd.sw.128",
 
1506
  "llvm.x86.ssse3.phadd.w",
 
1507
  "llvm.x86.ssse3.phadd.w.128",
 
1508
  "llvm.x86.ssse3.phsub.d",
 
1509
  "llvm.x86.ssse3.phsub.d.128",
 
1510
  "llvm.x86.ssse3.phsub.sw",
 
1511
  "llvm.x86.ssse3.phsub.sw.128",
 
1512
  "llvm.x86.ssse3.phsub.w",
 
1513
  "llvm.x86.ssse3.phsub.w.128",
 
1514
  "llvm.x86.ssse3.pmadd.ub.sw",
 
1515
  "llvm.x86.ssse3.pmadd.ub.sw.128",
 
1516
  "llvm.x86.ssse3.pmul.hr.sw",
 
1517
  "llvm.x86.ssse3.pmul.hr.sw.128",
 
1518
  "llvm.x86.ssse3.pshuf.b",
 
1519
  "llvm.x86.ssse3.pshuf.b.128",
 
1520
  "llvm.x86.ssse3.psign.b",
 
1521
  "llvm.x86.ssse3.psign.b.128",
 
1522
  "llvm.x86.ssse3.psign.d",
 
1523
  "llvm.x86.ssse3.psign.d.128",
 
1524
  "llvm.x86.ssse3.psign.w",
 
1525
  "llvm.x86.ssse3.psign.w.128",
 
1526
  "llvm.xcore.bitrev",
 
1527
  "llvm.xcore.getid",
 
1528
#endif
 
1529
 
 
1530
// Intrinsic ID to overload table
 
1531
#ifdef GET_INTRINSIC_OVERLOAD_TABLE
 
1532
  // Note that entry #0 is the invalid intrinsic!
 
1533
  false,
 
1534
  true,
 
1535
  true,
 
1536
  true,
 
1537
  true,
 
1538
  true,
 
1539
  true,
 
1540
  true,
 
1541
  true,
 
1542
  true,
 
1543
  true,
 
1544
  false,
 
1545
  false,
 
1546
  false,
 
1547
  false,
 
1548
  true,
 
1549
  true,
 
1550
  true,
 
1551
  true,
 
1552
  true,
 
1553
  true,
 
1554
  true,
 
1555
  true,
 
1556
  true,
 
1557
  true,
 
1558
  true,
 
1559
  true,
 
1560
  true,
 
1561
  true,
 
1562
  true,
 
1563
  true,
 
1564
  true,
 
1565
  true,
 
1566
  true,
 
1567
  true,
 
1568
  true,
 
1569
  true,
 
1570
  true,
 
1571
  true,
 
1572
  true,
 
1573
  true,
 
1574
  true,
 
1575
  true,
 
1576
  true,
 
1577
  true,
 
1578
  true,
 
1579
  true,
 
1580
  true,
 
1581
  true,
 
1582
  true,
 
1583
  true,
 
1584
  true,
 
1585
  true,
 
1586
  true,
 
1587
  true,
 
1588
  true,
 
1589
  true,
 
1590
  true,
 
1591
  true,
 
1592
  true,
 
1593
  true,
 
1594
  true,
 
1595
  true,
 
1596
  true,
 
1597
  true,
 
1598
  true,
 
1599
  true,
 
1600
  true,
 
1601
  true,
 
1602
  true,
 
1603
  true,
 
1604
  true,
 
1605
  true,
 
1606
  true,
 
1607
  true,
 
1608
  true,
 
1609
  true,
 
1610
  true,
 
1611
  true,
 
1612
  true,
 
1613
  true,
 
1614
  true,
 
1615
  true,
 
1616
  true,
 
1617
  true,
 
1618
  true,
 
1619
  true,
 
1620
  true,
 
1621
  true,
 
1622
  true,
 
1623
  true,
 
1624
  true,
 
1625
  true,
 
1626
  true,
 
1627
  true,
 
1628
  true,
 
1629
  true,
 
1630
  true,
 
1631
  true,
 
1632
  true,
 
1633
  true,
 
1634
  true,
 
1635
  true,
 
1636
  true,
 
1637
  true,
 
1638
  true,
 
1639
  true,
 
1640
  true,
 
1641
  true,
 
1642
  true,
 
1643
  true,
 
1644
  true,
 
1645
  true,
 
1646
  true,
 
1647
  true,
 
1648
  true,
 
1649
  false,
 
1650
  false,
 
1651
  false,
 
1652
  false,
 
1653
  false,
 
1654
  false,
 
1655
  false,
 
1656
  false,
 
1657
  false,
 
1658
  true,
 
1659
  true,
 
1660
  true,
 
1661
  true,
 
1662
  true,
 
1663
  true,
 
1664
  true,
 
1665
  true,
 
1666
  true,
 
1667
  true,
 
1668
  true,
 
1669
  true,
 
1670
  true,
 
1671
  true,
 
1672
  true,
 
1673
  true,
 
1674
  true,
 
1675
  true,
 
1676
  true,
 
1677
  true,
 
1678
  true,
 
1679
  true,
 
1680
  true,
 
1681
  true,
 
1682
  true,
 
1683
  true,
 
1684
  false,
 
1685
  false,
 
1686
  false,
 
1687
  false,
 
1688
  false,
 
1689
  false,
 
1690
  false,
 
1691
  false,
 
1692
  false,
 
1693
  false,
 
1694
  false,
 
1695
  false,
 
1696
  false,
 
1697
  true,
 
1698
  true,
 
1699
  false,
 
1700
  false,
 
1701
  false,
 
1702
  false,
 
1703
  false,
 
1704
  false,
 
1705
  false,
 
1706
  false,
 
1707
  false,
 
1708
  false,
 
1709
  true,
 
1710
  true,
 
1711
  true,
 
1712
  false,
 
1713
  true,
 
1714
  true,
 
1715
  false,
 
1716
  true,
 
1717
  true,
 
1718
  false,
 
1719
  true,
 
1720
  true,
 
1721
  false,
 
1722
  false,
 
1723
  false,
 
1724
  false,
 
1725
  false,
 
1726
  false,
 
1727
  false,
 
1728
  false,
 
1729
  false,
 
1730
  false,
 
1731
  false,
 
1732
  false,
 
1733
  false,
 
1734
  false,
 
1735
  false,
 
1736
  false,
 
1737
  false,
 
1738
  false,
 
1739
  false,
 
1740
  false,
 
1741
  false,
 
1742
  false,
 
1743
  false,
 
1744
  false,
 
1745
  false,
 
1746
  false,
 
1747
  false,
 
1748
  false,
 
1749
  false,
 
1750
  false,
 
1751
  false,
 
1752
  false,
 
1753
  false,
 
1754
  false,
 
1755
  false,
 
1756
  false,
 
1757
  false,
 
1758
  false,
 
1759
  false,
 
1760
  false,
 
1761
  false,
 
1762
  false,
 
1763
  false,
 
1764
  false,
 
1765
  false,
 
1766
  false,
 
1767
  false,
 
1768
  false,
 
1769
  false,
 
1770
  false,
 
1771
  false,
 
1772
  false,
 
1773
  false,
 
1774
  false,
 
1775
  false,
 
1776
  false,
 
1777
  false,
 
1778
  false,
 
1779
  false,
 
1780
  false,
 
1781
  false,
 
1782
  false,
 
1783
  false,
 
1784
  false,
 
1785
  false,
 
1786
  false,
 
1787
  false,
 
1788
  false,
 
1789
  false,
 
1790
  false,
 
1791
  false,
 
1792
  false,
 
1793
  false,
 
1794
  false,
 
1795
  false,
 
1796
  false,
 
1797
  false,
 
1798
  false,
 
1799
  false,
 
1800
  false,
 
1801
  false,
 
1802
  false,
 
1803
  false,
 
1804
  false,
 
1805
  false,
 
1806
  false,
 
1807
  false,
 
1808
  false,
 
1809
  false,
 
1810
  false,
 
1811
  false,
 
1812
  false,
 
1813
  false,
 
1814
  false,
 
1815
  false,
 
1816
  false,
 
1817
  false,
 
1818
  false,
 
1819
  false,
 
1820
  false,
 
1821
  false,
 
1822
  false,
 
1823
  false,
 
1824
  false,
 
1825
  false,
 
1826
  false,
 
1827
  false,
 
1828
  false,
 
1829
  false,
 
1830
  false,
 
1831
  false,
 
1832
  false,
 
1833
  false,
 
1834
  false,
 
1835
  false,
 
1836
  false,
 
1837
  false,
 
1838
  false,
 
1839
  false,
 
1840
  false,
 
1841
  false,
 
1842
  false,
 
1843
  false,
 
1844
  false,
 
1845
  false,
 
1846
  false,
 
1847
  false,
 
1848
  false,
 
1849
  false,
 
1850
  false,
 
1851
  false,
 
1852
  false,
 
1853
  false,
 
1854
  false,
 
1855
  false,
 
1856
  false,
 
1857
  false,
 
1858
  false,
 
1859
  false,
 
1860
  false,
 
1861
  false,
 
1862
  false,
 
1863
  false,
 
1864
  false,
 
1865
  false,
 
1866
  false,
 
1867
  false,
 
1868
  false,
 
1869
  false,
 
1870
  false,
 
1871
  false,
 
1872
  false,
 
1873
  false,
 
1874
  false,
 
1875
  false,
 
1876
  false,
 
1877
  false,
 
1878
  true,
 
1879
  false,
 
1880
  false,
 
1881
  true,
 
1882
  false,
 
1883
  false,
 
1884
  false,
 
1885
  true,
 
1886
  true,
 
1887
  false,
 
1888
  false,
 
1889
  false,
 
1890
  false,
 
1891
  false,
 
1892
  false,
 
1893
  false,
 
1894
  false,
 
1895
  false,
 
1896
  false,
 
1897
  false,
 
1898
  false,
 
1899
  false,
 
1900
  false,
 
1901
  false,
 
1902
  false,
 
1903
  false,
 
1904
  false,
 
1905
  false,
 
1906
  false,
 
1907
  false,
 
1908
  false,
 
1909
  false,
 
1910
  false,
 
1911
  false,
 
1912
  false,
 
1913
  false,
 
1914
  false,
 
1915
  false,
 
1916
  false,
 
1917
  false,
 
1918
  false,
 
1919
  false,
 
1920
  false,
 
1921
  false,
 
1922
  false,
 
1923
  false,
 
1924
  false,
 
1925
  false,
 
1926
  false,
 
1927
  false,
 
1928
  false,
 
1929
  false,
 
1930
  false,
 
1931
  false,
 
1932
  false,
 
1933
  false,
 
1934
  false,
 
1935
  false,
 
1936
  false,
 
1937
  false,
 
1938
  false,
 
1939
  false,
 
1940
  false,
 
1941
  false,
 
1942
  false,
 
1943
  false,
 
1944
  false,
 
1945
  false,
 
1946
  false,
 
1947
  false,
 
1948
  false,
 
1949
  false,
 
1950
  false,
 
1951
  false,
 
1952
  false,
 
1953
  false,
 
1954
  false,
 
1955
  false,
 
1956
  false,
 
1957
  false,
 
1958
  false,
 
1959
  false,
 
1960
  false,
 
1961
  false,
 
1962
  false,
 
1963
  false,
 
1964
  false,
 
1965
  false,
 
1966
  false,
 
1967
  false,
 
1968
  false,
 
1969
  true,
 
1970
  true,
 
1971
  false,
 
1972
  false,
 
1973
  false,
 
1974
  false,
 
1975
  true,
 
1976
  true,
 
1977
  true,
 
1978
  false,
 
1979
  false,
 
1980
  false,
 
1981
  false,
 
1982
  false,
 
1983
  false,
 
1984
  false,
 
1985
  false,
 
1986
  false,
 
1987
  false,
 
1988
  false,
 
1989
  false,
 
1990
  false,
 
1991
  false,
 
1992
  false,
 
1993
  false,
 
1994
  false,
 
1995
  false,
 
1996
  false,
 
1997
  false,
 
1998
  false,
 
1999
  false,
 
2000
  false,
 
2001
  false,
 
2002
  false,
 
2003
  false,
 
2004
  false,
 
2005
  false,
 
2006
  false,
 
2007
  false,
 
2008
  false,
 
2009
  false,
 
2010
  false,
 
2011
  false,
 
2012
  false,
 
2013
  false,
 
2014
  false,
 
2015
  false,
 
2016
  false,
 
2017
  false,
 
2018
  false,
 
2019
  false,
 
2020
  false,
 
2021
  false,
 
2022
  false,
 
2023
  false,
 
2024
  false,
 
2025
  false,
 
2026
  false,
 
2027
  false,
 
2028
  false,
 
2029
  false,
 
2030
  false,
 
2031
  false,
 
2032
  false,
 
2033
  false,
 
2034
  false,
 
2035
  false,
 
2036
  false,
 
2037
  false,
 
2038
  false,
 
2039
  false,
 
2040
  false,
 
2041
  false,
 
2042
  false,
 
2043
  false,
 
2044
  false,
 
2045
  false,
 
2046
  false,
 
2047
  false,
 
2048
  false,
 
2049
  false,
 
2050
  false,
 
2051
  false,
 
2052
  false,
 
2053
  false,
 
2054
  false,
 
2055
  false,
 
2056
  false,
 
2057
  false,
 
2058
  false,
 
2059
  false,
 
2060
  false,
 
2061
  false,
 
2062
  false,
 
2063
  false,
 
2064
  false,
 
2065
  false,
 
2066
  false,
 
2067
  false,
 
2068
  false,
 
2069
  false,
 
2070
  false,
 
2071
  false,
 
2072
  false,
 
2073
  false,
 
2074
  false,
 
2075
  false,
 
2076
  false,
 
2077
  false,
 
2078
  false,
 
2079
  false,
 
2080
  false,
 
2081
  false,
 
2082
  false,
 
2083
  false,
 
2084
  false,
 
2085
  false,
 
2086
  false,
 
2087
  false,
 
2088
  false,
 
2089
  false,
 
2090
  false,
 
2091
  false,
 
2092
  false,
 
2093
  false,
 
2094
  false,
 
2095
  false,
 
2096
  false,
 
2097
  false,
 
2098
  false,
 
2099
  false,
 
2100
  false,
 
2101
  false,
 
2102
  false,
 
2103
  false,
 
2104
  false,
 
2105
  false,
 
2106
  false,
 
2107
  false,
 
2108
  false,
 
2109
  false,
 
2110
  false,
 
2111
  false,
 
2112
  false,
 
2113
  false,
 
2114
  false,
 
2115
  false,
 
2116
  false,
 
2117
  false,
 
2118
  false,
 
2119
  false,
 
2120
  false,
 
2121
  false,
 
2122
  false,
 
2123
  false,
 
2124
  false,
 
2125
  false,
 
2126
  false,
 
2127
  false,
 
2128
  false,
 
2129
  false,
 
2130
  false,
 
2131
  false,
 
2132
  false,
 
2133
  false,
 
2134
  false,
 
2135
  false,
 
2136
  false,
 
2137
  false,
 
2138
  false,
 
2139
  false,
 
2140
  false,
 
2141
  false,
 
2142
  false,
 
2143
  false,
 
2144
  false,
 
2145
  false,
 
2146
  false,
 
2147
  false,
 
2148
  false,
 
2149
  false,
 
2150
  false,
 
2151
  false,
 
2152
  false,
 
2153
  false,
 
2154
  false,
 
2155
  false,
 
2156
  false,
 
2157
  false,
 
2158
  false,
 
2159
  false,
 
2160
  false,
 
2161
  false,
 
2162
  false,
 
2163
  false,
 
2164
  false,
 
2165
  false,
 
2166
  false,
 
2167
  false,
 
2168
  false,
 
2169
  false,
 
2170
  false,
 
2171
  false,
 
2172
  false,
 
2173
  false,
 
2174
  false,
 
2175
  false,
 
2176
  false,
 
2177
  false,
 
2178
  false,
 
2179
  false,
 
2180
  false,
 
2181
  false,
 
2182
  false,
 
2183
  false,
 
2184
  false,
 
2185
  false,
 
2186
  false,
 
2187
  false,
 
2188
  false,
 
2189
  false,
 
2190
  false,
 
2191
  false,
 
2192
  false,
 
2193
  false,
 
2194
  false,
 
2195
  false,
 
2196
  false,
 
2197
  false,
 
2198
  false,
 
2199
  false,
 
2200
  false,
 
2201
  false,
 
2202
  false,
 
2203
  false,
 
2204
  false,
 
2205
  false,
 
2206
  false,
 
2207
  false,
 
2208
  false,
 
2209
  false,
 
2210
  false,
 
2211
  false,
 
2212
  false,
 
2213
  false,
 
2214
  false,
 
2215
  false,
 
2216
  false,
 
2217
  false,
 
2218
  false,
 
2219
  false,
 
2220
  false,
 
2221
  false,
 
2222
  false,
 
2223
  false,
 
2224
  false,
 
2225
  false,
 
2226
  false,
 
2227
  false,
 
2228
  false,
 
2229
  false,
 
2230
  false,
 
2231
  false,
 
2232
  false,
 
2233
  false,
 
2234
  false,
 
2235
  false,
 
2236
  false,
 
2237
  false,
 
2238
  false,
 
2239
  false,
 
2240
  false,
 
2241
  false,
 
2242
  false,
 
2243
  false,
 
2244
  false,
 
2245
  false,
 
2246
  false,
 
2247
  false,
 
2248
  false,
 
2249
  false,
 
2250
  false,
 
2251
  false,
 
2252
  false,
 
2253
  false,
 
2254
  false,
 
2255
  false,
 
2256
  false,
 
2257
  false,
 
2258
  false,
 
2259
  false,
 
2260
  false,
 
2261
  false,
 
2262
  false,
 
2263
  false,
 
2264
  false,
 
2265
  false,
 
2266
  false,
 
2267
  false,
 
2268
  false,
 
2269
  false,
 
2270
  false,
 
2271
  false,
 
2272
  false,
 
2273
  false,
 
2274
  false,
 
2275
  false,
 
2276
  false,
 
2277
  false,
 
2278
  false,
 
2279
  false,
 
2280
  false,
 
2281
  false,
 
2282
  false,
 
2283
  false,
 
2284
  false,
 
2285
  false,
 
2286
  false,
 
2287
  false,
 
2288
  false,
 
2289
#endif
 
2290
 
 
2291
// Function name -> enum value recognizer code.
 
2292
#ifdef GET_FUNCTION_RECOGNIZER
 
2293
  switch (Name[5]) {
 
2294
  default:
 
2295
    break;
 
2296
  case 'a':
 
2297
    if (Len == 16 && !memcmp(Name, "llvm.alpha.umulh", 16)) return Intrinsic::alpha_umulh;
 
2298
    if (Len > 15 && !memcmp(Name, "llvm.annotation.", 16)) return Intrinsic::annotation;
 
2299
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vabals.", 21)) return Intrinsic::arm_neon_vabals;
 
2300
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vabalu.", 21)) return Intrinsic::arm_neon_vabalu;
 
2301
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabas.", 20)) return Intrinsic::arm_neon_vabas;
 
2302
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabau.", 20)) return Intrinsic::arm_neon_vabau;
 
2303
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vabdls.", 21)) return Intrinsic::arm_neon_vabdls;
 
2304
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vabdlu.", 21)) return Intrinsic::arm_neon_vabdlu;
 
2305
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabds.", 20)) return Intrinsic::arm_neon_vabds;
 
2306
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabdu.", 20)) return Intrinsic::arm_neon_vabdu;
 
2307
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vabs.", 19)) return Intrinsic::arm_neon_vabs;
 
2308
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacged", 20)) return Intrinsic::arm_neon_vacged;
 
2309
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgeq", 20)) return Intrinsic::arm_neon_vacgeq;
 
2310
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtd", 20)) return Intrinsic::arm_neon_vacgtd;
 
2311
    if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtq", 20)) return Intrinsic::arm_neon_vacgtq;
 
2312
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddhn.", 21)) return Intrinsic::arm_neon_vaddhn;
 
2313
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddls.", 21)) return Intrinsic::arm_neon_vaddls;
 
2314
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddlu.", 21)) return Intrinsic::arm_neon_vaddlu;
 
2315
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddws.", 21)) return Intrinsic::arm_neon_vaddws;
 
2316
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddwu.", 21)) return Intrinsic::arm_neon_vaddwu;
 
2317
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcls.", 19)) return Intrinsic::arm_neon_vcls;
 
2318
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vclz.", 19)) return Intrinsic::arm_neon_vclz;
 
2319
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcnt.", 19)) return Intrinsic::arm_neon_vcnt;
 
2320
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxs.", 25)) return Intrinsic::arm_neon_vcvtfp2fxs;
 
2321
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxu.", 25)) return Intrinsic::arm_neon_vcvtfp2fxu;
 
2322
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxs2fp.", 25)) return Intrinsic::arm_neon_vcvtfxs2fp;
 
2323
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxu2fp.", 25)) return Intrinsic::arm_neon_vcvtfxu2fp;
 
2324
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhadds.", 21)) return Intrinsic::arm_neon_vhadds;
 
2325
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhaddu.", 21)) return Intrinsic::arm_neon_vhaddu;
 
2326
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubs.", 21)) return Intrinsic::arm_neon_vhsubs;
 
2327
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubu.", 21)) return Intrinsic::arm_neon_vhsubu;
 
2328
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld1.", 19)) return Intrinsic::arm_neon_vld1;
 
2329
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld2.", 19)) return Intrinsic::arm_neon_vld2;
 
2330
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld2lane.", 23)) return Intrinsic::arm_neon_vld2lane;
 
2331
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld3.", 19)) return Intrinsic::arm_neon_vld3;
 
2332
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld3lane.", 23)) return Intrinsic::arm_neon_vld3lane;
 
2333
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld4.", 19)) return Intrinsic::arm_neon_vld4;
 
2334
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld4lane.", 23)) return Intrinsic::arm_neon_vld4lane;
 
2335
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxs.", 20)) return Intrinsic::arm_neon_vmaxs;
 
2336
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxu.", 20)) return Intrinsic::arm_neon_vmaxu;
 
2337
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmins.", 20)) return Intrinsic::arm_neon_vmins;
 
2338
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vminu.", 20)) return Intrinsic::arm_neon_vminu;
 
2339
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmlals.", 21)) return Intrinsic::arm_neon_vmlals;
 
2340
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmlalu.", 21)) return Intrinsic::arm_neon_vmlalu;
 
2341
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmlsls.", 21)) return Intrinsic::arm_neon_vmlsls;
 
2342
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmlslu.", 21)) return Intrinsic::arm_neon_vmlslu;
 
2343
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmovls.", 21)) return Intrinsic::arm_neon_vmovls;
 
2344
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmovlu.", 21)) return Intrinsic::arm_neon_vmovlu;
 
2345
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmovn.", 20)) return Intrinsic::arm_neon_vmovn;
 
2346
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmullp.", 21)) return Intrinsic::arm_neon_vmullp;
 
2347
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmulls.", 21)) return Intrinsic::arm_neon_vmulls;
 
2348
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmullu.", 21)) return Intrinsic::arm_neon_vmullu;
 
2349
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmulp.", 20)) return Intrinsic::arm_neon_vmulp;
 
2350
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadals.", 22)) return Intrinsic::arm_neon_vpadals;
 
2351
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadalu.", 22)) return Intrinsic::arm_neon_vpadalu;
 
2352
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vpadd.", 20)) return Intrinsic::arm_neon_vpadd;
 
2353
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddls.", 22)) return Intrinsic::arm_neon_vpaddls;
 
2354
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddlu.", 22)) return Intrinsic::arm_neon_vpaddlu;
 
2355
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxs.", 21)) return Intrinsic::arm_neon_vpmaxs;
 
2356
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxu.", 21)) return Intrinsic::arm_neon_vpmaxu;
 
2357
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmins.", 21)) return Intrinsic::arm_neon_vpmins;
 
2358
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpminu.", 21)) return Intrinsic::arm_neon_vpminu;
 
2359
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqabs.", 20)) return Intrinsic::arm_neon_vqabs;
 
2360
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqadds.", 21)) return Intrinsic::arm_neon_vqadds;
 
2361
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqaddu.", 21)) return Intrinsic::arm_neon_vqaddu;
 
2362
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlal.", 22)) return Intrinsic::arm_neon_vqdmlal;
 
2363
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlsl.", 22)) return Intrinsic::arm_neon_vqdmlsl;
 
2364
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmulh.", 22)) return Intrinsic::arm_neon_vqdmulh;
 
2365
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmull.", 22)) return Intrinsic::arm_neon_vqdmull;
 
2366
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovns.", 22)) return Intrinsic::arm_neon_vqmovns;
 
2367
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqmovnsu.", 23)) return Intrinsic::arm_neon_vqmovnsu;
 
2368
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovnu.", 22)) return Intrinsic::arm_neon_vqmovnu;
 
2369
    if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqneg.", 20)) return Intrinsic::arm_neon_vqneg;
 
2370
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqrdmulh.", 23)) return Intrinsic::arm_neon_vqrdmulh;
 
2371
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftns.", 25)) return Intrinsic::arm_neon_vqrshiftns;
 
2372
    if (Len > 25 && !memcmp(Name, "llvm.arm.neon.vqrshiftnsu.", 26)) return Intrinsic::arm_neon_vqrshiftnsu;
 
2373
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftnu.", 25)) return Intrinsic::arm_neon_vqrshiftnu;
 
2374
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshifts.", 24)) return Intrinsic::arm_neon_vqrshifts;
 
2375
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshiftu.", 24)) return Intrinsic::arm_neon_vqrshiftu;
 
2376
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftns.", 24)) return Intrinsic::arm_neon_vqshiftns;
 
2377
    if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqshiftnsu.", 25)) return Intrinsic::arm_neon_vqshiftnsu;
 
2378
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftnu.", 24)) return Intrinsic::arm_neon_vqshiftnu;
 
2379
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshifts.", 23)) return Intrinsic::arm_neon_vqshifts;
 
2380
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftsu.", 24)) return Intrinsic::arm_neon_vqshiftsu;
 
2381
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshiftu.", 23)) return Intrinsic::arm_neon_vqshiftu;
 
2382
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubs.", 21)) return Intrinsic::arm_neon_vqsubs;
 
2383
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubu.", 21)) return Intrinsic::arm_neon_vqsubu;
 
2384
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vraddhn.", 22)) return Intrinsic::arm_neon_vraddhn;
 
2385
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecpe.", 21)) return Intrinsic::arm_neon_vrecpe;
 
2386
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecps.", 21)) return Intrinsic::arm_neon_vrecps;
 
2387
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhadds.", 22)) return Intrinsic::arm_neon_vrhadds;
 
2388
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhaddu.", 22)) return Intrinsic::arm_neon_vrhaddu;
 
2389
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftn.", 23)) return Intrinsic::arm_neon_vrshiftn;
 
2390
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshifts.", 23)) return Intrinsic::arm_neon_vrshifts;
 
2391
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftu.", 23)) return Intrinsic::arm_neon_vrshiftu;
 
2392
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrte.", 22)) return Intrinsic::arm_neon_vrsqrte;
 
2393
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrts.", 22)) return Intrinsic::arm_neon_vrsqrts;
 
2394
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsubhn.", 22)) return Intrinsic::arm_neon_vrsubhn;
 
2395
    if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vshiftins.", 24)) return Intrinsic::arm_neon_vshiftins;
 
2396
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftls.", 23)) return Intrinsic::arm_neon_vshiftls;
 
2397
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftlu.", 23)) return Intrinsic::arm_neon_vshiftlu;
 
2398
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftn.", 22)) return Intrinsic::arm_neon_vshiftn;
 
2399
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshifts.", 22)) return Intrinsic::arm_neon_vshifts;
 
2400
    if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftu.", 22)) return Intrinsic::arm_neon_vshiftu;
 
2401
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst1.", 19)) return Intrinsic::arm_neon_vst1;
 
2402
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst2.", 19)) return Intrinsic::arm_neon_vst2;
 
2403
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst2lane.", 23)) return Intrinsic::arm_neon_vst2lane;
 
2404
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst3.", 19)) return Intrinsic::arm_neon_vst3;
 
2405
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst3lane.", 23)) return Intrinsic::arm_neon_vst3lane;
 
2406
    if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst4.", 19)) return Intrinsic::arm_neon_vst4;
 
2407
    if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst4lane.", 23)) return Intrinsic::arm_neon_vst4lane;
 
2408
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubhn.", 21)) return Intrinsic::arm_neon_vsubhn;
 
2409
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubls.", 21)) return Intrinsic::arm_neon_vsubls;
 
2410
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsublu.", 21)) return Intrinsic::arm_neon_vsublu;
 
2411
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubws.", 21)) return Intrinsic::arm_neon_vsubws;
 
2412
    if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubwu.", 21)) return Intrinsic::arm_neon_vsubwu;
 
2413
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl1", 19)) return Intrinsic::arm_neon_vtbl1;
 
2414
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl2", 19)) return Intrinsic::arm_neon_vtbl2;
 
2415
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl3", 19)) return Intrinsic::arm_neon_vtbl3;
 
2416
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl4", 19)) return Intrinsic::arm_neon_vtbl4;
 
2417
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx1", 19)) return Intrinsic::arm_neon_vtbx1;
 
2418
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx2", 19)) return Intrinsic::arm_neon_vtbx2;
 
2419
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx3", 19)) return Intrinsic::arm_neon_vtbx3;
 
2420
    if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx4", 19)) return Intrinsic::arm_neon_vtbx4;
 
2421
    if (Len == 23 && !memcmp(Name, "llvm.arm.thread.pointer", 23)) return Intrinsic::arm_thread_pointer;
 
2422
    if (Len > 20 && !memcmp(Name, "llvm.atomic.cmp.swap.", 21)) return Intrinsic::atomic_cmp_swap;
 
2423
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.add.", 21)) return Intrinsic::atomic_load_add;
 
2424
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.and.", 21)) return Intrinsic::atomic_load_and;
 
2425
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.max.", 21)) return Intrinsic::atomic_load_max;
 
2426
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.min.", 21)) return Intrinsic::atomic_load_min;
 
2427
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.nand.", 22)) return Intrinsic::atomic_load_nand;
 
2428
    if (Len > 19 && !memcmp(Name, "llvm.atomic.load.or.", 20)) return Intrinsic::atomic_load_or;
 
2429
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.sub.", 21)) return Intrinsic::atomic_load_sub;
 
2430
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umax.", 22)) return Intrinsic::atomic_load_umax;
 
2431
    if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umin.", 22)) return Intrinsic::atomic_load_umin;
 
2432
    if (Len > 20 && !memcmp(Name, "llvm.atomic.load.xor.", 21)) return Intrinsic::atomic_load_xor;
 
2433
    if (Len > 16 && !memcmp(Name, "llvm.atomic.swap.", 17)) return Intrinsic::atomic_swap;
 
2434
    break;
 
2435
  case 'b':
 
2436
    if (Len > 10 && !memcmp(Name, "llvm.bswap.", 11)) return Intrinsic::bswap;
 
2437
    break;
 
2438
  case 'c':
 
2439
    if (Len > 14 && !memcmp(Name, "llvm.convertff.", 15)) return Intrinsic::convertff;
 
2440
    if (Len > 15 && !memcmp(Name, "llvm.convertfsi.", 16)) return Intrinsic::convertfsi;
 
2441
    if (Len > 15 && !memcmp(Name, "llvm.convertfui.", 16)) return Intrinsic::convertfui;
 
2442
    if (Len > 15 && !memcmp(Name, "llvm.convertsif.", 16)) return Intrinsic::convertsif;
 
2443
    if (Len > 14 && !memcmp(Name, "llvm.convertss.", 15)) return Intrinsic::convertss;
 
2444
    if (Len > 14 && !memcmp(Name, "llvm.convertsu.", 15)) return Intrinsic::convertsu;
 
2445
    if (Len > 15 && !memcmp(Name, "llvm.convertuif.", 16)) return Intrinsic::convertuif;
 
2446
    if (Len > 14 && !memcmp(Name, "llvm.convertus.", 15)) return Intrinsic::convertus;
 
2447
    if (Len > 14 && !memcmp(Name, "llvm.convertuu.", 15)) return Intrinsic::convertuu;
 
2448
    if (Len > 8 && !memcmp(Name, "llvm.cos.", 9)) return Intrinsic::cos;
 
2449
    if (Len > 9 && !memcmp(Name, "llvm.ctlz.", 10)) return Intrinsic::ctlz;
 
2450
    if (Len > 10 && !memcmp(Name, "llvm.ctpop.", 11)) return Intrinsic::ctpop;
 
2451
    if (Len > 9 && !memcmp(Name, "llvm.cttz.", 10)) return Intrinsic::cttz;
 
2452
    break;
 
2453
  case 'd':
 
2454
    if (Len == 16 && !memcmp(Name, "llvm.dbg.declare", 16)) return Intrinsic::dbg_declare;
 
2455
    if (Len == 14 && !memcmp(Name, "llvm.dbg.value", 14)) return Intrinsic::dbg_value;
 
2456
    break;
 
2457
  case 'e':
 
2458
    if (Len == 17 && !memcmp(Name, "llvm.eh.dwarf.cfa", 17)) return Intrinsic::eh_dwarf_cfa;
 
2459
    if (Len == 17 && !memcmp(Name, "llvm.eh.exception", 17)) return Intrinsic::eh_exception;
 
2460
    if (Len == 18 && !memcmp(Name, "llvm.eh.return.i32", 18)) return Intrinsic::eh_return_i32;
 
2461
    if (Len == 18 && !memcmp(Name, "llvm.eh.return.i64", 18)) return Intrinsic::eh_return_i64;
 
2462
    if (Len == 16 && !memcmp(Name, "llvm.eh.selector", 16)) return Intrinsic::eh_selector;
 
2463
    if (Len == 21 && !memcmp(Name, "llvm.eh.sjlj.callsite", 21)) return Intrinsic::eh_sjlj_callsite;
 
2464
    if (Len == 20 && !memcmp(Name, "llvm.eh.sjlj.longjmp", 20)) return Intrinsic::eh_sjlj_longjmp;
 
2465
    if (Len == 17 && !memcmp(Name, "llvm.eh.sjlj.lsda", 17)) return Intrinsic::eh_sjlj_lsda;
 
2466
    if (Len == 19 && !memcmp(Name, "llvm.eh.sjlj.setjmp", 19)) return Intrinsic::eh_sjlj_setjmp;
 
2467
    if (Len == 18 && !memcmp(Name, "llvm.eh.typeid.for", 18)) return Intrinsic::eh_typeid_for;
 
2468
    if (Len == 19 && !memcmp(Name, "llvm.eh.unwind.init", 19)) return Intrinsic::eh_unwind_init;
 
2469
    if (Len > 8 && !memcmp(Name, "llvm.exp.", 9)) return Intrinsic::exp;
 
2470
    if (Len > 9 && !memcmp(Name, "llvm.exp2.", 10)) return Intrinsic::exp2;
 
2471
    break;
 
2472
  case 'f':
 
2473
    if (Len == 15 && !memcmp(Name, "llvm.flt.rounds", 15)) return Intrinsic::flt_rounds;
 
2474
    if (Len == 17 && !memcmp(Name, "llvm.frameaddress", 17)) return Intrinsic::frameaddress;
 
2475
    break;
 
2476
  case 'g':
 
2477
    if (Len == 11 && !memcmp(Name, "llvm.gcread", 11)) return Intrinsic::gcread;
 
2478
    if (Len == 11 && !memcmp(Name, "llvm.gcroot", 11)) return Intrinsic::gcroot;
 
2479
    if (Len == 12 && !memcmp(Name, "llvm.gcwrite", 12)) return Intrinsic::gcwrite;
 
2480
    break;
 
2481
  case 'i':
 
2482
    if (Len == 20 && !memcmp(Name, "llvm.init.trampoline", 20)) return Intrinsic::init_trampoline;
 
2483
    if (Len == 18 && !memcmp(Name, "llvm.invariant.end", 18)) return Intrinsic::invariant_end;
 
2484
    if (Len == 20 && !memcmp(Name, "llvm.invariant.start", 20)) return Intrinsic::invariant_start;
 
2485
    break;
 
2486
  case 'l':
 
2487
    if (Len == 17 && !memcmp(Name, "llvm.lifetime.end", 17)) return Intrinsic::lifetime_end;
 
2488
    if (Len == 19 && !memcmp(Name, "llvm.lifetime.start", 19)) return Intrinsic::lifetime_start;
 
2489
    if (Len > 8 && !memcmp(Name, "llvm.log.", 9)) return Intrinsic::log;
 
2490
    if (Len > 10 && !memcmp(Name, "llvm.log10.", 11)) return Intrinsic::log10;
 
2491
    if (Len > 9 && !memcmp(Name, "llvm.log2.", 10)) return Intrinsic::log2;
 
2492
    if (Len == 12 && !memcmp(Name, "llvm.longjmp", 12)) return Intrinsic::longjmp;
 
2493
    break;
 
2494
  case 'm':
 
2495
    if (Len > 11 && !memcmp(Name, "llvm.memcpy.", 12)) return Intrinsic::memcpy;
 
2496
    if (Len > 12 && !memcmp(Name, "llvm.memmove.", 13)) return Intrinsic::memmove;
 
2497
    if (Len == 19 && !memcmp(Name, "llvm.memory.barrier", 19)) return Intrinsic::memory_barrier;
 
2498
    if (Len > 11 && !memcmp(Name, "llvm.memset.", 12)) return Intrinsic::memset;
 
2499
    break;
 
2500
  case 'o':
 
2501
    if (Len > 15 && !memcmp(Name, "llvm.objectsize.", 16)) return Intrinsic::objectsize;
 
2502
    break;
 
2503
  case 'p':
 
2504
    if (Len == 13 && !memcmp(Name, "llvm.pcmarker", 13)) return Intrinsic::pcmarker;
 
2505
    if (Len > 8 && !memcmp(Name, "llvm.pow.", 9)) return Intrinsic::pow;
 
2506
    if (Len > 9 && !memcmp(Name, "llvm.powi.", 10)) return Intrinsic::powi;
 
2507
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dss", 20)) return Intrinsic::ppc_altivec_dss;
 
2508
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dssall", 23)) return Intrinsic::ppc_altivec_dssall;
 
2509
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dst", 20)) return Intrinsic::ppc_altivec_dst;
 
2510
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.dstst", 22)) return Intrinsic::ppc_altivec_dstst;
 
2511
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dststt", 23)) return Intrinsic::ppc_altivec_dststt;
 
2512
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.dstt", 21)) return Intrinsic::ppc_altivec_dstt;
 
2513
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvebx", 22)) return Intrinsic::ppc_altivec_lvebx;
 
2514
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvehx", 22)) return Intrinsic::ppc_altivec_lvehx;
 
2515
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvewx", 22)) return Intrinsic::ppc_altivec_lvewx;
 
2516
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsl", 21)) return Intrinsic::ppc_altivec_lvsl;
 
2517
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsr", 21)) return Intrinsic::ppc_altivec_lvsr;
 
2518
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.lvx", 20)) return Intrinsic::ppc_altivec_lvx;
 
2519
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvxl", 21)) return Intrinsic::ppc_altivec_lvxl;
 
2520
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mfvscr", 23)) return Intrinsic::ppc_altivec_mfvscr;
 
2521
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mtvscr", 23)) return Intrinsic::ppc_altivec_mtvscr;
 
2522
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvebx", 23)) return Intrinsic::ppc_altivec_stvebx;
 
2523
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvehx", 23)) return Intrinsic::ppc_altivec_stvehx;
 
2524
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvewx", 23)) return Intrinsic::ppc_altivec_stvewx;
 
2525
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.stvx", 21)) return Intrinsic::ppc_altivec_stvx;
 
2526
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.stvxl", 22)) return Intrinsic::ppc_altivec_stvxl;
 
2527
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddcuw", 24)) return Intrinsic::ppc_altivec_vaddcuw;
 
2528
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsbs", 24)) return Intrinsic::ppc_altivec_vaddsbs;
 
2529
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddshs", 24)) return Intrinsic::ppc_altivec_vaddshs;
 
2530
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsws", 24)) return Intrinsic::ppc_altivec_vaddsws;
 
2531
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddubs", 24)) return Intrinsic::ppc_altivec_vaddubs;
 
2532
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduhs", 24)) return Intrinsic::ppc_altivec_vadduhs;
 
2533
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduws", 24)) return Intrinsic::ppc_altivec_vadduws;
 
2534
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsb", 23)) return Intrinsic::ppc_altivec_vavgsb;
 
2535
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsh", 23)) return Intrinsic::ppc_altivec_vavgsh;
 
2536
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsw", 23)) return Intrinsic::ppc_altivec_vavgsw;
 
2537
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgub", 23)) return Intrinsic::ppc_altivec_vavgub;
 
2538
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguh", 23)) return Intrinsic::ppc_altivec_vavguh;
 
2539
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguw", 23)) return Intrinsic::ppc_altivec_vavguw;
 
2540
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfsx", 22)) return Intrinsic::ppc_altivec_vcfsx;
 
2541
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfux", 22)) return Intrinsic::ppc_altivec_vcfux;
 
2542
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp", 24)) return Intrinsic::ppc_altivec_vcmpbfp;
 
2543
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp.p", 26)) return Intrinsic::ppc_altivec_vcmpbfp_p;
 
2544
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp", 25)) return Intrinsic::ppc_altivec_vcmpeqfp;
 
2545
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp.p", 27)) return Intrinsic::ppc_altivec_vcmpeqfp_p;
 
2546
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb", 25)) return Intrinsic::ppc_altivec_vcmpequb;
 
2547
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb.p", 27)) return Intrinsic::ppc_altivec_vcmpequb_p;
 
2548
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh", 25)) return Intrinsic::ppc_altivec_vcmpequh;
 
2549
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh.p", 27)) return Intrinsic::ppc_altivec_vcmpequh_p;
 
2550
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw", 25)) return Intrinsic::ppc_altivec_vcmpequw;
 
2551
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw.p", 27)) return Intrinsic::ppc_altivec_vcmpequw_p;
 
2552
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp", 25)) return Intrinsic::ppc_altivec_vcmpgefp;
 
2553
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp.p", 27)) return Intrinsic::ppc_altivec_vcmpgefp_p;
 
2554
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp", 25)) return Intrinsic::ppc_altivec_vcmpgtfp;
 
2555
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp.p", 27)) return Intrinsic::ppc_altivec_vcmpgtfp_p;
 
2556
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb", 25)) return Intrinsic::ppc_altivec_vcmpgtsb;
 
2557
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsb_p;
 
2558
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh", 25)) return Intrinsic::ppc_altivec_vcmpgtsh;
 
2559
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsh_p;
 
2560
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw", 25)) return Intrinsic::ppc_altivec_vcmpgtsw;
 
2561
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsw_p;
 
2562
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub", 25)) return Intrinsic::ppc_altivec_vcmpgtub;
 
2563
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub.p", 27)) return Intrinsic::ppc_altivec_vcmpgtub_p;
 
2564
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh", 25)) return Intrinsic::ppc_altivec_vcmpgtuh;
 
2565
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuh_p;
 
2566
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw", 25)) return Intrinsic::ppc_altivec_vcmpgtuw;
 
2567
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuw_p;
 
2568
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctsxs", 23)) return Intrinsic::ppc_altivec_vctsxs;
 
2569
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctuxs", 23)) return Intrinsic::ppc_altivec_vctuxs;
 
2570
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vexptefp", 25)) return Intrinsic::ppc_altivec_vexptefp;
 
2571
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vlogefp", 24)) return Intrinsic::ppc_altivec_vlogefp;
 
2572
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmaddfp", 24)) return Intrinsic::ppc_altivec_vmaddfp;
 
2573
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxfp", 23)) return Intrinsic::ppc_altivec_vmaxfp;
 
2574
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsb", 23)) return Intrinsic::ppc_altivec_vmaxsb;
 
2575
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsh", 23)) return Intrinsic::ppc_altivec_vmaxsh;
 
2576
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsw", 23)) return Intrinsic::ppc_altivec_vmaxsw;
 
2577
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxub", 23)) return Intrinsic::ppc_altivec_vmaxub;
 
2578
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuh", 23)) return Intrinsic::ppc_altivec_vmaxuh;
 
2579
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuw", 23)) return Intrinsic::ppc_altivec_vmaxuw;
 
2580
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmhaddshs", 26)) return Intrinsic::ppc_altivec_vmhaddshs;
 
2581
    if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vmhraddshs", 27)) return Intrinsic::ppc_altivec_vmhraddshs;
 
2582
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminfp", 23)) return Intrinsic::ppc_altivec_vminfp;
 
2583
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsb", 23)) return Intrinsic::ppc_altivec_vminsb;
 
2584
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsh", 23)) return Intrinsic::ppc_altivec_vminsh;
 
2585
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsw", 23)) return Intrinsic::ppc_altivec_vminsw;
 
2586
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminub", 23)) return Intrinsic::ppc_altivec_vminub;
 
2587
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuh", 23)) return Intrinsic::ppc_altivec_vminuh;
 
2588
    if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuw", 23)) return Intrinsic::ppc_altivec_vminuw;
 
2589
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmladduhm", 26)) return Intrinsic::ppc_altivec_vmladduhm;
 
2590
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsummbm", 25)) return Intrinsic::ppc_altivec_vmsummbm;
 
2591
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshm", 25)) return Intrinsic::ppc_altivec_vmsumshm;
 
2592
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshs", 25)) return Intrinsic::ppc_altivec_vmsumshs;
 
2593
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumubm", 25)) return Intrinsic::ppc_altivec_vmsumubm;
 
2594
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhm", 25)) return Intrinsic::ppc_altivec_vmsumuhm;
 
2595
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhs", 25)) return Intrinsic::ppc_altivec_vmsumuhs;
 
2596
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesb", 24)) return Intrinsic::ppc_altivec_vmulesb;
 
2597
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesh", 24)) return Intrinsic::ppc_altivec_vmulesh;
 
2598
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleub", 24)) return Intrinsic::ppc_altivec_vmuleub;
 
2599
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleuh", 24)) return Intrinsic::ppc_altivec_vmuleuh;
 
2600
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosb", 24)) return Intrinsic::ppc_altivec_vmulosb;
 
2601
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosh", 24)) return Intrinsic::ppc_altivec_vmulosh;
 
2602
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuloub", 24)) return Intrinsic::ppc_altivec_vmuloub;
 
2603
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulouh", 24)) return Intrinsic::ppc_altivec_vmulouh;
 
2604
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vnmsubfp", 25)) return Intrinsic::ppc_altivec_vnmsubfp;
 
2605
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vperm", 22)) return Intrinsic::ppc_altivec_vperm;
 
2606
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vpkpx", 22)) return Intrinsic::ppc_altivec_vpkpx;
 
2607
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshss", 24)) return Intrinsic::ppc_altivec_vpkshss;
 
2608
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshus", 24)) return Intrinsic::ppc_altivec_vpkshus;
 
2609
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswss", 24)) return Intrinsic::ppc_altivec_vpkswss;
 
2610
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswus", 24)) return Intrinsic::ppc_altivec_vpkswus;
 
2611
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuhus", 24)) return Intrinsic::ppc_altivec_vpkuhus;
 
2612
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuwus", 24)) return Intrinsic::ppc_altivec_vpkuwus;
 
2613
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrefp", 22)) return Intrinsic::ppc_altivec_vrefp;
 
2614
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfim", 22)) return Intrinsic::ppc_altivec_vrfim;
 
2615
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfin", 22)) return Intrinsic::ppc_altivec_vrfin;
 
2616
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfip", 22)) return Intrinsic::ppc_altivec_vrfip;
 
2617
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfiz", 22)) return Intrinsic::ppc_altivec_vrfiz;
 
2618
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlb", 21)) return Intrinsic::ppc_altivec_vrlb;
 
2619
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlh", 21)) return Intrinsic::ppc_altivec_vrlh;
 
2620
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlw", 21)) return Intrinsic::ppc_altivec_vrlw;
 
2621
    if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vrsqrtefp", 26)) return Intrinsic::ppc_altivec_vrsqrtefp;
 
2622
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsel", 21)) return Intrinsic::ppc_altivec_vsel;
 
2623
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsl", 20)) return Intrinsic::ppc_altivec_vsl;
 
2624
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslb", 21)) return Intrinsic::ppc_altivec_vslb;
 
2625
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslh", 21)) return Intrinsic::ppc_altivec_vslh;
 
2626
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslo", 21)) return Intrinsic::ppc_altivec_vslo;
 
2627
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslw", 21)) return Intrinsic::ppc_altivec_vslw;
 
2628
    if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsr", 20)) return Intrinsic::ppc_altivec_vsr;
 
2629
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrab", 22)) return Intrinsic::ppc_altivec_vsrab;
 
2630
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrah", 22)) return Intrinsic::ppc_altivec_vsrah;
 
2631
    if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsraw", 22)) return Intrinsic::ppc_altivec_vsraw;
 
2632
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrb", 21)) return Intrinsic::ppc_altivec_vsrb;
 
2633
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrh", 21)) return Intrinsic::ppc_altivec_vsrh;
 
2634
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsro", 21)) return Intrinsic::ppc_altivec_vsro;
 
2635
    if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrw", 21)) return Intrinsic::ppc_altivec_vsrw;
 
2636
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubcuw", 24)) return Intrinsic::ppc_altivec_vsubcuw;
 
2637
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsbs", 24)) return Intrinsic::ppc_altivec_vsubsbs;
 
2638
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubshs", 24)) return Intrinsic::ppc_altivec_vsubshs;
 
2639
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsws", 24)) return Intrinsic::ppc_altivec_vsubsws;
 
2640
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsububs", 24)) return Intrinsic::ppc_altivec_vsububs;
 
2641
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuhs", 24)) return Intrinsic::ppc_altivec_vsubuhs;
 
2642
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuws", 24)) return Intrinsic::ppc_altivec_vsubuws;
 
2643
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum2sws", 25)) return Intrinsic::ppc_altivec_vsum2sws;
 
2644
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4sbs", 25)) return Intrinsic::ppc_altivec_vsum4sbs;
 
2645
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4shs", 25)) return Intrinsic::ppc_altivec_vsum4shs;
 
2646
    if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4ubs", 25)) return Intrinsic::ppc_altivec_vsum4ubs;
 
2647
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsumsws", 24)) return Intrinsic::ppc_altivec_vsumsws;
 
2648
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhpx", 24)) return Intrinsic::ppc_altivec_vupkhpx;
 
2649
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsb", 24)) return Intrinsic::ppc_altivec_vupkhsb;
 
2650
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsh", 24)) return Intrinsic::ppc_altivec_vupkhsh;
 
2651
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklpx", 24)) return Intrinsic::ppc_altivec_vupklpx;
 
2652
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsb", 24)) return Intrinsic::ppc_altivec_vupklsb;
 
2653
    if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsh", 24)) return Intrinsic::ppc_altivec_vupklsh;
 
2654
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcba", 13)) return Intrinsic::ppc_dcba;
 
2655
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbf", 13)) return Intrinsic::ppc_dcbf;
 
2656
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbi", 13)) return Intrinsic::ppc_dcbi;
 
2657
    if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbst", 14)) return Intrinsic::ppc_dcbst;
 
2658
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbt", 13)) return Intrinsic::ppc_dcbt;
 
2659
    if (Len == 15 && !memcmp(Name, "llvm.ppc.dcbtst", 15)) return Intrinsic::ppc_dcbtst;
 
2660
    if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbz", 13)) return Intrinsic::ppc_dcbz;
 
2661
    if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbzl", 14)) return Intrinsic::ppc_dcbzl;
 
2662
    if (Len == 13 && !memcmp(Name, "llvm.ppc.sync", 13)) return Intrinsic::ppc_sync;
 
2663
    if (Len == 13 && !memcmp(Name, "llvm.prefetch", 13)) return Intrinsic::prefetch;
 
2664
    if (Len > 19 && !memcmp(Name, "llvm.ptr.annotation.", 20)) return Intrinsic::ptr_annotation;
 
2665
    break;
 
2666
  case 'r':
 
2667
    if (Len == 21 && !memcmp(Name, "llvm.readcyclecounter", 21)) return Intrinsic::readcyclecounter;
 
2668
    if (Len == 18 && !memcmp(Name, "llvm.returnaddress", 18)) return Intrinsic::returnaddress;
 
2669
    break;
 
2670
  case 's':
 
2671
    if (Len > 23 && !memcmp(Name, "llvm.sadd.with.overflow.", 24)) return Intrinsic::sadd_with_overflow;
 
2672
    if (Len == 11 && !memcmp(Name, "llvm.setjmp", 11)) return Intrinsic::setjmp;
 
2673
    if (Len == 15 && !memcmp(Name, "llvm.siglongjmp", 15)) return Intrinsic::siglongjmp;
 
2674
    if (Len == 14 && !memcmp(Name, "llvm.sigsetjmp", 14)) return Intrinsic::sigsetjmp;
 
2675
    if (Len > 8 && !memcmp(Name, "llvm.sin.", 9)) return Intrinsic::sin;
 
2676
    if (Len > 23 && !memcmp(Name, "llvm.smul.with.overflow.", 24)) return Intrinsic::smul_with_overflow;
 
2677
    if (Len == 13 && !memcmp(Name, "llvm.spu.si.a", 13)) return Intrinsic::spu_si_a;
 
2678
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.addx", 16)) return Intrinsic::spu_si_addx;
 
2679
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.ah", 14)) return Intrinsic::spu_si_ah;
 
2680
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ahi", 15)) return Intrinsic::spu_si_ahi;
 
2681
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.ai", 14)) return Intrinsic::spu_si_ai;
 
2682
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.and", 15)) return Intrinsic::spu_si_and;
 
2683
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.andbi", 17)) return Intrinsic::spu_si_andbi;
 
2684
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.andc", 16)) return Intrinsic::spu_si_andc;
 
2685
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.andhi", 17)) return Intrinsic::spu_si_andhi;
 
2686
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.andi", 16)) return Intrinsic::spu_si_andi;
 
2687
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.bg", 14)) return Intrinsic::spu_si_bg;
 
2688
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.bgx", 15)) return Intrinsic::spu_si_bgx;
 
2689
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ceq", 15)) return Intrinsic::spu_si_ceq;
 
2690
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqb", 16)) return Intrinsic::spu_si_ceqb;
 
2691
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqbi", 17)) return Intrinsic::spu_si_ceqbi;
 
2692
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqh", 16)) return Intrinsic::spu_si_ceqh;
 
2693
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqhi", 17)) return Intrinsic::spu_si_ceqhi;
 
2694
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqi", 16)) return Intrinsic::spu_si_ceqi;
 
2695
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.cg", 14)) return Intrinsic::spu_si_cg;
 
2696
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgt", 15)) return Intrinsic::spu_si_cgt;
 
2697
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgtb", 16)) return Intrinsic::spu_si_cgtb;
 
2698
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgtbi", 17)) return Intrinsic::spu_si_cgtbi;
 
2699
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgth", 16)) return Intrinsic::spu_si_cgth;
 
2700
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgthi", 17)) return Intrinsic::spu_si_cgthi;
 
2701
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgti", 16)) return Intrinsic::spu_si_cgti;
 
2702
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgx", 15)) return Intrinsic::spu_si_cgx;
 
2703
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.clgt", 16)) return Intrinsic::spu_si_clgt;
 
2704
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgtb", 17)) return Intrinsic::spu_si_clgtb;
 
2705
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgtbi", 18)) return Intrinsic::spu_si_clgtbi;
 
2706
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgth", 17)) return Intrinsic::spu_si_clgth;
 
2707
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgthi", 18)) return Intrinsic::spu_si_clgthi;
 
2708
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgti", 17)) return Intrinsic::spu_si_clgti;
 
2709
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfa", 15)) return Intrinsic::spu_si_dfa;
 
2710
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfm", 15)) return Intrinsic::spu_si_dfm;
 
2711
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfma", 16)) return Intrinsic::spu_si_dfma;
 
2712
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfms", 16)) return Intrinsic::spu_si_dfms;
 
2713
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnma", 17)) return Intrinsic::spu_si_dfnma;
 
2714
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnms", 17)) return Intrinsic::spu_si_dfnms;
 
2715
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfs", 15)) return Intrinsic::spu_si_dfs;
 
2716
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fa", 14)) return Intrinsic::spu_si_fa;
 
2717
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fceq", 16)) return Intrinsic::spu_si_fceq;
 
2718
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fcgt", 16)) return Intrinsic::spu_si_fcgt;
 
2719
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmeq", 17)) return Intrinsic::spu_si_fcmeq;
 
2720
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmgt", 17)) return Intrinsic::spu_si_fcmgt;
 
2721
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fm", 14)) return Intrinsic::spu_si_fm;
 
2722
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.fma", 15)) return Intrinsic::spu_si_fma;
 
2723
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.fms", 15)) return Intrinsic::spu_si_fms;
 
2724
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.fnms", 16)) return Intrinsic::spu_si_fnms;
 
2725
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.fs", 14)) return Intrinsic::spu_si_fs;
 
2726
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.fsmbi", 17)) return Intrinsic::spu_si_fsmbi;
 
2727
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.mpy", 15)) return Intrinsic::spu_si_mpy;
 
2728
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpya", 16)) return Intrinsic::spu_si_mpya;
 
2729
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyh", 16)) return Intrinsic::spu_si_mpyh;
 
2730
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyhh", 17)) return Intrinsic::spu_si_mpyhh;
 
2731
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhha", 18)) return Intrinsic::spu_si_mpyhha;
 
2732
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.mpyhhau", 19)) return Intrinsic::spu_si_mpyhhau;
 
2733
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhhu", 18)) return Intrinsic::spu_si_mpyhhu;
 
2734
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyi", 16)) return Intrinsic::spu_si_mpyi;
 
2735
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpys", 16)) return Intrinsic::spu_si_mpys;
 
2736
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyu", 16)) return Intrinsic::spu_si_mpyu;
 
2737
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyui", 17)) return Intrinsic::spu_si_mpyui;
 
2738
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.nand", 16)) return Intrinsic::spu_si_nand;
 
2739
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.nor", 15)) return Intrinsic::spu_si_nor;
 
2740
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.or", 14)) return Intrinsic::spu_si_or;
 
2741
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.orbi", 16)) return Intrinsic::spu_si_orbi;
 
2742
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.orc", 15)) return Intrinsic::spu_si_orc;
 
2743
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.orhi", 16)) return Intrinsic::spu_si_orhi;
 
2744
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.ori", 15)) return Intrinsic::spu_si_ori;
 
2745
    if (Len == 14 && !memcmp(Name, "llvm.spu.si.sf", 14)) return Intrinsic::spu_si_sf;
 
2746
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfh", 15)) return Intrinsic::spu_si_sfh;
 
2747
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.sfhi", 16)) return Intrinsic::spu_si_sfhi;
 
2748
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfi", 15)) return Intrinsic::spu_si_sfi;
 
2749
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfx", 15)) return Intrinsic::spu_si_sfx;
 
2750
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.shli", 16)) return Intrinsic::spu_si_shli;
 
2751
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqbi", 18)) return Intrinsic::spu_si_shlqbi;
 
2752
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbii", 19)) return Intrinsic::spu_si_shlqbii;
 
2753
    if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqby", 18)) return Intrinsic::spu_si_shlqby;
 
2754
    if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbyi", 19)) return Intrinsic::spu_si_shlqbyi;
 
2755
    if (Len == 15 && !memcmp(Name, "llvm.spu.si.xor", 15)) return Intrinsic::spu_si_xor;
 
2756
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorbi", 17)) return Intrinsic::spu_si_xorbi;
 
2757
    if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorhi", 17)) return Intrinsic::spu_si_xorhi;
 
2758
    if (Len == 16 && !memcmp(Name, "llvm.spu.si.xori", 16)) return Intrinsic::spu_si_xori;
 
2759
    if (Len > 9 && !memcmp(Name, "llvm.sqrt.", 10)) return Intrinsic::sqrt;
 
2760
    if (Len > 23 && !memcmp(Name, "llvm.ssub.with.overflow.", 24)) return Intrinsic::ssub_with_overflow;
 
2761
    if (Len == 19 && !memcmp(Name, "llvm.stackprotector", 19)) return Intrinsic::stackprotector;
 
2762
    if (Len == 17 && !memcmp(Name, "llvm.stackrestore", 17)) return Intrinsic::stackrestore;
 
2763
    if (Len == 14 && !memcmp(Name, "llvm.stacksave", 14)) return Intrinsic::stacksave;
 
2764
    break;
 
2765
  case 't':
 
2766
    if (Len == 9 && !memcmp(Name, "llvm.trap", 9)) return Intrinsic::trap;
 
2767
    break;
 
2768
  case 'u':
 
2769
    if (Len > 23 && !memcmp(Name, "llvm.uadd.with.overflow.", 24)) return Intrinsic::uadd_with_overflow;
 
2770
    if (Len > 23 && !memcmp(Name, "llvm.umul.with.overflow.", 24)) return Intrinsic::umul_with_overflow;
 
2771
    if (Len > 23 && !memcmp(Name, "llvm.usub.with.overflow.", 24)) return Intrinsic::usub_with_overflow;
 
2772
    break;
 
2773
  case 'v':
 
2774
    if (Len == 12 && !memcmp(Name, "llvm.va_copy", 12)) return Intrinsic::vacopy;
 
2775
    if (Len == 11 && !memcmp(Name, "llvm.va_end", 11)) return Intrinsic::vaend;
 
2776
    if (Len == 13 && !memcmp(Name, "llvm.va_start", 13)) return Intrinsic::vastart;
 
2777
    if (Len == 19 && !memcmp(Name, "llvm.var.annotation", 19)) return Intrinsic::var_annotation;
 
2778
    break;
 
2779
  case 'x':
 
2780
    if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.emms", 17)) return Intrinsic::x86_mmx_emms;
 
2781
    if (Len == 18 && !memcmp(Name, "llvm.x86.mmx.femms", 18)) return Intrinsic::x86_mmx_femms;
 
2782
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.maskmovq", 21)) return Intrinsic::x86_mmx_maskmovq;
 
2783
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.movnt.dq", 21)) return Intrinsic::x86_mmx_movnt_dq;
 
2784
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packssdw", 21)) return Intrinsic::x86_mmx_packssdw;
 
2785
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packsswb", 21)) return Intrinsic::x86_mmx_packsswb;
 
2786
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packuswb", 21)) return Intrinsic::x86_mmx_packuswb;
 
2787
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.b", 20)) return Intrinsic::x86_mmx_padds_b;
 
2788
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.w", 20)) return Intrinsic::x86_mmx_padds_w;
 
2789
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.b", 21)) return Intrinsic::x86_mmx_paddus_b;
 
2790
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.w", 21)) return Intrinsic::x86_mmx_paddus_w;
 
2791
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.b", 19)) return Intrinsic::x86_mmx_pavg_b;
 
2792
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.w", 19)) return Intrinsic::x86_mmx_pavg_w;
 
2793
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.b", 21)) return Intrinsic::x86_mmx_pcmpeq_b;
 
2794
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.d", 21)) return Intrinsic::x86_mmx_pcmpeq_d;
 
2795
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.w", 21)) return Intrinsic::x86_mmx_pcmpeq_w;
 
2796
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.b", 21)) return Intrinsic::x86_mmx_pcmpgt_b;
 
2797
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.d", 21)) return Intrinsic::x86_mmx_pcmpgt_d;
 
2798
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.w", 21)) return Intrinsic::x86_mmx_pcmpgt_w;
 
2799
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmadd.wd", 21)) return Intrinsic::x86_mmx_pmadd_wd;
 
2800
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxs.w", 20)) return Intrinsic::x86_mmx_pmaxs_w;
 
2801
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxu.b", 20)) return Intrinsic::x86_mmx_pmaxu_b;
 
2802
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmins.w", 20)) return Intrinsic::x86_mmx_pmins_w;
 
2803
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pminu.b", 20)) return Intrinsic::x86_mmx_pminu_b;
 
2804
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmovmskb", 21)) return Intrinsic::x86_mmx_pmovmskb;
 
2805
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmulh.w", 20)) return Intrinsic::x86_mmx_pmulh_w;
 
2806
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulhu.w", 21)) return Intrinsic::x86_mmx_pmulhu_w;
 
2807
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulu.dq", 21)) return Intrinsic::x86_mmx_pmulu_dq;
 
2808
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psad.bw", 20)) return Intrinsic::x86_mmx_psad_bw;
 
2809
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.d", 19)) return Intrinsic::x86_mmx_psll_d;
 
2810
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.q", 19)) return Intrinsic::x86_mmx_psll_q;
 
2811
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.w", 19)) return Intrinsic::x86_mmx_psll_w;
 
2812
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.d", 20)) return Intrinsic::x86_mmx_pslli_d;
 
2813
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.q", 20)) return Intrinsic::x86_mmx_pslli_q;
 
2814
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.w", 20)) return Intrinsic::x86_mmx_pslli_w;
 
2815
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.d", 19)) return Intrinsic::x86_mmx_psra_d;
 
2816
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.w", 19)) return Intrinsic::x86_mmx_psra_w;
 
2817
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.d", 20)) return Intrinsic::x86_mmx_psrai_d;
 
2818
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.w", 20)) return Intrinsic::x86_mmx_psrai_w;
 
2819
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.d", 19)) return Intrinsic::x86_mmx_psrl_d;
 
2820
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.q", 19)) return Intrinsic::x86_mmx_psrl_q;
 
2821
    if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.w", 19)) return Intrinsic::x86_mmx_psrl_w;
 
2822
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.d", 20)) return Intrinsic::x86_mmx_psrli_d;
 
2823
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.q", 20)) return Intrinsic::x86_mmx_psrli_q;
 
2824
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.w", 20)) return Intrinsic::x86_mmx_psrli_w;
 
2825
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.b", 20)) return Intrinsic::x86_mmx_psubs_b;
 
2826
    if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.w", 20)) return Intrinsic::x86_mmx_psubs_w;
 
2827
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.b", 21)) return Intrinsic::x86_mmx_psubus_b;
 
2828
    if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.w", 21)) return Intrinsic::x86_mmx_psubus_w;
 
2829
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.add.ss", 19)) return Intrinsic::x86_sse_add_ss;
 
2830
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ps", 19)) return Intrinsic::x86_sse_cmp_ps;
 
2831
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ss", 19)) return Intrinsic::x86_sse_cmp_ss;
 
2832
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comieq.ss", 22)) return Intrinsic::x86_sse_comieq_ss;
 
2833
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comige.ss", 22)) return Intrinsic::x86_sse_comige_ss;
 
2834
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comigt.ss", 22)) return Intrinsic::x86_sse_comigt_ss;
 
2835
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comile.ss", 22)) return Intrinsic::x86_sse_comile_ss;
 
2836
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comilt.ss", 22)) return Intrinsic::x86_sse_comilt_ss;
 
2837
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.comineq.ss", 23)) return Intrinsic::x86_sse_comineq_ss;
 
2838
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpd2pi", 21)) return Intrinsic::x86_sse_cvtpd2pi;
 
2839
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2pd", 21)) return Intrinsic::x86_sse_cvtpi2pd;
 
2840
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2ps", 21)) return Intrinsic::x86_sse_cvtpi2ps;
 
2841
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtps2pi", 21)) return Intrinsic::x86_sse_cvtps2pi;
 
2842
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtsi2ss", 21)) return Intrinsic::x86_sse_cvtsi2ss;
 
2843
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtsi642ss", 23)) return Intrinsic::x86_sse_cvtsi642ss;
 
2844
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtss2si", 21)) return Intrinsic::x86_sse_cvtss2si;
 
2845
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtss2si64", 23)) return Intrinsic::x86_sse_cvtss2si64;
 
2846
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttpd2pi", 22)) return Intrinsic::x86_sse_cvttpd2pi;
 
2847
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttps2pi", 22)) return Intrinsic::x86_sse_cvttps2pi;
 
2848
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttss2si", 22)) return Intrinsic::x86_sse_cvttss2si;
 
2849
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse.cvttss2si64", 24)) return Intrinsic::x86_sse_cvttss2si64;
 
2850
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.div.ss", 19)) return Intrinsic::x86_sse_div_ss;
 
2851
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.ldmxcsr", 20)) return Intrinsic::x86_sse_ldmxcsr;
 
2852
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.loadu.ps", 21)) return Intrinsic::x86_sse_loadu_ps;
 
2853
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ps", 19)) return Intrinsic::x86_sse_max_ps;
 
2854
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ss", 19)) return Intrinsic::x86_sse_max_ss;
 
2855
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ps", 19)) return Intrinsic::x86_sse_min_ps;
 
2856
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ss", 19)) return Intrinsic::x86_sse_min_ss;
 
2857
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.movmsk.ps", 22)) return Intrinsic::x86_sse_movmsk_ps;
 
2858
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.movnt.ps", 21)) return Intrinsic::x86_sse_movnt_ps;
 
2859
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.mul.ss", 19)) return Intrinsic::x86_sse_mul_ss;
 
2860
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ps", 19)) return Intrinsic::x86_sse_rcp_ps;
 
2861
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ss", 19)) return Intrinsic::x86_sse_rcp_ss;
 
2862
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ps", 21)) return Intrinsic::x86_sse_rsqrt_ps;
 
2863
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ss", 21)) return Intrinsic::x86_sse_rsqrt_ss;
 
2864
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sfence", 19)) return Intrinsic::x86_sse_sfence;
 
2865
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ps", 20)) return Intrinsic::x86_sse_sqrt_ps;
 
2866
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ss", 20)) return Intrinsic::x86_sse_sqrt_ss;
 
2867
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse.stmxcsr", 20)) return Intrinsic::x86_sse_stmxcsr;
 
2868
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse.storeu.ps", 22)) return Intrinsic::x86_sse_storeu_ps;
 
2869
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sub.ss", 19)) return Intrinsic::x86_sse_sub_ss;
 
2870
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomieq.ss", 23)) return Intrinsic::x86_sse_ucomieq_ss;
 
2871
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomige.ss", 23)) return Intrinsic::x86_sse_ucomige_ss;
 
2872
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomigt.ss", 23)) return Intrinsic::x86_sse_ucomigt_ss;
 
2873
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomile.ss", 23)) return Intrinsic::x86_sse_ucomile_ss;
 
2874
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomilt.ss", 23)) return Intrinsic::x86_sse_ucomilt_ss;
 
2875
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse.ucomineq.ss", 24)) return Intrinsic::x86_sse_ucomineq_ss;
 
2876
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.add.sd", 20)) return Intrinsic::x86_sse2_add_sd;
 
2877
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.clflush", 21)) return Intrinsic::x86_sse2_clflush;
 
2878
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.pd", 20)) return Intrinsic::x86_sse2_cmp_pd;
 
2879
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.sd", 20)) return Intrinsic::x86_sse2_cmp_sd;
 
2880
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comieq.sd", 23)) return Intrinsic::x86_sse2_comieq_sd;
 
2881
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comige.sd", 23)) return Intrinsic::x86_sse2_comige_sd;
 
2882
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comigt.sd", 23)) return Intrinsic::x86_sse2_comigt_sd;
 
2883
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comile.sd", 23)) return Intrinsic::x86_sse2_comile_sd;
 
2884
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comilt.sd", 23)) return Intrinsic::x86_sse2_comilt_sd;
 
2885
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.comineq.sd", 24)) return Intrinsic::x86_sse2_comineq_sd;
 
2886
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2pd", 22)) return Intrinsic::x86_sse2_cvtdq2pd;
 
2887
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2ps", 22)) return Intrinsic::x86_sse2_cvtdq2ps;
 
2888
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2dq", 22)) return Intrinsic::x86_sse2_cvtpd2dq;
 
2889
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2ps", 22)) return Intrinsic::x86_sse2_cvtpd2ps;
 
2890
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2dq", 22)) return Intrinsic::x86_sse2_cvtps2dq;
 
2891
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2pd", 22)) return Intrinsic::x86_sse2_cvtps2pd;
 
2892
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si", 22)) return Intrinsic::x86_sse2_cvtsd2si;
 
2893
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si64", 24)) return Intrinsic::x86_sse2_cvtsd2si64;
 
2894
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2ss", 22)) return Intrinsic::x86_sse2_cvtsd2ss;
 
2895
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsi2sd", 22)) return Intrinsic::x86_sse2_cvtsi2sd;
 
2896
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsi642sd", 24)) return Intrinsic::x86_sse2_cvtsi642sd;
 
2897
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtss2sd", 22)) return Intrinsic::x86_sse2_cvtss2sd;
 
2898
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttpd2dq", 23)) return Intrinsic::x86_sse2_cvttpd2dq;
 
2899
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttps2dq", 23)) return Intrinsic::x86_sse2_cvttps2dq;
 
2900
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si", 23)) return Intrinsic::x86_sse2_cvttsd2si;
 
2901
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si64", 25)) return Intrinsic::x86_sse2_cvttsd2si64;
 
2902
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.div.sd", 20)) return Intrinsic::x86_sse2_div_sd;
 
2903
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.lfence", 20)) return Intrinsic::x86_sse2_lfence;
 
2904
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.dq", 22)) return Intrinsic::x86_sse2_loadu_dq;
 
2905
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.pd", 22)) return Intrinsic::x86_sse2_loadu_pd;
 
2906
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.maskmov.dqu", 25)) return Intrinsic::x86_sse2_maskmov_dqu;
 
2907
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.pd", 20)) return Intrinsic::x86_sse2_max_pd;
 
2908
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.sd", 20)) return Intrinsic::x86_sse2_max_sd;
 
2909
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mfence", 20)) return Intrinsic::x86_sse2_mfence;
 
2910
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.pd", 20)) return Intrinsic::x86_sse2_min_pd;
 
2911
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.sd", 20)) return Intrinsic::x86_sse2_min_sd;
 
2912
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.movmsk.pd", 23)) return Intrinsic::x86_sse2_movmsk_pd;
 
2913
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.dq", 22)) return Intrinsic::x86_sse2_movnt_dq;
 
2914
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.movnt.i", 21)) return Intrinsic::x86_sse2_movnt_i;
 
2915
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.pd", 22)) return Intrinsic::x86_sse2_movnt_pd;
 
2916
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mul.sd", 20)) return Intrinsic::x86_sse2_mul_sd;
 
2917
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packssdw.128", 26)) return Intrinsic::x86_sse2_packssdw_128;
 
2918
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packsswb.128", 26)) return Intrinsic::x86_sse2_packsswb_128;
 
2919
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packuswb.128", 26)) return Intrinsic::x86_sse2_packuswb_128;
 
2920
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.b", 21)) return Intrinsic::x86_sse2_padds_b;
 
2921
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.w", 21)) return Intrinsic::x86_sse2_padds_w;
 
2922
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.b", 22)) return Intrinsic::x86_sse2_paddus_b;
 
2923
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.w", 22)) return Intrinsic::x86_sse2_paddus_w;
 
2924
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.b", 20)) return Intrinsic::x86_sse2_pavg_b;
 
2925
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.w", 20)) return Intrinsic::x86_sse2_pavg_w;
 
2926
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.b", 22)) return Intrinsic::x86_sse2_pcmpeq_b;
 
2927
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.d", 22)) return Intrinsic::x86_sse2_pcmpeq_d;
 
2928
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.w", 22)) return Intrinsic::x86_sse2_pcmpeq_w;
 
2929
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.b", 22)) return Intrinsic::x86_sse2_pcmpgt_b;
 
2930
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.d", 22)) return Intrinsic::x86_sse2_pcmpgt_d;
 
2931
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.w", 22)) return Intrinsic::x86_sse2_pcmpgt_w;
 
2932
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmadd.wd", 22)) return Intrinsic::x86_sse2_pmadd_wd;
 
2933
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxs.w", 21)) return Intrinsic::x86_sse2_pmaxs_w;
 
2934
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxu.b", 21)) return Intrinsic::x86_sse2_pmaxu_b;
 
2935
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmins.w", 21)) return Intrinsic::x86_sse2_pmins_w;
 
2936
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pminu.b", 21)) return Intrinsic::x86_sse2_pminu_b;
 
2937
    if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.pmovmskb.128", 26)) return Intrinsic::x86_sse2_pmovmskb_128;
 
2938
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmulh.w", 21)) return Intrinsic::x86_sse2_pmulh_w;
 
2939
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulhu.w", 22)) return Intrinsic::x86_sse2_pmulhu_w;
 
2940
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulu.dq", 22)) return Intrinsic::x86_sse2_pmulu_dq;
 
2941
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psad.bw", 21)) return Intrinsic::x86_sse2_psad_bw;
 
2942
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.d", 20)) return Intrinsic::x86_sse2_psll_d;
 
2943
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psll.dq", 21)) return Intrinsic::x86_sse2_psll_dq;
 
2944
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psll.dq.bs", 24)) return Intrinsic::x86_sse2_psll_dq_bs;
 
2945
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.q", 20)) return Intrinsic::x86_sse2_psll_q;
 
2946
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.w", 20)) return Intrinsic::x86_sse2_psll_w;
 
2947
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.d", 21)) return Intrinsic::x86_sse2_pslli_d;
 
2948
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.q", 21)) return Intrinsic::x86_sse2_pslli_q;
 
2949
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.w", 21)) return Intrinsic::x86_sse2_pslli_w;
 
2950
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.d", 20)) return Intrinsic::x86_sse2_psra_d;
 
2951
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.w", 20)) return Intrinsic::x86_sse2_psra_w;
 
2952
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.d", 21)) return Intrinsic::x86_sse2_psrai_d;
 
2953
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.w", 21)) return Intrinsic::x86_sse2_psrai_w;
 
2954
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.d", 20)) return Intrinsic::x86_sse2_psrl_d;
 
2955
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrl.dq", 21)) return Intrinsic::x86_sse2_psrl_dq;
 
2956
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psrl.dq.bs", 24)) return Intrinsic::x86_sse2_psrl_dq_bs;
 
2957
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.q", 20)) return Intrinsic::x86_sse2_psrl_q;
 
2958
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.w", 20)) return Intrinsic::x86_sse2_psrl_w;
 
2959
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.d", 21)) return Intrinsic::x86_sse2_psrli_d;
 
2960
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.q", 21)) return Intrinsic::x86_sse2_psrli_q;
 
2961
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.w", 21)) return Intrinsic::x86_sse2_psrli_w;
 
2962
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.b", 21)) return Intrinsic::x86_sse2_psubs_b;
 
2963
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.w", 21)) return Intrinsic::x86_sse2_psubs_w;
 
2964
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.b", 22)) return Intrinsic::x86_sse2_psubus_b;
 
2965
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.w", 22)) return Intrinsic::x86_sse2_psubus_w;
 
2966
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.pd", 21)) return Intrinsic::x86_sse2_sqrt_pd;
 
2967
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.sd", 21)) return Intrinsic::x86_sse2_sqrt_sd;
 
2968
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storel.dq", 23)) return Intrinsic::x86_sse2_storel_dq;
 
2969
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.dq", 23)) return Intrinsic::x86_sse2_storeu_dq;
 
2970
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.pd", 23)) return Intrinsic::x86_sse2_storeu_pd;
 
2971
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.sub.sd", 20)) return Intrinsic::x86_sse2_sub_sd;
 
2972
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomieq.sd", 24)) return Intrinsic::x86_sse2_ucomieq_sd;
 
2973
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomige.sd", 24)) return Intrinsic::x86_sse2_ucomige_sd;
 
2974
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomigt.sd", 24)) return Intrinsic::x86_sse2_ucomigt_sd;
 
2975
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomile.sd", 24)) return Intrinsic::x86_sse2_ucomile_sd;
 
2976
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomilt.sd", 24)) return Intrinsic::x86_sse2_ucomilt_sd;
 
2977
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.ucomineq.sd", 25)) return Intrinsic::x86_sse2_ucomineq_sd;
 
2978
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.pd", 23)) return Intrinsic::x86_sse3_addsub_pd;
 
2979
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.ps", 23)) return Intrinsic::x86_sse3_addsub_ps;
 
2980
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.pd", 21)) return Intrinsic::x86_sse3_hadd_pd;
 
2981
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.ps", 21)) return Intrinsic::x86_sse3_hadd_ps;
 
2982
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.pd", 21)) return Intrinsic::x86_sse3_hsub_pd;
 
2983
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.ps", 21)) return Intrinsic::x86_sse3_hsub_ps;
 
2984
    if (Len == 20 && !memcmp(Name, "llvm.x86.sse3.ldu.dq", 20)) return Intrinsic::x86_sse3_ldu_dq;
 
2985
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.monitor", 21)) return Intrinsic::x86_sse3_monitor;
 
2986
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse3.mwait", 19)) return Intrinsic::x86_sse3_mwait;
 
2987
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendpd", 22)) return Intrinsic::x86_sse41_blendpd;
 
2988
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendps", 22)) return Intrinsic::x86_sse41_blendps;
 
2989
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvpd", 23)) return Intrinsic::x86_sse41_blendvpd;
 
2990
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvps", 23)) return Intrinsic::x86_sse41_blendvps;
 
2991
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dppd", 19)) return Intrinsic::x86_sse41_dppd;
 
2992
    if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dpps", 19)) return Intrinsic::x86_sse41_dpps;
 
2993
    if (Len == 24 && !memcmp(Name, "llvm.x86.sse41.extractps", 24)) return Intrinsic::x86_sse41_extractps;
 
2994
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.insertps", 23)) return Intrinsic::x86_sse41_insertps;
 
2995
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.movntdqa", 23)) return Intrinsic::x86_sse41_movntdqa;
 
2996
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.mpsadbw", 22)) return Intrinsic::x86_sse41_mpsadbw;
 
2997
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.packusdw", 23)) return Intrinsic::x86_sse41_packusdw;
 
2998
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pblendvb", 23)) return Intrinsic::x86_sse41_pblendvb;
 
2999
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pblendw", 22)) return Intrinsic::x86_sse41_pblendw;
 
3000
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pcmpeqq", 22)) return Intrinsic::x86_sse41_pcmpeqq;
 
3001
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrb", 21)) return Intrinsic::x86_sse41_pextrb;
 
3002
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrd", 21)) return Intrinsic::x86_sse41_pextrd;
 
3003
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrq", 21)) return Intrinsic::x86_sse41_pextrq;
 
3004
    if (Len == 25 && !memcmp(Name, "llvm.x86.sse41.phminposuw", 25)) return Intrinsic::x86_sse41_phminposuw;
 
3005
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsb", 21)) return Intrinsic::x86_sse41_pmaxsb;
 
3006
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsd", 21)) return Intrinsic::x86_sse41_pmaxsd;
 
3007
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxud", 21)) return Intrinsic::x86_sse41_pmaxud;
 
3008
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxuw", 21)) return Intrinsic::x86_sse41_pmaxuw;
 
3009
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsb", 21)) return Intrinsic::x86_sse41_pminsb;
 
3010
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsd", 21)) return Intrinsic::x86_sse41_pminsd;
 
3011
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminud", 21)) return Intrinsic::x86_sse41_pminud;
 
3012
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminuw", 21)) return Intrinsic::x86_sse41_pminuw;
 
3013
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbd", 23)) return Intrinsic::x86_sse41_pmovsxbd;
 
3014
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbq", 23)) return Intrinsic::x86_sse41_pmovsxbq;
 
3015
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbw", 23)) return Intrinsic::x86_sse41_pmovsxbw;
 
3016
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxdq", 23)) return Intrinsic::x86_sse41_pmovsxdq;
 
3017
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwd", 23)) return Intrinsic::x86_sse41_pmovsxwd;
 
3018
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwq", 23)) return Intrinsic::x86_sse41_pmovsxwq;
 
3019
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbd", 23)) return Intrinsic::x86_sse41_pmovzxbd;
 
3020
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbq", 23)) return Intrinsic::x86_sse41_pmovzxbq;
 
3021
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbw", 23)) return Intrinsic::x86_sse41_pmovzxbw;
 
3022
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxdq", 23)) return Intrinsic::x86_sse41_pmovzxdq;
 
3023
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwd", 23)) return Intrinsic::x86_sse41_pmovzxwd;
 
3024
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwq", 23)) return Intrinsic::x86_sse41_pmovzxwq;
 
3025
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmuldq", 21)) return Intrinsic::x86_sse41_pmuldq;
 
3026
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmulld", 21)) return Intrinsic::x86_sse41_pmulld;
 
3027
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestc", 21)) return Intrinsic::x86_sse41_ptestc;
 
3028
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.ptestnzc", 23)) return Intrinsic::x86_sse41_ptestnzc;
 
3029
    if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestz", 21)) return Intrinsic::x86_sse41_ptestz;
 
3030
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.pd", 23)) return Intrinsic::x86_sse41_round_pd;
 
3031
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ps", 23)) return Intrinsic::x86_sse41_round_ps;
 
3032
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.sd", 23)) return Intrinsic::x86_sse41_round_sd;
 
3033
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ss", 23)) return Intrinsic::x86_sse41_round_ss;
 
3034
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.16", 23)) return Intrinsic::x86_sse42_crc32_16;
 
3035
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.32", 23)) return Intrinsic::x86_sse42_crc32_32;
 
3036
    if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.64", 23)) return Intrinsic::x86_sse42_crc32_64;
 
3037
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.crc32.8", 22)) return Intrinsic::x86_sse42_crc32_8;
 
3038
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestri128", 27)) return Intrinsic::x86_sse42_pcmpestri128;
 
3039
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestria128", 28)) return Intrinsic::x86_sse42_pcmpestria128;
 
3040
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestric128", 28)) return Intrinsic::x86_sse42_pcmpestric128;
 
3041
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestrio128", 28)) return Intrinsic::x86_sse42_pcmpestrio128;
 
3042
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestris128", 28)) return Intrinsic::x86_sse42_pcmpestris128;
 
3043
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestriz128", 28)) return Intrinsic::x86_sse42_pcmpestriz128;
 
3044
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestrm128", 27)) return Intrinsic::x86_sse42_pcmpestrm128;
 
3045
    if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.pcmpgtq", 22)) return Intrinsic::x86_sse42_pcmpgtq;
 
3046
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistri128", 27)) return Intrinsic::x86_sse42_pcmpistri128;
 
3047
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistria128", 28)) return Intrinsic::x86_sse42_pcmpistria128;
 
3048
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistric128", 28)) return Intrinsic::x86_sse42_pcmpistric128;
 
3049
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistrio128", 28)) return Intrinsic::x86_sse42_pcmpistrio128;
 
3050
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistris128", 28)) return Intrinsic::x86_sse42_pcmpistris128;
 
3051
    if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistriz128", 28)) return Intrinsic::x86_sse42_pcmpistriz128;
 
3052
    if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistrm128", 27)) return Intrinsic::x86_sse42_pcmpistrm128;
 
3053
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.b", 21)) return Intrinsic::x86_ssse3_pabs_b;
 
3054
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.b.128", 25)) return Intrinsic::x86_ssse3_pabs_b_128;
 
3055
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.d", 21)) return Intrinsic::x86_ssse3_pabs_d;
 
3056
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.d.128", 25)) return Intrinsic::x86_ssse3_pabs_d_128;
 
3057
    if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.w", 21)) return Intrinsic::x86_ssse3_pabs_w;
 
3058
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.w.128", 25)) return Intrinsic::x86_ssse3_pabs_w_128;
 
3059
    if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.palign.r", 23)) return Intrinsic::x86_ssse3_palign_r;
 
3060
    if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.palign.r.128", 27)) return Intrinsic::x86_ssse3_palign_r_128;
 
3061
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.d", 22)) return Intrinsic::x86_ssse3_phadd_d;
 
3062
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.d.128", 26)) return Intrinsic::x86_ssse3_phadd_d_128;
 
3063
    if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw", 23)) return Intrinsic::x86_ssse3_phadd_sw;
 
3064
    if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw.128", 27)) return Intrinsic::x86_ssse3_phadd_sw_128;
 
3065
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.w", 22)) return Intrinsic::x86_ssse3_phadd_w;
 
3066
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.w.128", 26)) return Intrinsic::x86_ssse3_phadd_w_128;
 
3067
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.d", 22)) return Intrinsic::x86_ssse3_phsub_d;
 
3068
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.d.128", 26)) return Intrinsic::x86_ssse3_phsub_d_128;
 
3069
    if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw", 23)) return Intrinsic::x86_ssse3_phsub_sw;
 
3070
    if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw.128", 27)) return Intrinsic::x86_ssse3_phsub_sw_128;
 
3071
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.w", 22)) return Intrinsic::x86_ssse3_phsub_w;
 
3072
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.w.128", 26)) return Intrinsic::x86_ssse3_phsub_w_128;
 
3073
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw", 26)) return Intrinsic::x86_ssse3_pmadd_ub_sw;
 
3074
    if (Len == 30 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw.128", 30)) return Intrinsic::x86_ssse3_pmadd_ub_sw_128;
 
3075
    if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw", 25)) return Intrinsic::x86_ssse3_pmul_hr_sw;
 
3076
    if (Len == 29 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw.128", 29)) return Intrinsic::x86_ssse3_pmul_hr_sw_128;
 
3077
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b", 22)) return Intrinsic::x86_ssse3_pshuf_b;
 
3078
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b.128", 26)) return Intrinsic::x86_ssse3_pshuf_b_128;
 
3079
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.b", 22)) return Intrinsic::x86_ssse3_psign_b;
 
3080
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.b.128", 26)) return Intrinsic::x86_ssse3_psign_b_128;
 
3081
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.d", 22)) return Intrinsic::x86_ssse3_psign_d;
 
3082
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.d.128", 26)) return Intrinsic::x86_ssse3_psign_d_128;
 
3083
    if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.w", 22)) return Intrinsic::x86_ssse3_psign_w;
 
3084
    if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.w.128", 26)) return Intrinsic::x86_ssse3_psign_w_128;
 
3085
    if (Len == 17 && !memcmp(Name, "llvm.xcore.bitrev", 17)) return Intrinsic::xcore_bitrev;
 
3086
    if (Len == 16 && !memcmp(Name, "llvm.xcore.getid", 16)) return Intrinsic::xcore_getid;
 
3087
  }
 
3088
#endif
 
3089
 
 
3090
// Verifier::visitIntrinsicFunctionCall code.
 
3091
#ifdef GET_INTRINSIC_VERIFIER
 
3092
  switch (ID) {
 
3093
  default: assert(0 && "Invalid intrinsic!");
 
3094
  case Intrinsic::ptr_annotation:               // llvm.ptr.annotation
 
3095
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iPTRAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
 
3096
    break;
 
3097
  case Intrinsic::sin:          // llvm.sin
 
3098
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3099
    break;
 
3100
  case Intrinsic::cos:          // llvm.cos
 
3101
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3102
    break;
 
3103
  case Intrinsic::pow:          // llvm.pow
 
3104
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, ~0);
 
3105
    break;
 
3106
  case Intrinsic::log:          // llvm.log
 
3107
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3108
    break;
 
3109
  case Intrinsic::log10:                // llvm.log10
 
3110
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3111
    break;
 
3112
  case Intrinsic::log2:         // llvm.log2
 
3113
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3114
    break;
 
3115
  case Intrinsic::exp:          // llvm.exp
 
3116
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3117
    break;
 
3118
  case Intrinsic::exp2:         // llvm.exp2
 
3119
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3120
    break;
 
3121
  case Intrinsic::sqrt:         // llvm.sqrt
 
3122
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0);
 
3123
    break;
 
3124
  case Intrinsic::powi:         // llvm.powi
 
3125
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, MVT::i32);
 
3126
    break;
 
3127
  case Intrinsic::convertff:            // llvm.convertff
 
3128
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::fAny, MVT::i32, MVT::i32);
 
3129
    break;
 
3130
  case Intrinsic::arm_neon_vcvtfxs2fp:          // llvm.arm.neon.vcvtfxs2fp
 
3131
  case Intrinsic::arm_neon_vcvtfxu2fp:          // llvm.arm.neon.vcvtfxu2fp
 
3132
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, MVT::iAny, MVT::i32);
 
3133
    break;
 
3134
  case Intrinsic::convertfsi:           // llvm.convertfsi
 
3135
  case Intrinsic::convertfui:           // llvm.convertfui
 
3136
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::iAny, MVT::i32, MVT::i32);
 
3137
    break;
 
3138
  case Intrinsic::bswap:                // llvm.bswap
 
3139
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
 
3140
    break;
 
3141
  case Intrinsic::ctpop:                // llvm.ctpop
 
3142
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
 
3143
    break;
 
3144
  case Intrinsic::ctlz:         // llvm.ctlz
 
3145
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
 
3146
    break;
 
3147
  case Intrinsic::cttz:         // llvm.cttz
 
3148
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0);
 
3149
    break;
 
3150
  case Intrinsic::annotation:           // llvm.annotation
 
3151
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32);
 
3152
    break;
 
3153
  case Intrinsic::atomic_cmp_swap:              // llvm.atomic.cmp.swap
 
3154
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iPTRAny, ~0, ~0);
 
3155
    break;
 
3156
  case Intrinsic::atomic_load_add:              // llvm.atomic.load.add
 
3157
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3158
    break;
 
3159
  case Intrinsic::atomic_swap:          // llvm.atomic.swap
 
3160
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3161
    break;
 
3162
  case Intrinsic::atomic_load_sub:              // llvm.atomic.load.sub
 
3163
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3164
    break;
 
3165
  case Intrinsic::atomic_load_and:              // llvm.atomic.load.and
 
3166
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3167
    break;
 
3168
  case Intrinsic::atomic_load_or:               // llvm.atomic.load.or
 
3169
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3170
    break;
 
3171
  case Intrinsic::atomic_load_xor:              // llvm.atomic.load.xor
 
3172
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3173
    break;
 
3174
  case Intrinsic::atomic_load_nand:             // llvm.atomic.load.nand
 
3175
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3176
    break;
 
3177
  case Intrinsic::atomic_load_min:              // llvm.atomic.load.min
 
3178
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3179
    break;
 
3180
  case Intrinsic::atomic_load_max:              // llvm.atomic.load.max
 
3181
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3182
    break;
 
3183
  case Intrinsic::atomic_load_umin:             // llvm.atomic.load.umin
 
3184
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3185
    break;
 
3186
  case Intrinsic::atomic_load_umax:             // llvm.atomic.load.umax
 
3187
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0);
 
3188
    break;
 
3189
  case Intrinsic::arm_neon_vcvtfp2fxs:          // llvm.arm.neon.vcvtfp2fxs
 
3190
  case Intrinsic::arm_neon_vcvtfp2fxu:          // llvm.arm.neon.vcvtfp2fxu
 
3191
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::fAny, MVT::i32);
 
3192
    break;
 
3193
  case Intrinsic::convertsif:           // llvm.convertsif
 
3194
  case Intrinsic::convertuif:           // llvm.convertuif
 
3195
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::fAny, MVT::i32, MVT::i32);
 
3196
    break;
 
3197
  case Intrinsic::convertss:            // llvm.convertss
 
3198
  case Intrinsic::convertsu:            // llvm.convertsu
 
3199
  case Intrinsic::convertus:            // llvm.convertus
 
3200
  case Intrinsic::convertuu:            // llvm.convertuu
 
3201
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iAny, MVT::i32, MVT::i32);
 
3202
    break;
 
3203
  case Intrinsic::objectsize:           // llvm.objectsize
 
3204
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTR, MVT::i1);
 
3205
    break;
 
3206
  case Intrinsic::sadd_with_overflow:           // llvm.sadd.with.overflow
 
3207
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3208
    break;
 
3209
  case Intrinsic::uadd_with_overflow:           // llvm.uadd.with.overflow
 
3210
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3211
    break;
 
3212
  case Intrinsic::ssub_with_overflow:           // llvm.ssub.with.overflow
 
3213
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3214
    break;
 
3215
  case Intrinsic::usub_with_overflow:           // llvm.usub.with.overflow
 
3216
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3217
    break;
 
3218
  case Intrinsic::smul_with_overflow:           // llvm.smul.with.overflow
 
3219
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3220
    break;
 
3221
  case Intrinsic::umul_with_overflow:           // llvm.umul.with.overflow
 
3222
    VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0);
 
3223
    break;
 
3224
  case Intrinsic::arm_neon_vaddws:              // llvm.arm.neon.vaddws
 
3225
  case Intrinsic::arm_neon_vaddwu:              // llvm.arm.neon.vaddwu
 
3226
  case Intrinsic::arm_neon_vsubws:              // llvm.arm.neon.vsubws
 
3227
  case Intrinsic::arm_neon_vsubwu:              // llvm.arm.neon.vsubwu
 
3228
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, ~(TruncatedElementVectorType | 0));
 
3229
    break;
 
3230
  case Intrinsic::arm_neon_vabas:               // llvm.arm.neon.vabas
 
3231
  case Intrinsic::arm_neon_vabau:               // llvm.arm.neon.vabau
 
3232
  case Intrinsic::arm_neon_vshiftins:           // llvm.arm.neon.vshiftins
 
3233
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~0, ~0);
 
3234
    break;
 
3235
  case Intrinsic::arm_neon_vabals:              // llvm.arm.neon.vabals
 
3236
  case Intrinsic::arm_neon_vabalu:              // llvm.arm.neon.vabalu
 
3237
  case Intrinsic::arm_neon_vmlals:              // llvm.arm.neon.vmlals
 
3238
  case Intrinsic::arm_neon_vmlalu:              // llvm.arm.neon.vmlalu
 
3239
  case Intrinsic::arm_neon_vmlsls:              // llvm.arm.neon.vmlsls
 
3240
  case Intrinsic::arm_neon_vmlslu:              // llvm.arm.neon.vmlslu
 
3241
  case Intrinsic::arm_neon_vqdmlal:             // llvm.arm.neon.vqdmlal
 
3242
  case Intrinsic::arm_neon_vqdmlsl:             // llvm.arm.neon.vqdmlsl
 
3243
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
 
3244
    break;
 
3245
  case Intrinsic::arm_neon_vpadals:             // llvm.arm.neon.vpadals
 
3246
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
 
3247
    break;
 
3248
  case Intrinsic::arm_neon_vpadalu:             // llvm.arm.neon.vpadalu
 
3249
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny);
 
3250
    break;
 
3251
  case Intrinsic::arm_neon_vabs:                // llvm.arm.neon.vabs
 
3252
  case Intrinsic::arm_neon_vcls:                // llvm.arm.neon.vcls
 
3253
  case Intrinsic::arm_neon_vclz:                // llvm.arm.neon.vclz
 
3254
  case Intrinsic::arm_neon_vcnt:                // llvm.arm.neon.vcnt
 
3255
  case Intrinsic::arm_neon_vqabs:               // llvm.arm.neon.vqabs
 
3256
  case Intrinsic::arm_neon_vqneg:               // llvm.arm.neon.vqneg
 
3257
  case Intrinsic::arm_neon_vrecpe:              // llvm.arm.neon.vrecpe
 
3258
  case Intrinsic::arm_neon_vrsqrte:             // llvm.arm.neon.vrsqrte
 
3259
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~0);
 
3260
    break;
 
3261
  case Intrinsic::arm_neon_vmovn:               // llvm.arm.neon.vmovn
 
3262
  case Intrinsic::arm_neon_vqmovns:             // llvm.arm.neon.vqmovns
 
3263
  case Intrinsic::arm_neon_vqmovnsu:            // llvm.arm.neon.vqmovnsu
 
3264
  case Intrinsic::arm_neon_vqmovnu:             // llvm.arm.neon.vqmovnu
 
3265
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~(ExtendedElementVectorType | 0));
 
3266
    break;
 
3267
  case Intrinsic::arm_neon_vmovls:              // llvm.arm.neon.vmovls
 
3268
  case Intrinsic::arm_neon_vmovlu:              // llvm.arm.neon.vmovlu
 
3269
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~(TruncatedElementVectorType | 0));
 
3270
    break;
 
3271
  case Intrinsic::arm_neon_vabds:               // llvm.arm.neon.vabds
 
3272
  case Intrinsic::arm_neon_vabdu:               // llvm.arm.neon.vabdu
 
3273
  case Intrinsic::arm_neon_vhadds:              // llvm.arm.neon.vhadds
 
3274
  case Intrinsic::arm_neon_vhaddu:              // llvm.arm.neon.vhaddu
 
3275
  case Intrinsic::arm_neon_vhsubs:              // llvm.arm.neon.vhsubs
 
3276
  case Intrinsic::arm_neon_vhsubu:              // llvm.arm.neon.vhsubu
 
3277
  case Intrinsic::arm_neon_vmaxs:               // llvm.arm.neon.vmaxs
 
3278
  case Intrinsic::arm_neon_vmaxu:               // llvm.arm.neon.vmaxu
 
3279
  case Intrinsic::arm_neon_vmins:               // llvm.arm.neon.vmins
 
3280
  case Intrinsic::arm_neon_vminu:               // llvm.arm.neon.vminu
 
3281
  case Intrinsic::arm_neon_vmulp:               // llvm.arm.neon.vmulp
 
3282
  case Intrinsic::arm_neon_vpadd:               // llvm.arm.neon.vpadd
 
3283
  case Intrinsic::arm_neon_vpmaxs:              // llvm.arm.neon.vpmaxs
 
3284
  case Intrinsic::arm_neon_vpmaxu:              // llvm.arm.neon.vpmaxu
 
3285
  case Intrinsic::arm_neon_vpmins:              // llvm.arm.neon.vpmins
 
3286
  case Intrinsic::arm_neon_vpminu:              // llvm.arm.neon.vpminu
 
3287
  case Intrinsic::arm_neon_vqadds:              // llvm.arm.neon.vqadds
 
3288
  case Intrinsic::arm_neon_vqaddu:              // llvm.arm.neon.vqaddu
 
3289
  case Intrinsic::arm_neon_vqdmulh:             // llvm.arm.neon.vqdmulh
 
3290
  case Intrinsic::arm_neon_vqrdmulh:            // llvm.arm.neon.vqrdmulh
 
3291
  case Intrinsic::arm_neon_vqrshifts:           // llvm.arm.neon.vqrshifts
 
3292
  case Intrinsic::arm_neon_vqrshiftu:           // llvm.arm.neon.vqrshiftu
 
3293
  case Intrinsic::arm_neon_vqshifts:            // llvm.arm.neon.vqshifts
 
3294
  case Intrinsic::arm_neon_vqshiftsu:           // llvm.arm.neon.vqshiftsu
 
3295
  case Intrinsic::arm_neon_vqshiftu:            // llvm.arm.neon.vqshiftu
 
3296
  case Intrinsic::arm_neon_vqsubs:              // llvm.arm.neon.vqsubs
 
3297
  case Intrinsic::arm_neon_vqsubu:              // llvm.arm.neon.vqsubu
 
3298
  case Intrinsic::arm_neon_vrecps:              // llvm.arm.neon.vrecps
 
3299
  case Intrinsic::arm_neon_vrhadds:             // llvm.arm.neon.vrhadds
 
3300
  case Intrinsic::arm_neon_vrhaddu:             // llvm.arm.neon.vrhaddu
 
3301
  case Intrinsic::arm_neon_vrshifts:            // llvm.arm.neon.vrshifts
 
3302
  case Intrinsic::arm_neon_vrshiftu:            // llvm.arm.neon.vrshiftu
 
3303
  case Intrinsic::arm_neon_vrsqrts:             // llvm.arm.neon.vrsqrts
 
3304
  case Intrinsic::arm_neon_vshifts:             // llvm.arm.neon.vshifts
 
3305
  case Intrinsic::arm_neon_vshiftu:             // llvm.arm.neon.vshiftu
 
3306
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, ~0);
 
3307
    break;
 
3308
  case Intrinsic::arm_neon_vaddhn:              // llvm.arm.neon.vaddhn
 
3309
  case Intrinsic::arm_neon_vqrshiftns:          // llvm.arm.neon.vqrshiftns
 
3310
  case Intrinsic::arm_neon_vqrshiftnsu:         // llvm.arm.neon.vqrshiftnsu
 
3311
  case Intrinsic::arm_neon_vqrshiftnu:          // llvm.arm.neon.vqrshiftnu
 
3312
  case Intrinsic::arm_neon_vqshiftns:           // llvm.arm.neon.vqshiftns
 
3313
  case Intrinsic::arm_neon_vqshiftnsu:          // llvm.arm.neon.vqshiftnsu
 
3314
  case Intrinsic::arm_neon_vqshiftnu:           // llvm.arm.neon.vqshiftnu
 
3315
  case Intrinsic::arm_neon_vraddhn:             // llvm.arm.neon.vraddhn
 
3316
  case Intrinsic::arm_neon_vrshiftn:            // llvm.arm.neon.vrshiftn
 
3317
  case Intrinsic::arm_neon_vrsubhn:             // llvm.arm.neon.vrsubhn
 
3318
  case Intrinsic::arm_neon_vshiftn:             // llvm.arm.neon.vshiftn
 
3319
  case Intrinsic::arm_neon_vsubhn:              // llvm.arm.neon.vsubhn
 
3320
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(ExtendedElementVectorType | 0), ~(ExtendedElementVectorType | 0));
 
3321
    break;
 
3322
  case Intrinsic::arm_neon_vabdls:              // llvm.arm.neon.vabdls
 
3323
  case Intrinsic::arm_neon_vabdlu:              // llvm.arm.neon.vabdlu
 
3324
  case Intrinsic::arm_neon_vaddls:              // llvm.arm.neon.vaddls
 
3325
  case Intrinsic::arm_neon_vaddlu:              // llvm.arm.neon.vaddlu
 
3326
  case Intrinsic::arm_neon_vmullp:              // llvm.arm.neon.vmullp
 
3327
  case Intrinsic::arm_neon_vmulls:              // llvm.arm.neon.vmulls
 
3328
  case Intrinsic::arm_neon_vmullu:              // llvm.arm.neon.vmullu
 
3329
  case Intrinsic::arm_neon_vqdmull:             // llvm.arm.neon.vqdmull
 
3330
  case Intrinsic::arm_neon_vshiftls:            // llvm.arm.neon.vshiftls
 
3331
  case Intrinsic::arm_neon_vshiftlu:            // llvm.arm.neon.vshiftlu
 
3332
  case Intrinsic::arm_neon_vsubls:              // llvm.arm.neon.vsubls
 
3333
  case Intrinsic::arm_neon_vsublu:              // llvm.arm.neon.vsublu
 
3334
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0));
 
3335
    break;
 
3336
  case Intrinsic::arm_neon_vpaddls:             // llvm.arm.neon.vpaddls
 
3337
  case Intrinsic::arm_neon_vpaddlu:             // llvm.arm.neon.vpaddlu
 
3338
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, MVT::vAny);
 
3339
    break;
 
3340
  case Intrinsic::arm_neon_vld1:                // llvm.arm.neon.vld1
 
3341
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, MVT::iPTR);
 
3342
    break;
 
3343
  case Intrinsic::arm_neon_vld2:                // llvm.arm.neon.vld2
 
3344
    VerifyIntrinsicPrototype(ID, IF, 2, 1, MVT::vAny, ~0, MVT::iPTR);
 
3345
    break;
 
3346
  case Intrinsic::arm_neon_vld3:                // llvm.arm.neon.vld3
 
3347
    VerifyIntrinsicPrototype(ID, IF, 3, 1, MVT::vAny, ~0, ~0, MVT::iPTR);
 
3348
    break;
 
3349
  case Intrinsic::arm_neon_vld4:                // llvm.arm.neon.vld4
 
3350
    VerifyIntrinsicPrototype(ID, IF, 4, 1, MVT::vAny, ~0, ~0, ~0, MVT::iPTR);
 
3351
    break;
 
3352
  case Intrinsic::arm_neon_vld2lane:            // llvm.arm.neon.vld2lane
 
3353
    VerifyIntrinsicPrototype(ID, IF, 2, 4, MVT::vAny, ~0, MVT::iPTR, ~0, ~0, MVT::i32);
 
3354
    break;
 
3355
  case Intrinsic::arm_neon_vld3lane:            // llvm.arm.neon.vld3lane
 
3356
    VerifyIntrinsicPrototype(ID, IF, 3, 5, MVT::vAny, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, MVT::i32);
 
3357
    break;
 
3358
  case Intrinsic::arm_neon_vld4lane:            // llvm.arm.neon.vld4lane
 
3359
    VerifyIntrinsicPrototype(ID, IF, 4, 6, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, ~0, MVT::i32);
 
3360
    break;
 
3361
  case Intrinsic::invariant_start:              // llvm.invariant.start
 
3362
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::i64, MVT::iPTR);
 
3363
    break;
 
3364
  case Intrinsic::flt_rounds:           // llvm.flt.rounds
 
3365
  case Intrinsic::xcore_getid:          // llvm.xcore.getid
 
3366
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i32);
 
3367
    break;
 
3368
  case Intrinsic::xcore_bitrev:         // llvm.xcore.bitrev
 
3369
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::i32);
 
3370
    break;
 
3371
  case Intrinsic::x86_sse42_crc32_16:           // llvm.x86.sse42.crc32.16
 
3372
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i16);
 
3373
    break;
 
3374
  case Intrinsic::x86_sse42_crc32_32:           // llvm.x86.sse42.crc32.32
 
3375
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i32);
 
3376
    break;
 
3377
  case Intrinsic::x86_sse42_crc32_8:            // llvm.x86.sse42.crc32.8
 
3378
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i8);
 
3379
    break;
 
3380
  case Intrinsic::ppc_altivec_vcmpequb_p:               // llvm.ppc.altivec.vcmpequb.p
 
3381
  case Intrinsic::ppc_altivec_vcmpgtsb_p:               // llvm.ppc.altivec.vcmpgtsb.p
 
3382
  case Intrinsic::ppc_altivec_vcmpgtub_p:               // llvm.ppc.altivec.vcmpgtub.p
 
3383
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v16i8, MVT::v16i8);
 
3384
    break;
 
3385
  case Intrinsic::ppc_altivec_vcmpbfp_p:                // llvm.ppc.altivec.vcmpbfp.p
 
3386
  case Intrinsic::ppc_altivec_vcmpeqfp_p:               // llvm.ppc.altivec.vcmpeqfp.p
 
3387
  case Intrinsic::ppc_altivec_vcmpgefp_p:               // llvm.ppc.altivec.vcmpgefp.p
 
3388
  case Intrinsic::ppc_altivec_vcmpgtfp_p:               // llvm.ppc.altivec.vcmpgtfp.p
 
3389
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4f32, MVT::v4f32);
 
3390
    break;
 
3391
  case Intrinsic::ppc_altivec_vcmpequw_p:               // llvm.ppc.altivec.vcmpequw.p
 
3392
  case Intrinsic::ppc_altivec_vcmpgtsw_p:               // llvm.ppc.altivec.vcmpgtsw.p
 
3393
  case Intrinsic::ppc_altivec_vcmpgtuw_p:               // llvm.ppc.altivec.vcmpgtuw.p
 
3394
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4i32, MVT::v4i32);
 
3395
    break;
 
3396
  case Intrinsic::ppc_altivec_vcmpequh_p:               // llvm.ppc.altivec.vcmpequh.p
 
3397
  case Intrinsic::ppc_altivec_vcmpgtsh_p:               // llvm.ppc.altivec.vcmpgtsh.p
 
3398
  case Intrinsic::ppc_altivec_vcmpgtuh_p:               // llvm.ppc.altivec.vcmpgtuh.p
 
3399
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v8i16, MVT::v8i16);
 
3400
    break;
 
3401
  case Intrinsic::eh_sjlj_setjmp:               // llvm.eh.sjlj.setjmp
 
3402
  case Intrinsic::eh_typeid_for:                // llvm.eh.typeid.for
 
3403
  case Intrinsic::setjmp:               // llvm.setjmp
 
3404
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::iPTR);
 
3405
    break;
 
3406
  case Intrinsic::sigsetjmp:            // llvm.sigsetjmp
 
3407
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::iPTR, MVT::i32);
 
3408
    break;
 
3409
  case Intrinsic::eh_selector:          // llvm.eh.selector
 
3410
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::iPTR, MVT::iPTR, MVT::isVoid);
 
3411
    break;
 
3412
  case Intrinsic::x86_sse2_pmovmskb_128:                // llvm.x86.sse2.pmovmskb.128
 
3413
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v16i8);
 
3414
    break;
 
3415
  case Intrinsic::x86_sse41_pextrb:             // llvm.x86.sse41.pextrb
 
3416
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v16i8, MVT::i32);
 
3417
    break;
 
3418
  case Intrinsic::x86_sse42_pcmpestri128:               // llvm.x86.sse42.pcmpestri128
 
3419
  case Intrinsic::x86_sse42_pcmpestria128:              // llvm.x86.sse42.pcmpestria128
 
3420
  case Intrinsic::x86_sse42_pcmpestric128:              // llvm.x86.sse42.pcmpestric128
 
3421
  case Intrinsic::x86_sse42_pcmpestrio128:              // llvm.x86.sse42.pcmpestrio128
 
3422
  case Intrinsic::x86_sse42_pcmpestris128:              // llvm.x86.sse42.pcmpestris128
 
3423
  case Intrinsic::x86_sse42_pcmpestriz128:              // llvm.x86.sse42.pcmpestriz128
 
3424
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::i32, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
 
3425
    break;
 
3426
  case Intrinsic::x86_sse42_pcmpistri128:               // llvm.x86.sse42.pcmpistri128
 
3427
  case Intrinsic::x86_sse42_pcmpistria128:              // llvm.x86.sse42.pcmpistria128
 
3428
  case Intrinsic::x86_sse42_pcmpistric128:              // llvm.x86.sse42.pcmpistric128
 
3429
  case Intrinsic::x86_sse42_pcmpistrio128:              // llvm.x86.sse42.pcmpistrio128
 
3430
  case Intrinsic::x86_sse42_pcmpistris128:              // llvm.x86.sse42.pcmpistris128
 
3431
  case Intrinsic::x86_sse42_pcmpistriz128:              // llvm.x86.sse42.pcmpistriz128
 
3432
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::v16i8, MVT::v16i8, MVT::i8);
 
3433
    break;
 
3434
  case Intrinsic::x86_sse2_cvtsd2si:            // llvm.x86.sse2.cvtsd2si
 
3435
  case Intrinsic::x86_sse2_cvttsd2si:           // llvm.x86.sse2.cvttsd2si
 
3436
  case Intrinsic::x86_sse2_movmsk_pd:           // llvm.x86.sse2.movmsk.pd
 
3437
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v2f64);
 
3438
    break;
 
3439
  case Intrinsic::x86_sse2_comieq_sd:           // llvm.x86.sse2.comieq.sd
 
3440
  case Intrinsic::x86_sse2_comige_sd:           // llvm.x86.sse2.comige.sd
 
3441
  case Intrinsic::x86_sse2_comigt_sd:           // llvm.x86.sse2.comigt.sd
 
3442
  case Intrinsic::x86_sse2_comile_sd:           // llvm.x86.sse2.comile.sd
 
3443
  case Intrinsic::x86_sse2_comilt_sd:           // llvm.x86.sse2.comilt.sd
 
3444
  case Intrinsic::x86_sse2_comineq_sd:          // llvm.x86.sse2.comineq.sd
 
3445
  case Intrinsic::x86_sse2_ucomieq_sd:          // llvm.x86.sse2.ucomieq.sd
 
3446
  case Intrinsic::x86_sse2_ucomige_sd:          // llvm.x86.sse2.ucomige.sd
 
3447
  case Intrinsic::x86_sse2_ucomigt_sd:          // llvm.x86.sse2.ucomigt.sd
 
3448
  case Intrinsic::x86_sse2_ucomile_sd:          // llvm.x86.sse2.ucomile.sd
 
3449
  case Intrinsic::x86_sse2_ucomilt_sd:          // llvm.x86.sse2.ucomilt.sd
 
3450
  case Intrinsic::x86_sse2_ucomineq_sd:         // llvm.x86.sse2.ucomineq.sd
 
3451
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v2f64, MVT::v2f64);
 
3452
    break;
 
3453
  case Intrinsic::x86_sse_cvtss2si:             // llvm.x86.sse.cvtss2si
 
3454
  case Intrinsic::x86_sse_cvttss2si:            // llvm.x86.sse.cvttss2si
 
3455
  case Intrinsic::x86_sse_movmsk_ps:            // llvm.x86.sse.movmsk.ps
 
3456
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f32);
 
3457
    break;
 
3458
  case Intrinsic::x86_sse41_extractps:          // llvm.x86.sse41.extractps
 
3459
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::i32);
 
3460
    break;
 
3461
  case Intrinsic::x86_sse41_ptestc:             // llvm.x86.sse41.ptestc
 
3462
  case Intrinsic::x86_sse41_ptestnzc:           // llvm.x86.sse41.ptestnzc
 
3463
  case Intrinsic::x86_sse41_ptestz:             // llvm.x86.sse41.ptestz
 
3464
  case Intrinsic::x86_sse_comieq_ss:            // llvm.x86.sse.comieq.ss
 
3465
  case Intrinsic::x86_sse_comige_ss:            // llvm.x86.sse.comige.ss
 
3466
  case Intrinsic::x86_sse_comigt_ss:            // llvm.x86.sse.comigt.ss
 
3467
  case Intrinsic::x86_sse_comile_ss:            // llvm.x86.sse.comile.ss
 
3468
  case Intrinsic::x86_sse_comilt_ss:            // llvm.x86.sse.comilt.ss
 
3469
  case Intrinsic::x86_sse_comineq_ss:           // llvm.x86.sse.comineq.ss
 
3470
  case Intrinsic::x86_sse_ucomieq_ss:           // llvm.x86.sse.ucomieq.ss
 
3471
  case Intrinsic::x86_sse_ucomige_ss:           // llvm.x86.sse.ucomige.ss
 
3472
  case Intrinsic::x86_sse_ucomigt_ss:           // llvm.x86.sse.ucomigt.ss
 
3473
  case Intrinsic::x86_sse_ucomile_ss:           // llvm.x86.sse.ucomile.ss
 
3474
  case Intrinsic::x86_sse_ucomilt_ss:           // llvm.x86.sse.ucomilt.ss
 
3475
  case Intrinsic::x86_sse_ucomineq_ss:          // llvm.x86.sse.ucomineq.ss
 
3476
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::v4f32);
 
3477
    break;
 
3478
  case Intrinsic::x86_sse41_pextrd:             // llvm.x86.sse41.pextrd
 
3479
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i32, MVT::i32);
 
3480
    break;
 
3481
  case Intrinsic::x86_mmx_pmovmskb:             // llvm.x86.mmx.pmovmskb
 
3482
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8i8);
 
3483
    break;
 
3484
  case Intrinsic::readcyclecounter:             // llvm.readcyclecounter
 
3485
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i64);
 
3486
    break;
 
3487
  case Intrinsic::alpha_umulh:          // llvm.alpha.umulh
 
3488
  case Intrinsic::x86_sse42_crc32_64:           // llvm.x86.sse42.crc32.64
 
3489
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i64);
 
3490
    break;
 
3491
  case Intrinsic::x86_sse2_cvtsd2si64:          // llvm.x86.sse2.cvtsd2si64
 
3492
  case Intrinsic::x86_sse2_cvttsd2si64:         // llvm.x86.sse2.cvttsd2si64
 
3493
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v2f64);
 
3494
    break;
 
3495
  case Intrinsic::x86_sse41_pextrq:             // llvm.x86.sse41.pextrq
 
3496
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::v2i64, MVT::i32);
 
3497
    break;
 
3498
  case Intrinsic::x86_sse_cvtss2si64:           // llvm.x86.sse.cvtss2si64
 
3499
  case Intrinsic::x86_sse_cvttss2si64:          // llvm.x86.sse.cvttss2si64
 
3500
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v4f32);
 
3501
    break;
 
3502
  case Intrinsic::arm_thread_pointer:           // llvm.arm.thread.pointer
 
3503
  case Intrinsic::eh_exception:         // llvm.eh.exception
 
3504
  case Intrinsic::eh_sjlj_lsda:         // llvm.eh.sjlj.lsda
 
3505
  case Intrinsic::stacksave:            // llvm.stacksave
 
3506
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::iPTR);
 
3507
    break;
 
3508
  case Intrinsic::eh_dwarf_cfa:         // llvm.eh.dwarf.cfa
 
3509
  case Intrinsic::frameaddress:         // llvm.frameaddress
 
3510
  case Intrinsic::returnaddress:                // llvm.returnaddress
 
3511
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTR, MVT::i32);
 
3512
    break;
 
3513
  case Intrinsic::init_trampoline:              // llvm.init.trampoline
 
3514
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::iPTR);
 
3515
    break;
 
3516
  case Intrinsic::gcread:               // llvm.gcread
 
3517
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::iPTR, MVT::iPTR);
 
3518
    break;
 
3519
  case Intrinsic::ppc_altivec_lvebx:            // llvm.ppc.altivec.lvebx
 
3520
  case Intrinsic::ppc_altivec_lvsl:             // llvm.ppc.altivec.lvsl
 
3521
  case Intrinsic::ppc_altivec_lvsr:             // llvm.ppc.altivec.lvsr
 
3522
  case Intrinsic::x86_sse2_loadu_dq:            // llvm.x86.sse2.loadu.dq
 
3523
  case Intrinsic::x86_sse3_ldu_dq:              // llvm.x86.sse3.ldu.dq
 
3524
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::iPTR);
 
3525
    break;
 
3526
  case Intrinsic::x86_ssse3_pabs_b_128:         // llvm.x86.ssse3.pabs.b.128
 
3527
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::v16i8);
 
3528
    break;
 
3529
  case Intrinsic::spu_si_shlqbii:               // llvm.spu.si.shlqbii
 
3530
  case Intrinsic::spu_si_shlqbyi:               // llvm.spu.si.shlqbyi
 
3531
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
 
3532
    break;
 
3533
  case Intrinsic::x86_sse42_pcmpestrm128:               // llvm.x86.sse42.pcmpestrm128
 
3534
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v16i8, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8);
 
3535
    break;
 
3536
  case Intrinsic::spu_si_andbi:         // llvm.spu.si.andbi
 
3537
  case Intrinsic::spu_si_ceqbi:         // llvm.spu.si.ceqbi
 
3538
  case Intrinsic::spu_si_cgtbi:         // llvm.spu.si.cgtbi
 
3539
  case Intrinsic::spu_si_clgtbi:                // llvm.spu.si.clgtbi
 
3540
  case Intrinsic::spu_si_orbi:          // llvm.spu.si.orbi
 
3541
  case Intrinsic::spu_si_xorbi:         // llvm.spu.si.xorbi
 
3542
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8);
 
3543
    break;
 
3544
  case Intrinsic::ppc_altivec_vaddsbs:          // llvm.ppc.altivec.vaddsbs
 
3545
  case Intrinsic::ppc_altivec_vaddubs:          // llvm.ppc.altivec.vaddubs
 
3546
  case Intrinsic::ppc_altivec_vavgsb:           // llvm.ppc.altivec.vavgsb
 
3547
  case Intrinsic::ppc_altivec_vavgub:           // llvm.ppc.altivec.vavgub
 
3548
  case Intrinsic::ppc_altivec_vcmpequb:         // llvm.ppc.altivec.vcmpequb
 
3549
  case Intrinsic::ppc_altivec_vcmpgtsb:         // llvm.ppc.altivec.vcmpgtsb
 
3550
  case Intrinsic::ppc_altivec_vcmpgtub:         // llvm.ppc.altivec.vcmpgtub
 
3551
  case Intrinsic::ppc_altivec_vmaxsb:           // llvm.ppc.altivec.vmaxsb
 
3552
  case Intrinsic::ppc_altivec_vmaxub:           // llvm.ppc.altivec.vmaxub
 
3553
  case Intrinsic::ppc_altivec_vminsb:           // llvm.ppc.altivec.vminsb
 
3554
  case Intrinsic::ppc_altivec_vminub:           // llvm.ppc.altivec.vminub
 
3555
  case Intrinsic::ppc_altivec_vrlb:             // llvm.ppc.altivec.vrlb
 
3556
  case Intrinsic::ppc_altivec_vslb:             // llvm.ppc.altivec.vslb
 
3557
  case Intrinsic::ppc_altivec_vsrab:            // llvm.ppc.altivec.vsrab
 
3558
  case Intrinsic::ppc_altivec_vsrb:             // llvm.ppc.altivec.vsrb
 
3559
  case Intrinsic::ppc_altivec_vsubsbs:          // llvm.ppc.altivec.vsubsbs
 
3560
  case Intrinsic::ppc_altivec_vsububs:          // llvm.ppc.altivec.vsububs
 
3561
  case Intrinsic::spu_si_ceqb:          // llvm.spu.si.ceqb
 
3562
  case Intrinsic::spu_si_cgtb:          // llvm.spu.si.cgtb
 
3563
  case Intrinsic::spu_si_clgtb:         // llvm.spu.si.clgtb
 
3564
  case Intrinsic::x86_sse2_padds_b:             // llvm.x86.sse2.padds.b
 
3565
  case Intrinsic::x86_sse2_paddus_b:            // llvm.x86.sse2.paddus.b
 
3566
  case Intrinsic::x86_sse2_pavg_b:              // llvm.x86.sse2.pavg.b
 
3567
  case Intrinsic::x86_sse2_pcmpeq_b:            // llvm.x86.sse2.pcmpeq.b
 
3568
  case Intrinsic::x86_sse2_pcmpgt_b:            // llvm.x86.sse2.pcmpgt.b
 
3569
  case Intrinsic::x86_sse2_pmaxu_b:             // llvm.x86.sse2.pmaxu.b
 
3570
  case Intrinsic::x86_sse2_pminu_b:             // llvm.x86.sse2.pminu.b
 
3571
  case Intrinsic::x86_sse2_psubs_b:             // llvm.x86.sse2.psubs.b
 
3572
  case Intrinsic::x86_sse2_psubus_b:            // llvm.x86.sse2.psubus.b
 
3573
  case Intrinsic::x86_sse41_pmaxsb:             // llvm.x86.sse41.pmaxsb
 
3574
  case Intrinsic::x86_sse41_pminsb:             // llvm.x86.sse41.pminsb
 
3575
  case Intrinsic::x86_ssse3_pshuf_b_128:                // llvm.x86.ssse3.pshuf.b.128
 
3576
  case Intrinsic::x86_ssse3_psign_b_128:                // llvm.x86.ssse3.psign.b.128
 
3577
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::v16i8);
 
3578
    break;
 
3579
  case Intrinsic::x86_sse41_mpsadbw:            // llvm.x86.sse41.mpsadbw
 
3580
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i32);
 
3581
    break;
 
3582
  case Intrinsic::x86_sse42_pcmpistrm128:               // llvm.x86.sse42.pcmpistrm128
 
3583
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i8);
 
3584
    break;
 
3585
  case Intrinsic::x86_sse41_pblendvb:           // llvm.x86.sse41.pblendvb
 
3586
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::v16i8);
 
3587
    break;
 
3588
  case Intrinsic::ppc_altivec_vpkswss:          // llvm.ppc.altivec.vpkswss
 
3589
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v4i32, MVT::v4i32);
 
3590
    break;
 
3591
  case Intrinsic::ppc_altivec_vpkshss:          // llvm.ppc.altivec.vpkshss
 
3592
  case Intrinsic::ppc_altivec_vpkshus:          // llvm.ppc.altivec.vpkshus
 
3593
  case Intrinsic::ppc_altivec_vpkuhus:          // llvm.ppc.altivec.vpkuhus
 
3594
  case Intrinsic::x86_sse2_packsswb_128:                // llvm.x86.sse2.packsswb.128
 
3595
  case Intrinsic::x86_sse2_packuswb_128:                // llvm.x86.sse2.packuswb.128
 
3596
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v8i16, MVT::v8i16);
 
3597
    break;
 
3598
  case Intrinsic::x86_mmx_pslli_q:              // llvm.x86.mmx.pslli.q
 
3599
  case Intrinsic::x86_mmx_psrli_q:              // llvm.x86.mmx.psrli.q
 
3600
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::i32);
 
3601
    break;
 
3602
  case Intrinsic::x86_mmx_psll_q:               // llvm.x86.mmx.psll.q
 
3603
  case Intrinsic::x86_mmx_psrl_q:               // llvm.x86.mmx.psrl.q
 
3604
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::v1i64);
 
3605
    break;
 
3606
  case Intrinsic::x86_ssse3_palign_r:           // llvm.x86.ssse3.palign.r
 
3607
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v1i64, MVT::v1i64, MVT::v1i64, MVT::i8);
 
3608
    break;
 
3609
  case Intrinsic::x86_sse2_loadu_pd:            // llvm.x86.sse2.loadu.pd
 
3610
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::iPTR);
 
3611
    break;
 
3612
  case Intrinsic::x86_sse2_sqrt_pd:             // llvm.x86.sse2.sqrt.pd
 
3613
  case Intrinsic::x86_sse2_sqrt_sd:             // llvm.x86.sse2.sqrt.sd
 
3614
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2f64);
 
3615
    break;
 
3616
  case Intrinsic::x86_sse2_cvtsi2sd:            // llvm.x86.sse2.cvtsi2sd
 
3617
  case Intrinsic::x86_sse41_round_pd:           // llvm.x86.sse41.round.pd
 
3618
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i32);
 
3619
    break;
 
3620
  case Intrinsic::x86_sse2_cvtsi642sd:          // llvm.x86.sse2.cvtsi642sd
 
3621
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i64);
 
3622
    break;
 
3623
  case Intrinsic::spu_si_dfa:           // llvm.spu.si.dfa
 
3624
  case Intrinsic::spu_si_dfm:           // llvm.spu.si.dfm
 
3625
  case Intrinsic::spu_si_dfma:          // llvm.spu.si.dfma
 
3626
  case Intrinsic::spu_si_dfms:          // llvm.spu.si.dfms
 
3627
  case Intrinsic::spu_si_dfnma:         // llvm.spu.si.dfnma
 
3628
  case Intrinsic::spu_si_dfnms:         // llvm.spu.si.dfnms
 
3629
  case Intrinsic::spu_si_dfs:           // llvm.spu.si.dfs
 
3630
  case Intrinsic::x86_sse2_add_sd:              // llvm.x86.sse2.add.sd
 
3631
  case Intrinsic::x86_sse2_div_sd:              // llvm.x86.sse2.div.sd
 
3632
  case Intrinsic::x86_sse2_max_pd:              // llvm.x86.sse2.max.pd
 
3633
  case Intrinsic::x86_sse2_max_sd:              // llvm.x86.sse2.max.sd
 
3634
  case Intrinsic::x86_sse2_min_pd:              // llvm.x86.sse2.min.pd
 
3635
  case Intrinsic::x86_sse2_min_sd:              // llvm.x86.sse2.min.sd
 
3636
  case Intrinsic::x86_sse2_mul_sd:              // llvm.x86.sse2.mul.sd
 
3637
  case Intrinsic::x86_sse2_sub_sd:              // llvm.x86.sse2.sub.sd
 
3638
  case Intrinsic::x86_sse3_addsub_pd:           // llvm.x86.sse3.addsub.pd
 
3639
  case Intrinsic::x86_sse3_hadd_pd:             // llvm.x86.sse3.hadd.pd
 
3640
  case Intrinsic::x86_sse3_hsub_pd:             // llvm.x86.sse3.hsub.pd
 
3641
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2f64);
 
3642
    break;
 
3643
  case Intrinsic::x86_sse41_blendpd:            // llvm.x86.sse41.blendpd
 
3644
  case Intrinsic::x86_sse41_dppd:               // llvm.x86.sse41.dppd
 
3645
  case Intrinsic::x86_sse41_round_sd:           // llvm.x86.sse41.round.sd
 
3646
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i32);
 
3647
    break;
 
3648
  case Intrinsic::x86_sse2_cmp_pd:              // llvm.x86.sse2.cmp.pd
 
3649
  case Intrinsic::x86_sse2_cmp_sd:              // llvm.x86.sse2.cmp.sd
 
3650
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i8);
 
3651
    break;
 
3652
  case Intrinsic::x86_sse41_blendvpd:           // llvm.x86.sse41.blendvpd
 
3653
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::v2f64);
 
3654
    break;
 
3655
  case Intrinsic::x86_sse2_cvtss2sd:            // llvm.x86.sse2.cvtss2sd
 
3656
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v4f32);
 
3657
    break;
 
3658
  case Intrinsic::x86_sse_cvtpi2pd:             // llvm.x86.sse.cvtpi2pd
 
3659
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2i32);
 
3660
    break;
 
3661
  case Intrinsic::x86_sse2_cvtps2pd:            // llvm.x86.sse2.cvtps2pd
 
3662
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4f32);
 
3663
    break;
 
3664
  case Intrinsic::x86_sse2_cvtdq2pd:            // llvm.x86.sse2.cvtdq2pd
 
3665
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4i32);
 
3666
    break;
 
3667
  case Intrinsic::arm_neon_vacged:              // llvm.arm.neon.vacged
 
3668
  case Intrinsic::arm_neon_vacgtd:              // llvm.arm.neon.vacgtd
 
3669
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2f32, MVT::v2f32);
 
3670
    break;
 
3671
  case Intrinsic::x86_sse_cvtpd2pi:             // llvm.x86.sse.cvtpd2pi
 
3672
  case Intrinsic::x86_sse_cvttpd2pi:            // llvm.x86.sse.cvttpd2pi
 
3673
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2f64);
 
3674
    break;
 
3675
  case Intrinsic::x86_ssse3_pabs_d:             // llvm.x86.ssse3.pabs.d
 
3676
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2i32);
 
3677
    break;
 
3678
  case Intrinsic::x86_mmx_pslli_d:              // llvm.x86.mmx.pslli.d
 
3679
  case Intrinsic::x86_mmx_psrai_d:              // llvm.x86.mmx.psrai.d
 
3680
  case Intrinsic::x86_mmx_psrli_d:              // llvm.x86.mmx.psrli.d
 
3681
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::i32);
 
3682
    break;
 
3683
  case Intrinsic::x86_mmx_psll_d:               // llvm.x86.mmx.psll.d
 
3684
  case Intrinsic::x86_mmx_psra_d:               // llvm.x86.mmx.psra.d
 
3685
  case Intrinsic::x86_mmx_psrl_d:               // llvm.x86.mmx.psrl.d
 
3686
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v1i64);
 
3687
    break;
 
3688
  case Intrinsic::x86_mmx_pcmpeq_d:             // llvm.x86.mmx.pcmpeq.d
 
3689
  case Intrinsic::x86_mmx_pcmpgt_d:             // llvm.x86.mmx.pcmpgt.d
 
3690
  case Intrinsic::x86_mmx_pmulu_dq:             // llvm.x86.mmx.pmulu.dq
 
3691
  case Intrinsic::x86_ssse3_phadd_d:            // llvm.x86.ssse3.phadd.d
 
3692
  case Intrinsic::x86_ssse3_phsub_d:            // llvm.x86.ssse3.phsub.d
 
3693
  case Intrinsic::x86_ssse3_psign_d:            // llvm.x86.ssse3.psign.d
 
3694
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v2i32);
 
3695
    break;
 
3696
  case Intrinsic::x86_sse_cvtps2pi:             // llvm.x86.sse.cvtps2pi
 
3697
  case Intrinsic::x86_sse_cvttps2pi:            // llvm.x86.sse.cvttps2pi
 
3698
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v4f32);
 
3699
    break;
 
3700
  case Intrinsic::x86_mmx_pmadd_wd:             // llvm.x86.mmx.pmadd.wd
 
3701
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v4i16, MVT::v4i16);
 
3702
    break;
 
3703
  case Intrinsic::x86_sse41_movntdqa:           // llvm.x86.sse41.movntdqa
 
3704
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::iPTR);
 
3705
    break;
 
3706
  case Intrinsic::x86_sse41_pmovsxbq:           // llvm.x86.sse41.pmovsxbq
 
3707
  case Intrinsic::x86_sse41_pmovzxbq:           // llvm.x86.sse41.pmovzxbq
 
3708
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v16i8);
 
3709
    break;
 
3710
  case Intrinsic::x86_sse2_psad_bw:             // llvm.x86.sse2.psad.bw
 
3711
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v16i8, MVT::v16i8);
 
3712
    break;
 
3713
  case Intrinsic::x86_sse2_psll_dq:             // llvm.x86.sse2.psll.dq
 
3714
  case Intrinsic::x86_sse2_psll_dq_bs:          // llvm.x86.sse2.psll.dq.bs
 
3715
  case Intrinsic::x86_sse2_pslli_q:             // llvm.x86.sse2.pslli.q
 
3716
  case Intrinsic::x86_sse2_psrl_dq:             // llvm.x86.sse2.psrl.dq
 
3717
  case Intrinsic::x86_sse2_psrl_dq_bs:          // llvm.x86.sse2.psrl.dq.bs
 
3718
  case Intrinsic::x86_sse2_psrli_q:             // llvm.x86.sse2.psrli.q
 
3719
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i32);
 
3720
    break;
 
3721
  case Intrinsic::x86_sse2_psll_q:              // llvm.x86.sse2.psll.q
 
3722
  case Intrinsic::x86_sse2_psrl_q:              // llvm.x86.sse2.psrl.q
 
3723
  case Intrinsic::x86_sse41_pcmpeqq:            // llvm.x86.sse41.pcmpeqq
 
3724
  case Intrinsic::x86_sse42_pcmpgtq:            // llvm.x86.sse42.pcmpgtq
 
3725
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::v2i64);
 
3726
    break;
 
3727
  case Intrinsic::x86_ssse3_palign_r_128:               // llvm.x86.ssse3.palign.r.128
 
3728
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2i64, MVT::v2i64, MVT::v2i64, MVT::i8);
 
3729
    break;
 
3730
  case Intrinsic::x86_sse41_pmovsxdq:           // llvm.x86.sse41.pmovsxdq
 
3731
  case Intrinsic::x86_sse41_pmovzxdq:           // llvm.x86.sse41.pmovzxdq
 
3732
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v4i32);
 
3733
    break;
 
3734
  case Intrinsic::x86_sse2_pmulu_dq:            // llvm.x86.sse2.pmulu.dq
 
3735
  case Intrinsic::x86_sse41_pmuldq:             // llvm.x86.sse41.pmuldq
 
3736
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v4i32, MVT::v4i32);
 
3737
    break;
 
3738
  case Intrinsic::x86_sse41_pmovsxwq:           // llvm.x86.sse41.pmovsxwq
 
3739
  case Intrinsic::x86_sse41_pmovzxwq:           // llvm.x86.sse41.pmovzxwq
 
3740
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v8i16);
 
3741
    break;
 
3742
  case Intrinsic::x86_sse_loadu_ps:             // llvm.x86.sse.loadu.ps
 
3743
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::iPTR);
 
3744
    break;
 
3745
  case Intrinsic::x86_sse2_cvtpd2ps:            // llvm.x86.sse2.cvtpd2ps
 
3746
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v2f64);
 
3747
    break;
 
3748
  case Intrinsic::ppc_altivec_vexptefp:         // llvm.ppc.altivec.vexptefp
 
3749
  case Intrinsic::ppc_altivec_vlogefp:          // llvm.ppc.altivec.vlogefp
 
3750
  case Intrinsic::ppc_altivec_vrefp:            // llvm.ppc.altivec.vrefp
 
3751
  case Intrinsic::ppc_altivec_vrfim:            // llvm.ppc.altivec.vrfim
 
3752
  case Intrinsic::ppc_altivec_vrfin:            // llvm.ppc.altivec.vrfin
 
3753
  case Intrinsic::ppc_altivec_vrfip:            // llvm.ppc.altivec.vrfip
 
3754
  case Intrinsic::ppc_altivec_vrfiz:            // llvm.ppc.altivec.vrfiz
 
3755
  case Intrinsic::ppc_altivec_vrsqrtefp:                // llvm.ppc.altivec.vrsqrtefp
 
3756
  case Intrinsic::x86_sse_rcp_ps:               // llvm.x86.sse.rcp.ps
 
3757
  case Intrinsic::x86_sse_rcp_ss:               // llvm.x86.sse.rcp.ss
 
3758
  case Intrinsic::x86_sse_rsqrt_ps:             // llvm.x86.sse.rsqrt.ps
 
3759
  case Intrinsic::x86_sse_rsqrt_ss:             // llvm.x86.sse.rsqrt.ss
 
3760
  case Intrinsic::x86_sse_sqrt_ps:              // llvm.x86.sse.sqrt.ps
 
3761
  case Intrinsic::x86_sse_sqrt_ss:              // llvm.x86.sse.sqrt.ss
 
3762
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f32);
 
3763
    break;
 
3764
  case Intrinsic::x86_sse41_round_ps:           // llvm.x86.sse41.round.ps
 
3765
  case Intrinsic::x86_sse_cvtsi2ss:             // llvm.x86.sse.cvtsi2ss
 
3766
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i32);
 
3767
    break;
 
3768
  case Intrinsic::x86_sse_cvtsi642ss:           // llvm.x86.sse.cvtsi642ss
 
3769
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i64);
 
3770
    break;
 
3771
  case Intrinsic::x86_sse2_cvtsd2ss:            // llvm.x86.sse2.cvtsd2ss
 
3772
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2f64);
 
3773
    break;
 
3774
  case Intrinsic::x86_sse_cvtpi2ps:             // llvm.x86.sse.cvtpi2ps
 
3775
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2i32);
 
3776
    break;
 
3777
  case Intrinsic::ppc_altivec_vmaxfp:           // llvm.ppc.altivec.vmaxfp
 
3778
  case Intrinsic::ppc_altivec_vminfp:           // llvm.ppc.altivec.vminfp
 
3779
  case Intrinsic::spu_si_fa:            // llvm.spu.si.fa
 
3780
  case Intrinsic::spu_si_fceq:          // llvm.spu.si.fceq
 
3781
  case Intrinsic::spu_si_fcgt:          // llvm.spu.si.fcgt
 
3782
  case Intrinsic::spu_si_fcmeq:         // llvm.spu.si.fcmeq
 
3783
  case Intrinsic::spu_si_fcmgt:         // llvm.spu.si.fcmgt
 
3784
  case Intrinsic::spu_si_fm:            // llvm.spu.si.fm
 
3785
  case Intrinsic::spu_si_fs:            // llvm.spu.si.fs
 
3786
  case Intrinsic::x86_sse3_addsub_ps:           // llvm.x86.sse3.addsub.ps
 
3787
  case Intrinsic::x86_sse3_hadd_ps:             // llvm.x86.sse3.hadd.ps
 
3788
  case Intrinsic::x86_sse3_hsub_ps:             // llvm.x86.sse3.hsub.ps
 
3789
  case Intrinsic::x86_sse_add_ss:               // llvm.x86.sse.add.ss
 
3790
  case Intrinsic::x86_sse_div_ss:               // llvm.x86.sse.div.ss
 
3791
  case Intrinsic::x86_sse_max_ps:               // llvm.x86.sse.max.ps
 
3792
  case Intrinsic::x86_sse_max_ss:               // llvm.x86.sse.max.ss
 
3793
  case Intrinsic::x86_sse_min_ps:               // llvm.x86.sse.min.ps
 
3794
  case Intrinsic::x86_sse_min_ss:               // llvm.x86.sse.min.ss
 
3795
  case Intrinsic::x86_sse_mul_ss:               // llvm.x86.sse.mul.ss
 
3796
  case Intrinsic::x86_sse_sub_ss:               // llvm.x86.sse.sub.ss
 
3797
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4f32);
 
3798
    break;
 
3799
  case Intrinsic::x86_sse41_blendps:            // llvm.x86.sse41.blendps
 
3800
  case Intrinsic::x86_sse41_dpps:               // llvm.x86.sse41.dpps
 
3801
  case Intrinsic::x86_sse41_insertps:           // llvm.x86.sse41.insertps
 
3802
  case Intrinsic::x86_sse41_round_ss:           // llvm.x86.sse41.round.ss
 
3803
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i32);
 
3804
    break;
 
3805
  case Intrinsic::x86_sse_cmp_ps:               // llvm.x86.sse.cmp.ps
 
3806
  case Intrinsic::x86_sse_cmp_ss:               // llvm.x86.sse.cmp.ss
 
3807
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i8);
 
3808
    break;
 
3809
  case Intrinsic::ppc_altivec_vmaddfp:          // llvm.ppc.altivec.vmaddfp
 
3810
  case Intrinsic::ppc_altivec_vnmsubfp:         // llvm.ppc.altivec.vnmsubfp
 
3811
  case Intrinsic::spu_si_fma:           // llvm.spu.si.fma
 
3812
  case Intrinsic::spu_si_fms:           // llvm.spu.si.fms
 
3813
  case Intrinsic::spu_si_fnms:          // llvm.spu.si.fnms
 
3814
  case Intrinsic::x86_sse41_blendvps:           // llvm.x86.sse41.blendvps
 
3815
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::v4f32);
 
3816
    break;
 
3817
  case Intrinsic::x86_sse2_cvtdq2ps:            // llvm.x86.sse2.cvtdq2ps
 
3818
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4i32);
 
3819
    break;
 
3820
  case Intrinsic::ppc_altivec_vcfsx:            // llvm.ppc.altivec.vcfsx
 
3821
  case Intrinsic::ppc_altivec_vcfux:            // llvm.ppc.altivec.vcfux
 
3822
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4i32, MVT::i32);
 
3823
    break;
 
3824
  case Intrinsic::x86_mmx_packssdw:             // llvm.x86.mmx.packssdw
 
3825
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v2i32, MVT::v2i32);
 
3826
    break;
 
3827
  case Intrinsic::x86_ssse3_pabs_w:             // llvm.x86.ssse3.pabs.w
 
3828
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i16, MVT::v4i16);
 
3829
    break;
 
3830
  case Intrinsic::x86_mmx_pslli_w:              // llvm.x86.mmx.pslli.w
 
3831
  case Intrinsic::x86_mmx_psrai_w:              // llvm.x86.mmx.psrai.w
 
3832
  case Intrinsic::x86_mmx_psrli_w:              // llvm.x86.mmx.psrli.w
 
3833
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::i32);
 
3834
    break;
 
3835
  case Intrinsic::x86_mmx_psll_w:               // llvm.x86.mmx.psll.w
 
3836
  case Intrinsic::x86_mmx_psra_w:               // llvm.x86.mmx.psra.w
 
3837
  case Intrinsic::x86_mmx_psrl_w:               // llvm.x86.mmx.psrl.w
 
3838
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v1i64);
 
3839
    break;
 
3840
  case Intrinsic::x86_mmx_padds_w:              // llvm.x86.mmx.padds.w
 
3841
  case Intrinsic::x86_mmx_paddus_w:             // llvm.x86.mmx.paddus.w
 
3842
  case Intrinsic::x86_mmx_pavg_w:               // llvm.x86.mmx.pavg.w
 
3843
  case Intrinsic::x86_mmx_pcmpeq_w:             // llvm.x86.mmx.pcmpeq.w
 
3844
  case Intrinsic::x86_mmx_pcmpgt_w:             // llvm.x86.mmx.pcmpgt.w
 
3845
  case Intrinsic::x86_mmx_pmaxs_w:              // llvm.x86.mmx.pmaxs.w
 
3846
  case Intrinsic::x86_mmx_pmins_w:              // llvm.x86.mmx.pmins.w
 
3847
  case Intrinsic::x86_mmx_pmulh_w:              // llvm.x86.mmx.pmulh.w
 
3848
  case Intrinsic::x86_mmx_pmulhu_w:             // llvm.x86.mmx.pmulhu.w
 
3849
  case Intrinsic::x86_mmx_psubs_w:              // llvm.x86.mmx.psubs.w
 
3850
  case Intrinsic::x86_mmx_psubus_w:             // llvm.x86.mmx.psubus.w
 
3851
  case Intrinsic::x86_ssse3_phadd_sw:           // llvm.x86.ssse3.phadd.sw
 
3852
  case Intrinsic::x86_ssse3_phadd_w:            // llvm.x86.ssse3.phadd.w
 
3853
  case Intrinsic::x86_ssse3_phsub_sw:           // llvm.x86.ssse3.phsub.sw
 
3854
  case Intrinsic::x86_ssse3_phsub_w:            // llvm.x86.ssse3.phsub.w
 
3855
  case Intrinsic::x86_ssse3_pmadd_ub_sw:                // llvm.x86.ssse3.pmadd.ub.sw
 
3856
  case Intrinsic::x86_ssse3_pmul_hr_sw:         // llvm.x86.ssse3.pmul.hr.sw
 
3857
  case Intrinsic::x86_ssse3_psign_w:            // llvm.x86.ssse3.psign.w
 
3858
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v4i16);
 
3859
    break;
 
3860
  case Intrinsic::x86_mmx_psad_bw:              // llvm.x86.mmx.psad.bw
 
3861
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v8i8, MVT::v8i8);
 
3862
    break;
 
3863
  case Intrinsic::ppc_altivec_lvewx:            // llvm.ppc.altivec.lvewx
 
3864
  case Intrinsic::ppc_altivec_lvx:              // llvm.ppc.altivec.lvx
 
3865
  case Intrinsic::ppc_altivec_lvxl:             // llvm.ppc.altivec.lvxl
 
3866
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::iPTR);
 
3867
    break;
 
3868
  case Intrinsic::x86_sse41_pmovsxbd:           // llvm.x86.sse41.pmovsxbd
 
3869
  case Intrinsic::x86_sse41_pmovzxbd:           // llvm.x86.sse41.pmovzxbd
 
3870
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v16i8);
 
3871
    break;
 
3872
  case Intrinsic::ppc_altivec_vmsummbm:         // llvm.ppc.altivec.vmsummbm
 
3873
  case Intrinsic::ppc_altivec_vmsumubm:         // llvm.ppc.altivec.vmsumubm
 
3874
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v16i8, MVT::v16i8, MVT::v4i32);
 
3875
    break;
 
3876
  case Intrinsic::ppc_altivec_vsum4sbs:         // llvm.ppc.altivec.vsum4sbs
 
3877
  case Intrinsic::ppc_altivec_vsum4ubs:         // llvm.ppc.altivec.vsum4ubs
 
3878
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v16i8, MVT::v4i32);
 
3879
    break;
 
3880
  case Intrinsic::x86_sse2_cvtpd2dq:            // llvm.x86.sse2.cvtpd2dq
 
3881
  case Intrinsic::x86_sse2_cvttpd2dq:           // llvm.x86.sse2.cvttpd2dq
 
3882
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v2f64);
 
3883
    break;
 
3884
  case Intrinsic::x86_sse2_cvtps2dq:            // llvm.x86.sse2.cvtps2dq
 
3885
  case Intrinsic::x86_sse2_cvttps2dq:           // llvm.x86.sse2.cvttps2dq
 
3886
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f32);
 
3887
    break;
 
3888
  case Intrinsic::ppc_altivec_vctsxs:           // llvm.ppc.altivec.vctsxs
 
3889
  case Intrinsic::ppc_altivec_vctuxs:           // llvm.ppc.altivec.vctuxs
 
3890
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::i32);
 
3891
    break;
 
3892
  case Intrinsic::arm_neon_vacgeq:              // llvm.arm.neon.vacgeq
 
3893
  case Intrinsic::arm_neon_vacgtq:              // llvm.arm.neon.vacgtq
 
3894
  case Intrinsic::ppc_altivec_vcmpbfp:          // llvm.ppc.altivec.vcmpbfp
 
3895
  case Intrinsic::ppc_altivec_vcmpeqfp:         // llvm.ppc.altivec.vcmpeqfp
 
3896
  case Intrinsic::ppc_altivec_vcmpgefp:         // llvm.ppc.altivec.vcmpgefp
 
3897
  case Intrinsic::ppc_altivec_vcmpgtfp:         // llvm.ppc.altivec.vcmpgtfp
 
3898
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::v4f32);
 
3899
    break;
 
3900
  case Intrinsic::x86_ssse3_pabs_d_128:         // llvm.x86.ssse3.pabs.d.128
 
3901
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4i32);
 
3902
    break;
 
3903
  case Intrinsic::spu_si_shli:          // llvm.spu.si.shli
 
3904
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i8);
 
3905
    break;
 
3906
  case Intrinsic::spu_si_ai:            // llvm.spu.si.ai
 
3907
  case Intrinsic::spu_si_andi:          // llvm.spu.si.andi
 
3908
  case Intrinsic::spu_si_ceqi:          // llvm.spu.si.ceqi
 
3909
  case Intrinsic::spu_si_cgti:          // llvm.spu.si.cgti
 
3910
  case Intrinsic::spu_si_clgti:         // llvm.spu.si.clgti
 
3911
  case Intrinsic::spu_si_ori:           // llvm.spu.si.ori
 
3912
  case Intrinsic::spu_si_sfi:           // llvm.spu.si.sfi
 
3913
  case Intrinsic::spu_si_xori:          // llvm.spu.si.xori
 
3914
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i16);
 
3915
    break;
 
3916
  case Intrinsic::x86_sse2_pslli_d:             // llvm.x86.sse2.pslli.d
 
3917
  case Intrinsic::x86_sse2_psrai_d:             // llvm.x86.sse2.psrai.d
 
3918
  case Intrinsic::x86_sse2_psrli_d:             // llvm.x86.sse2.psrli.d
 
3919
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i32);
 
3920
    break;
 
3921
  case Intrinsic::ppc_altivec_vaddcuw:          // llvm.ppc.altivec.vaddcuw
 
3922
  case Intrinsic::ppc_altivec_vaddsws:          // llvm.ppc.altivec.vaddsws
 
3923
  case Intrinsic::ppc_altivec_vadduws:          // llvm.ppc.altivec.vadduws
 
3924
  case Intrinsic::ppc_altivec_vavgsw:           // llvm.ppc.altivec.vavgsw
 
3925
  case Intrinsic::ppc_altivec_vavguw:           // llvm.ppc.altivec.vavguw
 
3926
  case Intrinsic::ppc_altivec_vcmpequw:         // llvm.ppc.altivec.vcmpequw
 
3927
  case Intrinsic::ppc_altivec_vcmpgtsw:         // llvm.ppc.altivec.vcmpgtsw
 
3928
  case Intrinsic::ppc_altivec_vcmpgtuw:         // llvm.ppc.altivec.vcmpgtuw
 
3929
  case Intrinsic::ppc_altivec_vmaxsw:           // llvm.ppc.altivec.vmaxsw
 
3930
  case Intrinsic::ppc_altivec_vmaxuw:           // llvm.ppc.altivec.vmaxuw
 
3931
  case Intrinsic::ppc_altivec_vminsw:           // llvm.ppc.altivec.vminsw
 
3932
  case Intrinsic::ppc_altivec_vminuw:           // llvm.ppc.altivec.vminuw
 
3933
  case Intrinsic::ppc_altivec_vrlw:             // llvm.ppc.altivec.vrlw
 
3934
  case Intrinsic::ppc_altivec_vsl:              // llvm.ppc.altivec.vsl
 
3935
  case Intrinsic::ppc_altivec_vslo:             // llvm.ppc.altivec.vslo
 
3936
  case Intrinsic::ppc_altivec_vslw:             // llvm.ppc.altivec.vslw
 
3937
  case Intrinsic::ppc_altivec_vsr:              // llvm.ppc.altivec.vsr
 
3938
  case Intrinsic::ppc_altivec_vsraw:            // llvm.ppc.altivec.vsraw
 
3939
  case Intrinsic::ppc_altivec_vsro:             // llvm.ppc.altivec.vsro
 
3940
  case Intrinsic::ppc_altivec_vsrw:             // llvm.ppc.altivec.vsrw
 
3941
  case Intrinsic::ppc_altivec_vsubcuw:          // llvm.ppc.altivec.vsubcuw
 
3942
  case Intrinsic::ppc_altivec_vsubsws:          // llvm.ppc.altivec.vsubsws
 
3943
  case Intrinsic::ppc_altivec_vsubuws:          // llvm.ppc.altivec.vsubuws
 
3944
  case Intrinsic::ppc_altivec_vsum2sws:         // llvm.ppc.altivec.vsum2sws
 
3945
  case Intrinsic::ppc_altivec_vsumsws:          // llvm.ppc.altivec.vsumsws
 
3946
  case Intrinsic::spu_si_a:             // llvm.spu.si.a
 
3947
  case Intrinsic::spu_si_addx:          // llvm.spu.si.addx
 
3948
  case Intrinsic::spu_si_and:           // llvm.spu.si.and
 
3949
  case Intrinsic::spu_si_andc:          // llvm.spu.si.andc
 
3950
  case Intrinsic::spu_si_bg:            // llvm.spu.si.bg
 
3951
  case Intrinsic::spu_si_bgx:           // llvm.spu.si.bgx
 
3952
  case Intrinsic::spu_si_ceq:           // llvm.spu.si.ceq
 
3953
  case Intrinsic::spu_si_cg:            // llvm.spu.si.cg
 
3954
  case Intrinsic::spu_si_cgt:           // llvm.spu.si.cgt
 
3955
  case Intrinsic::spu_si_cgx:           // llvm.spu.si.cgx
 
3956
  case Intrinsic::spu_si_clgt:          // llvm.spu.si.clgt
 
3957
  case Intrinsic::spu_si_nand:          // llvm.spu.si.nand
 
3958
  case Intrinsic::spu_si_nor:           // llvm.spu.si.nor
 
3959
  case Intrinsic::spu_si_or:            // llvm.spu.si.or
 
3960
  case Intrinsic::spu_si_orc:           // llvm.spu.si.orc
 
3961
  case Intrinsic::spu_si_sf:            // llvm.spu.si.sf
 
3962
  case Intrinsic::spu_si_sfx:           // llvm.spu.si.sfx
 
3963
  case Intrinsic::spu_si_xor:           // llvm.spu.si.xor
 
3964
  case Intrinsic::x86_sse2_pcmpeq_d:            // llvm.x86.sse2.pcmpeq.d
 
3965
  case Intrinsic::x86_sse2_pcmpgt_d:            // llvm.x86.sse2.pcmpgt.d
 
3966
  case Intrinsic::x86_sse2_psll_d:              // llvm.x86.sse2.psll.d
 
3967
  case Intrinsic::x86_sse2_psra_d:              // llvm.x86.sse2.psra.d
 
3968
  case Intrinsic::x86_sse2_psrl_d:              // llvm.x86.sse2.psrl.d
 
3969
  case Intrinsic::x86_sse41_pmaxsd:             // llvm.x86.sse41.pmaxsd
 
3970
  case Intrinsic::x86_sse41_pmaxud:             // llvm.x86.sse41.pmaxud
 
3971
  case Intrinsic::x86_sse41_pminsd:             // llvm.x86.sse41.pminsd
 
3972
  case Intrinsic::x86_sse41_pminud:             // llvm.x86.sse41.pminud
 
3973
  case Intrinsic::x86_sse41_pmulld:             // llvm.x86.sse41.pmulld
 
3974
  case Intrinsic::x86_ssse3_phadd_d_128:                // llvm.x86.ssse3.phadd.d.128
 
3975
  case Intrinsic::x86_ssse3_phadd_sw_128:               // llvm.x86.ssse3.phadd.sw.128
 
3976
  case Intrinsic::x86_ssse3_phsub_d_128:                // llvm.x86.ssse3.phsub.d.128
 
3977
  case Intrinsic::x86_ssse3_psign_d_128:                // llvm.x86.ssse3.psign.d.128
 
3978
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v4i32);
 
3979
    break;
 
3980
  case Intrinsic::ppc_altivec_vperm:            // llvm.ppc.altivec.vperm
 
3981
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v16i8);
 
3982
    break;
 
3983
  case Intrinsic::ppc_altivec_vsel:             // llvm.ppc.altivec.vsel
 
3984
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v4i32);
 
3985
    break;
 
3986
  case Intrinsic::spu_si_mpyh:          // llvm.spu.si.mpyh
 
3987
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v8i16);
 
3988
    break;
 
3989
  case Intrinsic::ppc_altivec_vupkhpx:          // llvm.ppc.altivec.vupkhpx
 
3990
  case Intrinsic::ppc_altivec_vupkhsh:          // llvm.ppc.altivec.vupkhsh
 
3991
  case Intrinsic::ppc_altivec_vupklpx:          // llvm.ppc.altivec.vupklpx
 
3992
  case Intrinsic::ppc_altivec_vupklsh:          // llvm.ppc.altivec.vupklsh
 
3993
  case Intrinsic::x86_sse41_pmovsxwd:           // llvm.x86.sse41.pmovsxwd
 
3994
  case Intrinsic::x86_sse41_pmovzxwd:           // llvm.x86.sse41.pmovzxwd
 
3995
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v8i16);
 
3996
    break;
 
3997
  case Intrinsic::spu_si_mpyi:          // llvm.spu.si.mpyi
 
3998
  case Intrinsic::spu_si_mpyui:         // llvm.spu.si.mpyui
 
3999
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::i16);
 
4000
    break;
 
4001
  case Intrinsic::ppc_altivec_vsum4shs:         // llvm.ppc.altivec.vsum4shs
 
4002
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v4i32);
 
4003
    break;
 
4004
  case Intrinsic::ppc_altivec_vmulesh:          // llvm.ppc.altivec.vmulesh
 
4005
  case Intrinsic::ppc_altivec_vmuleuh:          // llvm.ppc.altivec.vmuleuh
 
4006
  case Intrinsic::ppc_altivec_vmulosh:          // llvm.ppc.altivec.vmulosh
 
4007
  case Intrinsic::ppc_altivec_vmulouh:          // llvm.ppc.altivec.vmulouh
 
4008
  case Intrinsic::spu_si_mpy:           // llvm.spu.si.mpy
 
4009
  case Intrinsic::spu_si_mpyhh:         // llvm.spu.si.mpyhh
 
4010
  case Intrinsic::spu_si_mpyhha:                // llvm.spu.si.mpyhha
 
4011
  case Intrinsic::spu_si_mpyhhau:               // llvm.spu.si.mpyhhau
 
4012
  case Intrinsic::spu_si_mpyhhu:                // llvm.spu.si.mpyhhu
 
4013
  case Intrinsic::spu_si_mpys:          // llvm.spu.si.mpys
 
4014
  case Intrinsic::spu_si_mpyu:          // llvm.spu.si.mpyu
 
4015
  case Intrinsic::x86_sse2_pmadd_wd:            // llvm.x86.sse2.pmadd.wd
 
4016
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v8i16);
 
4017
    break;
 
4018
  case Intrinsic::ppc_altivec_vmsumshm:         // llvm.ppc.altivec.vmsumshm
 
4019
  case Intrinsic::ppc_altivec_vmsumshs:         // llvm.ppc.altivec.vmsumshs
 
4020
  case Intrinsic::ppc_altivec_vmsumuhm:         // llvm.ppc.altivec.vmsumuhm
 
4021
  case Intrinsic::ppc_altivec_vmsumuhs:         // llvm.ppc.altivec.vmsumuhs
 
4022
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v4i32);
 
4023
    break;
 
4024
  case Intrinsic::spu_si_mpya:          // llvm.spu.si.mpya
 
4025
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v8i16);
 
4026
    break;
 
4027
  case Intrinsic::ppc_altivec_mfvscr:           // llvm.ppc.altivec.mfvscr
 
4028
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::v8i16);
 
4029
    break;
 
4030
  case Intrinsic::ppc_altivec_lvehx:            // llvm.ppc.altivec.lvehx
 
4031
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::iPTR);
 
4032
    break;
 
4033
  case Intrinsic::ppc_altivec_vupkhsb:          // llvm.ppc.altivec.vupkhsb
 
4034
  case Intrinsic::ppc_altivec_vupklsb:          // llvm.ppc.altivec.vupklsb
 
4035
  case Intrinsic::x86_sse41_pmovsxbw:           // llvm.x86.sse41.pmovsxbw
 
4036
  case Intrinsic::x86_sse41_pmovzxbw:           // llvm.x86.sse41.pmovzxbw
 
4037
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v16i8);
 
4038
    break;
 
4039
  case Intrinsic::ppc_altivec_vmulesb:          // llvm.ppc.altivec.vmulesb
 
4040
  case Intrinsic::ppc_altivec_vmuleub:          // llvm.ppc.altivec.vmuleub
 
4041
  case Intrinsic::ppc_altivec_vmulosb:          // llvm.ppc.altivec.vmulosb
 
4042
  case Intrinsic::ppc_altivec_vmuloub:          // llvm.ppc.altivec.vmuloub
 
4043
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v16i8, MVT::v16i8);
 
4044
    break;
 
4045
  case Intrinsic::ppc_altivec_vpkpx:            // llvm.ppc.altivec.vpkpx
 
4046
  case Intrinsic::ppc_altivec_vpkswus:          // llvm.ppc.altivec.vpkswus
 
4047
  case Intrinsic::ppc_altivec_vpkuwus:          // llvm.ppc.altivec.vpkuwus
 
4048
  case Intrinsic::x86_sse2_packssdw_128:                // llvm.x86.sse2.packssdw.128
 
4049
  case Intrinsic::x86_sse41_packusdw:           // llvm.x86.sse41.packusdw
 
4050
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v4i32, MVT::v4i32);
 
4051
    break;
 
4052
  case Intrinsic::x86_sse41_phminposuw:         // llvm.x86.sse41.phminposuw
 
4053
  case Intrinsic::x86_ssse3_pabs_w_128:         // llvm.x86.ssse3.pabs.w.128
 
4054
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v8i16);
 
4055
    break;
 
4056
  case Intrinsic::spu_si_ahi:           // llvm.spu.si.ahi
 
4057
  case Intrinsic::spu_si_andhi:         // llvm.spu.si.andhi
 
4058
  case Intrinsic::spu_si_ceqhi:         // llvm.spu.si.ceqhi
 
4059
  case Intrinsic::spu_si_cgthi:         // llvm.spu.si.cgthi
 
4060
  case Intrinsic::spu_si_clgthi:                // llvm.spu.si.clgthi
 
4061
  case Intrinsic::spu_si_fsmbi:         // llvm.spu.si.fsmbi
 
4062
  case Intrinsic::spu_si_orhi:          // llvm.spu.si.orhi
 
4063
  case Intrinsic::spu_si_sfhi:          // llvm.spu.si.sfhi
 
4064
  case Intrinsic::spu_si_xorhi:         // llvm.spu.si.xorhi
 
4065
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i16);
 
4066
    break;
 
4067
  case Intrinsic::spu_si_shlqbi:                // llvm.spu.si.shlqbi
 
4068
  case Intrinsic::spu_si_shlqby:                // llvm.spu.si.shlqby
 
4069
  case Intrinsic::x86_sse2_pslli_w:             // llvm.x86.sse2.pslli.w
 
4070
  case Intrinsic::x86_sse2_psrai_w:             // llvm.x86.sse2.psrai.w
 
4071
  case Intrinsic::x86_sse2_psrli_w:             // llvm.x86.sse2.psrli.w
 
4072
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i32);
 
4073
    break;
 
4074
  case Intrinsic::ppc_altivec_vaddshs:          // llvm.ppc.altivec.vaddshs
 
4075
  case Intrinsic::ppc_altivec_vadduhs:          // llvm.ppc.altivec.vadduhs
 
4076
  case Intrinsic::ppc_altivec_vavgsh:           // llvm.ppc.altivec.vavgsh
 
4077
  case Intrinsic::ppc_altivec_vavguh:           // llvm.ppc.altivec.vavguh
 
4078
  case Intrinsic::ppc_altivec_vcmpequh:         // llvm.ppc.altivec.vcmpequh
 
4079
  case Intrinsic::ppc_altivec_vcmpgtsh:         // llvm.ppc.altivec.vcmpgtsh
 
4080
  case Intrinsic::ppc_altivec_vcmpgtuh:         // llvm.ppc.altivec.vcmpgtuh
 
4081
  case Intrinsic::ppc_altivec_vmaxsh:           // llvm.ppc.altivec.vmaxsh
 
4082
  case Intrinsic::ppc_altivec_vmaxuh:           // llvm.ppc.altivec.vmaxuh
 
4083
  case Intrinsic::ppc_altivec_vminsh:           // llvm.ppc.altivec.vminsh
 
4084
  case Intrinsic::ppc_altivec_vminuh:           // llvm.ppc.altivec.vminuh
 
4085
  case Intrinsic::ppc_altivec_vrlh:             // llvm.ppc.altivec.vrlh
 
4086
  case Intrinsic::ppc_altivec_vslh:             // llvm.ppc.altivec.vslh
 
4087
  case Intrinsic::ppc_altivec_vsrah:            // llvm.ppc.altivec.vsrah
 
4088
  case Intrinsic::ppc_altivec_vsrh:             // llvm.ppc.altivec.vsrh
 
4089
  case Intrinsic::ppc_altivec_vsubshs:          // llvm.ppc.altivec.vsubshs
 
4090
  case Intrinsic::ppc_altivec_vsubuhs:          // llvm.ppc.altivec.vsubuhs
 
4091
  case Intrinsic::spu_si_ah:            // llvm.spu.si.ah
 
4092
  case Intrinsic::spu_si_ceqh:          // llvm.spu.si.ceqh
 
4093
  case Intrinsic::spu_si_cgth:          // llvm.spu.si.cgth
 
4094
  case Intrinsic::spu_si_clgth:         // llvm.spu.si.clgth
 
4095
  case Intrinsic::spu_si_sfh:           // llvm.spu.si.sfh
 
4096
  case Intrinsic::x86_sse2_padds_w:             // llvm.x86.sse2.padds.w
 
4097
  case Intrinsic::x86_sse2_paddus_w:            // llvm.x86.sse2.paddus.w
 
4098
  case Intrinsic::x86_sse2_pavg_w:              // llvm.x86.sse2.pavg.w
 
4099
  case Intrinsic::x86_sse2_pcmpeq_w:            // llvm.x86.sse2.pcmpeq.w
 
4100
  case Intrinsic::x86_sse2_pcmpgt_w:            // llvm.x86.sse2.pcmpgt.w
 
4101
  case Intrinsic::x86_sse2_pmaxs_w:             // llvm.x86.sse2.pmaxs.w
 
4102
  case Intrinsic::x86_sse2_pmins_w:             // llvm.x86.sse2.pmins.w
 
4103
  case Intrinsic::x86_sse2_pmulh_w:             // llvm.x86.sse2.pmulh.w
 
4104
  case Intrinsic::x86_sse2_pmulhu_w:            // llvm.x86.sse2.pmulhu.w
 
4105
  case Intrinsic::x86_sse2_psll_w:              // llvm.x86.sse2.psll.w
 
4106
  case Intrinsic::x86_sse2_psra_w:              // llvm.x86.sse2.psra.w
 
4107
  case Intrinsic::x86_sse2_psrl_w:              // llvm.x86.sse2.psrl.w
 
4108
  case Intrinsic::x86_sse2_psubs_w:             // llvm.x86.sse2.psubs.w
 
4109
  case Intrinsic::x86_sse2_psubus_w:            // llvm.x86.sse2.psubus.w
 
4110
  case Intrinsic::x86_sse41_pmaxuw:             // llvm.x86.sse41.pmaxuw
 
4111
  case Intrinsic::x86_sse41_pminuw:             // llvm.x86.sse41.pminuw
 
4112
  case Intrinsic::x86_ssse3_phadd_w_128:                // llvm.x86.ssse3.phadd.w.128
 
4113
  case Intrinsic::x86_ssse3_phsub_sw_128:               // llvm.x86.ssse3.phsub.sw.128
 
4114
  case Intrinsic::x86_ssse3_phsub_w_128:                // llvm.x86.ssse3.phsub.w.128
 
4115
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:            // llvm.x86.ssse3.pmadd.ub.sw.128
 
4116
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:             // llvm.x86.ssse3.pmul.hr.sw.128
 
4117
  case Intrinsic::x86_ssse3_psign_w_128:                // llvm.x86.ssse3.psign.w.128
 
4118
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::v8i16);
 
4119
    break;
 
4120
  case Intrinsic::x86_sse41_pblendw:            // llvm.x86.sse41.pblendw
 
4121
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::i32);
 
4122
    break;
 
4123
  case Intrinsic::ppc_altivec_vmhaddshs:                // llvm.ppc.altivec.vmhaddshs
 
4124
  case Intrinsic::ppc_altivec_vmhraddshs:               // llvm.ppc.altivec.vmhraddshs
 
4125
  case Intrinsic::ppc_altivec_vmladduhm:                // llvm.ppc.altivec.vmladduhm
 
4126
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::v8i16);
 
4127
    break;
 
4128
  case Intrinsic::x86_mmx_packsswb:             // llvm.x86.mmx.packsswb
 
4129
  case Intrinsic::x86_mmx_packuswb:             // llvm.x86.mmx.packuswb
 
4130
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v4i16, MVT::v4i16);
 
4131
    break;
 
4132
  case Intrinsic::x86_ssse3_pabs_b:             // llvm.x86.ssse3.pabs.b
 
4133
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i8, MVT::v8i8);
 
4134
    break;
 
4135
  case Intrinsic::arm_neon_vtbl1:               // llvm.arm.neon.vtbl1
 
4136
  case Intrinsic::x86_mmx_padds_b:              // llvm.x86.mmx.padds.b
 
4137
  case Intrinsic::x86_mmx_paddus_b:             // llvm.x86.mmx.paddus.b
 
4138
  case Intrinsic::x86_mmx_pavg_b:               // llvm.x86.mmx.pavg.b
 
4139
  case Intrinsic::x86_mmx_pcmpeq_b:             // llvm.x86.mmx.pcmpeq.b
 
4140
  case Intrinsic::x86_mmx_pcmpgt_b:             // llvm.x86.mmx.pcmpgt.b
 
4141
  case Intrinsic::x86_mmx_pmaxu_b:              // llvm.x86.mmx.pmaxu.b
 
4142
  case Intrinsic::x86_mmx_pminu_b:              // llvm.x86.mmx.pminu.b
 
4143
  case Intrinsic::x86_mmx_psubs_b:              // llvm.x86.mmx.psubs.b
 
4144
  case Intrinsic::x86_mmx_psubus_b:             // llvm.x86.mmx.psubus.b
 
4145
  case Intrinsic::x86_ssse3_pshuf_b:            // llvm.x86.ssse3.pshuf.b
 
4146
  case Intrinsic::x86_ssse3_psign_b:            // llvm.x86.ssse3.psign.b
 
4147
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v8i8, MVT::v8i8);
 
4148
    break;
 
4149
  case Intrinsic::arm_neon_vtbl2:               // llvm.arm.neon.vtbl2
 
4150
  case Intrinsic::arm_neon_vtbx1:               // llvm.arm.neon.vtbx1
 
4151
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
 
4152
    break;
 
4153
  case Intrinsic::arm_neon_vtbl3:               // llvm.arm.neon.vtbl3
 
4154
  case Intrinsic::arm_neon_vtbx2:               // llvm.arm.neon.vtbx2
 
4155
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
 
4156
    break;
 
4157
  case Intrinsic::arm_neon_vtbl4:               // llvm.arm.neon.vtbl4
 
4158
  case Intrinsic::arm_neon_vtbx3:               // llvm.arm.neon.vtbx3
 
4159
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
 
4160
    break;
 
4161
  case Intrinsic::arm_neon_vtbx4:               // llvm.arm.neon.vtbx4
 
4162
    VerifyIntrinsicPrototype(ID, IF, 1, 6, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8);
 
4163
    break;
 
4164
  case Intrinsic::eh_unwind_init:               // llvm.eh.unwind.init
 
4165
  case Intrinsic::ppc_altivec_dssall:           // llvm.ppc.altivec.dssall
 
4166
  case Intrinsic::ppc_sync:             // llvm.ppc.sync
 
4167
  case Intrinsic::trap:         // llvm.trap
 
4168
  case Intrinsic::x86_mmx_emms:         // llvm.x86.mmx.emms
 
4169
  case Intrinsic::x86_mmx_femms:                // llvm.x86.mmx.femms
 
4170
  case Intrinsic::x86_sse2_lfence:              // llvm.x86.sse2.lfence
 
4171
  case Intrinsic::x86_sse2_mfence:              // llvm.x86.sse2.mfence
 
4172
  case Intrinsic::x86_sse_sfence:               // llvm.x86.sse.sfence
 
4173
    VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::isVoid);
 
4174
    break;
 
4175
  case Intrinsic::invariant_end:                // llvm.invariant.end
 
4176
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::iPTR, MVT::i64, MVT::iPTR);
 
4177
    break;
 
4178
  case Intrinsic::memory_barrier:               // llvm.memory.barrier
 
4179
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::isVoid, MVT::i1, MVT::i1, MVT::i1, MVT::i1, MVT::i1);
 
4180
    break;
 
4181
  case Intrinsic::eh_sjlj_callsite:             // llvm.eh.sjlj.callsite
 
4182
  case Intrinsic::pcmarker:             // llvm.pcmarker
 
4183
  case Intrinsic::ppc_altivec_dss:              // llvm.ppc.altivec.dss
 
4184
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::isVoid, MVT::i32);
 
4185
    break;
 
4186
  case Intrinsic::x86_sse3_mwait:               // llvm.x86.sse3.mwait
 
4187
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::i32, MVT::i32);
 
4188
    break;
 
4189
  case Intrinsic::eh_return_i32:                // llvm.eh.return.i32
 
4190
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::i32, MVT::iPTR);
 
4191
    break;
 
4192
  case Intrinsic::eh_return_i64:                // llvm.eh.return.i64
 
4193
  case Intrinsic::lifetime_end:         // llvm.lifetime.end
 
4194
  case Intrinsic::lifetime_start:               // llvm.lifetime.start
 
4195
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::i64, MVT::iPTR);
 
4196
    break;
 
4197
  case Intrinsic::dbg_value:            // llvm.dbg.value
 
4198
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::Metadata, MVT::i64, MVT::Metadata);
 
4199
    break;
 
4200
  case Intrinsic::dbg_declare:          // llvm.dbg.declare
 
4201
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::Metadata, MVT::Metadata);
 
4202
    break;
 
4203
  case Intrinsic::eh_sjlj_longjmp:              // llvm.eh.sjlj.longjmp
 
4204
  case Intrinsic::ppc_dcba:             // llvm.ppc.dcba
 
4205
  case Intrinsic::ppc_dcbf:             // llvm.ppc.dcbf
 
4206
  case Intrinsic::ppc_dcbi:             // llvm.ppc.dcbi
 
4207
  case Intrinsic::ppc_dcbst:            // llvm.ppc.dcbst
 
4208
  case Intrinsic::ppc_dcbt:             // llvm.ppc.dcbt
 
4209
  case Intrinsic::ppc_dcbtst:           // llvm.ppc.dcbtst
 
4210
  case Intrinsic::ppc_dcbz:             // llvm.ppc.dcbz
 
4211
  case Intrinsic::ppc_dcbzl:            // llvm.ppc.dcbzl
 
4212
  case Intrinsic::stackrestore:         // llvm.stackrestore
 
4213
  case Intrinsic::vaend:                // llvm.va_end
 
4214
  case Intrinsic::vastart:              // llvm.va_start
 
4215
  case Intrinsic::x86_sse2_clflush:             // llvm.x86.sse2.clflush
 
4216
  case Intrinsic::x86_sse_ldmxcsr:              // llvm.x86.sse.ldmxcsr
 
4217
  case Intrinsic::x86_sse_stmxcsr:              // llvm.x86.sse.stmxcsr
 
4218
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::isVoid, MVT::iPTR);
 
4219
    break;
 
4220
  case Intrinsic::arm_neon_vst1:                // llvm.arm.neon.vst1
 
4221
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::vAny);
 
4222
    break;
 
4223
  case Intrinsic::arm_neon_vst2:                // llvm.arm.neon.vst2
 
4224
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2);
 
4225
    break;
 
4226
  case Intrinsic::arm_neon_vst3:                // llvm.arm.neon.vst3
 
4227
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2, ~2);
 
4228
    break;
 
4229
  case Intrinsic::arm_neon_vst4:                // llvm.arm.neon.vst4
 
4230
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2, ~2, ~2);
 
4231
    break;
 
4232
  case Intrinsic::arm_neon_vst2lane:            // llvm.arm.neon.vst2lane
 
4233
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2, MVT::i32);
 
4234
    break;
 
4235
  case Intrinsic::arm_neon_vst3lane:            // llvm.arm.neon.vst3lane
 
4236
    VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2, ~2, MVT::i32);
 
4237
    break;
 
4238
  case Intrinsic::arm_neon_vst4lane:            // llvm.arm.neon.vst4lane
 
4239
    VerifyIntrinsicPrototype(ID, IF, 1, 6, MVT::isVoid, MVT::iPTR, MVT::vAny, ~2, ~2, ~2, MVT::i32);
 
4240
    break;
 
4241
  case Intrinsic::longjmp:              // llvm.longjmp
 
4242
  case Intrinsic::siglongjmp:           // llvm.siglongjmp
 
4243
  case Intrinsic::x86_sse2_movnt_i:             // llvm.x86.sse2.movnt.i
 
4244
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::i32);
 
4245
    break;
 
4246
  case Intrinsic::ppc_altivec_dst:              // llvm.ppc.altivec.dst
 
4247
  case Intrinsic::ppc_altivec_dstst:            // llvm.ppc.altivec.dstst
 
4248
  case Intrinsic::ppc_altivec_dststt:           // llvm.ppc.altivec.dststt
 
4249
  case Intrinsic::ppc_altivec_dstt:             // llvm.ppc.altivec.dstt
 
4250
  case Intrinsic::prefetch:             // llvm.prefetch
 
4251
  case Intrinsic::x86_sse3_monitor:             // llvm.x86.sse3.monitor
 
4252
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::iPTR, MVT::i32, MVT::i32);
 
4253
    break;
 
4254
  case Intrinsic::memset:               // llvm.memset
 
4255
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::isVoid, MVT::iPTR, MVT::i8, MVT::iAny, MVT::i32);
 
4256
    break;
 
4257
  case Intrinsic::vacopy:               // llvm.va_copy
 
4258
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::iPTR);
 
4259
    break;
 
4260
  case Intrinsic::memcpy:               // llvm.memcpy
 
4261
  case Intrinsic::memmove:              // llvm.memmove
 
4262
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::isVoid, MVT::iPTR, MVT::iPTR, MVT::iAny, MVT::i32);
 
4263
    break;
 
4264
  case Intrinsic::var_annotation:               // llvm.var.annotation
 
4265
    VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::isVoid, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::i32);
 
4266
    break;
 
4267
  case Intrinsic::gcwrite:              // llvm.gcwrite
 
4268
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::iPTR, MVT::iPTR, MVT::iPTR);
 
4269
    break;
 
4270
  case Intrinsic::stackprotector:               // llvm.stackprotector
 
4271
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::iPTR);
 
4272
    break;
 
4273
  case Intrinsic::x86_sse2_storeu_dq:           // llvm.x86.sse2.storeu.dq
 
4274
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v16i8);
 
4275
    break;
 
4276
  case Intrinsic::x86_mmx_movnt_dq:             // llvm.x86.mmx.movnt.dq
 
4277
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v1i64);
 
4278
    break;
 
4279
  case Intrinsic::x86_sse2_movnt_pd:            // llvm.x86.sse2.movnt.pd
 
4280
  case Intrinsic::x86_sse2_storeu_pd:           // llvm.x86.sse2.storeu.pd
 
4281
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v2f64);
 
4282
    break;
 
4283
  case Intrinsic::x86_sse2_movnt_dq:            // llvm.x86.sse2.movnt.dq
 
4284
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v2i64);
 
4285
    break;
 
4286
  case Intrinsic::x86_sse_movnt_ps:             // llvm.x86.sse.movnt.ps
 
4287
  case Intrinsic::x86_sse_storeu_ps:            // llvm.x86.sse.storeu.ps
 
4288
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v4f32);
 
4289
    break;
 
4290
  case Intrinsic::x86_sse2_storel_dq:           // llvm.x86.sse2.storel.dq
 
4291
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::v4i32);
 
4292
    break;
 
4293
  case Intrinsic::gcroot:               // llvm.gcroot
 
4294
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::iPTR, MVT::iPTR);
 
4295
    break;
 
4296
  case Intrinsic::ppc_altivec_stvebx:           // llvm.ppc.altivec.stvebx
 
4297
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::v16i8, MVT::iPTR);
 
4298
    break;
 
4299
  case Intrinsic::x86_sse2_maskmov_dqu:         // llvm.x86.sse2.maskmov.dqu
 
4300
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::v16i8, MVT::v16i8, MVT::iPTR);
 
4301
    break;
 
4302
  case Intrinsic::ppc_altivec_mtvscr:           // llvm.ppc.altivec.mtvscr
 
4303
    VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::isVoid, MVT::v4i32);
 
4304
    break;
 
4305
  case Intrinsic::ppc_altivec_stvewx:           // llvm.ppc.altivec.stvewx
 
4306
  case Intrinsic::ppc_altivec_stvx:             // llvm.ppc.altivec.stvx
 
4307
  case Intrinsic::ppc_altivec_stvxl:            // llvm.ppc.altivec.stvxl
 
4308
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::v4i32, MVT::iPTR);
 
4309
    break;
 
4310
  case Intrinsic::ppc_altivec_stvehx:           // llvm.ppc.altivec.stvehx
 
4311
    VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::isVoid, MVT::v8i16, MVT::iPTR);
 
4312
    break;
 
4313
  case Intrinsic::x86_mmx_maskmovq:             // llvm.x86.mmx.maskmovq
 
4314
    VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::isVoid, MVT::v8i8, MVT::v8i8, MVT::iPTR);
 
4315
    break;
 
4316
  }
 
4317
#endif
 
4318
 
 
4319
// Code for generating Intrinsic function declarations.
 
4320
#ifdef GET_INTRINSIC_GENERATOR
 
4321
  switch (id) {
 
4322
  default: assert(0 && "Invalid intrinsic!");
 
4323
  case Intrinsic::ptr_annotation:               // llvm.ptr.annotation
 
4324
    ResultTy = (0 < numTys) ? Tys[0] : PointerType::getUnqual(Tys[0]);
 
4325
    ArgTys.push_back(Tys[0]);
 
4326
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4327
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4328
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4329
    break;
 
4330
  case Intrinsic::sin:          // llvm.sin
 
4331
    ResultTy = Tys[0];
 
4332
    ArgTys.push_back(Tys[0]);
 
4333
    break;
 
4334
  case Intrinsic::cos:          // llvm.cos
 
4335
    ResultTy = Tys[0];
 
4336
    ArgTys.push_back(Tys[0]);
 
4337
    break;
 
4338
  case Intrinsic::pow:          // llvm.pow
 
4339
    ResultTy = Tys[0];
 
4340
    ArgTys.push_back(Tys[0]);
 
4341
    ArgTys.push_back(Tys[0]);
 
4342
    break;
 
4343
  case Intrinsic::log:          // llvm.log
 
4344
    ResultTy = Tys[0];
 
4345
    ArgTys.push_back(Tys[0]);
 
4346
    break;
 
4347
  case Intrinsic::log10:                // llvm.log10
 
4348
    ResultTy = Tys[0];
 
4349
    ArgTys.push_back(Tys[0]);
 
4350
    break;
 
4351
  case Intrinsic::log2:         // llvm.log2
 
4352
    ResultTy = Tys[0];
 
4353
    ArgTys.push_back(Tys[0]);
 
4354
    break;
 
4355
  case Intrinsic::exp:          // llvm.exp
 
4356
    ResultTy = Tys[0];
 
4357
    ArgTys.push_back(Tys[0]);
 
4358
    break;
 
4359
  case Intrinsic::exp2:         // llvm.exp2
 
4360
    ResultTy = Tys[0];
 
4361
    ArgTys.push_back(Tys[0]);
 
4362
    break;
 
4363
  case Intrinsic::sqrt:         // llvm.sqrt
 
4364
    ResultTy = Tys[0];
 
4365
    ArgTys.push_back(Tys[0]);
 
4366
    break;
 
4367
  case Intrinsic::powi:         // llvm.powi
 
4368
    ResultTy = Tys[0];
 
4369
    ArgTys.push_back(Tys[0]);
 
4370
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4371
    break;
 
4372
  case Intrinsic::convertff:            // llvm.convertff
 
4373
    ResultTy = Tys[0];
 
4374
    ArgTys.push_back(Tys[1]);
 
4375
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4376
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4377
    break;
 
4378
  case Intrinsic::arm_neon_vcvtfxs2fp:          // llvm.arm.neon.vcvtfxs2fp
 
4379
  case Intrinsic::arm_neon_vcvtfxu2fp:          // llvm.arm.neon.vcvtfxu2fp
 
4380
    ResultTy = Tys[0];
 
4381
    ArgTys.push_back(Tys[1]);
 
4382
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4383
    break;
 
4384
  case Intrinsic::convertfsi:           // llvm.convertfsi
 
4385
  case Intrinsic::convertfui:           // llvm.convertfui
 
4386
    ResultTy = Tys[0];
 
4387
    ArgTys.push_back(Tys[1]);
 
4388
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4389
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4390
    break;
 
4391
  case Intrinsic::bswap:                // llvm.bswap
 
4392
    ResultTy = Tys[0];
 
4393
    ArgTys.push_back(Tys[0]);
 
4394
    break;
 
4395
  case Intrinsic::ctpop:                // llvm.ctpop
 
4396
    ResultTy = Tys[0];
 
4397
    ArgTys.push_back(Tys[0]);
 
4398
    break;
 
4399
  case Intrinsic::ctlz:         // llvm.ctlz
 
4400
    ResultTy = Tys[0];
 
4401
    ArgTys.push_back(Tys[0]);
 
4402
    break;
 
4403
  case Intrinsic::cttz:         // llvm.cttz
 
4404
    ResultTy = Tys[0];
 
4405
    ArgTys.push_back(Tys[0]);
 
4406
    break;
 
4407
  case Intrinsic::annotation:           // llvm.annotation
 
4408
    ResultTy = Tys[0];
 
4409
    ArgTys.push_back(Tys[0]);
 
4410
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4411
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4412
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4413
    break;
 
4414
  case Intrinsic::atomic_cmp_swap:              // llvm.atomic.cmp.swap
 
4415
    ResultTy = Tys[0];
 
4416
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4417
    ArgTys.push_back(Tys[0]);
 
4418
    ArgTys.push_back(Tys[0]);
 
4419
    break;
 
4420
  case Intrinsic::atomic_load_add:              // llvm.atomic.load.add
 
4421
    ResultTy = Tys[0];
 
4422
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4423
    ArgTys.push_back(Tys[0]);
 
4424
    break;
 
4425
  case Intrinsic::atomic_swap:          // llvm.atomic.swap
 
4426
    ResultTy = Tys[0];
 
4427
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4428
    ArgTys.push_back(Tys[0]);
 
4429
    break;
 
4430
  case Intrinsic::atomic_load_sub:              // llvm.atomic.load.sub
 
4431
    ResultTy = Tys[0];
 
4432
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4433
    ArgTys.push_back(Tys[0]);
 
4434
    break;
 
4435
  case Intrinsic::atomic_load_and:              // llvm.atomic.load.and
 
4436
    ResultTy = Tys[0];
 
4437
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4438
    ArgTys.push_back(Tys[0]);
 
4439
    break;
 
4440
  case Intrinsic::atomic_load_or:               // llvm.atomic.load.or
 
4441
    ResultTy = Tys[0];
 
4442
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4443
    ArgTys.push_back(Tys[0]);
 
4444
    break;
 
4445
  case Intrinsic::atomic_load_xor:              // llvm.atomic.load.xor
 
4446
    ResultTy = Tys[0];
 
4447
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4448
    ArgTys.push_back(Tys[0]);
 
4449
    break;
 
4450
  case Intrinsic::atomic_load_nand:             // llvm.atomic.load.nand
 
4451
    ResultTy = Tys[0];
 
4452
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4453
    ArgTys.push_back(Tys[0]);
 
4454
    break;
 
4455
  case Intrinsic::atomic_load_min:              // llvm.atomic.load.min
 
4456
    ResultTy = Tys[0];
 
4457
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4458
    ArgTys.push_back(Tys[0]);
 
4459
    break;
 
4460
  case Intrinsic::atomic_load_max:              // llvm.atomic.load.max
 
4461
    ResultTy = Tys[0];
 
4462
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4463
    ArgTys.push_back(Tys[0]);
 
4464
    break;
 
4465
  case Intrinsic::atomic_load_umin:             // llvm.atomic.load.umin
 
4466
    ResultTy = Tys[0];
 
4467
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4468
    ArgTys.push_back(Tys[0]);
 
4469
    break;
 
4470
  case Intrinsic::atomic_load_umax:             // llvm.atomic.load.umax
 
4471
    ResultTy = Tys[0];
 
4472
    ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0]));
 
4473
    ArgTys.push_back(Tys[0]);
 
4474
    break;
 
4475
  case Intrinsic::arm_neon_vcvtfp2fxs:          // llvm.arm.neon.vcvtfp2fxs
 
4476
  case Intrinsic::arm_neon_vcvtfp2fxu:          // llvm.arm.neon.vcvtfp2fxu
 
4477
    ResultTy = Tys[0];
 
4478
    ArgTys.push_back(Tys[1]);
 
4479
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4480
    break;
 
4481
  case Intrinsic::convertsif:           // llvm.convertsif
 
4482
  case Intrinsic::convertuif:           // llvm.convertuif
 
4483
    ResultTy = Tys[0];
 
4484
    ArgTys.push_back(Tys[1]);
 
4485
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4486
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4487
    break;
 
4488
  case Intrinsic::convertss:            // llvm.convertss
 
4489
  case Intrinsic::convertsu:            // llvm.convertsu
 
4490
  case Intrinsic::convertus:            // llvm.convertus
 
4491
  case Intrinsic::convertuu:            // llvm.convertuu
 
4492
    ResultTy = Tys[0];
 
4493
    ArgTys.push_back(Tys[1]);
 
4494
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4495
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4496
    break;
 
4497
  case Intrinsic::objectsize:           // llvm.objectsize
 
4498
    ResultTy = Tys[0];
 
4499
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4500
    ArgTys.push_back(IntegerType::get(Context, 1));
 
4501
    break;
 
4502
  case Intrinsic::sadd_with_overflow:           // llvm.sadd.with.overflow
 
4503
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4504
    ArgTys.push_back(Tys[0]);
 
4505
    ArgTys.push_back(Tys[0]);
 
4506
    break;
 
4507
  case Intrinsic::uadd_with_overflow:           // llvm.uadd.with.overflow
 
4508
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4509
    ArgTys.push_back(Tys[0]);
 
4510
    ArgTys.push_back(Tys[0]);
 
4511
    break;
 
4512
  case Intrinsic::ssub_with_overflow:           // llvm.ssub.with.overflow
 
4513
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4514
    ArgTys.push_back(Tys[0]);
 
4515
    ArgTys.push_back(Tys[0]);
 
4516
    break;
 
4517
  case Intrinsic::usub_with_overflow:           // llvm.usub.with.overflow
 
4518
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4519
    ArgTys.push_back(Tys[0]);
 
4520
    ArgTys.push_back(Tys[0]);
 
4521
    break;
 
4522
  case Intrinsic::smul_with_overflow:           // llvm.smul.with.overflow
 
4523
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4524
    ArgTys.push_back(Tys[0]);
 
4525
    ArgTys.push_back(Tys[0]);
 
4526
    break;
 
4527
  case Intrinsic::umul_with_overflow:           // llvm.umul.with.overflow
 
4528
    ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1),  NULL);
 
4529
    ArgTys.push_back(Tys[0]);
 
4530
    ArgTys.push_back(Tys[0]);
 
4531
    break;
 
4532
  case Intrinsic::arm_neon_vaddws:              // llvm.arm.neon.vaddws
 
4533
  case Intrinsic::arm_neon_vaddwu:              // llvm.arm.neon.vaddwu
 
4534
  case Intrinsic::arm_neon_vsubws:              // llvm.arm.neon.vsubws
 
4535
  case Intrinsic::arm_neon_vsubwu:              // llvm.arm.neon.vsubwu
 
4536
    ResultTy = Tys[0];
 
4537
    ArgTys.push_back(Tys[0]);
 
4538
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4539
    break;
 
4540
  case Intrinsic::arm_neon_vabas:               // llvm.arm.neon.vabas
 
4541
  case Intrinsic::arm_neon_vabau:               // llvm.arm.neon.vabau
 
4542
  case Intrinsic::arm_neon_vshiftins:           // llvm.arm.neon.vshiftins
 
4543
    ResultTy = Tys[0];
 
4544
    ArgTys.push_back(Tys[0]);
 
4545
    ArgTys.push_back(Tys[0]);
 
4546
    ArgTys.push_back(Tys[0]);
 
4547
    break;
 
4548
  case Intrinsic::arm_neon_vabals:              // llvm.arm.neon.vabals
 
4549
  case Intrinsic::arm_neon_vabalu:              // llvm.arm.neon.vabalu
 
4550
  case Intrinsic::arm_neon_vmlals:              // llvm.arm.neon.vmlals
 
4551
  case Intrinsic::arm_neon_vmlalu:              // llvm.arm.neon.vmlalu
 
4552
  case Intrinsic::arm_neon_vmlsls:              // llvm.arm.neon.vmlsls
 
4553
  case Intrinsic::arm_neon_vmlslu:              // llvm.arm.neon.vmlslu
 
4554
  case Intrinsic::arm_neon_vqdmlal:             // llvm.arm.neon.vqdmlal
 
4555
  case Intrinsic::arm_neon_vqdmlsl:             // llvm.arm.neon.vqdmlsl
 
4556
    ResultTy = Tys[0];
 
4557
    ArgTys.push_back(Tys[0]);
 
4558
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4559
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4560
    break;
 
4561
  case Intrinsic::arm_neon_vpadals:             // llvm.arm.neon.vpadals
 
4562
    ResultTy = Tys[0];
 
4563
    ArgTys.push_back(Tys[0]);
 
4564
    ArgTys.push_back(Tys[1]);
 
4565
    break;
 
4566
  case Intrinsic::arm_neon_vpadalu:             // llvm.arm.neon.vpadalu
 
4567
    ResultTy = Tys[0];
 
4568
    ArgTys.push_back(Tys[0]);
 
4569
    ArgTys.push_back(Tys[1]);
 
4570
    break;
 
4571
  case Intrinsic::arm_neon_vabs:                // llvm.arm.neon.vabs
 
4572
  case Intrinsic::arm_neon_vcls:                // llvm.arm.neon.vcls
 
4573
  case Intrinsic::arm_neon_vclz:                // llvm.arm.neon.vclz
 
4574
  case Intrinsic::arm_neon_vcnt:                // llvm.arm.neon.vcnt
 
4575
  case Intrinsic::arm_neon_vqabs:               // llvm.arm.neon.vqabs
 
4576
  case Intrinsic::arm_neon_vqneg:               // llvm.arm.neon.vqneg
 
4577
  case Intrinsic::arm_neon_vrecpe:              // llvm.arm.neon.vrecpe
 
4578
  case Intrinsic::arm_neon_vrsqrte:             // llvm.arm.neon.vrsqrte
 
4579
    ResultTy = Tys[0];
 
4580
    ArgTys.push_back(Tys[0]);
 
4581
    break;
 
4582
  case Intrinsic::arm_neon_vmovn:               // llvm.arm.neon.vmovn
 
4583
  case Intrinsic::arm_neon_vqmovns:             // llvm.arm.neon.vqmovns
 
4584
  case Intrinsic::arm_neon_vqmovnsu:            // llvm.arm.neon.vqmovnsu
 
4585
  case Intrinsic::arm_neon_vqmovnu:             // llvm.arm.neon.vqmovnu
 
4586
    ResultTy = Tys[0];
 
4587
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4588
    break;
 
4589
  case Intrinsic::arm_neon_vmovls:              // llvm.arm.neon.vmovls
 
4590
  case Intrinsic::arm_neon_vmovlu:              // llvm.arm.neon.vmovlu
 
4591
    ResultTy = Tys[0];
 
4592
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4593
    break;
 
4594
  case Intrinsic::arm_neon_vabds:               // llvm.arm.neon.vabds
 
4595
  case Intrinsic::arm_neon_vabdu:               // llvm.arm.neon.vabdu
 
4596
  case Intrinsic::arm_neon_vhadds:              // llvm.arm.neon.vhadds
 
4597
  case Intrinsic::arm_neon_vhaddu:              // llvm.arm.neon.vhaddu
 
4598
  case Intrinsic::arm_neon_vhsubs:              // llvm.arm.neon.vhsubs
 
4599
  case Intrinsic::arm_neon_vhsubu:              // llvm.arm.neon.vhsubu
 
4600
  case Intrinsic::arm_neon_vmaxs:               // llvm.arm.neon.vmaxs
 
4601
  case Intrinsic::arm_neon_vmaxu:               // llvm.arm.neon.vmaxu
 
4602
  case Intrinsic::arm_neon_vmins:               // llvm.arm.neon.vmins
 
4603
  case Intrinsic::arm_neon_vminu:               // llvm.arm.neon.vminu
 
4604
  case Intrinsic::arm_neon_vmulp:               // llvm.arm.neon.vmulp
 
4605
  case Intrinsic::arm_neon_vpadd:               // llvm.arm.neon.vpadd
 
4606
  case Intrinsic::arm_neon_vpmaxs:              // llvm.arm.neon.vpmaxs
 
4607
  case Intrinsic::arm_neon_vpmaxu:              // llvm.arm.neon.vpmaxu
 
4608
  case Intrinsic::arm_neon_vpmins:              // llvm.arm.neon.vpmins
 
4609
  case Intrinsic::arm_neon_vpminu:              // llvm.arm.neon.vpminu
 
4610
  case Intrinsic::arm_neon_vqadds:              // llvm.arm.neon.vqadds
 
4611
  case Intrinsic::arm_neon_vqaddu:              // llvm.arm.neon.vqaddu
 
4612
  case Intrinsic::arm_neon_vqdmulh:             // llvm.arm.neon.vqdmulh
 
4613
  case Intrinsic::arm_neon_vqrdmulh:            // llvm.arm.neon.vqrdmulh
 
4614
  case Intrinsic::arm_neon_vqrshifts:           // llvm.arm.neon.vqrshifts
 
4615
  case Intrinsic::arm_neon_vqrshiftu:           // llvm.arm.neon.vqrshiftu
 
4616
  case Intrinsic::arm_neon_vqshifts:            // llvm.arm.neon.vqshifts
 
4617
  case Intrinsic::arm_neon_vqshiftsu:           // llvm.arm.neon.vqshiftsu
 
4618
  case Intrinsic::arm_neon_vqshiftu:            // llvm.arm.neon.vqshiftu
 
4619
  case Intrinsic::arm_neon_vqsubs:              // llvm.arm.neon.vqsubs
 
4620
  case Intrinsic::arm_neon_vqsubu:              // llvm.arm.neon.vqsubu
 
4621
  case Intrinsic::arm_neon_vrecps:              // llvm.arm.neon.vrecps
 
4622
  case Intrinsic::arm_neon_vrhadds:             // llvm.arm.neon.vrhadds
 
4623
  case Intrinsic::arm_neon_vrhaddu:             // llvm.arm.neon.vrhaddu
 
4624
  case Intrinsic::arm_neon_vrshifts:            // llvm.arm.neon.vrshifts
 
4625
  case Intrinsic::arm_neon_vrshiftu:            // llvm.arm.neon.vrshiftu
 
4626
  case Intrinsic::arm_neon_vrsqrts:             // llvm.arm.neon.vrsqrts
 
4627
  case Intrinsic::arm_neon_vshifts:             // llvm.arm.neon.vshifts
 
4628
  case Intrinsic::arm_neon_vshiftu:             // llvm.arm.neon.vshiftu
 
4629
    ResultTy = Tys[0];
 
4630
    ArgTys.push_back(Tys[0]);
 
4631
    ArgTys.push_back(Tys[0]);
 
4632
    break;
 
4633
  case Intrinsic::arm_neon_vaddhn:              // llvm.arm.neon.vaddhn
 
4634
  case Intrinsic::arm_neon_vqrshiftns:          // llvm.arm.neon.vqrshiftns
 
4635
  case Intrinsic::arm_neon_vqrshiftnsu:         // llvm.arm.neon.vqrshiftnsu
 
4636
  case Intrinsic::arm_neon_vqrshiftnu:          // llvm.arm.neon.vqrshiftnu
 
4637
  case Intrinsic::arm_neon_vqshiftns:           // llvm.arm.neon.vqshiftns
 
4638
  case Intrinsic::arm_neon_vqshiftnsu:          // llvm.arm.neon.vqshiftnsu
 
4639
  case Intrinsic::arm_neon_vqshiftnu:           // llvm.arm.neon.vqshiftnu
 
4640
  case Intrinsic::arm_neon_vraddhn:             // llvm.arm.neon.vraddhn
 
4641
  case Intrinsic::arm_neon_vrshiftn:            // llvm.arm.neon.vrshiftn
 
4642
  case Intrinsic::arm_neon_vrsubhn:             // llvm.arm.neon.vrsubhn
 
4643
  case Intrinsic::arm_neon_vshiftn:             // llvm.arm.neon.vshiftn
 
4644
  case Intrinsic::arm_neon_vsubhn:              // llvm.arm.neon.vsubhn
 
4645
    ResultTy = Tys[0];
 
4646
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4647
    ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4648
    break;
 
4649
  case Intrinsic::arm_neon_vabdls:              // llvm.arm.neon.vabdls
 
4650
  case Intrinsic::arm_neon_vabdlu:              // llvm.arm.neon.vabdlu
 
4651
  case Intrinsic::arm_neon_vaddls:              // llvm.arm.neon.vaddls
 
4652
  case Intrinsic::arm_neon_vaddlu:              // llvm.arm.neon.vaddlu
 
4653
  case Intrinsic::arm_neon_vmullp:              // llvm.arm.neon.vmullp
 
4654
  case Intrinsic::arm_neon_vmulls:              // llvm.arm.neon.vmulls
 
4655
  case Intrinsic::arm_neon_vmullu:              // llvm.arm.neon.vmullu
 
4656
  case Intrinsic::arm_neon_vqdmull:             // llvm.arm.neon.vqdmull
 
4657
  case Intrinsic::arm_neon_vshiftls:            // llvm.arm.neon.vshiftls
 
4658
  case Intrinsic::arm_neon_vshiftlu:            // llvm.arm.neon.vshiftlu
 
4659
  case Intrinsic::arm_neon_vsubls:              // llvm.arm.neon.vsubls
 
4660
  case Intrinsic::arm_neon_vsublu:              // llvm.arm.neon.vsublu
 
4661
    ResultTy = Tys[0];
 
4662
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4663
    ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0])));
 
4664
    break;
 
4665
  case Intrinsic::arm_neon_vpaddls:             // llvm.arm.neon.vpaddls
 
4666
  case Intrinsic::arm_neon_vpaddlu:             // llvm.arm.neon.vpaddlu
 
4667
    ResultTy = Tys[0];
 
4668
    ArgTys.push_back(Tys[1]);
 
4669
    break;
 
4670
  case Intrinsic::arm_neon_vld1:                // llvm.arm.neon.vld1
 
4671
    ResultTy = Tys[0];
 
4672
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4673
    break;
 
4674
  case Intrinsic::arm_neon_vld2:                // llvm.arm.neon.vld2
 
4675
    ResultTy = StructType::get(Context, Tys[0], Tys[0],  NULL);
 
4676
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4677
    break;
 
4678
  case Intrinsic::arm_neon_vld3:                // llvm.arm.neon.vld3
 
4679
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0],  NULL);
 
4680
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4681
    break;
 
4682
  case Intrinsic::arm_neon_vld4:                // llvm.arm.neon.vld4
 
4683
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0],  NULL);
 
4684
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4685
    break;
 
4686
  case Intrinsic::arm_neon_vld2lane:            // llvm.arm.neon.vld2lane
 
4687
    ResultTy = StructType::get(Context, Tys[0], Tys[0],  NULL);
 
4688
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4689
    ArgTys.push_back(Tys[0]);
 
4690
    ArgTys.push_back(Tys[0]);
 
4691
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4692
    break;
 
4693
  case Intrinsic::arm_neon_vld3lane:            // llvm.arm.neon.vld3lane
 
4694
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0],  NULL);
 
4695
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4696
    ArgTys.push_back(Tys[0]);
 
4697
    ArgTys.push_back(Tys[0]);
 
4698
    ArgTys.push_back(Tys[0]);
 
4699
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4700
    break;
 
4701
  case Intrinsic::arm_neon_vld4lane:            // llvm.arm.neon.vld4lane
 
4702
    ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0],  NULL);
 
4703
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4704
    ArgTys.push_back(Tys[0]);
 
4705
    ArgTys.push_back(Tys[0]);
 
4706
    ArgTys.push_back(Tys[0]);
 
4707
    ArgTys.push_back(Tys[0]);
 
4708
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4709
    break;
 
4710
  case Intrinsic::invariant_start:              // llvm.invariant.start
 
4711
    ResultTy = PointerType::getUnqual(StructType::get(Context));
 
4712
    ArgTys.push_back(IntegerType::get(Context, 64));
 
4713
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4714
    break;
 
4715
  case Intrinsic::flt_rounds:           // llvm.flt.rounds
 
4716
  case Intrinsic::xcore_getid:          // llvm.xcore.getid
 
4717
    ResultTy = IntegerType::get(Context, 32);
 
4718
    break;
 
4719
  case Intrinsic::xcore_bitrev:         // llvm.xcore.bitrev
 
4720
    ResultTy = IntegerType::get(Context, 32);
 
4721
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4722
    break;
 
4723
  case Intrinsic::x86_sse42_crc32_16:           // llvm.x86.sse42.crc32.16
 
4724
    ResultTy = IntegerType::get(Context, 32);
 
4725
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4726
    ArgTys.push_back(IntegerType::get(Context, 16));
 
4727
    break;
 
4728
  case Intrinsic::x86_sse42_crc32_32:           // llvm.x86.sse42.crc32.32
 
4729
    ResultTy = IntegerType::get(Context, 32);
 
4730
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4731
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4732
    break;
 
4733
  case Intrinsic::x86_sse42_crc32_8:            // llvm.x86.sse42.crc32.8
 
4734
    ResultTy = IntegerType::get(Context, 32);
 
4735
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4736
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4737
    break;
 
4738
  case Intrinsic::ppc_altivec_vcmpequb_p:               // llvm.ppc.altivec.vcmpequb.p
 
4739
  case Intrinsic::ppc_altivec_vcmpgtsb_p:               // llvm.ppc.altivec.vcmpgtsb.p
 
4740
  case Intrinsic::ppc_altivec_vcmpgtub_p:               // llvm.ppc.altivec.vcmpgtub.p
 
4741
    ResultTy = IntegerType::get(Context, 32);
 
4742
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4743
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4744
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4745
    break;
 
4746
  case Intrinsic::ppc_altivec_vcmpbfp_p:                // llvm.ppc.altivec.vcmpbfp.p
 
4747
  case Intrinsic::ppc_altivec_vcmpeqfp_p:               // llvm.ppc.altivec.vcmpeqfp.p
 
4748
  case Intrinsic::ppc_altivec_vcmpgefp_p:               // llvm.ppc.altivec.vcmpgefp.p
 
4749
  case Intrinsic::ppc_altivec_vcmpgtfp_p:               // llvm.ppc.altivec.vcmpgtfp.p
 
4750
    ResultTy = IntegerType::get(Context, 32);
 
4751
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4752
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4753
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4754
    break;
 
4755
  case Intrinsic::ppc_altivec_vcmpequw_p:               // llvm.ppc.altivec.vcmpequw.p
 
4756
  case Intrinsic::ppc_altivec_vcmpgtsw_p:               // llvm.ppc.altivec.vcmpgtsw.p
 
4757
  case Intrinsic::ppc_altivec_vcmpgtuw_p:               // llvm.ppc.altivec.vcmpgtuw.p
 
4758
    ResultTy = IntegerType::get(Context, 32);
 
4759
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4760
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
4761
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
4762
    break;
 
4763
  case Intrinsic::ppc_altivec_vcmpequh_p:               // llvm.ppc.altivec.vcmpequh.p
 
4764
  case Intrinsic::ppc_altivec_vcmpgtsh_p:               // llvm.ppc.altivec.vcmpgtsh.p
 
4765
  case Intrinsic::ppc_altivec_vcmpgtuh_p:               // llvm.ppc.altivec.vcmpgtuh.p
 
4766
    ResultTy = IntegerType::get(Context, 32);
 
4767
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4768
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
4769
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
4770
    break;
 
4771
  case Intrinsic::eh_sjlj_setjmp:               // llvm.eh.sjlj.setjmp
 
4772
  case Intrinsic::eh_typeid_for:                // llvm.eh.typeid.for
 
4773
  case Intrinsic::setjmp:               // llvm.setjmp
 
4774
    ResultTy = IntegerType::get(Context, 32);
 
4775
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4776
    break;
 
4777
  case Intrinsic::sigsetjmp:            // llvm.sigsetjmp
 
4778
    ResultTy = IntegerType::get(Context, 32);
 
4779
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4780
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4781
    break;
 
4782
  case Intrinsic::eh_selector:          // llvm.eh.selector
 
4783
    IsVarArg = true;
 
4784
    ResultTy = IntegerType::get(Context, 32);
 
4785
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4786
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4787
    break;
 
4788
  case Intrinsic::x86_sse2_pmovmskb_128:                // llvm.x86.sse2.pmovmskb.128
 
4789
    ResultTy = IntegerType::get(Context, 32);
 
4790
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4791
    break;
 
4792
  case Intrinsic::x86_sse41_pextrb:             // llvm.x86.sse41.pextrb
 
4793
    ResultTy = IntegerType::get(Context, 32);
 
4794
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4795
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4796
    break;
 
4797
  case Intrinsic::x86_sse42_pcmpestri128:               // llvm.x86.sse42.pcmpestri128
 
4798
  case Intrinsic::x86_sse42_pcmpestria128:              // llvm.x86.sse42.pcmpestria128
 
4799
  case Intrinsic::x86_sse42_pcmpestric128:              // llvm.x86.sse42.pcmpestric128
 
4800
  case Intrinsic::x86_sse42_pcmpestrio128:              // llvm.x86.sse42.pcmpestrio128
 
4801
  case Intrinsic::x86_sse42_pcmpestris128:              // llvm.x86.sse42.pcmpestris128
 
4802
  case Intrinsic::x86_sse42_pcmpestriz128:              // llvm.x86.sse42.pcmpestriz128
 
4803
    ResultTy = IntegerType::get(Context, 32);
 
4804
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4805
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4806
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4807
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4808
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4809
    break;
 
4810
  case Intrinsic::x86_sse42_pcmpistri128:               // llvm.x86.sse42.pcmpistri128
 
4811
  case Intrinsic::x86_sse42_pcmpistria128:              // llvm.x86.sse42.pcmpistria128
 
4812
  case Intrinsic::x86_sse42_pcmpistric128:              // llvm.x86.sse42.pcmpistric128
 
4813
  case Intrinsic::x86_sse42_pcmpistrio128:              // llvm.x86.sse42.pcmpistrio128
 
4814
  case Intrinsic::x86_sse42_pcmpistris128:              // llvm.x86.sse42.pcmpistris128
 
4815
  case Intrinsic::x86_sse42_pcmpistriz128:              // llvm.x86.sse42.pcmpistriz128
 
4816
    ResultTy = IntegerType::get(Context, 32);
 
4817
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4818
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4819
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4820
    break;
 
4821
  case Intrinsic::x86_sse2_cvtsd2si:            // llvm.x86.sse2.cvtsd2si
 
4822
  case Intrinsic::x86_sse2_cvttsd2si:           // llvm.x86.sse2.cvttsd2si
 
4823
  case Intrinsic::x86_sse2_movmsk_pd:           // llvm.x86.sse2.movmsk.pd
 
4824
    ResultTy = IntegerType::get(Context, 32);
 
4825
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
4826
    break;
 
4827
  case Intrinsic::x86_sse2_comieq_sd:           // llvm.x86.sse2.comieq.sd
 
4828
  case Intrinsic::x86_sse2_comige_sd:           // llvm.x86.sse2.comige.sd
 
4829
  case Intrinsic::x86_sse2_comigt_sd:           // llvm.x86.sse2.comigt.sd
 
4830
  case Intrinsic::x86_sse2_comile_sd:           // llvm.x86.sse2.comile.sd
 
4831
  case Intrinsic::x86_sse2_comilt_sd:           // llvm.x86.sse2.comilt.sd
 
4832
  case Intrinsic::x86_sse2_comineq_sd:          // llvm.x86.sse2.comineq.sd
 
4833
  case Intrinsic::x86_sse2_ucomieq_sd:          // llvm.x86.sse2.ucomieq.sd
 
4834
  case Intrinsic::x86_sse2_ucomige_sd:          // llvm.x86.sse2.ucomige.sd
 
4835
  case Intrinsic::x86_sse2_ucomigt_sd:          // llvm.x86.sse2.ucomigt.sd
 
4836
  case Intrinsic::x86_sse2_ucomile_sd:          // llvm.x86.sse2.ucomile.sd
 
4837
  case Intrinsic::x86_sse2_ucomilt_sd:          // llvm.x86.sse2.ucomilt.sd
 
4838
  case Intrinsic::x86_sse2_ucomineq_sd:         // llvm.x86.sse2.ucomineq.sd
 
4839
    ResultTy = IntegerType::get(Context, 32);
 
4840
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
4841
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
4842
    break;
 
4843
  case Intrinsic::x86_sse_cvtss2si:             // llvm.x86.sse.cvtss2si
 
4844
  case Intrinsic::x86_sse_cvttss2si:            // llvm.x86.sse.cvttss2si
 
4845
  case Intrinsic::x86_sse_movmsk_ps:            // llvm.x86.sse.movmsk.ps
 
4846
    ResultTy = IntegerType::get(Context, 32);
 
4847
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4848
    break;
 
4849
  case Intrinsic::x86_sse41_extractps:          // llvm.x86.sse41.extractps
 
4850
    ResultTy = IntegerType::get(Context, 32);
 
4851
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4852
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4853
    break;
 
4854
  case Intrinsic::x86_sse41_ptestc:             // llvm.x86.sse41.ptestc
 
4855
  case Intrinsic::x86_sse41_ptestnzc:           // llvm.x86.sse41.ptestnzc
 
4856
  case Intrinsic::x86_sse41_ptestz:             // llvm.x86.sse41.ptestz
 
4857
  case Intrinsic::x86_sse_comieq_ss:            // llvm.x86.sse.comieq.ss
 
4858
  case Intrinsic::x86_sse_comige_ss:            // llvm.x86.sse.comige.ss
 
4859
  case Intrinsic::x86_sse_comigt_ss:            // llvm.x86.sse.comigt.ss
 
4860
  case Intrinsic::x86_sse_comile_ss:            // llvm.x86.sse.comile.ss
 
4861
  case Intrinsic::x86_sse_comilt_ss:            // llvm.x86.sse.comilt.ss
 
4862
  case Intrinsic::x86_sse_comineq_ss:           // llvm.x86.sse.comineq.ss
 
4863
  case Intrinsic::x86_sse_ucomieq_ss:           // llvm.x86.sse.ucomieq.ss
 
4864
  case Intrinsic::x86_sse_ucomige_ss:           // llvm.x86.sse.ucomige.ss
 
4865
  case Intrinsic::x86_sse_ucomigt_ss:           // llvm.x86.sse.ucomigt.ss
 
4866
  case Intrinsic::x86_sse_ucomile_ss:           // llvm.x86.sse.ucomile.ss
 
4867
  case Intrinsic::x86_sse_ucomilt_ss:           // llvm.x86.sse.ucomilt.ss
 
4868
  case Intrinsic::x86_sse_ucomineq_ss:          // llvm.x86.sse.ucomineq.ss
 
4869
    ResultTy = IntegerType::get(Context, 32);
 
4870
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4871
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4872
    break;
 
4873
  case Intrinsic::x86_sse41_pextrd:             // llvm.x86.sse41.pextrd
 
4874
    ResultTy = IntegerType::get(Context, 32);
 
4875
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
4876
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4877
    break;
 
4878
  case Intrinsic::x86_mmx_pmovmskb:             // llvm.x86.mmx.pmovmskb
 
4879
    ResultTy = IntegerType::get(Context, 32);
 
4880
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
4881
    break;
 
4882
  case Intrinsic::readcyclecounter:             // llvm.readcyclecounter
 
4883
    ResultTy = IntegerType::get(Context, 64);
 
4884
    break;
 
4885
  case Intrinsic::alpha_umulh:          // llvm.alpha.umulh
 
4886
  case Intrinsic::x86_sse42_crc32_64:           // llvm.x86.sse42.crc32.64
 
4887
    ResultTy = IntegerType::get(Context, 64);
 
4888
    ArgTys.push_back(IntegerType::get(Context, 64));
 
4889
    ArgTys.push_back(IntegerType::get(Context, 64));
 
4890
    break;
 
4891
  case Intrinsic::x86_sse2_cvtsd2si64:          // llvm.x86.sse2.cvtsd2si64
 
4892
  case Intrinsic::x86_sse2_cvttsd2si64:         // llvm.x86.sse2.cvttsd2si64
 
4893
    ResultTy = IntegerType::get(Context, 64);
 
4894
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
4895
    break;
 
4896
  case Intrinsic::x86_sse41_pextrq:             // llvm.x86.sse41.pextrq
 
4897
    ResultTy = IntegerType::get(Context, 64);
 
4898
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
4899
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4900
    break;
 
4901
  case Intrinsic::x86_sse_cvtss2si64:           // llvm.x86.sse.cvtss2si64
 
4902
  case Intrinsic::x86_sse_cvttss2si64:          // llvm.x86.sse.cvttss2si64
 
4903
    ResultTy = IntegerType::get(Context, 64);
 
4904
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
4905
    break;
 
4906
  case Intrinsic::arm_thread_pointer:           // llvm.arm.thread.pointer
 
4907
  case Intrinsic::eh_exception:         // llvm.eh.exception
 
4908
  case Intrinsic::eh_sjlj_lsda:         // llvm.eh.sjlj.lsda
 
4909
  case Intrinsic::stacksave:            // llvm.stacksave
 
4910
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
 
4911
    break;
 
4912
  case Intrinsic::eh_dwarf_cfa:         // llvm.eh.dwarf.cfa
 
4913
  case Intrinsic::frameaddress:         // llvm.frameaddress
 
4914
  case Intrinsic::returnaddress:                // llvm.returnaddress
 
4915
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
 
4916
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4917
    break;
 
4918
  case Intrinsic::init_trampoline:              // llvm.init.trampoline
 
4919
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
 
4920
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4921
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4922
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4923
    break;
 
4924
  case Intrinsic::gcread:               // llvm.gcread
 
4925
    ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8));
 
4926
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4927
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
 
4928
    break;
 
4929
  case Intrinsic::ppc_altivec_lvebx:            // llvm.ppc.altivec.lvebx
 
4930
  case Intrinsic::ppc_altivec_lvsl:             // llvm.ppc.altivec.lvsl
 
4931
  case Intrinsic::ppc_altivec_lvsr:             // llvm.ppc.altivec.lvsr
 
4932
  case Intrinsic::x86_sse2_loadu_dq:            // llvm.x86.sse2.loadu.dq
 
4933
  case Intrinsic::x86_sse3_ldu_dq:              // llvm.x86.sse3.ldu.dq
 
4934
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4935
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
4936
    break;
 
4937
  case Intrinsic::x86_ssse3_pabs_b_128:         // llvm.x86.ssse3.pabs.b.128
 
4938
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4939
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4940
    break;
 
4941
  case Intrinsic::spu_si_shlqbii:               // llvm.spu.si.shlqbii
 
4942
  case Intrinsic::spu_si_shlqbyi:               // llvm.spu.si.shlqbyi
 
4943
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4944
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4945
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4946
    break;
 
4947
  case Intrinsic::x86_sse42_pcmpestrm128:               // llvm.x86.sse42.pcmpestrm128
 
4948
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4949
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4950
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4951
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4952
    ArgTys.push_back(IntegerType::get(Context, 32));
 
4953
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4954
    break;
 
4955
  case Intrinsic::spu_si_andbi:         // llvm.spu.si.andbi
 
4956
  case Intrinsic::spu_si_ceqbi:         // llvm.spu.si.ceqbi
 
4957
  case Intrinsic::spu_si_cgtbi:         // llvm.spu.si.cgtbi
 
4958
  case Intrinsic::spu_si_clgtbi:                // llvm.spu.si.clgtbi
 
4959
  case Intrinsic::spu_si_orbi:          // llvm.spu.si.orbi
 
4960
  case Intrinsic::spu_si_xorbi:         // llvm.spu.si.xorbi
 
4961
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4962
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
4963
    ArgTys.push_back(IntegerType::get(Context, 8));
 
4964
    break;
 
4965
  case Intrinsic::ppc_altivec_vaddsbs:          // llvm.ppc.altivec.vaddsbs
 
4966
  case Intrinsic::ppc_altivec_vaddubs:          // llvm.ppc.altivec.vaddubs
 
4967
  case Intrinsic::ppc_altivec_vavgsb:           // llvm.ppc.altivec.vavgsb
 
4968
  case Intrinsic::ppc_altivec_vavgub:           // llvm.ppc.altivec.vavgub
 
4969
  case Intrinsic::ppc_altivec_vcmpequb:         // llvm.ppc.altivec.vcmpequb
 
4970
  case Intrinsic::ppc_altivec_vcmpgtsb:         // llvm.ppc.altivec.vcmpgtsb
 
4971
  case Intrinsic::ppc_altivec_vcmpgtub:         // llvm.ppc.altivec.vcmpgtub
 
4972
  case Intrinsic::ppc_altivec_vmaxsb:           // llvm.ppc.altivec.vmaxsb
 
4973
  case Intrinsic::ppc_altivec_vmaxub:           // llvm.ppc.altivec.vmaxub
 
4974
  case Intrinsic::ppc_altivec_vminsb:           // llvm.ppc.altivec.vminsb
 
4975
  case Intrinsic::ppc_altivec_vminub:           // llvm.ppc.altivec.vminub
 
4976
  case Intrinsic::ppc_altivec_vrlb:             // llvm.ppc.altivec.vrlb
 
4977
  case Intrinsic::ppc_altivec_vslb:             // llvm.ppc.altivec.vslb
 
4978
  case Intrinsic::ppc_altivec_vsrab:            // llvm.ppc.altivec.vsrab
 
4979
  case Intrinsic::ppc_altivec_vsrb:             // llvm.ppc.altivec.vsrb
 
4980
  case Intrinsic::ppc_altivec_vsubsbs:          // llvm.ppc.altivec.vsubsbs
 
4981
  case Intrinsic::ppc_altivec_vsububs:          // llvm.ppc.altivec.vsububs
 
4982
  case Intrinsic::spu_si_ceqb:          // llvm.spu.si.ceqb
 
4983
  case Intrinsic::spu_si_cgtb:          // llvm.spu.si.cgtb
 
4984
  case Intrinsic::spu_si_clgtb:         // llvm.spu.si.clgtb
 
4985
  case Intrinsic::x86_sse2_padds_b:             // llvm.x86.sse2.padds.b
 
4986
  case Intrinsic::x86_sse2_paddus_b:            // llvm.x86.sse2.paddus.b
 
4987
  case Intrinsic::x86_sse2_pavg_b:              // llvm.x86.sse2.pavg.b
 
4988
  case Intrinsic::x86_sse2_pcmpeq_b:            // llvm.x86.sse2.pcmpeq.b
 
4989
  case Intrinsic::x86_sse2_pcmpgt_b:            // llvm.x86.sse2.pcmpgt.b
 
4990
  case Intrinsic::x86_sse2_pmaxu_b:             // llvm.x86.sse2.pmaxu.b
 
4991
  case Intrinsic::x86_sse2_pminu_b:             // llvm.x86.sse2.pminu.b
 
4992
  case Intrinsic::x86_sse2_psubs_b:             // llvm.x86.sse2.psubs.b
 
4993
  case Intrinsic::x86_sse2_psubus_b:            // llvm.x86.sse2.psubus.b
 
4994
  case Intrinsic::x86_sse41_pmaxsb:             // llvm.x86.sse41.pmaxsb
 
4995
  case Intrinsic::x86_sse41_pminsb:             // llvm.x86.sse41.pminsb
 
4996
  case Intrinsic::x86_ssse3_pshuf_b_128:                // llvm.x86.ssse3.pshuf.b.128
 
4997
  case Intrinsic::x86_ssse3_psign_b_128:                // llvm.x86.ssse3.psign.b.128
 
4998
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
4999
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5000
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5001
    break;
 
5002
  case Intrinsic::x86_sse41_mpsadbw:            // llvm.x86.sse41.mpsadbw
 
5003
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
5004
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5005
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5006
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5007
    break;
 
5008
  case Intrinsic::x86_sse42_pcmpistrm128:               // llvm.x86.sse42.pcmpistrm128
 
5009
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
5010
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5011
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5012
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5013
    break;
 
5014
  case Intrinsic::x86_sse41_pblendvb:           // llvm.x86.sse41.pblendvb
 
5015
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
5016
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5017
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5018
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5019
    break;
 
5020
  case Intrinsic::ppc_altivec_vpkswss:          // llvm.ppc.altivec.vpkswss
 
5021
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
5022
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5023
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5024
    break;
 
5025
  case Intrinsic::ppc_altivec_vpkshss:          // llvm.ppc.altivec.vpkshss
 
5026
  case Intrinsic::ppc_altivec_vpkshus:          // llvm.ppc.altivec.vpkshus
 
5027
  case Intrinsic::ppc_altivec_vpkuhus:          // llvm.ppc.altivec.vpkuhus
 
5028
  case Intrinsic::x86_sse2_packsswb_128:                // llvm.x86.sse2.packsswb.128
 
5029
  case Intrinsic::x86_sse2_packuswb_128:                // llvm.x86.sse2.packuswb.128
 
5030
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 16);
 
5031
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5032
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5033
    break;
 
5034
  case Intrinsic::x86_mmx_pslli_q:              // llvm.x86.mmx.pslli.q
 
5035
  case Intrinsic::x86_mmx_psrli_q:              // llvm.x86.mmx.psrli.q
 
5036
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
 
5037
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5038
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5039
    break;
 
5040
  case Intrinsic::x86_mmx_psll_q:               // llvm.x86.mmx.psll.q
 
5041
  case Intrinsic::x86_mmx_psrl_q:               // llvm.x86.mmx.psrl.q
 
5042
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
 
5043
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5044
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5045
    break;
 
5046
  case Intrinsic::x86_ssse3_palign_r:           // llvm.x86.ssse3.palign.r
 
5047
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 1);
 
5048
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5049
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5050
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5051
    break;
 
5052
  case Intrinsic::x86_sse2_loadu_pd:            // llvm.x86.sse2.loadu.pd
 
5053
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5054
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5055
    break;
 
5056
  case Intrinsic::x86_sse2_sqrt_pd:             // llvm.x86.sse2.sqrt.pd
 
5057
  case Intrinsic::x86_sse2_sqrt_sd:             // llvm.x86.sse2.sqrt.sd
 
5058
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5059
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5060
    break;
 
5061
  case Intrinsic::x86_sse2_cvtsi2sd:            // llvm.x86.sse2.cvtsi2sd
 
5062
  case Intrinsic::x86_sse41_round_pd:           // llvm.x86.sse41.round.pd
 
5063
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5064
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5065
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5066
    break;
 
5067
  case Intrinsic::x86_sse2_cvtsi642sd:          // llvm.x86.sse2.cvtsi642sd
 
5068
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5069
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5070
    ArgTys.push_back(IntegerType::get(Context, 64));
 
5071
    break;
 
5072
  case Intrinsic::spu_si_dfa:           // llvm.spu.si.dfa
 
5073
  case Intrinsic::spu_si_dfm:           // llvm.spu.si.dfm
 
5074
  case Intrinsic::spu_si_dfma:          // llvm.spu.si.dfma
 
5075
  case Intrinsic::spu_si_dfms:          // llvm.spu.si.dfms
 
5076
  case Intrinsic::spu_si_dfnma:         // llvm.spu.si.dfnma
 
5077
  case Intrinsic::spu_si_dfnms:         // llvm.spu.si.dfnms
 
5078
  case Intrinsic::spu_si_dfs:           // llvm.spu.si.dfs
 
5079
  case Intrinsic::x86_sse2_add_sd:              // llvm.x86.sse2.add.sd
 
5080
  case Intrinsic::x86_sse2_div_sd:              // llvm.x86.sse2.div.sd
 
5081
  case Intrinsic::x86_sse2_max_pd:              // llvm.x86.sse2.max.pd
 
5082
  case Intrinsic::x86_sse2_max_sd:              // llvm.x86.sse2.max.sd
 
5083
  case Intrinsic::x86_sse2_min_pd:              // llvm.x86.sse2.min.pd
 
5084
  case Intrinsic::x86_sse2_min_sd:              // llvm.x86.sse2.min.sd
 
5085
  case Intrinsic::x86_sse2_mul_sd:              // llvm.x86.sse2.mul.sd
 
5086
  case Intrinsic::x86_sse2_sub_sd:              // llvm.x86.sse2.sub.sd
 
5087
  case Intrinsic::x86_sse3_addsub_pd:           // llvm.x86.sse3.addsub.pd
 
5088
  case Intrinsic::x86_sse3_hadd_pd:             // llvm.x86.sse3.hadd.pd
 
5089
  case Intrinsic::x86_sse3_hsub_pd:             // llvm.x86.sse3.hsub.pd
 
5090
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5091
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5092
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5093
    break;
 
5094
  case Intrinsic::x86_sse41_blendpd:            // llvm.x86.sse41.blendpd
 
5095
  case Intrinsic::x86_sse41_dppd:               // llvm.x86.sse41.dppd
 
5096
  case Intrinsic::x86_sse41_round_sd:           // llvm.x86.sse41.round.sd
 
5097
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5098
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5099
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5100
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5101
    break;
 
5102
  case Intrinsic::x86_sse2_cmp_pd:              // llvm.x86.sse2.cmp.pd
 
5103
  case Intrinsic::x86_sse2_cmp_sd:              // llvm.x86.sse2.cmp.sd
 
5104
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5105
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5106
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5107
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5108
    break;
 
5109
  case Intrinsic::x86_sse41_blendvpd:           // llvm.x86.sse41.blendvpd
 
5110
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5111
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5112
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5113
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5114
    break;
 
5115
  case Intrinsic::x86_sse2_cvtss2sd:            // llvm.x86.sse2.cvtss2sd
 
5116
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5117
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5118
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5119
    break;
 
5120
  case Intrinsic::x86_sse_cvtpi2pd:             // llvm.x86.sse.cvtpi2pd
 
5121
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5122
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5123
    break;
 
5124
  case Intrinsic::x86_sse2_cvtps2pd:            // llvm.x86.sse2.cvtps2pd
 
5125
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5126
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5127
    break;
 
5128
  case Intrinsic::x86_sse2_cvtdq2pd:            // llvm.x86.sse2.cvtdq2pd
 
5129
    ResultTy = VectorType::get(Type::getDoubleTy(Context), 2);
 
5130
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5131
    break;
 
5132
  case Intrinsic::arm_neon_vacged:              // llvm.arm.neon.vacged
 
5133
  case Intrinsic::arm_neon_vacgtd:              // llvm.arm.neon.vacgtd
 
5134
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5135
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
 
5136
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2));
 
5137
    break;
 
5138
  case Intrinsic::x86_sse_cvtpd2pi:             // llvm.x86.sse.cvtpd2pi
 
5139
  case Intrinsic::x86_sse_cvttpd2pi:            // llvm.x86.sse.cvttpd2pi
 
5140
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5141
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5142
    break;
 
5143
  case Intrinsic::x86_ssse3_pabs_d:             // llvm.x86.ssse3.pabs.d
 
5144
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5145
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5146
    break;
 
5147
  case Intrinsic::x86_mmx_pslli_d:              // llvm.x86.mmx.pslli.d
 
5148
  case Intrinsic::x86_mmx_psrai_d:              // llvm.x86.mmx.psrai.d
 
5149
  case Intrinsic::x86_mmx_psrli_d:              // llvm.x86.mmx.psrli.d
 
5150
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5151
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5152
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5153
    break;
 
5154
  case Intrinsic::x86_mmx_psll_d:               // llvm.x86.mmx.psll.d
 
5155
  case Intrinsic::x86_mmx_psra_d:               // llvm.x86.mmx.psra.d
 
5156
  case Intrinsic::x86_mmx_psrl_d:               // llvm.x86.mmx.psrl.d
 
5157
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5158
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5159
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5160
    break;
 
5161
  case Intrinsic::x86_mmx_pcmpeq_d:             // llvm.x86.mmx.pcmpeq.d
 
5162
  case Intrinsic::x86_mmx_pcmpgt_d:             // llvm.x86.mmx.pcmpgt.d
 
5163
  case Intrinsic::x86_mmx_pmulu_dq:             // llvm.x86.mmx.pmulu.dq
 
5164
  case Intrinsic::x86_ssse3_phadd_d:            // llvm.x86.ssse3.phadd.d
 
5165
  case Intrinsic::x86_ssse3_phsub_d:            // llvm.x86.ssse3.phsub.d
 
5166
  case Intrinsic::x86_ssse3_psign_d:            // llvm.x86.ssse3.psign.d
 
5167
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5168
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5169
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5170
    break;
 
5171
  case Intrinsic::x86_sse_cvtps2pi:             // llvm.x86.sse.cvtps2pi
 
5172
  case Intrinsic::x86_sse_cvttps2pi:            // llvm.x86.sse.cvttps2pi
 
5173
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5174
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5175
    break;
 
5176
  case Intrinsic::x86_mmx_pmadd_wd:             // llvm.x86.mmx.pmadd.wd
 
5177
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 2);
 
5178
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5179
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5180
    break;
 
5181
  case Intrinsic::x86_sse41_movntdqa:           // llvm.x86.sse41.movntdqa
 
5182
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5183
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5184
    break;
 
5185
  case Intrinsic::x86_sse41_pmovsxbq:           // llvm.x86.sse41.pmovsxbq
 
5186
  case Intrinsic::x86_sse41_pmovzxbq:           // llvm.x86.sse41.pmovzxbq
 
5187
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5188
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5189
    break;
 
5190
  case Intrinsic::x86_sse2_psad_bw:             // llvm.x86.sse2.psad.bw
 
5191
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5192
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5193
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5194
    break;
 
5195
  case Intrinsic::x86_sse2_psll_dq:             // llvm.x86.sse2.psll.dq
 
5196
  case Intrinsic::x86_sse2_psll_dq_bs:          // llvm.x86.sse2.psll.dq.bs
 
5197
  case Intrinsic::x86_sse2_pslli_q:             // llvm.x86.sse2.pslli.q
 
5198
  case Intrinsic::x86_sse2_psrl_dq:             // llvm.x86.sse2.psrl.dq
 
5199
  case Intrinsic::x86_sse2_psrl_dq_bs:          // llvm.x86.sse2.psrl.dq.bs
 
5200
  case Intrinsic::x86_sse2_psrli_q:             // llvm.x86.sse2.psrli.q
 
5201
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5202
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5203
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5204
    break;
 
5205
  case Intrinsic::x86_sse2_psll_q:              // llvm.x86.sse2.psll.q
 
5206
  case Intrinsic::x86_sse2_psrl_q:              // llvm.x86.sse2.psrl.q
 
5207
  case Intrinsic::x86_sse41_pcmpeqq:            // llvm.x86.sse41.pcmpeqq
 
5208
  case Intrinsic::x86_sse42_pcmpgtq:            // llvm.x86.sse42.pcmpgtq
 
5209
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5210
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5211
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5212
    break;
 
5213
  case Intrinsic::x86_ssse3_palign_r_128:               // llvm.x86.ssse3.palign.r.128
 
5214
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5215
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5216
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5217
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5218
    break;
 
5219
  case Intrinsic::x86_sse41_pmovsxdq:           // llvm.x86.sse41.pmovsxdq
 
5220
  case Intrinsic::x86_sse41_pmovzxdq:           // llvm.x86.sse41.pmovzxdq
 
5221
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5222
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5223
    break;
 
5224
  case Intrinsic::x86_sse2_pmulu_dq:            // llvm.x86.sse2.pmulu.dq
 
5225
  case Intrinsic::x86_sse41_pmuldq:             // llvm.x86.sse41.pmuldq
 
5226
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5227
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5228
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5229
    break;
 
5230
  case Intrinsic::x86_sse41_pmovsxwq:           // llvm.x86.sse41.pmovsxwq
 
5231
  case Intrinsic::x86_sse41_pmovzxwq:           // llvm.x86.sse41.pmovzxwq
 
5232
    ResultTy = VectorType::get(IntegerType::get(Context, 64), 2);
 
5233
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5234
    break;
 
5235
  case Intrinsic::x86_sse_loadu_ps:             // llvm.x86.sse.loadu.ps
 
5236
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5237
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5238
    break;
 
5239
  case Intrinsic::x86_sse2_cvtpd2ps:            // llvm.x86.sse2.cvtpd2ps
 
5240
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5241
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5242
    break;
 
5243
  case Intrinsic::ppc_altivec_vexptefp:         // llvm.ppc.altivec.vexptefp
 
5244
  case Intrinsic::ppc_altivec_vlogefp:          // llvm.ppc.altivec.vlogefp
 
5245
  case Intrinsic::ppc_altivec_vrefp:            // llvm.ppc.altivec.vrefp
 
5246
  case Intrinsic::ppc_altivec_vrfim:            // llvm.ppc.altivec.vrfim
 
5247
  case Intrinsic::ppc_altivec_vrfin:            // llvm.ppc.altivec.vrfin
 
5248
  case Intrinsic::ppc_altivec_vrfip:            // llvm.ppc.altivec.vrfip
 
5249
  case Intrinsic::ppc_altivec_vrfiz:            // llvm.ppc.altivec.vrfiz
 
5250
  case Intrinsic::ppc_altivec_vrsqrtefp:                // llvm.ppc.altivec.vrsqrtefp
 
5251
  case Intrinsic::x86_sse_rcp_ps:               // llvm.x86.sse.rcp.ps
 
5252
  case Intrinsic::x86_sse_rcp_ss:               // llvm.x86.sse.rcp.ss
 
5253
  case Intrinsic::x86_sse_rsqrt_ps:             // llvm.x86.sse.rsqrt.ps
 
5254
  case Intrinsic::x86_sse_rsqrt_ss:             // llvm.x86.sse.rsqrt.ss
 
5255
  case Intrinsic::x86_sse_sqrt_ps:              // llvm.x86.sse.sqrt.ps
 
5256
  case Intrinsic::x86_sse_sqrt_ss:              // llvm.x86.sse.sqrt.ss
 
5257
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5258
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5259
    break;
 
5260
  case Intrinsic::x86_sse41_round_ps:           // llvm.x86.sse41.round.ps
 
5261
  case Intrinsic::x86_sse_cvtsi2ss:             // llvm.x86.sse.cvtsi2ss
 
5262
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5263
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5264
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5265
    break;
 
5266
  case Intrinsic::x86_sse_cvtsi642ss:           // llvm.x86.sse.cvtsi642ss
 
5267
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5268
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5269
    ArgTys.push_back(IntegerType::get(Context, 64));
 
5270
    break;
 
5271
  case Intrinsic::x86_sse2_cvtsd2ss:            // llvm.x86.sse2.cvtsd2ss
 
5272
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5273
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5274
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5275
    break;
 
5276
  case Intrinsic::x86_sse_cvtpi2ps:             // llvm.x86.sse.cvtpi2ps
 
5277
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5278
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5279
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5280
    break;
 
5281
  case Intrinsic::ppc_altivec_vmaxfp:           // llvm.ppc.altivec.vmaxfp
 
5282
  case Intrinsic::ppc_altivec_vminfp:           // llvm.ppc.altivec.vminfp
 
5283
  case Intrinsic::spu_si_fa:            // llvm.spu.si.fa
 
5284
  case Intrinsic::spu_si_fceq:          // llvm.spu.si.fceq
 
5285
  case Intrinsic::spu_si_fcgt:          // llvm.spu.si.fcgt
 
5286
  case Intrinsic::spu_si_fcmeq:         // llvm.spu.si.fcmeq
 
5287
  case Intrinsic::spu_si_fcmgt:         // llvm.spu.si.fcmgt
 
5288
  case Intrinsic::spu_si_fm:            // llvm.spu.si.fm
 
5289
  case Intrinsic::spu_si_fs:            // llvm.spu.si.fs
 
5290
  case Intrinsic::x86_sse3_addsub_ps:           // llvm.x86.sse3.addsub.ps
 
5291
  case Intrinsic::x86_sse3_hadd_ps:             // llvm.x86.sse3.hadd.ps
 
5292
  case Intrinsic::x86_sse3_hsub_ps:             // llvm.x86.sse3.hsub.ps
 
5293
  case Intrinsic::x86_sse_add_ss:               // llvm.x86.sse.add.ss
 
5294
  case Intrinsic::x86_sse_div_ss:               // llvm.x86.sse.div.ss
 
5295
  case Intrinsic::x86_sse_max_ps:               // llvm.x86.sse.max.ps
 
5296
  case Intrinsic::x86_sse_max_ss:               // llvm.x86.sse.max.ss
 
5297
  case Intrinsic::x86_sse_min_ps:               // llvm.x86.sse.min.ps
 
5298
  case Intrinsic::x86_sse_min_ss:               // llvm.x86.sse.min.ss
 
5299
  case Intrinsic::x86_sse_mul_ss:               // llvm.x86.sse.mul.ss
 
5300
  case Intrinsic::x86_sse_sub_ss:               // llvm.x86.sse.sub.ss
 
5301
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5302
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5303
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5304
    break;
 
5305
  case Intrinsic::x86_sse41_blendps:            // llvm.x86.sse41.blendps
 
5306
  case Intrinsic::x86_sse41_dpps:               // llvm.x86.sse41.dpps
 
5307
  case Intrinsic::x86_sse41_insertps:           // llvm.x86.sse41.insertps
 
5308
  case Intrinsic::x86_sse41_round_ss:           // llvm.x86.sse41.round.ss
 
5309
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5310
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5311
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5312
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5313
    break;
 
5314
  case Intrinsic::x86_sse_cmp_ps:               // llvm.x86.sse.cmp.ps
 
5315
  case Intrinsic::x86_sse_cmp_ss:               // llvm.x86.sse.cmp.ss
 
5316
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5317
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5318
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5319
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5320
    break;
 
5321
  case Intrinsic::ppc_altivec_vmaddfp:          // llvm.ppc.altivec.vmaddfp
 
5322
  case Intrinsic::ppc_altivec_vnmsubfp:         // llvm.ppc.altivec.vnmsubfp
 
5323
  case Intrinsic::spu_si_fma:           // llvm.spu.si.fma
 
5324
  case Intrinsic::spu_si_fms:           // llvm.spu.si.fms
 
5325
  case Intrinsic::spu_si_fnms:          // llvm.spu.si.fnms
 
5326
  case Intrinsic::x86_sse41_blendvps:           // llvm.x86.sse41.blendvps
 
5327
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5328
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5329
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5330
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5331
    break;
 
5332
  case Intrinsic::x86_sse2_cvtdq2ps:            // llvm.x86.sse2.cvtdq2ps
 
5333
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5334
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5335
    break;
 
5336
  case Intrinsic::ppc_altivec_vcfsx:            // llvm.ppc.altivec.vcfsx
 
5337
  case Intrinsic::ppc_altivec_vcfux:            // llvm.ppc.altivec.vcfux
 
5338
    ResultTy = VectorType::get(Type::getFloatTy(Context), 4);
 
5339
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5340
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5341
    break;
 
5342
  case Intrinsic::x86_mmx_packssdw:             // llvm.x86.mmx.packssdw
 
5343
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5344
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5345
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2));
 
5346
    break;
 
5347
  case Intrinsic::x86_ssse3_pabs_w:             // llvm.x86.ssse3.pabs.w
 
5348
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5349
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5350
    break;
 
5351
  case Intrinsic::x86_mmx_pslli_w:              // llvm.x86.mmx.pslli.w
 
5352
  case Intrinsic::x86_mmx_psrai_w:              // llvm.x86.mmx.psrai.w
 
5353
  case Intrinsic::x86_mmx_psrli_w:              // llvm.x86.mmx.psrli.w
 
5354
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5355
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5356
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5357
    break;
 
5358
  case Intrinsic::x86_mmx_psll_w:               // llvm.x86.mmx.psll.w
 
5359
  case Intrinsic::x86_mmx_psra_w:               // llvm.x86.mmx.psra.w
 
5360
  case Intrinsic::x86_mmx_psrl_w:               // llvm.x86.mmx.psrl.w
 
5361
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5362
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5363
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5364
    break;
 
5365
  case Intrinsic::x86_mmx_padds_w:              // llvm.x86.mmx.padds.w
 
5366
  case Intrinsic::x86_mmx_paddus_w:             // llvm.x86.mmx.paddus.w
 
5367
  case Intrinsic::x86_mmx_pavg_w:               // llvm.x86.mmx.pavg.w
 
5368
  case Intrinsic::x86_mmx_pcmpeq_w:             // llvm.x86.mmx.pcmpeq.w
 
5369
  case Intrinsic::x86_mmx_pcmpgt_w:             // llvm.x86.mmx.pcmpgt.w
 
5370
  case Intrinsic::x86_mmx_pmaxs_w:              // llvm.x86.mmx.pmaxs.w
 
5371
  case Intrinsic::x86_mmx_pmins_w:              // llvm.x86.mmx.pmins.w
 
5372
  case Intrinsic::x86_mmx_pmulh_w:              // llvm.x86.mmx.pmulh.w
 
5373
  case Intrinsic::x86_mmx_pmulhu_w:             // llvm.x86.mmx.pmulhu.w
 
5374
  case Intrinsic::x86_mmx_psubs_w:              // llvm.x86.mmx.psubs.w
 
5375
  case Intrinsic::x86_mmx_psubus_w:             // llvm.x86.mmx.psubus.w
 
5376
  case Intrinsic::x86_ssse3_phadd_sw:           // llvm.x86.ssse3.phadd.sw
 
5377
  case Intrinsic::x86_ssse3_phadd_w:            // llvm.x86.ssse3.phadd.w
 
5378
  case Intrinsic::x86_ssse3_phsub_sw:           // llvm.x86.ssse3.phsub.sw
 
5379
  case Intrinsic::x86_ssse3_phsub_w:            // llvm.x86.ssse3.phsub.w
 
5380
  case Intrinsic::x86_ssse3_pmadd_ub_sw:                // llvm.x86.ssse3.pmadd.ub.sw
 
5381
  case Intrinsic::x86_ssse3_pmul_hr_sw:         // llvm.x86.ssse3.pmul.hr.sw
 
5382
  case Intrinsic::x86_ssse3_psign_w:            // llvm.x86.ssse3.psign.w
 
5383
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5384
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5385
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5386
    break;
 
5387
  case Intrinsic::x86_mmx_psad_bw:              // llvm.x86.mmx.psad.bw
 
5388
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 4);
 
5389
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5390
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5391
    break;
 
5392
  case Intrinsic::ppc_altivec_lvewx:            // llvm.ppc.altivec.lvewx
 
5393
  case Intrinsic::ppc_altivec_lvx:              // llvm.ppc.altivec.lvx
 
5394
  case Intrinsic::ppc_altivec_lvxl:             // llvm.ppc.altivec.lvxl
 
5395
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5396
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5397
    break;
 
5398
  case Intrinsic::x86_sse41_pmovsxbd:           // llvm.x86.sse41.pmovsxbd
 
5399
  case Intrinsic::x86_sse41_pmovzxbd:           // llvm.x86.sse41.pmovzxbd
 
5400
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5401
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5402
    break;
 
5403
  case Intrinsic::ppc_altivec_vmsummbm:         // llvm.ppc.altivec.vmsummbm
 
5404
  case Intrinsic::ppc_altivec_vmsumubm:         // llvm.ppc.altivec.vmsumubm
 
5405
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5406
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5407
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5408
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5409
    break;
 
5410
  case Intrinsic::ppc_altivec_vsum4sbs:         // llvm.ppc.altivec.vsum4sbs
 
5411
  case Intrinsic::ppc_altivec_vsum4ubs:         // llvm.ppc.altivec.vsum4ubs
 
5412
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5413
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5414
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5415
    break;
 
5416
  case Intrinsic::x86_sse2_cvtpd2dq:            // llvm.x86.sse2.cvtpd2dq
 
5417
  case Intrinsic::x86_sse2_cvttpd2dq:           // llvm.x86.sse2.cvttpd2dq
 
5418
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5419
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5420
    break;
 
5421
  case Intrinsic::x86_sse2_cvtps2dq:            // llvm.x86.sse2.cvtps2dq
 
5422
  case Intrinsic::x86_sse2_cvttps2dq:           // llvm.x86.sse2.cvttps2dq
 
5423
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5424
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5425
    break;
 
5426
  case Intrinsic::ppc_altivec_vctsxs:           // llvm.ppc.altivec.vctsxs
 
5427
  case Intrinsic::ppc_altivec_vctuxs:           // llvm.ppc.altivec.vctuxs
 
5428
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5429
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5430
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5431
    break;
 
5432
  case Intrinsic::arm_neon_vacgeq:              // llvm.arm.neon.vacgeq
 
5433
  case Intrinsic::arm_neon_vacgtq:              // llvm.arm.neon.vacgtq
 
5434
  case Intrinsic::ppc_altivec_vcmpbfp:          // llvm.ppc.altivec.vcmpbfp
 
5435
  case Intrinsic::ppc_altivec_vcmpeqfp:         // llvm.ppc.altivec.vcmpeqfp
 
5436
  case Intrinsic::ppc_altivec_vcmpgefp:         // llvm.ppc.altivec.vcmpgefp
 
5437
  case Intrinsic::ppc_altivec_vcmpgtfp:         // llvm.ppc.altivec.vcmpgtfp
 
5438
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5439
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5440
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5441
    break;
 
5442
  case Intrinsic::x86_ssse3_pabs_d_128:         // llvm.x86.ssse3.pabs.d.128
 
5443
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5444
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5445
    break;
 
5446
  case Intrinsic::spu_si_shli:          // llvm.spu.si.shli
 
5447
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5448
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5449
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5450
    break;
 
5451
  case Intrinsic::spu_si_ai:            // llvm.spu.si.ai
 
5452
  case Intrinsic::spu_si_andi:          // llvm.spu.si.andi
 
5453
  case Intrinsic::spu_si_ceqi:          // llvm.spu.si.ceqi
 
5454
  case Intrinsic::spu_si_cgti:          // llvm.spu.si.cgti
 
5455
  case Intrinsic::spu_si_clgti:         // llvm.spu.si.clgti
 
5456
  case Intrinsic::spu_si_ori:           // llvm.spu.si.ori
 
5457
  case Intrinsic::spu_si_sfi:           // llvm.spu.si.sfi
 
5458
  case Intrinsic::spu_si_xori:          // llvm.spu.si.xori
 
5459
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5460
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5461
    ArgTys.push_back(IntegerType::get(Context, 16));
 
5462
    break;
 
5463
  case Intrinsic::x86_sse2_pslli_d:             // llvm.x86.sse2.pslli.d
 
5464
  case Intrinsic::x86_sse2_psrai_d:             // llvm.x86.sse2.psrai.d
 
5465
  case Intrinsic::x86_sse2_psrli_d:             // llvm.x86.sse2.psrli.d
 
5466
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5467
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5468
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5469
    break;
 
5470
  case Intrinsic::ppc_altivec_vaddcuw:          // llvm.ppc.altivec.vaddcuw
 
5471
  case Intrinsic::ppc_altivec_vaddsws:          // llvm.ppc.altivec.vaddsws
 
5472
  case Intrinsic::ppc_altivec_vadduws:          // llvm.ppc.altivec.vadduws
 
5473
  case Intrinsic::ppc_altivec_vavgsw:           // llvm.ppc.altivec.vavgsw
 
5474
  case Intrinsic::ppc_altivec_vavguw:           // llvm.ppc.altivec.vavguw
 
5475
  case Intrinsic::ppc_altivec_vcmpequw:         // llvm.ppc.altivec.vcmpequw
 
5476
  case Intrinsic::ppc_altivec_vcmpgtsw:         // llvm.ppc.altivec.vcmpgtsw
 
5477
  case Intrinsic::ppc_altivec_vcmpgtuw:         // llvm.ppc.altivec.vcmpgtuw
 
5478
  case Intrinsic::ppc_altivec_vmaxsw:           // llvm.ppc.altivec.vmaxsw
 
5479
  case Intrinsic::ppc_altivec_vmaxuw:           // llvm.ppc.altivec.vmaxuw
 
5480
  case Intrinsic::ppc_altivec_vminsw:           // llvm.ppc.altivec.vminsw
 
5481
  case Intrinsic::ppc_altivec_vminuw:           // llvm.ppc.altivec.vminuw
 
5482
  case Intrinsic::ppc_altivec_vrlw:             // llvm.ppc.altivec.vrlw
 
5483
  case Intrinsic::ppc_altivec_vsl:              // llvm.ppc.altivec.vsl
 
5484
  case Intrinsic::ppc_altivec_vslo:             // llvm.ppc.altivec.vslo
 
5485
  case Intrinsic::ppc_altivec_vslw:             // llvm.ppc.altivec.vslw
 
5486
  case Intrinsic::ppc_altivec_vsr:              // llvm.ppc.altivec.vsr
 
5487
  case Intrinsic::ppc_altivec_vsraw:            // llvm.ppc.altivec.vsraw
 
5488
  case Intrinsic::ppc_altivec_vsro:             // llvm.ppc.altivec.vsro
 
5489
  case Intrinsic::ppc_altivec_vsrw:             // llvm.ppc.altivec.vsrw
 
5490
  case Intrinsic::ppc_altivec_vsubcuw:          // llvm.ppc.altivec.vsubcuw
 
5491
  case Intrinsic::ppc_altivec_vsubsws:          // llvm.ppc.altivec.vsubsws
 
5492
  case Intrinsic::ppc_altivec_vsubuws:          // llvm.ppc.altivec.vsubuws
 
5493
  case Intrinsic::ppc_altivec_vsum2sws:         // llvm.ppc.altivec.vsum2sws
 
5494
  case Intrinsic::ppc_altivec_vsumsws:          // llvm.ppc.altivec.vsumsws
 
5495
  case Intrinsic::spu_si_a:             // llvm.spu.si.a
 
5496
  case Intrinsic::spu_si_addx:          // llvm.spu.si.addx
 
5497
  case Intrinsic::spu_si_and:           // llvm.spu.si.and
 
5498
  case Intrinsic::spu_si_andc:          // llvm.spu.si.andc
 
5499
  case Intrinsic::spu_si_bg:            // llvm.spu.si.bg
 
5500
  case Intrinsic::spu_si_bgx:           // llvm.spu.si.bgx
 
5501
  case Intrinsic::spu_si_ceq:           // llvm.spu.si.ceq
 
5502
  case Intrinsic::spu_si_cg:            // llvm.spu.si.cg
 
5503
  case Intrinsic::spu_si_cgt:           // llvm.spu.si.cgt
 
5504
  case Intrinsic::spu_si_cgx:           // llvm.spu.si.cgx
 
5505
  case Intrinsic::spu_si_clgt:          // llvm.spu.si.clgt
 
5506
  case Intrinsic::spu_si_nand:          // llvm.spu.si.nand
 
5507
  case Intrinsic::spu_si_nor:           // llvm.spu.si.nor
 
5508
  case Intrinsic::spu_si_or:            // llvm.spu.si.or
 
5509
  case Intrinsic::spu_si_orc:           // llvm.spu.si.orc
 
5510
  case Intrinsic::spu_si_sf:            // llvm.spu.si.sf
 
5511
  case Intrinsic::spu_si_sfx:           // llvm.spu.si.sfx
 
5512
  case Intrinsic::spu_si_xor:           // llvm.spu.si.xor
 
5513
  case Intrinsic::x86_sse2_pcmpeq_d:            // llvm.x86.sse2.pcmpeq.d
 
5514
  case Intrinsic::x86_sse2_pcmpgt_d:            // llvm.x86.sse2.pcmpgt.d
 
5515
  case Intrinsic::x86_sse2_psll_d:              // llvm.x86.sse2.psll.d
 
5516
  case Intrinsic::x86_sse2_psra_d:              // llvm.x86.sse2.psra.d
 
5517
  case Intrinsic::x86_sse2_psrl_d:              // llvm.x86.sse2.psrl.d
 
5518
  case Intrinsic::x86_sse41_pmaxsd:             // llvm.x86.sse41.pmaxsd
 
5519
  case Intrinsic::x86_sse41_pmaxud:             // llvm.x86.sse41.pmaxud
 
5520
  case Intrinsic::x86_sse41_pminsd:             // llvm.x86.sse41.pminsd
 
5521
  case Intrinsic::x86_sse41_pminud:             // llvm.x86.sse41.pminud
 
5522
  case Intrinsic::x86_sse41_pmulld:             // llvm.x86.sse41.pmulld
 
5523
  case Intrinsic::x86_ssse3_phadd_d_128:                // llvm.x86.ssse3.phadd.d.128
 
5524
  case Intrinsic::x86_ssse3_phadd_sw_128:               // llvm.x86.ssse3.phadd.sw.128
 
5525
  case Intrinsic::x86_ssse3_phsub_d_128:                // llvm.x86.ssse3.phsub.d.128
 
5526
  case Intrinsic::x86_ssse3_psign_d_128:                // llvm.x86.ssse3.psign.d.128
 
5527
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5528
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5529
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5530
    break;
 
5531
  case Intrinsic::ppc_altivec_vperm:            // llvm.ppc.altivec.vperm
 
5532
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5533
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5534
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5535
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5536
    break;
 
5537
  case Intrinsic::ppc_altivec_vsel:             // llvm.ppc.altivec.vsel
 
5538
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5539
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5540
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5541
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5542
    break;
 
5543
  case Intrinsic::spu_si_mpyh:          // llvm.spu.si.mpyh
 
5544
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5545
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5546
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5547
    break;
 
5548
  case Intrinsic::ppc_altivec_vupkhpx:          // llvm.ppc.altivec.vupkhpx
 
5549
  case Intrinsic::ppc_altivec_vupkhsh:          // llvm.ppc.altivec.vupkhsh
 
5550
  case Intrinsic::ppc_altivec_vupklpx:          // llvm.ppc.altivec.vupklpx
 
5551
  case Intrinsic::ppc_altivec_vupklsh:          // llvm.ppc.altivec.vupklsh
 
5552
  case Intrinsic::x86_sse41_pmovsxwd:           // llvm.x86.sse41.pmovsxwd
 
5553
  case Intrinsic::x86_sse41_pmovzxwd:           // llvm.x86.sse41.pmovzxwd
 
5554
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5555
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5556
    break;
 
5557
  case Intrinsic::spu_si_mpyi:          // llvm.spu.si.mpyi
 
5558
  case Intrinsic::spu_si_mpyui:         // llvm.spu.si.mpyui
 
5559
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5560
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5561
    ArgTys.push_back(IntegerType::get(Context, 16));
 
5562
    break;
 
5563
  case Intrinsic::ppc_altivec_vsum4shs:         // llvm.ppc.altivec.vsum4shs
 
5564
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5565
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5566
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5567
    break;
 
5568
  case Intrinsic::ppc_altivec_vmulesh:          // llvm.ppc.altivec.vmulesh
 
5569
  case Intrinsic::ppc_altivec_vmuleuh:          // llvm.ppc.altivec.vmuleuh
 
5570
  case Intrinsic::ppc_altivec_vmulosh:          // llvm.ppc.altivec.vmulosh
 
5571
  case Intrinsic::ppc_altivec_vmulouh:          // llvm.ppc.altivec.vmulouh
 
5572
  case Intrinsic::spu_si_mpy:           // llvm.spu.si.mpy
 
5573
  case Intrinsic::spu_si_mpyhh:         // llvm.spu.si.mpyhh
 
5574
  case Intrinsic::spu_si_mpyhha:                // llvm.spu.si.mpyhha
 
5575
  case Intrinsic::spu_si_mpyhhau:               // llvm.spu.si.mpyhhau
 
5576
  case Intrinsic::spu_si_mpyhhu:                // llvm.spu.si.mpyhhu
 
5577
  case Intrinsic::spu_si_mpys:          // llvm.spu.si.mpys
 
5578
  case Intrinsic::spu_si_mpyu:          // llvm.spu.si.mpyu
 
5579
  case Intrinsic::x86_sse2_pmadd_wd:            // llvm.x86.sse2.pmadd.wd
 
5580
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5581
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5582
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5583
    break;
 
5584
  case Intrinsic::ppc_altivec_vmsumshm:         // llvm.ppc.altivec.vmsumshm
 
5585
  case Intrinsic::ppc_altivec_vmsumshs:         // llvm.ppc.altivec.vmsumshs
 
5586
  case Intrinsic::ppc_altivec_vmsumuhm:         // llvm.ppc.altivec.vmsumuhm
 
5587
  case Intrinsic::ppc_altivec_vmsumuhs:         // llvm.ppc.altivec.vmsumuhs
 
5588
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5589
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5590
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5591
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5592
    break;
 
5593
  case Intrinsic::spu_si_mpya:          // llvm.spu.si.mpya
 
5594
    ResultTy = VectorType::get(IntegerType::get(Context, 32), 4);
 
5595
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5596
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5597
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5598
    break;
 
5599
  case Intrinsic::ppc_altivec_mfvscr:           // llvm.ppc.altivec.mfvscr
 
5600
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5601
    break;
 
5602
  case Intrinsic::ppc_altivec_lvehx:            // llvm.ppc.altivec.lvehx
 
5603
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5604
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5605
    break;
 
5606
  case Intrinsic::ppc_altivec_vupkhsb:          // llvm.ppc.altivec.vupkhsb
 
5607
  case Intrinsic::ppc_altivec_vupklsb:          // llvm.ppc.altivec.vupklsb
 
5608
  case Intrinsic::x86_sse41_pmovsxbw:           // llvm.x86.sse41.pmovsxbw
 
5609
  case Intrinsic::x86_sse41_pmovzxbw:           // llvm.x86.sse41.pmovzxbw
 
5610
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5611
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5612
    break;
 
5613
  case Intrinsic::ppc_altivec_vmulesb:          // llvm.ppc.altivec.vmulesb
 
5614
  case Intrinsic::ppc_altivec_vmuleub:          // llvm.ppc.altivec.vmuleub
 
5615
  case Intrinsic::ppc_altivec_vmulosb:          // llvm.ppc.altivec.vmulosb
 
5616
  case Intrinsic::ppc_altivec_vmuloub:          // llvm.ppc.altivec.vmuloub
 
5617
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5618
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5619
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5620
    break;
 
5621
  case Intrinsic::ppc_altivec_vpkpx:            // llvm.ppc.altivec.vpkpx
 
5622
  case Intrinsic::ppc_altivec_vpkswus:          // llvm.ppc.altivec.vpkswus
 
5623
  case Intrinsic::ppc_altivec_vpkuwus:          // llvm.ppc.altivec.vpkuwus
 
5624
  case Intrinsic::x86_sse2_packssdw_128:                // llvm.x86.sse2.packssdw.128
 
5625
  case Intrinsic::x86_sse41_packusdw:           // llvm.x86.sse41.packusdw
 
5626
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5627
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5628
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5629
    break;
 
5630
  case Intrinsic::x86_sse41_phminposuw:         // llvm.x86.sse41.phminposuw
 
5631
  case Intrinsic::x86_ssse3_pabs_w_128:         // llvm.x86.ssse3.pabs.w.128
 
5632
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5633
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5634
    break;
 
5635
  case Intrinsic::spu_si_ahi:           // llvm.spu.si.ahi
 
5636
  case Intrinsic::spu_si_andhi:         // llvm.spu.si.andhi
 
5637
  case Intrinsic::spu_si_ceqhi:         // llvm.spu.si.ceqhi
 
5638
  case Intrinsic::spu_si_cgthi:         // llvm.spu.si.cgthi
 
5639
  case Intrinsic::spu_si_clgthi:                // llvm.spu.si.clgthi
 
5640
  case Intrinsic::spu_si_fsmbi:         // llvm.spu.si.fsmbi
 
5641
  case Intrinsic::spu_si_orhi:          // llvm.spu.si.orhi
 
5642
  case Intrinsic::spu_si_sfhi:          // llvm.spu.si.sfhi
 
5643
  case Intrinsic::spu_si_xorhi:         // llvm.spu.si.xorhi
 
5644
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5645
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5646
    ArgTys.push_back(IntegerType::get(Context, 16));
 
5647
    break;
 
5648
  case Intrinsic::spu_si_shlqbi:                // llvm.spu.si.shlqbi
 
5649
  case Intrinsic::spu_si_shlqby:                // llvm.spu.si.shlqby
 
5650
  case Intrinsic::x86_sse2_pslli_w:             // llvm.x86.sse2.pslli.w
 
5651
  case Intrinsic::x86_sse2_psrai_w:             // llvm.x86.sse2.psrai.w
 
5652
  case Intrinsic::x86_sse2_psrli_w:             // llvm.x86.sse2.psrli.w
 
5653
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5654
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5655
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5656
    break;
 
5657
  case Intrinsic::ppc_altivec_vaddshs:          // llvm.ppc.altivec.vaddshs
 
5658
  case Intrinsic::ppc_altivec_vadduhs:          // llvm.ppc.altivec.vadduhs
 
5659
  case Intrinsic::ppc_altivec_vavgsh:           // llvm.ppc.altivec.vavgsh
 
5660
  case Intrinsic::ppc_altivec_vavguh:           // llvm.ppc.altivec.vavguh
 
5661
  case Intrinsic::ppc_altivec_vcmpequh:         // llvm.ppc.altivec.vcmpequh
 
5662
  case Intrinsic::ppc_altivec_vcmpgtsh:         // llvm.ppc.altivec.vcmpgtsh
 
5663
  case Intrinsic::ppc_altivec_vcmpgtuh:         // llvm.ppc.altivec.vcmpgtuh
 
5664
  case Intrinsic::ppc_altivec_vmaxsh:           // llvm.ppc.altivec.vmaxsh
 
5665
  case Intrinsic::ppc_altivec_vmaxuh:           // llvm.ppc.altivec.vmaxuh
 
5666
  case Intrinsic::ppc_altivec_vminsh:           // llvm.ppc.altivec.vminsh
 
5667
  case Intrinsic::ppc_altivec_vminuh:           // llvm.ppc.altivec.vminuh
 
5668
  case Intrinsic::ppc_altivec_vrlh:             // llvm.ppc.altivec.vrlh
 
5669
  case Intrinsic::ppc_altivec_vslh:             // llvm.ppc.altivec.vslh
 
5670
  case Intrinsic::ppc_altivec_vsrah:            // llvm.ppc.altivec.vsrah
 
5671
  case Intrinsic::ppc_altivec_vsrh:             // llvm.ppc.altivec.vsrh
 
5672
  case Intrinsic::ppc_altivec_vsubshs:          // llvm.ppc.altivec.vsubshs
 
5673
  case Intrinsic::ppc_altivec_vsubuhs:          // llvm.ppc.altivec.vsubuhs
 
5674
  case Intrinsic::spu_si_ah:            // llvm.spu.si.ah
 
5675
  case Intrinsic::spu_si_ceqh:          // llvm.spu.si.ceqh
 
5676
  case Intrinsic::spu_si_cgth:          // llvm.spu.si.cgth
 
5677
  case Intrinsic::spu_si_clgth:         // llvm.spu.si.clgth
 
5678
  case Intrinsic::spu_si_sfh:           // llvm.spu.si.sfh
 
5679
  case Intrinsic::x86_sse2_padds_w:             // llvm.x86.sse2.padds.w
 
5680
  case Intrinsic::x86_sse2_paddus_w:            // llvm.x86.sse2.paddus.w
 
5681
  case Intrinsic::x86_sse2_pavg_w:              // llvm.x86.sse2.pavg.w
 
5682
  case Intrinsic::x86_sse2_pcmpeq_w:            // llvm.x86.sse2.pcmpeq.w
 
5683
  case Intrinsic::x86_sse2_pcmpgt_w:            // llvm.x86.sse2.pcmpgt.w
 
5684
  case Intrinsic::x86_sse2_pmaxs_w:             // llvm.x86.sse2.pmaxs.w
 
5685
  case Intrinsic::x86_sse2_pmins_w:             // llvm.x86.sse2.pmins.w
 
5686
  case Intrinsic::x86_sse2_pmulh_w:             // llvm.x86.sse2.pmulh.w
 
5687
  case Intrinsic::x86_sse2_pmulhu_w:            // llvm.x86.sse2.pmulhu.w
 
5688
  case Intrinsic::x86_sse2_psll_w:              // llvm.x86.sse2.psll.w
 
5689
  case Intrinsic::x86_sse2_psra_w:              // llvm.x86.sse2.psra.w
 
5690
  case Intrinsic::x86_sse2_psrl_w:              // llvm.x86.sse2.psrl.w
 
5691
  case Intrinsic::x86_sse2_psubs_w:             // llvm.x86.sse2.psubs.w
 
5692
  case Intrinsic::x86_sse2_psubus_w:            // llvm.x86.sse2.psubus.w
 
5693
  case Intrinsic::x86_sse41_pmaxuw:             // llvm.x86.sse41.pmaxuw
 
5694
  case Intrinsic::x86_sse41_pminuw:             // llvm.x86.sse41.pminuw
 
5695
  case Intrinsic::x86_ssse3_phadd_w_128:                // llvm.x86.ssse3.phadd.w.128
 
5696
  case Intrinsic::x86_ssse3_phsub_sw_128:               // llvm.x86.ssse3.phsub.sw.128
 
5697
  case Intrinsic::x86_ssse3_phsub_w_128:                // llvm.x86.ssse3.phsub.w.128
 
5698
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:            // llvm.x86.ssse3.pmadd.ub.sw.128
 
5699
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:             // llvm.x86.ssse3.pmul.hr.sw.128
 
5700
  case Intrinsic::x86_ssse3_psign_w_128:                // llvm.x86.ssse3.psign.w.128
 
5701
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5702
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5703
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5704
    break;
 
5705
  case Intrinsic::x86_sse41_pblendw:            // llvm.x86.sse41.pblendw
 
5706
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5707
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5708
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5709
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5710
    break;
 
5711
  case Intrinsic::ppc_altivec_vmhaddshs:                // llvm.ppc.altivec.vmhaddshs
 
5712
  case Intrinsic::ppc_altivec_vmhraddshs:               // llvm.ppc.altivec.vmhraddshs
 
5713
  case Intrinsic::ppc_altivec_vmladduhm:                // llvm.ppc.altivec.vmladduhm
 
5714
    ResultTy = VectorType::get(IntegerType::get(Context, 16), 8);
 
5715
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5716
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5717
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
5718
    break;
 
5719
  case Intrinsic::x86_mmx_packsswb:             // llvm.x86.mmx.packsswb
 
5720
  case Intrinsic::x86_mmx_packuswb:             // llvm.x86.mmx.packuswb
 
5721
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5722
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5723
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4));
 
5724
    break;
 
5725
  case Intrinsic::x86_ssse3_pabs_b:             // llvm.x86.ssse3.pabs.b
 
5726
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5727
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5728
    break;
 
5729
  case Intrinsic::arm_neon_vtbl1:               // llvm.arm.neon.vtbl1
 
5730
  case Intrinsic::x86_mmx_padds_b:              // llvm.x86.mmx.padds.b
 
5731
  case Intrinsic::x86_mmx_paddus_b:             // llvm.x86.mmx.paddus.b
 
5732
  case Intrinsic::x86_mmx_pavg_b:               // llvm.x86.mmx.pavg.b
 
5733
  case Intrinsic::x86_mmx_pcmpeq_b:             // llvm.x86.mmx.pcmpeq.b
 
5734
  case Intrinsic::x86_mmx_pcmpgt_b:             // llvm.x86.mmx.pcmpgt.b
 
5735
  case Intrinsic::x86_mmx_pmaxu_b:              // llvm.x86.mmx.pmaxu.b
 
5736
  case Intrinsic::x86_mmx_pminu_b:              // llvm.x86.mmx.pminu.b
 
5737
  case Intrinsic::x86_mmx_psubs_b:              // llvm.x86.mmx.psubs.b
 
5738
  case Intrinsic::x86_mmx_psubus_b:             // llvm.x86.mmx.psubus.b
 
5739
  case Intrinsic::x86_ssse3_pshuf_b:            // llvm.x86.ssse3.pshuf.b
 
5740
  case Intrinsic::x86_ssse3_psign_b:            // llvm.x86.ssse3.psign.b
 
5741
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5742
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5743
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5744
    break;
 
5745
  case Intrinsic::arm_neon_vtbl2:               // llvm.arm.neon.vtbl2
 
5746
  case Intrinsic::arm_neon_vtbx1:               // llvm.arm.neon.vtbx1
 
5747
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5748
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5749
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5750
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5751
    break;
 
5752
  case Intrinsic::arm_neon_vtbl3:               // llvm.arm.neon.vtbl3
 
5753
  case Intrinsic::arm_neon_vtbx2:               // llvm.arm.neon.vtbx2
 
5754
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5755
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5756
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5757
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5758
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5759
    break;
 
5760
  case Intrinsic::arm_neon_vtbl4:               // llvm.arm.neon.vtbl4
 
5761
  case Intrinsic::arm_neon_vtbx3:               // llvm.arm.neon.vtbx3
 
5762
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5763
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5764
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5765
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5766
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5767
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5768
    break;
 
5769
  case Intrinsic::arm_neon_vtbx4:               // llvm.arm.neon.vtbx4
 
5770
    ResultTy = VectorType::get(IntegerType::get(Context, 8), 8);
 
5771
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5772
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5773
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5774
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5775
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5776
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
5777
    break;
 
5778
  case Intrinsic::eh_unwind_init:               // llvm.eh.unwind.init
 
5779
  case Intrinsic::ppc_altivec_dssall:           // llvm.ppc.altivec.dssall
 
5780
  case Intrinsic::ppc_sync:             // llvm.ppc.sync
 
5781
  case Intrinsic::trap:         // llvm.trap
 
5782
  case Intrinsic::x86_mmx_emms:         // llvm.x86.mmx.emms
 
5783
  case Intrinsic::x86_mmx_femms:                // llvm.x86.mmx.femms
 
5784
  case Intrinsic::x86_sse2_lfence:              // llvm.x86.sse2.lfence
 
5785
  case Intrinsic::x86_sse2_mfence:              // llvm.x86.sse2.mfence
 
5786
  case Intrinsic::x86_sse_sfence:               // llvm.x86.sse.sfence
 
5787
    ResultTy = Type::getVoidTy(Context);
 
5788
    break;
 
5789
  case Intrinsic::invariant_end:                // llvm.invariant.end
 
5790
    ResultTy = Type::getVoidTy(Context);
 
5791
    ArgTys.push_back(PointerType::getUnqual(StructType::get(Context)));
 
5792
    ArgTys.push_back(IntegerType::get(Context, 64));
 
5793
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5794
    break;
 
5795
  case Intrinsic::memory_barrier:               // llvm.memory.barrier
 
5796
    ResultTy = Type::getVoidTy(Context);
 
5797
    ArgTys.push_back(IntegerType::get(Context, 1));
 
5798
    ArgTys.push_back(IntegerType::get(Context, 1));
 
5799
    ArgTys.push_back(IntegerType::get(Context, 1));
 
5800
    ArgTys.push_back(IntegerType::get(Context, 1));
 
5801
    ArgTys.push_back(IntegerType::get(Context, 1));
 
5802
    break;
 
5803
  case Intrinsic::eh_sjlj_callsite:             // llvm.eh.sjlj.callsite
 
5804
  case Intrinsic::pcmarker:             // llvm.pcmarker
 
5805
  case Intrinsic::ppc_altivec_dss:              // llvm.ppc.altivec.dss
 
5806
    ResultTy = Type::getVoidTy(Context);
 
5807
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5808
    break;
 
5809
  case Intrinsic::x86_sse3_mwait:               // llvm.x86.sse3.mwait
 
5810
    ResultTy = Type::getVoidTy(Context);
 
5811
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5812
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5813
    break;
 
5814
  case Intrinsic::eh_return_i32:                // llvm.eh.return.i32
 
5815
    ResultTy = Type::getVoidTy(Context);
 
5816
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5817
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5818
    break;
 
5819
  case Intrinsic::eh_return_i64:                // llvm.eh.return.i64
 
5820
  case Intrinsic::lifetime_end:         // llvm.lifetime.end
 
5821
  case Intrinsic::lifetime_start:               // llvm.lifetime.start
 
5822
    ResultTy = Type::getVoidTy(Context);
 
5823
    ArgTys.push_back(IntegerType::get(Context, 64));
 
5824
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5825
    break;
 
5826
  case Intrinsic::dbg_value:            // llvm.dbg.value
 
5827
    ResultTy = Type::getVoidTy(Context);
 
5828
    ArgTys.push_back(Type::getMetadataTy(Context));
 
5829
    ArgTys.push_back(IntegerType::get(Context, 64));
 
5830
    ArgTys.push_back(Type::getMetadataTy(Context));
 
5831
    break;
 
5832
  case Intrinsic::dbg_declare:          // llvm.dbg.declare
 
5833
    ResultTy = Type::getVoidTy(Context);
 
5834
    ArgTys.push_back(Type::getMetadataTy(Context));
 
5835
    ArgTys.push_back(Type::getMetadataTy(Context));
 
5836
    break;
 
5837
  case Intrinsic::eh_sjlj_longjmp:              // llvm.eh.sjlj.longjmp
 
5838
  case Intrinsic::ppc_dcba:             // llvm.ppc.dcba
 
5839
  case Intrinsic::ppc_dcbf:             // llvm.ppc.dcbf
 
5840
  case Intrinsic::ppc_dcbi:             // llvm.ppc.dcbi
 
5841
  case Intrinsic::ppc_dcbst:            // llvm.ppc.dcbst
 
5842
  case Intrinsic::ppc_dcbt:             // llvm.ppc.dcbt
 
5843
  case Intrinsic::ppc_dcbtst:           // llvm.ppc.dcbtst
 
5844
  case Intrinsic::ppc_dcbz:             // llvm.ppc.dcbz
 
5845
  case Intrinsic::ppc_dcbzl:            // llvm.ppc.dcbzl
 
5846
  case Intrinsic::stackrestore:         // llvm.stackrestore
 
5847
  case Intrinsic::vaend:                // llvm.va_end
 
5848
  case Intrinsic::vastart:              // llvm.va_start
 
5849
  case Intrinsic::x86_sse2_clflush:             // llvm.x86.sse2.clflush
 
5850
  case Intrinsic::x86_sse_ldmxcsr:              // llvm.x86.sse.ldmxcsr
 
5851
  case Intrinsic::x86_sse_stmxcsr:              // llvm.x86.sse.stmxcsr
 
5852
    ResultTy = Type::getVoidTy(Context);
 
5853
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5854
    break;
 
5855
  case Intrinsic::arm_neon_vst1:                // llvm.arm.neon.vst1
 
5856
    ResultTy = Type::getVoidTy(Context);
 
5857
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5858
    ArgTys.push_back(Tys[0]);
 
5859
    break;
 
5860
  case Intrinsic::arm_neon_vst2:                // llvm.arm.neon.vst2
 
5861
    ResultTy = Type::getVoidTy(Context);
 
5862
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5863
    ArgTys.push_back(Tys[0]);
 
5864
    ArgTys.push_back(Tys[0]);
 
5865
    break;
 
5866
  case Intrinsic::arm_neon_vst3:                // llvm.arm.neon.vst3
 
5867
    ResultTy = Type::getVoidTy(Context);
 
5868
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5869
    ArgTys.push_back(Tys[0]);
 
5870
    ArgTys.push_back(Tys[0]);
 
5871
    ArgTys.push_back(Tys[0]);
 
5872
    break;
 
5873
  case Intrinsic::arm_neon_vst4:                // llvm.arm.neon.vst4
 
5874
    ResultTy = Type::getVoidTy(Context);
 
5875
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5876
    ArgTys.push_back(Tys[0]);
 
5877
    ArgTys.push_back(Tys[0]);
 
5878
    ArgTys.push_back(Tys[0]);
 
5879
    ArgTys.push_back(Tys[0]);
 
5880
    break;
 
5881
  case Intrinsic::arm_neon_vst2lane:            // llvm.arm.neon.vst2lane
 
5882
    ResultTy = Type::getVoidTy(Context);
 
5883
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5884
    ArgTys.push_back(Tys[0]);
 
5885
    ArgTys.push_back(Tys[0]);
 
5886
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5887
    break;
 
5888
  case Intrinsic::arm_neon_vst3lane:            // llvm.arm.neon.vst3lane
 
5889
    ResultTy = Type::getVoidTy(Context);
 
5890
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5891
    ArgTys.push_back(Tys[0]);
 
5892
    ArgTys.push_back(Tys[0]);
 
5893
    ArgTys.push_back(Tys[0]);
 
5894
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5895
    break;
 
5896
  case Intrinsic::arm_neon_vst4lane:            // llvm.arm.neon.vst4lane
 
5897
    ResultTy = Type::getVoidTy(Context);
 
5898
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5899
    ArgTys.push_back(Tys[0]);
 
5900
    ArgTys.push_back(Tys[0]);
 
5901
    ArgTys.push_back(Tys[0]);
 
5902
    ArgTys.push_back(Tys[0]);
 
5903
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5904
    break;
 
5905
  case Intrinsic::longjmp:              // llvm.longjmp
 
5906
  case Intrinsic::siglongjmp:           // llvm.siglongjmp
 
5907
  case Intrinsic::x86_sse2_movnt_i:             // llvm.x86.sse2.movnt.i
 
5908
    ResultTy = Type::getVoidTy(Context);
 
5909
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5910
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5911
    break;
 
5912
  case Intrinsic::ppc_altivec_dst:              // llvm.ppc.altivec.dst
 
5913
  case Intrinsic::ppc_altivec_dstst:            // llvm.ppc.altivec.dstst
 
5914
  case Intrinsic::ppc_altivec_dststt:           // llvm.ppc.altivec.dststt
 
5915
  case Intrinsic::ppc_altivec_dstt:             // llvm.ppc.altivec.dstt
 
5916
  case Intrinsic::prefetch:             // llvm.prefetch
 
5917
  case Intrinsic::x86_sse3_monitor:             // llvm.x86.sse3.monitor
 
5918
    ResultTy = Type::getVoidTy(Context);
 
5919
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5920
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5921
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5922
    break;
 
5923
  case Intrinsic::memset:               // llvm.memset
 
5924
    ResultTy = Type::getVoidTy(Context);
 
5925
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5926
    ArgTys.push_back(IntegerType::get(Context, 8));
 
5927
    ArgTys.push_back(Tys[0]);
 
5928
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5929
    break;
 
5930
  case Intrinsic::vacopy:               // llvm.va_copy
 
5931
    ResultTy = Type::getVoidTy(Context);
 
5932
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5933
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5934
    break;
 
5935
  case Intrinsic::memcpy:               // llvm.memcpy
 
5936
  case Intrinsic::memmove:              // llvm.memmove
 
5937
    ResultTy = Type::getVoidTy(Context);
 
5938
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5939
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5940
    ArgTys.push_back(Tys[0]);
 
5941
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5942
    break;
 
5943
  case Intrinsic::var_annotation:               // llvm.var.annotation
 
5944
    ResultTy = Type::getVoidTy(Context);
 
5945
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5946
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5947
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5948
    ArgTys.push_back(IntegerType::get(Context, 32));
 
5949
    break;
 
5950
  case Intrinsic::gcwrite:              // llvm.gcwrite
 
5951
    ResultTy = Type::getVoidTy(Context);
 
5952
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5953
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5954
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
 
5955
    break;
 
5956
  case Intrinsic::stackprotector:               // llvm.stackprotector
 
5957
    ResultTy = Type::getVoidTy(Context);
 
5958
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5959
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
 
5960
    break;
 
5961
  case Intrinsic::x86_sse2_storeu_dq:           // llvm.x86.sse2.storeu.dq
 
5962
    ResultTy = Type::getVoidTy(Context);
 
5963
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5964
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
5965
    break;
 
5966
  case Intrinsic::x86_mmx_movnt_dq:             // llvm.x86.mmx.movnt.dq
 
5967
    ResultTy = Type::getVoidTy(Context);
 
5968
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5969
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1));
 
5970
    break;
 
5971
  case Intrinsic::x86_sse2_movnt_pd:            // llvm.x86.sse2.movnt.pd
 
5972
  case Intrinsic::x86_sse2_storeu_pd:           // llvm.x86.sse2.storeu.pd
 
5973
    ResultTy = Type::getVoidTy(Context);
 
5974
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5975
    ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2));
 
5976
    break;
 
5977
  case Intrinsic::x86_sse2_movnt_dq:            // llvm.x86.sse2.movnt.dq
 
5978
    ResultTy = Type::getVoidTy(Context);
 
5979
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5980
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2));
 
5981
    break;
 
5982
  case Intrinsic::x86_sse_movnt_ps:             // llvm.x86.sse.movnt.ps
 
5983
  case Intrinsic::x86_sse_storeu_ps:            // llvm.x86.sse.storeu.ps
 
5984
    ResultTy = Type::getVoidTy(Context);
 
5985
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5986
    ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4));
 
5987
    break;
 
5988
  case Intrinsic::x86_sse2_storel_dq:           // llvm.x86.sse2.storel.dq
 
5989
    ResultTy = Type::getVoidTy(Context);
 
5990
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5991
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
5992
    break;
 
5993
  case Intrinsic::gcroot:               // llvm.gcroot
 
5994
    ResultTy = Type::getVoidTy(Context);
 
5995
    ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8))));
 
5996
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
5997
    break;
 
5998
  case Intrinsic::ppc_altivec_stvebx:           // llvm.ppc.altivec.stvebx
 
5999
    ResultTy = Type::getVoidTy(Context);
 
6000
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
6001
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
6002
    break;
 
6003
  case Intrinsic::x86_sse2_maskmov_dqu:         // llvm.x86.sse2.maskmov.dqu
 
6004
    ResultTy = Type::getVoidTy(Context);
 
6005
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
6006
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16));
 
6007
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
6008
    break;
 
6009
  case Intrinsic::ppc_altivec_mtvscr:           // llvm.ppc.altivec.mtvscr
 
6010
    ResultTy = Type::getVoidTy(Context);
 
6011
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
6012
    break;
 
6013
  case Intrinsic::ppc_altivec_stvewx:           // llvm.ppc.altivec.stvewx
 
6014
  case Intrinsic::ppc_altivec_stvx:             // llvm.ppc.altivec.stvx
 
6015
  case Intrinsic::ppc_altivec_stvxl:            // llvm.ppc.altivec.stvxl
 
6016
    ResultTy = Type::getVoidTy(Context);
 
6017
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4));
 
6018
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
6019
    break;
 
6020
  case Intrinsic::ppc_altivec_stvehx:           // llvm.ppc.altivec.stvehx
 
6021
    ResultTy = Type::getVoidTy(Context);
 
6022
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8));
 
6023
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
6024
    break;
 
6025
  case Intrinsic::x86_mmx_maskmovq:             // llvm.x86.mmx.maskmovq
 
6026
    ResultTy = Type::getVoidTy(Context);
 
6027
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
6028
    ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8));
 
6029
    ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8)));
 
6030
    break;
 
6031
  }
 
6032
#endif
 
6033
 
 
6034
// Add parameter attributes that are not common to all intrinsics.
 
6035
#ifdef GET_INTRINSIC_ATTRIBUTES
 
6036
AttrListPtr Intrinsic::getAttributes(ID id) {  // No intrinsic can throw exceptions.
 
6037
  Attributes Attr = Attribute::NoUnwind;
 
6038
  switch (id) {
 
6039
  default: break;
 
6040
  case Intrinsic::alpha_umulh:
 
6041
  case Intrinsic::arm_neon_vabals:
 
6042
  case Intrinsic::arm_neon_vabalu:
 
6043
  case Intrinsic::arm_neon_vabas:
 
6044
  case Intrinsic::arm_neon_vabau:
 
6045
  case Intrinsic::arm_neon_vabdls:
 
6046
  case Intrinsic::arm_neon_vabdlu:
 
6047
  case Intrinsic::arm_neon_vabds:
 
6048
  case Intrinsic::arm_neon_vabdu:
 
6049
  case Intrinsic::arm_neon_vabs:
 
6050
  case Intrinsic::arm_neon_vacged:
 
6051
  case Intrinsic::arm_neon_vacgeq:
 
6052
  case Intrinsic::arm_neon_vacgtd:
 
6053
  case Intrinsic::arm_neon_vacgtq:
 
6054
  case Intrinsic::arm_neon_vaddhn:
 
6055
  case Intrinsic::arm_neon_vaddls:
 
6056
  case Intrinsic::arm_neon_vaddlu:
 
6057
  case Intrinsic::arm_neon_vaddws:
 
6058
  case Intrinsic::arm_neon_vaddwu:
 
6059
  case Intrinsic::arm_neon_vcls:
 
6060
  case Intrinsic::arm_neon_vclz:
 
6061
  case Intrinsic::arm_neon_vcnt:
 
6062
  case Intrinsic::arm_neon_vcvtfp2fxs:
 
6063
  case Intrinsic::arm_neon_vcvtfp2fxu:
 
6064
  case Intrinsic::arm_neon_vcvtfxs2fp:
 
6065
  case Intrinsic::arm_neon_vcvtfxu2fp:
 
6066
  case Intrinsic::arm_neon_vhadds:
 
6067
  case Intrinsic::arm_neon_vhaddu:
 
6068
  case Intrinsic::arm_neon_vhsubs:
 
6069
  case Intrinsic::arm_neon_vhsubu:
 
6070
  case Intrinsic::arm_neon_vmaxs:
 
6071
  case Intrinsic::arm_neon_vmaxu:
 
6072
  case Intrinsic::arm_neon_vmins:
 
6073
  case Intrinsic::arm_neon_vminu:
 
6074
  case Intrinsic::arm_neon_vmlals:
 
6075
  case Intrinsic::arm_neon_vmlalu:
 
6076
  case Intrinsic::arm_neon_vmlsls:
 
6077
  case Intrinsic::arm_neon_vmlslu:
 
6078
  case Intrinsic::arm_neon_vmovls:
 
6079
  case Intrinsic::arm_neon_vmovlu:
 
6080
  case Intrinsic::arm_neon_vmovn:
 
6081
  case Intrinsic::arm_neon_vmullp:
 
6082
  case Intrinsic::arm_neon_vmulls:
 
6083
  case Intrinsic::arm_neon_vmullu:
 
6084
  case Intrinsic::arm_neon_vmulp:
 
6085
  case Intrinsic::arm_neon_vpadals:
 
6086
  case Intrinsic::arm_neon_vpadalu:
 
6087
  case Intrinsic::arm_neon_vpadd:
 
6088
  case Intrinsic::arm_neon_vpaddls:
 
6089
  case Intrinsic::arm_neon_vpaddlu:
 
6090
  case Intrinsic::arm_neon_vpmaxs:
 
6091
  case Intrinsic::arm_neon_vpmaxu:
 
6092
  case Intrinsic::arm_neon_vpmins:
 
6093
  case Intrinsic::arm_neon_vpminu:
 
6094
  case Intrinsic::arm_neon_vqabs:
 
6095
  case Intrinsic::arm_neon_vqadds:
 
6096
  case Intrinsic::arm_neon_vqaddu:
 
6097
  case Intrinsic::arm_neon_vqdmlal:
 
6098
  case Intrinsic::arm_neon_vqdmlsl:
 
6099
  case Intrinsic::arm_neon_vqdmulh:
 
6100
  case Intrinsic::arm_neon_vqdmull:
 
6101
  case Intrinsic::arm_neon_vqmovns:
 
6102
  case Intrinsic::arm_neon_vqmovnsu:
 
6103
  case Intrinsic::arm_neon_vqmovnu:
 
6104
  case Intrinsic::arm_neon_vqneg:
 
6105
  case Intrinsic::arm_neon_vqrdmulh:
 
6106
  case Intrinsic::arm_neon_vqrshiftns:
 
6107
  case Intrinsic::arm_neon_vqrshiftnsu:
 
6108
  case Intrinsic::arm_neon_vqrshiftnu:
 
6109
  case Intrinsic::arm_neon_vqrshifts:
 
6110
  case Intrinsic::arm_neon_vqrshiftu:
 
6111
  case Intrinsic::arm_neon_vqshiftns:
 
6112
  case Intrinsic::arm_neon_vqshiftnsu:
 
6113
  case Intrinsic::arm_neon_vqshiftnu:
 
6114
  case Intrinsic::arm_neon_vqshifts:
 
6115
  case Intrinsic::arm_neon_vqshiftsu:
 
6116
  case Intrinsic::arm_neon_vqshiftu:
 
6117
  case Intrinsic::arm_neon_vqsubs:
 
6118
  case Intrinsic::arm_neon_vqsubu:
 
6119
  case Intrinsic::arm_neon_vraddhn:
 
6120
  case Intrinsic::arm_neon_vrecpe:
 
6121
  case Intrinsic::arm_neon_vrecps:
 
6122
  case Intrinsic::arm_neon_vrhadds:
 
6123
  case Intrinsic::arm_neon_vrhaddu:
 
6124
  case Intrinsic::arm_neon_vrshiftn:
 
6125
  case Intrinsic::arm_neon_vrshifts:
 
6126
  case Intrinsic::arm_neon_vrshiftu:
 
6127
  case Intrinsic::arm_neon_vrsqrte:
 
6128
  case Intrinsic::arm_neon_vrsqrts:
 
6129
  case Intrinsic::arm_neon_vrsubhn:
 
6130
  case Intrinsic::arm_neon_vshiftins:
 
6131
  case Intrinsic::arm_neon_vshiftls:
 
6132
  case Intrinsic::arm_neon_vshiftlu:
 
6133
  case Intrinsic::arm_neon_vshiftn:
 
6134
  case Intrinsic::arm_neon_vshifts:
 
6135
  case Intrinsic::arm_neon_vshiftu:
 
6136
  case Intrinsic::arm_neon_vsubhn:
 
6137
  case Intrinsic::arm_neon_vsubls:
 
6138
  case Intrinsic::arm_neon_vsublu:
 
6139
  case Intrinsic::arm_neon_vsubws:
 
6140
  case Intrinsic::arm_neon_vsubwu:
 
6141
  case Intrinsic::arm_neon_vtbl1:
 
6142
  case Intrinsic::arm_neon_vtbl2:
 
6143
  case Intrinsic::arm_neon_vtbl3:
 
6144
  case Intrinsic::arm_neon_vtbl4:
 
6145
  case Intrinsic::arm_neon_vtbx1:
 
6146
  case Intrinsic::arm_neon_vtbx2:
 
6147
  case Intrinsic::arm_neon_vtbx3:
 
6148
  case Intrinsic::arm_neon_vtbx4:
 
6149
  case Intrinsic::arm_thread_pointer:
 
6150
  case Intrinsic::bswap:
 
6151
  case Intrinsic::ctlz:
 
6152
  case Intrinsic::ctpop:
 
6153
  case Intrinsic::cttz:
 
6154
  case Intrinsic::dbg_declare:
 
6155
  case Intrinsic::dbg_value:
 
6156
  case Intrinsic::eh_sjlj_callsite:
 
6157
  case Intrinsic::eh_sjlj_longjmp:
 
6158
  case Intrinsic::eh_sjlj_lsda:
 
6159
  case Intrinsic::eh_sjlj_setjmp:
 
6160
  case Intrinsic::frameaddress:
 
6161
  case Intrinsic::ppc_altivec_lvsl:
 
6162
  case Intrinsic::ppc_altivec_lvsr:
 
6163
  case Intrinsic::ppc_altivec_vaddcuw:
 
6164
  case Intrinsic::ppc_altivec_vaddsbs:
 
6165
  case Intrinsic::ppc_altivec_vaddshs:
 
6166
  case Intrinsic::ppc_altivec_vaddsws:
 
6167
  case Intrinsic::ppc_altivec_vaddubs:
 
6168
  case Intrinsic::ppc_altivec_vadduhs:
 
6169
  case Intrinsic::ppc_altivec_vadduws:
 
6170
  case Intrinsic::ppc_altivec_vavgsb:
 
6171
  case Intrinsic::ppc_altivec_vavgsh:
 
6172
  case Intrinsic::ppc_altivec_vavgsw:
 
6173
  case Intrinsic::ppc_altivec_vavgub:
 
6174
  case Intrinsic::ppc_altivec_vavguh:
 
6175
  case Intrinsic::ppc_altivec_vavguw:
 
6176
  case Intrinsic::ppc_altivec_vcfsx:
 
6177
  case Intrinsic::ppc_altivec_vcfux:
 
6178
  case Intrinsic::ppc_altivec_vcmpbfp:
 
6179
  case Intrinsic::ppc_altivec_vcmpbfp_p:
 
6180
  case Intrinsic::ppc_altivec_vcmpeqfp:
 
6181
  case Intrinsic::ppc_altivec_vcmpeqfp_p:
 
6182
  case Intrinsic::ppc_altivec_vcmpequb:
 
6183
  case Intrinsic::ppc_altivec_vcmpequb_p:
 
6184
  case Intrinsic::ppc_altivec_vcmpequh:
 
6185
  case Intrinsic::ppc_altivec_vcmpequh_p:
 
6186
  case Intrinsic::ppc_altivec_vcmpequw:
 
6187
  case Intrinsic::ppc_altivec_vcmpequw_p:
 
6188
  case Intrinsic::ppc_altivec_vcmpgefp:
 
6189
  case Intrinsic::ppc_altivec_vcmpgefp_p:
 
6190
  case Intrinsic::ppc_altivec_vcmpgtfp:
 
6191
  case Intrinsic::ppc_altivec_vcmpgtfp_p:
 
6192
  case Intrinsic::ppc_altivec_vcmpgtsb:
 
6193
  case Intrinsic::ppc_altivec_vcmpgtsb_p:
 
6194
  case Intrinsic::ppc_altivec_vcmpgtsh:
 
6195
  case Intrinsic::ppc_altivec_vcmpgtsh_p:
 
6196
  case Intrinsic::ppc_altivec_vcmpgtsw:
 
6197
  case Intrinsic::ppc_altivec_vcmpgtsw_p:
 
6198
  case Intrinsic::ppc_altivec_vcmpgtub:
 
6199
  case Intrinsic::ppc_altivec_vcmpgtub_p:
 
6200
  case Intrinsic::ppc_altivec_vcmpgtuh:
 
6201
  case Intrinsic::ppc_altivec_vcmpgtuh_p:
 
6202
  case Intrinsic::ppc_altivec_vcmpgtuw:
 
6203
  case Intrinsic::ppc_altivec_vcmpgtuw_p:
 
6204
  case Intrinsic::ppc_altivec_vctsxs:
 
6205
  case Intrinsic::ppc_altivec_vctuxs:
 
6206
  case Intrinsic::ppc_altivec_vexptefp:
 
6207
  case Intrinsic::ppc_altivec_vlogefp:
 
6208
  case Intrinsic::ppc_altivec_vmaddfp:
 
6209
  case Intrinsic::ppc_altivec_vmaxfp:
 
6210
  case Intrinsic::ppc_altivec_vmaxsb:
 
6211
  case Intrinsic::ppc_altivec_vmaxsh:
 
6212
  case Intrinsic::ppc_altivec_vmaxsw:
 
6213
  case Intrinsic::ppc_altivec_vmaxub:
 
6214
  case Intrinsic::ppc_altivec_vmaxuh:
 
6215
  case Intrinsic::ppc_altivec_vmaxuw:
 
6216
  case Intrinsic::ppc_altivec_vmhaddshs:
 
6217
  case Intrinsic::ppc_altivec_vmhraddshs:
 
6218
  case Intrinsic::ppc_altivec_vminfp:
 
6219
  case Intrinsic::ppc_altivec_vminsb:
 
6220
  case Intrinsic::ppc_altivec_vminsh:
 
6221
  case Intrinsic::ppc_altivec_vminsw:
 
6222
  case Intrinsic::ppc_altivec_vminub:
 
6223
  case Intrinsic::ppc_altivec_vminuh:
 
6224
  case Intrinsic::ppc_altivec_vminuw:
 
6225
  case Intrinsic::ppc_altivec_vmladduhm:
 
6226
  case Intrinsic::ppc_altivec_vmsummbm:
 
6227
  case Intrinsic::ppc_altivec_vmsumshm:
 
6228
  case Intrinsic::ppc_altivec_vmsumshs:
 
6229
  case Intrinsic::ppc_altivec_vmsumubm:
 
6230
  case Intrinsic::ppc_altivec_vmsumuhm:
 
6231
  case Intrinsic::ppc_altivec_vmsumuhs:
 
6232
  case Intrinsic::ppc_altivec_vmulesb:
 
6233
  case Intrinsic::ppc_altivec_vmulesh:
 
6234
  case Intrinsic::ppc_altivec_vmuleub:
 
6235
  case Intrinsic::ppc_altivec_vmuleuh:
 
6236
  case Intrinsic::ppc_altivec_vmulosb:
 
6237
  case Intrinsic::ppc_altivec_vmulosh:
 
6238
  case Intrinsic::ppc_altivec_vmuloub:
 
6239
  case Intrinsic::ppc_altivec_vmulouh:
 
6240
  case Intrinsic::ppc_altivec_vnmsubfp:
 
6241
  case Intrinsic::ppc_altivec_vperm:
 
6242
  case Intrinsic::ppc_altivec_vpkpx:
 
6243
  case Intrinsic::ppc_altivec_vpkshss:
 
6244
  case Intrinsic::ppc_altivec_vpkshus:
 
6245
  case Intrinsic::ppc_altivec_vpkswss:
 
6246
  case Intrinsic::ppc_altivec_vpkswus:
 
6247
  case Intrinsic::ppc_altivec_vpkuhus:
 
6248
  case Intrinsic::ppc_altivec_vpkuwus:
 
6249
  case Intrinsic::ppc_altivec_vrefp:
 
6250
  case Intrinsic::ppc_altivec_vrfim:
 
6251
  case Intrinsic::ppc_altivec_vrfin:
 
6252
  case Intrinsic::ppc_altivec_vrfip:
 
6253
  case Intrinsic::ppc_altivec_vrfiz:
 
6254
  case Intrinsic::ppc_altivec_vrlb:
 
6255
  case Intrinsic::ppc_altivec_vrlh:
 
6256
  case Intrinsic::ppc_altivec_vrlw:
 
6257
  case Intrinsic::ppc_altivec_vrsqrtefp:
 
6258
  case Intrinsic::ppc_altivec_vsel:
 
6259
  case Intrinsic::ppc_altivec_vsl:
 
6260
  case Intrinsic::ppc_altivec_vslb:
 
6261
  case Intrinsic::ppc_altivec_vslh:
 
6262
  case Intrinsic::ppc_altivec_vslo:
 
6263
  case Intrinsic::ppc_altivec_vslw:
 
6264
  case Intrinsic::ppc_altivec_vsr:
 
6265
  case Intrinsic::ppc_altivec_vsrab:
 
6266
  case Intrinsic::ppc_altivec_vsrah:
 
6267
  case Intrinsic::ppc_altivec_vsraw:
 
6268
  case Intrinsic::ppc_altivec_vsrb:
 
6269
  case Intrinsic::ppc_altivec_vsrh:
 
6270
  case Intrinsic::ppc_altivec_vsro:
 
6271
  case Intrinsic::ppc_altivec_vsrw:
 
6272
  case Intrinsic::ppc_altivec_vsubcuw:
 
6273
  case Intrinsic::ppc_altivec_vsubsbs:
 
6274
  case Intrinsic::ppc_altivec_vsubshs:
 
6275
  case Intrinsic::ppc_altivec_vsubsws:
 
6276
  case Intrinsic::ppc_altivec_vsububs:
 
6277
  case Intrinsic::ppc_altivec_vsubuhs:
 
6278
  case Intrinsic::ppc_altivec_vsubuws:
 
6279
  case Intrinsic::ppc_altivec_vsum2sws:
 
6280
  case Intrinsic::ppc_altivec_vsum4sbs:
 
6281
  case Intrinsic::ppc_altivec_vsum4shs:
 
6282
  case Intrinsic::ppc_altivec_vsum4ubs:
 
6283
  case Intrinsic::ppc_altivec_vsumsws:
 
6284
  case Intrinsic::ppc_altivec_vupkhpx:
 
6285
  case Intrinsic::ppc_altivec_vupkhsb:
 
6286
  case Intrinsic::ppc_altivec_vupkhsh:
 
6287
  case Intrinsic::ppc_altivec_vupklpx:
 
6288
  case Intrinsic::ppc_altivec_vupklsb:
 
6289
  case Intrinsic::ppc_altivec_vupklsh:
 
6290
  case Intrinsic::returnaddress:
 
6291
  case Intrinsic::sadd_with_overflow:
 
6292
  case Intrinsic::smul_with_overflow:
 
6293
  case Intrinsic::spu_si_a:
 
6294
  case Intrinsic::spu_si_addx:
 
6295
  case Intrinsic::spu_si_ah:
 
6296
  case Intrinsic::spu_si_ahi:
 
6297
  case Intrinsic::spu_si_ai:
 
6298
  case Intrinsic::spu_si_and:
 
6299
  case Intrinsic::spu_si_andbi:
 
6300
  case Intrinsic::spu_si_andc:
 
6301
  case Intrinsic::spu_si_andhi:
 
6302
  case Intrinsic::spu_si_andi:
 
6303
  case Intrinsic::spu_si_bg:
 
6304
  case Intrinsic::spu_si_bgx:
 
6305
  case Intrinsic::spu_si_ceq:
 
6306
  case Intrinsic::spu_si_ceqb:
 
6307
  case Intrinsic::spu_si_ceqbi:
 
6308
  case Intrinsic::spu_si_ceqh:
 
6309
  case Intrinsic::spu_si_ceqhi:
 
6310
  case Intrinsic::spu_si_ceqi:
 
6311
  case Intrinsic::spu_si_cg:
 
6312
  case Intrinsic::spu_si_cgt:
 
6313
  case Intrinsic::spu_si_cgtb:
 
6314
  case Intrinsic::spu_si_cgtbi:
 
6315
  case Intrinsic::spu_si_cgth:
 
6316
  case Intrinsic::spu_si_cgthi:
 
6317
  case Intrinsic::spu_si_cgti:
 
6318
  case Intrinsic::spu_si_cgx:
 
6319
  case Intrinsic::spu_si_clgt:
 
6320
  case Intrinsic::spu_si_clgtb:
 
6321
  case Intrinsic::spu_si_clgtbi:
 
6322
  case Intrinsic::spu_si_clgth:
 
6323
  case Intrinsic::spu_si_clgthi:
 
6324
  case Intrinsic::spu_si_clgti:
 
6325
  case Intrinsic::spu_si_dfa:
 
6326
  case Intrinsic::spu_si_dfm:
 
6327
  case Intrinsic::spu_si_dfma:
 
6328
  case Intrinsic::spu_si_dfms:
 
6329
  case Intrinsic::spu_si_dfnma:
 
6330
  case Intrinsic::spu_si_dfnms:
 
6331
  case Intrinsic::spu_si_dfs:
 
6332
  case Intrinsic::spu_si_fa:
 
6333
  case Intrinsic::spu_si_fceq:
 
6334
  case Intrinsic::spu_si_fcgt:
 
6335
  case Intrinsic::spu_si_fcmeq:
 
6336
  case Intrinsic::spu_si_fcmgt:
 
6337
  case Intrinsic::spu_si_fm:
 
6338
  case Intrinsic::spu_si_fma:
 
6339
  case Intrinsic::spu_si_fms:
 
6340
  case Intrinsic::spu_si_fnms:
 
6341
  case Intrinsic::spu_si_fs:
 
6342
  case Intrinsic::spu_si_fsmbi:
 
6343
  case Intrinsic::spu_si_mpy:
 
6344
  case Intrinsic::spu_si_mpya:
 
6345
  case Intrinsic::spu_si_mpyh:
 
6346
  case Intrinsic::spu_si_mpyhh:
 
6347
  case Intrinsic::spu_si_mpyhha:
 
6348
  case Intrinsic::spu_si_mpyhhau:
 
6349
  case Intrinsic::spu_si_mpyhhu:
 
6350
  case Intrinsic::spu_si_mpyi:
 
6351
  case Intrinsic::spu_si_mpys:
 
6352
  case Intrinsic::spu_si_mpyu:
 
6353
  case Intrinsic::spu_si_mpyui:
 
6354
  case Intrinsic::spu_si_nand:
 
6355
  case Intrinsic::spu_si_nor:
 
6356
  case Intrinsic::spu_si_or:
 
6357
  case Intrinsic::spu_si_orbi:
 
6358
  case Intrinsic::spu_si_orc:
 
6359
  case Intrinsic::spu_si_orhi:
 
6360
  case Intrinsic::spu_si_ori:
 
6361
  case Intrinsic::spu_si_sf:
 
6362
  case Intrinsic::spu_si_sfh:
 
6363
  case Intrinsic::spu_si_sfhi:
 
6364
  case Intrinsic::spu_si_sfi:
 
6365
  case Intrinsic::spu_si_sfx:
 
6366
  case Intrinsic::spu_si_shli:
 
6367
  case Intrinsic::spu_si_shlqbi:
 
6368
  case Intrinsic::spu_si_shlqbii:
 
6369
  case Intrinsic::spu_si_shlqby:
 
6370
  case Intrinsic::spu_si_shlqbyi:
 
6371
  case Intrinsic::spu_si_xor:
 
6372
  case Intrinsic::spu_si_xorbi:
 
6373
  case Intrinsic::spu_si_xorhi:
 
6374
  case Intrinsic::spu_si_xori:
 
6375
  case Intrinsic::ssub_with_overflow:
 
6376
  case Intrinsic::uadd_with_overflow:
 
6377
  case Intrinsic::umul_with_overflow:
 
6378
  case Intrinsic::usub_with_overflow:
 
6379
  case Intrinsic::x86_mmx_packssdw:
 
6380
  case Intrinsic::x86_mmx_packsswb:
 
6381
  case Intrinsic::x86_mmx_packuswb:
 
6382
  case Intrinsic::x86_mmx_padds_b:
 
6383
  case Intrinsic::x86_mmx_padds_w:
 
6384
  case Intrinsic::x86_mmx_paddus_b:
 
6385
  case Intrinsic::x86_mmx_paddus_w:
 
6386
  case Intrinsic::x86_mmx_pavg_b:
 
6387
  case Intrinsic::x86_mmx_pavg_w:
 
6388
  case Intrinsic::x86_mmx_pcmpeq_b:
 
6389
  case Intrinsic::x86_mmx_pcmpeq_d:
 
6390
  case Intrinsic::x86_mmx_pcmpeq_w:
 
6391
  case Intrinsic::x86_mmx_pcmpgt_b:
 
6392
  case Intrinsic::x86_mmx_pcmpgt_d:
 
6393
  case Intrinsic::x86_mmx_pcmpgt_w:
 
6394
  case Intrinsic::x86_mmx_pmadd_wd:
 
6395
  case Intrinsic::x86_mmx_pmaxs_w:
 
6396
  case Intrinsic::x86_mmx_pmaxu_b:
 
6397
  case Intrinsic::x86_mmx_pmins_w:
 
6398
  case Intrinsic::x86_mmx_pminu_b:
 
6399
  case Intrinsic::x86_mmx_pmovmskb:
 
6400
  case Intrinsic::x86_mmx_pmulh_w:
 
6401
  case Intrinsic::x86_mmx_pmulhu_w:
 
6402
  case Intrinsic::x86_mmx_pmulu_dq:
 
6403
  case Intrinsic::x86_mmx_psad_bw:
 
6404
  case Intrinsic::x86_mmx_psll_d:
 
6405
  case Intrinsic::x86_mmx_psll_q:
 
6406
  case Intrinsic::x86_mmx_psll_w:
 
6407
  case Intrinsic::x86_mmx_pslli_d:
 
6408
  case Intrinsic::x86_mmx_pslli_q:
 
6409
  case Intrinsic::x86_mmx_pslli_w:
 
6410
  case Intrinsic::x86_mmx_psra_d:
 
6411
  case Intrinsic::x86_mmx_psra_w:
 
6412
  case Intrinsic::x86_mmx_psrai_d:
 
6413
  case Intrinsic::x86_mmx_psrai_w:
 
6414
  case Intrinsic::x86_mmx_psrl_d:
 
6415
  case Intrinsic::x86_mmx_psrl_q:
 
6416
  case Intrinsic::x86_mmx_psrl_w:
 
6417
  case Intrinsic::x86_mmx_psrli_d:
 
6418
  case Intrinsic::x86_mmx_psrli_q:
 
6419
  case Intrinsic::x86_mmx_psrli_w:
 
6420
  case Intrinsic::x86_mmx_psubs_b:
 
6421
  case Intrinsic::x86_mmx_psubs_w:
 
6422
  case Intrinsic::x86_mmx_psubus_b:
 
6423
  case Intrinsic::x86_mmx_psubus_w:
 
6424
  case Intrinsic::x86_sse2_add_sd:
 
6425
  case Intrinsic::x86_sse2_cmp_pd:
 
6426
  case Intrinsic::x86_sse2_cmp_sd:
 
6427
  case Intrinsic::x86_sse2_comieq_sd:
 
6428
  case Intrinsic::x86_sse2_comige_sd:
 
6429
  case Intrinsic::x86_sse2_comigt_sd:
 
6430
  case Intrinsic::x86_sse2_comile_sd:
 
6431
  case Intrinsic::x86_sse2_comilt_sd:
 
6432
  case Intrinsic::x86_sse2_comineq_sd:
 
6433
  case Intrinsic::x86_sse2_cvtdq2pd:
 
6434
  case Intrinsic::x86_sse2_cvtdq2ps:
 
6435
  case Intrinsic::x86_sse2_cvtpd2dq:
 
6436
  case Intrinsic::x86_sse2_cvtpd2ps:
 
6437
  case Intrinsic::x86_sse2_cvtps2dq:
 
6438
  case Intrinsic::x86_sse2_cvtps2pd:
 
6439
  case Intrinsic::x86_sse2_cvtsd2si:
 
6440
  case Intrinsic::x86_sse2_cvtsd2si64:
 
6441
  case Intrinsic::x86_sse2_cvtsd2ss:
 
6442
  case Intrinsic::x86_sse2_cvtsi2sd:
 
6443
  case Intrinsic::x86_sse2_cvtsi642sd:
 
6444
  case Intrinsic::x86_sse2_cvtss2sd:
 
6445
  case Intrinsic::x86_sse2_cvttpd2dq:
 
6446
  case Intrinsic::x86_sse2_cvttps2dq:
 
6447
  case Intrinsic::x86_sse2_cvttsd2si:
 
6448
  case Intrinsic::x86_sse2_cvttsd2si64:
 
6449
  case Intrinsic::x86_sse2_div_sd:
 
6450
  case Intrinsic::x86_sse2_max_pd:
 
6451
  case Intrinsic::x86_sse2_max_sd:
 
6452
  case Intrinsic::x86_sse2_min_pd:
 
6453
  case Intrinsic::x86_sse2_min_sd:
 
6454
  case Intrinsic::x86_sse2_movmsk_pd:
 
6455
  case Intrinsic::x86_sse2_mul_sd:
 
6456
  case Intrinsic::x86_sse2_packssdw_128:
 
6457
  case Intrinsic::x86_sse2_packsswb_128:
 
6458
  case Intrinsic::x86_sse2_packuswb_128:
 
6459
  case Intrinsic::x86_sse2_padds_b:
 
6460
  case Intrinsic::x86_sse2_padds_w:
 
6461
  case Intrinsic::x86_sse2_paddus_b:
 
6462
  case Intrinsic::x86_sse2_paddus_w:
 
6463
  case Intrinsic::x86_sse2_pavg_b:
 
6464
  case Intrinsic::x86_sse2_pavg_w:
 
6465
  case Intrinsic::x86_sse2_pcmpeq_b:
 
6466
  case Intrinsic::x86_sse2_pcmpeq_d:
 
6467
  case Intrinsic::x86_sse2_pcmpeq_w:
 
6468
  case Intrinsic::x86_sse2_pcmpgt_b:
 
6469
  case Intrinsic::x86_sse2_pcmpgt_d:
 
6470
  case Intrinsic::x86_sse2_pcmpgt_w:
 
6471
  case Intrinsic::x86_sse2_pmadd_wd:
 
6472
  case Intrinsic::x86_sse2_pmaxs_w:
 
6473
  case Intrinsic::x86_sse2_pmaxu_b:
 
6474
  case Intrinsic::x86_sse2_pmins_w:
 
6475
  case Intrinsic::x86_sse2_pminu_b:
 
6476
  case Intrinsic::x86_sse2_pmovmskb_128:
 
6477
  case Intrinsic::x86_sse2_pmulh_w:
 
6478
  case Intrinsic::x86_sse2_pmulhu_w:
 
6479
  case Intrinsic::x86_sse2_pmulu_dq:
 
6480
  case Intrinsic::x86_sse2_psad_bw:
 
6481
  case Intrinsic::x86_sse2_psll_d:
 
6482
  case Intrinsic::x86_sse2_psll_dq:
 
6483
  case Intrinsic::x86_sse2_psll_dq_bs:
 
6484
  case Intrinsic::x86_sse2_psll_q:
 
6485
  case Intrinsic::x86_sse2_psll_w:
 
6486
  case Intrinsic::x86_sse2_pslli_d:
 
6487
  case Intrinsic::x86_sse2_pslli_q:
 
6488
  case Intrinsic::x86_sse2_pslli_w:
 
6489
  case Intrinsic::x86_sse2_psra_d:
 
6490
  case Intrinsic::x86_sse2_psra_w:
 
6491
  case Intrinsic::x86_sse2_psrai_d:
 
6492
  case Intrinsic::x86_sse2_psrai_w:
 
6493
  case Intrinsic::x86_sse2_psrl_d:
 
6494
  case Intrinsic::x86_sse2_psrl_dq:
 
6495
  case Intrinsic::x86_sse2_psrl_dq_bs:
 
6496
  case Intrinsic::x86_sse2_psrl_q:
 
6497
  case Intrinsic::x86_sse2_psrl_w:
 
6498
  case Intrinsic::x86_sse2_psrli_d:
 
6499
  case Intrinsic::x86_sse2_psrli_q:
 
6500
  case Intrinsic::x86_sse2_psrli_w:
 
6501
  case Intrinsic::x86_sse2_psubs_b:
 
6502
  case Intrinsic::x86_sse2_psubs_w:
 
6503
  case Intrinsic::x86_sse2_psubus_b:
 
6504
  case Intrinsic::x86_sse2_psubus_w:
 
6505
  case Intrinsic::x86_sse2_sqrt_pd:
 
6506
  case Intrinsic::x86_sse2_sqrt_sd:
 
6507
  case Intrinsic::x86_sse2_sub_sd:
 
6508
  case Intrinsic::x86_sse2_ucomieq_sd:
 
6509
  case Intrinsic::x86_sse2_ucomige_sd:
 
6510
  case Intrinsic::x86_sse2_ucomigt_sd:
 
6511
  case Intrinsic::x86_sse2_ucomile_sd:
 
6512
  case Intrinsic::x86_sse2_ucomilt_sd:
 
6513
  case Intrinsic::x86_sse2_ucomineq_sd:
 
6514
  case Intrinsic::x86_sse3_addsub_pd:
 
6515
  case Intrinsic::x86_sse3_addsub_ps:
 
6516
  case Intrinsic::x86_sse3_hadd_pd:
 
6517
  case Intrinsic::x86_sse3_hadd_ps:
 
6518
  case Intrinsic::x86_sse3_hsub_pd:
 
6519
  case Intrinsic::x86_sse3_hsub_ps:
 
6520
  case Intrinsic::x86_sse41_blendpd:
 
6521
  case Intrinsic::x86_sse41_blendps:
 
6522
  case Intrinsic::x86_sse41_blendvpd:
 
6523
  case Intrinsic::x86_sse41_blendvps:
 
6524
  case Intrinsic::x86_sse41_dppd:
 
6525
  case Intrinsic::x86_sse41_dpps:
 
6526
  case Intrinsic::x86_sse41_extractps:
 
6527
  case Intrinsic::x86_sse41_insertps:
 
6528
  case Intrinsic::x86_sse41_mpsadbw:
 
6529
  case Intrinsic::x86_sse41_packusdw:
 
6530
  case Intrinsic::x86_sse41_pblendvb:
 
6531
  case Intrinsic::x86_sse41_pblendw:
 
6532
  case Intrinsic::x86_sse41_pcmpeqq:
 
6533
  case Intrinsic::x86_sse41_pextrb:
 
6534
  case Intrinsic::x86_sse41_pextrd:
 
6535
  case Intrinsic::x86_sse41_pextrq:
 
6536
  case Intrinsic::x86_sse41_phminposuw:
 
6537
  case Intrinsic::x86_sse41_pmaxsb:
 
6538
  case Intrinsic::x86_sse41_pmaxsd:
 
6539
  case Intrinsic::x86_sse41_pmaxud:
 
6540
  case Intrinsic::x86_sse41_pmaxuw:
 
6541
  case Intrinsic::x86_sse41_pminsb:
 
6542
  case Intrinsic::x86_sse41_pminsd:
 
6543
  case Intrinsic::x86_sse41_pminud:
 
6544
  case Intrinsic::x86_sse41_pminuw:
 
6545
  case Intrinsic::x86_sse41_pmovsxbd:
 
6546
  case Intrinsic::x86_sse41_pmovsxbq:
 
6547
  case Intrinsic::x86_sse41_pmovsxbw:
 
6548
  case Intrinsic::x86_sse41_pmovsxdq:
 
6549
  case Intrinsic::x86_sse41_pmovsxwd:
 
6550
  case Intrinsic::x86_sse41_pmovsxwq:
 
6551
  case Intrinsic::x86_sse41_pmovzxbd:
 
6552
  case Intrinsic::x86_sse41_pmovzxbq:
 
6553
  case Intrinsic::x86_sse41_pmovzxbw:
 
6554
  case Intrinsic::x86_sse41_pmovzxdq:
 
6555
  case Intrinsic::x86_sse41_pmovzxwd:
 
6556
  case Intrinsic::x86_sse41_pmovzxwq:
 
6557
  case Intrinsic::x86_sse41_pmuldq:
 
6558
  case Intrinsic::x86_sse41_pmulld:
 
6559
  case Intrinsic::x86_sse41_ptestc:
 
6560
  case Intrinsic::x86_sse41_ptestnzc:
 
6561
  case Intrinsic::x86_sse41_ptestz:
 
6562
  case Intrinsic::x86_sse41_round_pd:
 
6563
  case Intrinsic::x86_sse41_round_ps:
 
6564
  case Intrinsic::x86_sse41_round_sd:
 
6565
  case Intrinsic::x86_sse41_round_ss:
 
6566
  case Intrinsic::x86_sse42_crc32_16:
 
6567
  case Intrinsic::x86_sse42_crc32_32:
 
6568
  case Intrinsic::x86_sse42_crc32_64:
 
6569
  case Intrinsic::x86_sse42_crc32_8:
 
6570
  case Intrinsic::x86_sse42_pcmpestri128:
 
6571
  case Intrinsic::x86_sse42_pcmpestria128:
 
6572
  case Intrinsic::x86_sse42_pcmpestric128:
 
6573
  case Intrinsic::x86_sse42_pcmpestrio128:
 
6574
  case Intrinsic::x86_sse42_pcmpestris128:
 
6575
  case Intrinsic::x86_sse42_pcmpestriz128:
 
6576
  case Intrinsic::x86_sse42_pcmpestrm128:
 
6577
  case Intrinsic::x86_sse42_pcmpgtq:
 
6578
  case Intrinsic::x86_sse42_pcmpistri128:
 
6579
  case Intrinsic::x86_sse42_pcmpistria128:
 
6580
  case Intrinsic::x86_sse42_pcmpistric128:
 
6581
  case Intrinsic::x86_sse42_pcmpistrio128:
 
6582
  case Intrinsic::x86_sse42_pcmpistris128:
 
6583
  case Intrinsic::x86_sse42_pcmpistriz128:
 
6584
  case Intrinsic::x86_sse42_pcmpistrm128:
 
6585
  case Intrinsic::x86_sse_add_ss:
 
6586
  case Intrinsic::x86_sse_cmp_ps:
 
6587
  case Intrinsic::x86_sse_cmp_ss:
 
6588
  case Intrinsic::x86_sse_comieq_ss:
 
6589
  case Intrinsic::x86_sse_comige_ss:
 
6590
  case Intrinsic::x86_sse_comigt_ss:
 
6591
  case Intrinsic::x86_sse_comile_ss:
 
6592
  case Intrinsic::x86_sse_comilt_ss:
 
6593
  case Intrinsic::x86_sse_comineq_ss:
 
6594
  case Intrinsic::x86_sse_cvtpd2pi:
 
6595
  case Intrinsic::x86_sse_cvtpi2pd:
 
6596
  case Intrinsic::x86_sse_cvtpi2ps:
 
6597
  case Intrinsic::x86_sse_cvtps2pi:
 
6598
  case Intrinsic::x86_sse_cvtsi2ss:
 
6599
  case Intrinsic::x86_sse_cvtsi642ss:
 
6600
  case Intrinsic::x86_sse_cvtss2si:
 
6601
  case Intrinsic::x86_sse_cvtss2si64:
 
6602
  case Intrinsic::x86_sse_cvttpd2pi:
 
6603
  case Intrinsic::x86_sse_cvttps2pi:
 
6604
  case Intrinsic::x86_sse_cvttss2si:
 
6605
  case Intrinsic::x86_sse_cvttss2si64:
 
6606
  case Intrinsic::x86_sse_div_ss:
 
6607
  case Intrinsic::x86_sse_max_ps:
 
6608
  case Intrinsic::x86_sse_max_ss:
 
6609
  case Intrinsic::x86_sse_min_ps:
 
6610
  case Intrinsic::x86_sse_min_ss:
 
6611
  case Intrinsic::x86_sse_movmsk_ps:
 
6612
  case Intrinsic::x86_sse_mul_ss:
 
6613
  case Intrinsic::x86_sse_rcp_ps:
 
6614
  case Intrinsic::x86_sse_rcp_ss:
 
6615
  case Intrinsic::x86_sse_rsqrt_ps:
 
6616
  case Intrinsic::x86_sse_rsqrt_ss:
 
6617
  case Intrinsic::x86_sse_sqrt_ps:
 
6618
  case Intrinsic::x86_sse_sqrt_ss:
 
6619
  case Intrinsic::x86_sse_sub_ss:
 
6620
  case Intrinsic::x86_sse_ucomieq_ss:
 
6621
  case Intrinsic::x86_sse_ucomige_ss:
 
6622
  case Intrinsic::x86_sse_ucomigt_ss:
 
6623
  case Intrinsic::x86_sse_ucomile_ss:
 
6624
  case Intrinsic::x86_sse_ucomilt_ss:
 
6625
  case Intrinsic::x86_sse_ucomineq_ss:
 
6626
  case Intrinsic::x86_ssse3_pabs_b:
 
6627
  case Intrinsic::x86_ssse3_pabs_b_128:
 
6628
  case Intrinsic::x86_ssse3_pabs_d:
 
6629
  case Intrinsic::x86_ssse3_pabs_d_128:
 
6630
  case Intrinsic::x86_ssse3_pabs_w:
 
6631
  case Intrinsic::x86_ssse3_pabs_w_128:
 
6632
  case Intrinsic::x86_ssse3_palign_r:
 
6633
  case Intrinsic::x86_ssse3_palign_r_128:
 
6634
  case Intrinsic::x86_ssse3_phadd_d:
 
6635
  case Intrinsic::x86_ssse3_phadd_d_128:
 
6636
  case Intrinsic::x86_ssse3_phadd_sw:
 
6637
  case Intrinsic::x86_ssse3_phadd_sw_128:
 
6638
  case Intrinsic::x86_ssse3_phadd_w:
 
6639
  case Intrinsic::x86_ssse3_phadd_w_128:
 
6640
  case Intrinsic::x86_ssse3_phsub_d:
 
6641
  case Intrinsic::x86_ssse3_phsub_d_128:
 
6642
  case Intrinsic::x86_ssse3_phsub_sw:
 
6643
  case Intrinsic::x86_ssse3_phsub_sw_128:
 
6644
  case Intrinsic::x86_ssse3_phsub_w:
 
6645
  case Intrinsic::x86_ssse3_phsub_w_128:
 
6646
  case Intrinsic::x86_ssse3_pmadd_ub_sw:
 
6647
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128:
 
6648
  case Intrinsic::x86_ssse3_pmul_hr_sw:
 
6649
  case Intrinsic::x86_ssse3_pmul_hr_sw_128:
 
6650
  case Intrinsic::x86_ssse3_pshuf_b:
 
6651
  case Intrinsic::x86_ssse3_pshuf_b_128:
 
6652
  case Intrinsic::x86_ssse3_psign_b:
 
6653
  case Intrinsic::x86_ssse3_psign_b_128:
 
6654
  case Intrinsic::x86_ssse3_psign_d:
 
6655
  case Intrinsic::x86_ssse3_psign_d_128:
 
6656
  case Intrinsic::x86_ssse3_psign_w:
 
6657
  case Intrinsic::x86_ssse3_psign_w_128:
 
6658
  case Intrinsic::xcore_bitrev:
 
6659
  case Intrinsic::xcore_getid:
 
6660
    Attr |= Attribute::ReadNone; // These do not access memory.
 
6661
    break;
 
6662
  case Intrinsic::arm_neon_vld1:
 
6663
  case Intrinsic::arm_neon_vld2:
 
6664
  case Intrinsic::arm_neon_vld2lane:
 
6665
  case Intrinsic::arm_neon_vld3:
 
6666
  case Intrinsic::arm_neon_vld3lane:
 
6667
  case Intrinsic::arm_neon_vld4:
 
6668
  case Intrinsic::arm_neon_vld4lane:
 
6669
  case Intrinsic::cos:
 
6670
  case Intrinsic::eh_exception:
 
6671
  case Intrinsic::exp:
 
6672
  case Intrinsic::exp2:
 
6673
  case Intrinsic::gcread:
 
6674
  case Intrinsic::invariant_start:
 
6675
  case Intrinsic::log:
 
6676
  case Intrinsic::log10:
 
6677
  case Intrinsic::log2:
 
6678
  case Intrinsic::objectsize:
 
6679
  case Intrinsic::pow:
 
6680
  case Intrinsic::powi:
 
6681
  case Intrinsic::ppc_altivec_lvebx:
 
6682
  case Intrinsic::ppc_altivec_lvehx:
 
6683
  case Intrinsic::ppc_altivec_lvewx:
 
6684
  case Intrinsic::ppc_altivec_lvx:
 
6685
  case Intrinsic::ppc_altivec_lvxl:
 
6686
  case Intrinsic::ppc_altivec_mfvscr:
 
6687
  case Intrinsic::sin:
 
6688
  case Intrinsic::sqrt:
 
6689
  case Intrinsic::x86_sse2_loadu_dq:
 
6690
  case Intrinsic::x86_sse2_loadu_pd:
 
6691
  case Intrinsic::x86_sse3_ldu_dq:
 
6692
  case Intrinsic::x86_sse41_movntdqa:
 
6693
  case Intrinsic::x86_sse_loadu_ps:
 
6694
    Attr |= Attribute::ReadOnly; // These do not write memory.
 
6695
    break;
 
6696
  }
 
6697
  AttributeWithIndex AWI[3];
 
6698
  unsigned NumAttrs = 0;
 
6699
  switch (id) {
 
6700
  default: break;
 
6701
  case Intrinsic::atomic_cmp_swap:
 
6702
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6703
    NumAttrs = 1;
 
6704
    break;
 
6705
  case Intrinsic::atomic_load_add:
 
6706
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6707
    NumAttrs = 1;
 
6708
    break;
 
6709
  case Intrinsic::atomic_load_and:
 
6710
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6711
    NumAttrs = 1;
 
6712
    break;
 
6713
  case Intrinsic::atomic_load_max:
 
6714
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6715
    NumAttrs = 1;
 
6716
    break;
 
6717
  case Intrinsic::atomic_load_min:
 
6718
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6719
    NumAttrs = 1;
 
6720
    break;
 
6721
  case Intrinsic::atomic_load_nand:
 
6722
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6723
    NumAttrs = 1;
 
6724
    break;
 
6725
  case Intrinsic::atomic_load_or:
 
6726
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6727
    NumAttrs = 1;
 
6728
    break;
 
6729
  case Intrinsic::atomic_load_sub:
 
6730
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6731
    NumAttrs = 1;
 
6732
    break;
 
6733
  case Intrinsic::atomic_load_umax:
 
6734
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6735
    NumAttrs = 1;
 
6736
    break;
 
6737
  case Intrinsic::atomic_load_umin:
 
6738
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6739
    NumAttrs = 1;
 
6740
    break;
 
6741
  case Intrinsic::atomic_load_xor:
 
6742
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6743
    NumAttrs = 1;
 
6744
    break;
 
6745
  case Intrinsic::atomic_swap:
 
6746
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6747
    NumAttrs = 1;
 
6748
    break;
 
6749
  case Intrinsic::gcwrite:
 
6750
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6751
    AWI[1] = AttributeWithIndex::get(3, 0|Attribute::NoCapture);
 
6752
    NumAttrs = 2;
 
6753
    break;
 
6754
  case Intrinsic::invariant_end:
 
6755
    AWI[0] = AttributeWithIndex::get(3, 0|Attribute::NoCapture);
 
6756
    NumAttrs = 1;
 
6757
    break;
 
6758
  case Intrinsic::invariant_start:
 
6759
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6760
    NumAttrs = 1;
 
6761
    break;
 
6762
  case Intrinsic::lifetime_end:
 
6763
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6764
    NumAttrs = 1;
 
6765
    break;
 
6766
  case Intrinsic::lifetime_start:
 
6767
    AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6768
    NumAttrs = 1;
 
6769
    break;
 
6770
  case Intrinsic::memcpy:
 
6771
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6772
    AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6773
    NumAttrs = 2;
 
6774
    break;
 
6775
  case Intrinsic::memmove:
 
6776
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6777
    AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture);
 
6778
    NumAttrs = 2;
 
6779
    break;
 
6780
  case Intrinsic::memset:
 
6781
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6782
    NumAttrs = 1;
 
6783
    break;
 
6784
  case Intrinsic::prefetch:
 
6785
    AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture);
 
6786
    NumAttrs = 1;
 
6787
    break;
 
6788
  }
 
6789
  AWI[NumAttrs] = AttributeWithIndex::get(~0, Attr);
 
6790
  return AttrListPtr::get(AWI, NumAttrs+1);
 
6791
}
 
6792
#endif // GET_INTRINSIC_ATTRIBUTES
 
6793
 
 
6794
// Determine intrinsic alias analysis mod/ref behavior.
 
6795
#ifdef GET_INTRINSIC_MODREF_BEHAVIOR
 
6796
switch (iid) {
 
6797
default:
 
6798
    return UnknownModRefBehavior;
 
6799
case Intrinsic::alpha_umulh:
 
6800
  return DoesNotAccessMemory;
 
6801
case Intrinsic::arm_neon_vabals:
 
6802
  return DoesNotAccessMemory;
 
6803
case Intrinsic::arm_neon_vabalu:
 
6804
  return DoesNotAccessMemory;
 
6805
case Intrinsic::arm_neon_vabas:
 
6806
  return DoesNotAccessMemory;
 
6807
case Intrinsic::arm_neon_vabau:
 
6808
  return DoesNotAccessMemory;
 
6809
case Intrinsic::arm_neon_vabdls:
 
6810
  return DoesNotAccessMemory;
 
6811
case Intrinsic::arm_neon_vabdlu:
 
6812
  return DoesNotAccessMemory;
 
6813
case Intrinsic::arm_neon_vabds:
 
6814
  return DoesNotAccessMemory;
 
6815
case Intrinsic::arm_neon_vabdu:
 
6816
  return DoesNotAccessMemory;
 
6817
case Intrinsic::arm_neon_vabs:
 
6818
  return DoesNotAccessMemory;
 
6819
case Intrinsic::arm_neon_vacged:
 
6820
  return DoesNotAccessMemory;
 
6821
case Intrinsic::arm_neon_vacgeq:
 
6822
  return DoesNotAccessMemory;
 
6823
case Intrinsic::arm_neon_vacgtd:
 
6824
  return DoesNotAccessMemory;
 
6825
case Intrinsic::arm_neon_vacgtq:
 
6826
  return DoesNotAccessMemory;
 
6827
case Intrinsic::arm_neon_vaddhn:
 
6828
  return DoesNotAccessMemory;
 
6829
case Intrinsic::arm_neon_vaddls:
 
6830
  return DoesNotAccessMemory;
 
6831
case Intrinsic::arm_neon_vaddlu:
 
6832
  return DoesNotAccessMemory;
 
6833
case Intrinsic::arm_neon_vaddws:
 
6834
  return DoesNotAccessMemory;
 
6835
case Intrinsic::arm_neon_vaddwu:
 
6836
  return DoesNotAccessMemory;
 
6837
case Intrinsic::arm_neon_vcls:
 
6838
  return DoesNotAccessMemory;
 
6839
case Intrinsic::arm_neon_vclz:
 
6840
  return DoesNotAccessMemory;
 
6841
case Intrinsic::arm_neon_vcnt:
 
6842
  return DoesNotAccessMemory;
 
6843
case Intrinsic::arm_neon_vcvtfp2fxs:
 
6844
  return DoesNotAccessMemory;
 
6845
case Intrinsic::arm_neon_vcvtfp2fxu:
 
6846
  return DoesNotAccessMemory;
 
6847
case Intrinsic::arm_neon_vcvtfxs2fp:
 
6848
  return DoesNotAccessMemory;
 
6849
case Intrinsic::arm_neon_vcvtfxu2fp:
 
6850
  return DoesNotAccessMemory;
 
6851
case Intrinsic::arm_neon_vhadds:
 
6852
  return DoesNotAccessMemory;
 
6853
case Intrinsic::arm_neon_vhaddu:
 
6854
  return DoesNotAccessMemory;
 
6855
case Intrinsic::arm_neon_vhsubs:
 
6856
  return DoesNotAccessMemory;
 
6857
case Intrinsic::arm_neon_vhsubu:
 
6858
  return DoesNotAccessMemory;
 
6859
case Intrinsic::arm_neon_vld1:
 
6860
  return OnlyReadsMemory;
 
6861
case Intrinsic::arm_neon_vld2:
 
6862
  return OnlyReadsMemory;
 
6863
case Intrinsic::arm_neon_vld2lane:
 
6864
  return OnlyReadsMemory;
 
6865
case Intrinsic::arm_neon_vld3:
 
6866
  return OnlyReadsMemory;
 
6867
case Intrinsic::arm_neon_vld3lane:
 
6868
  return OnlyReadsMemory;
 
6869
case Intrinsic::arm_neon_vld4:
 
6870
  return OnlyReadsMemory;
 
6871
case Intrinsic::arm_neon_vld4lane:
 
6872
  return OnlyReadsMemory;
 
6873
case Intrinsic::arm_neon_vmaxs:
 
6874
  return DoesNotAccessMemory;
 
6875
case Intrinsic::arm_neon_vmaxu:
 
6876
  return DoesNotAccessMemory;
 
6877
case Intrinsic::arm_neon_vmins:
 
6878
  return DoesNotAccessMemory;
 
6879
case Intrinsic::arm_neon_vminu:
 
6880
  return DoesNotAccessMemory;
 
6881
case Intrinsic::arm_neon_vmlals:
 
6882
  return DoesNotAccessMemory;
 
6883
case Intrinsic::arm_neon_vmlalu:
 
6884
  return DoesNotAccessMemory;
 
6885
case Intrinsic::arm_neon_vmlsls:
 
6886
  return DoesNotAccessMemory;
 
6887
case Intrinsic::arm_neon_vmlslu:
 
6888
  return DoesNotAccessMemory;
 
6889
case Intrinsic::arm_neon_vmovls:
 
6890
  return DoesNotAccessMemory;
 
6891
case Intrinsic::arm_neon_vmovlu:
 
6892
  return DoesNotAccessMemory;
 
6893
case Intrinsic::arm_neon_vmovn:
 
6894
  return DoesNotAccessMemory;
 
6895
case Intrinsic::arm_neon_vmullp:
 
6896
  return DoesNotAccessMemory;
 
6897
case Intrinsic::arm_neon_vmulls:
 
6898
  return DoesNotAccessMemory;
 
6899
case Intrinsic::arm_neon_vmullu:
 
6900
  return DoesNotAccessMemory;
 
6901
case Intrinsic::arm_neon_vmulp:
 
6902
  return DoesNotAccessMemory;
 
6903
case Intrinsic::arm_neon_vpadals:
 
6904
  return DoesNotAccessMemory;
 
6905
case Intrinsic::arm_neon_vpadalu:
 
6906
  return DoesNotAccessMemory;
 
6907
case Intrinsic::arm_neon_vpadd:
 
6908
  return DoesNotAccessMemory;
 
6909
case Intrinsic::arm_neon_vpaddls:
 
6910
  return DoesNotAccessMemory;
 
6911
case Intrinsic::arm_neon_vpaddlu:
 
6912
  return DoesNotAccessMemory;
 
6913
case Intrinsic::arm_neon_vpmaxs:
 
6914
  return DoesNotAccessMemory;
 
6915
case Intrinsic::arm_neon_vpmaxu:
 
6916
  return DoesNotAccessMemory;
 
6917
case Intrinsic::arm_neon_vpmins:
 
6918
  return DoesNotAccessMemory;
 
6919
case Intrinsic::arm_neon_vpminu:
 
6920
  return DoesNotAccessMemory;
 
6921
case Intrinsic::arm_neon_vqabs:
 
6922
  return DoesNotAccessMemory;
 
6923
case Intrinsic::arm_neon_vqadds:
 
6924
  return DoesNotAccessMemory;
 
6925
case Intrinsic::arm_neon_vqaddu:
 
6926
  return DoesNotAccessMemory;
 
6927
case Intrinsic::arm_neon_vqdmlal:
 
6928
  return DoesNotAccessMemory;
 
6929
case Intrinsic::arm_neon_vqdmlsl:
 
6930
  return DoesNotAccessMemory;
 
6931
case Intrinsic::arm_neon_vqdmulh:
 
6932
  return DoesNotAccessMemory;
 
6933
case Intrinsic::arm_neon_vqdmull:
 
6934
  return DoesNotAccessMemory;
 
6935
case Intrinsic::arm_neon_vqmovns:
 
6936
  return DoesNotAccessMemory;
 
6937
case Intrinsic::arm_neon_vqmovnsu:
 
6938
  return DoesNotAccessMemory;
 
6939
case Intrinsic::arm_neon_vqmovnu:
 
6940
  return DoesNotAccessMemory;
 
6941
case Intrinsic::arm_neon_vqneg:
 
6942
  return DoesNotAccessMemory;
 
6943
case Intrinsic::arm_neon_vqrdmulh:
 
6944
  return DoesNotAccessMemory;
 
6945
case Intrinsic::arm_neon_vqrshiftns:
 
6946
  return DoesNotAccessMemory;
 
6947
case Intrinsic::arm_neon_vqrshiftnsu:
 
6948
  return DoesNotAccessMemory;
 
6949
case Intrinsic::arm_neon_vqrshiftnu:
 
6950
  return DoesNotAccessMemory;
 
6951
case Intrinsic::arm_neon_vqrshifts:
 
6952
  return DoesNotAccessMemory;
 
6953
case Intrinsic::arm_neon_vqrshiftu:
 
6954
  return DoesNotAccessMemory;
 
6955
case Intrinsic::arm_neon_vqshiftns:
 
6956
  return DoesNotAccessMemory;
 
6957
case Intrinsic::arm_neon_vqshiftnsu:
 
6958
  return DoesNotAccessMemory;
 
6959
case Intrinsic::arm_neon_vqshiftnu:
 
6960
  return DoesNotAccessMemory;
 
6961
case Intrinsic::arm_neon_vqshifts:
 
6962
  return DoesNotAccessMemory;
 
6963
case Intrinsic::arm_neon_vqshiftsu:
 
6964
  return DoesNotAccessMemory;
 
6965
case Intrinsic::arm_neon_vqshiftu:
 
6966
  return DoesNotAccessMemory;
 
6967
case Intrinsic::arm_neon_vqsubs:
 
6968
  return DoesNotAccessMemory;
 
6969
case Intrinsic::arm_neon_vqsubu:
 
6970
  return DoesNotAccessMemory;
 
6971
case Intrinsic::arm_neon_vraddhn:
 
6972
  return DoesNotAccessMemory;
 
6973
case Intrinsic::arm_neon_vrecpe:
 
6974
  return DoesNotAccessMemory;
 
6975
case Intrinsic::arm_neon_vrecps:
 
6976
  return DoesNotAccessMemory;
 
6977
case Intrinsic::arm_neon_vrhadds:
 
6978
  return DoesNotAccessMemory;
 
6979
case Intrinsic::arm_neon_vrhaddu:
 
6980
  return DoesNotAccessMemory;
 
6981
case Intrinsic::arm_neon_vrshiftn:
 
6982
  return DoesNotAccessMemory;
 
6983
case Intrinsic::arm_neon_vrshifts:
 
6984
  return DoesNotAccessMemory;
 
6985
case Intrinsic::arm_neon_vrshiftu:
 
6986
  return DoesNotAccessMemory;
 
6987
case Intrinsic::arm_neon_vrsqrte:
 
6988
  return DoesNotAccessMemory;
 
6989
case Intrinsic::arm_neon_vrsqrts:
 
6990
  return DoesNotAccessMemory;
 
6991
case Intrinsic::arm_neon_vrsubhn:
 
6992
  return DoesNotAccessMemory;
 
6993
case Intrinsic::arm_neon_vshiftins:
 
6994
  return DoesNotAccessMemory;
 
6995
case Intrinsic::arm_neon_vshiftls:
 
6996
  return DoesNotAccessMemory;
 
6997
case Intrinsic::arm_neon_vshiftlu:
 
6998
  return DoesNotAccessMemory;
 
6999
case Intrinsic::arm_neon_vshiftn:
 
7000
  return DoesNotAccessMemory;
 
7001
case Intrinsic::arm_neon_vshifts:
 
7002
  return DoesNotAccessMemory;
 
7003
case Intrinsic::arm_neon_vshiftu:
 
7004
  return DoesNotAccessMemory;
 
7005
case Intrinsic::arm_neon_vst1:
 
7006
  return AccessesArguments;
 
7007
case Intrinsic::arm_neon_vst2:
 
7008
  return AccessesArguments;
 
7009
case Intrinsic::arm_neon_vst2lane:
 
7010
  return AccessesArguments;
 
7011
case Intrinsic::arm_neon_vst3:
 
7012
  return AccessesArguments;
 
7013
case Intrinsic::arm_neon_vst3lane:
 
7014
  return AccessesArguments;
 
7015
case Intrinsic::arm_neon_vst4:
 
7016
  return AccessesArguments;
 
7017
case Intrinsic::arm_neon_vst4lane:
 
7018
  return AccessesArguments;
 
7019
case Intrinsic::arm_neon_vsubhn:
 
7020
  return DoesNotAccessMemory;
 
7021
case Intrinsic::arm_neon_vsubls:
 
7022
  return DoesNotAccessMemory;
 
7023
case Intrinsic::arm_neon_vsublu:
 
7024
  return DoesNotAccessMemory;
 
7025
case Intrinsic::arm_neon_vsubws:
 
7026
  return DoesNotAccessMemory;
 
7027
case Intrinsic::arm_neon_vsubwu:
 
7028
  return DoesNotAccessMemory;
 
7029
case Intrinsic::arm_neon_vtbl1:
 
7030
  return DoesNotAccessMemory;
 
7031
case Intrinsic::arm_neon_vtbl2:
 
7032
  return DoesNotAccessMemory;
 
7033
case Intrinsic::arm_neon_vtbl3:
 
7034
  return DoesNotAccessMemory;
 
7035
case Intrinsic::arm_neon_vtbl4:
 
7036
  return DoesNotAccessMemory;
 
7037
case Intrinsic::arm_neon_vtbx1:
 
7038
  return DoesNotAccessMemory;
 
7039
case Intrinsic::arm_neon_vtbx2:
 
7040
  return DoesNotAccessMemory;
 
7041
case Intrinsic::arm_neon_vtbx3:
 
7042
  return DoesNotAccessMemory;
 
7043
case Intrinsic::arm_neon_vtbx4:
 
7044
  return DoesNotAccessMemory;
 
7045
case Intrinsic::arm_thread_pointer:
 
7046
  return DoesNotAccessMemory;
 
7047
case Intrinsic::atomic_cmp_swap:
 
7048
  return AccessesArguments;
 
7049
case Intrinsic::atomic_load_add:
 
7050
  return AccessesArguments;
 
7051
case Intrinsic::atomic_load_and:
 
7052
  return AccessesArguments;
 
7053
case Intrinsic::atomic_load_max:
 
7054
  return AccessesArguments;
 
7055
case Intrinsic::atomic_load_min:
 
7056
  return AccessesArguments;
 
7057
case Intrinsic::atomic_load_nand:
 
7058
  return AccessesArguments;
 
7059
case Intrinsic::atomic_load_or:
 
7060
  return AccessesArguments;
 
7061
case Intrinsic::atomic_load_sub:
 
7062
  return AccessesArguments;
 
7063
case Intrinsic::atomic_load_umax:
 
7064
  return AccessesArguments;
 
7065
case Intrinsic::atomic_load_umin:
 
7066
  return AccessesArguments;
 
7067
case Intrinsic::atomic_load_xor:
 
7068
  return AccessesArguments;
 
7069
case Intrinsic::atomic_swap:
 
7070
  return AccessesArguments;
 
7071
case Intrinsic::bswap:
 
7072
  return DoesNotAccessMemory;
 
7073
case Intrinsic::cos:
 
7074
  return OnlyReadsMemory;
 
7075
case Intrinsic::ctlz:
 
7076
  return DoesNotAccessMemory;
 
7077
case Intrinsic::ctpop:
 
7078
  return DoesNotAccessMemory;
 
7079
case Intrinsic::cttz:
 
7080
  return DoesNotAccessMemory;
 
7081
case Intrinsic::dbg_declare:
 
7082
  return DoesNotAccessMemory;
 
7083
case Intrinsic::dbg_value:
 
7084
  return DoesNotAccessMemory;
 
7085
case Intrinsic::eh_exception:
 
7086
  return OnlyReadsMemory;
 
7087
case Intrinsic::eh_sjlj_callsite:
 
7088
  return DoesNotAccessMemory;
 
7089
case Intrinsic::eh_sjlj_longjmp:
 
7090
  return DoesNotAccessMemory;
 
7091
case Intrinsic::eh_sjlj_lsda:
 
7092
  return DoesNotAccessMemory;
 
7093
case Intrinsic::eh_sjlj_setjmp:
 
7094
  return DoesNotAccessMemory;
 
7095
case Intrinsic::exp:
 
7096
  return OnlyReadsMemory;
 
7097
case Intrinsic::exp2:
 
7098
  return OnlyReadsMemory;
 
7099
case Intrinsic::frameaddress:
 
7100
  return DoesNotAccessMemory;
 
7101
case Intrinsic::gcread:
 
7102
  return OnlyReadsMemory;
 
7103
case Intrinsic::gcwrite:
 
7104
  return AccessesArguments;
 
7105
case Intrinsic::init_trampoline:
 
7106
  return AccessesArguments;
 
7107
case Intrinsic::invariant_end:
 
7108
  return AccessesArguments;
 
7109
case Intrinsic::invariant_start:
 
7110
  return OnlyReadsMemory;
 
7111
case Intrinsic::lifetime_end:
 
7112
  return AccessesArguments;
 
7113
case Intrinsic::lifetime_start:
 
7114
  return AccessesArguments;
 
7115
case Intrinsic::log:
 
7116
  return OnlyReadsMemory;
 
7117
case Intrinsic::log10:
 
7118
  return OnlyReadsMemory;
 
7119
case Intrinsic::log2:
 
7120
  return OnlyReadsMemory;
 
7121
case Intrinsic::memcpy:
 
7122
  return AccessesArguments;
 
7123
case Intrinsic::memmove:
 
7124
  return AccessesArguments;
 
7125
case Intrinsic::memset:
 
7126
  return AccessesArguments;
 
7127
case Intrinsic::objectsize:
 
7128
  return OnlyReadsMemory;
 
7129
case Intrinsic::pow:
 
7130
  return OnlyReadsMemory;
 
7131
case Intrinsic::powi:
 
7132
  return OnlyReadsMemory;
 
7133
case Intrinsic::ppc_altivec_lvebx:
 
7134
  return OnlyReadsMemory;
 
7135
case Intrinsic::ppc_altivec_lvehx:
 
7136
  return OnlyReadsMemory;
 
7137
case Intrinsic::ppc_altivec_lvewx:
 
7138
  return OnlyReadsMemory;
 
7139
case Intrinsic::ppc_altivec_lvsl:
 
7140
  return DoesNotAccessMemory;
 
7141
case Intrinsic::ppc_altivec_lvsr:
 
7142
  return DoesNotAccessMemory;
 
7143
case Intrinsic::ppc_altivec_lvx:
 
7144
  return OnlyReadsMemory;
 
7145
case Intrinsic::ppc_altivec_lvxl:
 
7146
  return OnlyReadsMemory;
 
7147
case Intrinsic::ppc_altivec_mfvscr:
 
7148
  return OnlyReadsMemory;
 
7149
case Intrinsic::ppc_altivec_vaddcuw:
 
7150
  return DoesNotAccessMemory;
 
7151
case Intrinsic::ppc_altivec_vaddsbs:
 
7152
  return DoesNotAccessMemory;
 
7153
case Intrinsic::ppc_altivec_vaddshs:
 
7154
  return DoesNotAccessMemory;
 
7155
case Intrinsic::ppc_altivec_vaddsws:
 
7156
  return DoesNotAccessMemory;
 
7157
case Intrinsic::ppc_altivec_vaddubs:
 
7158
  return DoesNotAccessMemory;
 
7159
case Intrinsic::ppc_altivec_vadduhs:
 
7160
  return DoesNotAccessMemory;
 
7161
case Intrinsic::ppc_altivec_vadduws:
 
7162
  return DoesNotAccessMemory;
 
7163
case Intrinsic::ppc_altivec_vavgsb:
 
7164
  return DoesNotAccessMemory;
 
7165
case Intrinsic::ppc_altivec_vavgsh:
 
7166
  return DoesNotAccessMemory;
 
7167
case Intrinsic::ppc_altivec_vavgsw:
 
7168
  return DoesNotAccessMemory;
 
7169
case Intrinsic::ppc_altivec_vavgub:
 
7170
  return DoesNotAccessMemory;
 
7171
case Intrinsic::ppc_altivec_vavguh:
 
7172
  return DoesNotAccessMemory;
 
7173
case Intrinsic::ppc_altivec_vavguw:
 
7174
  return DoesNotAccessMemory;
 
7175
case Intrinsic::ppc_altivec_vcfsx:
 
7176
  return DoesNotAccessMemory;
 
7177
case Intrinsic::ppc_altivec_vcfux:
 
7178
  return DoesNotAccessMemory;
 
7179
case Intrinsic::ppc_altivec_vcmpbfp:
 
7180
  return DoesNotAccessMemory;
 
7181
case Intrinsic::ppc_altivec_vcmpbfp_p:
 
7182
  return DoesNotAccessMemory;
 
7183
case Intrinsic::ppc_altivec_vcmpeqfp:
 
7184
  return DoesNotAccessMemory;
 
7185
case Intrinsic::ppc_altivec_vcmpeqfp_p:
 
7186
  return DoesNotAccessMemory;
 
7187
case Intrinsic::ppc_altivec_vcmpequb:
 
7188
  return DoesNotAccessMemory;
 
7189
case Intrinsic::ppc_altivec_vcmpequb_p:
 
7190
  return DoesNotAccessMemory;
 
7191
case Intrinsic::ppc_altivec_vcmpequh:
 
7192
  return DoesNotAccessMemory;
 
7193
case Intrinsic::ppc_altivec_vcmpequh_p:
 
7194
  return DoesNotAccessMemory;
 
7195
case Intrinsic::ppc_altivec_vcmpequw:
 
7196
  return DoesNotAccessMemory;
 
7197
case Intrinsic::ppc_altivec_vcmpequw_p:
 
7198
  return DoesNotAccessMemory;
 
7199
case Intrinsic::ppc_altivec_vcmpgefp:
 
7200
  return DoesNotAccessMemory;
 
7201
case Intrinsic::ppc_altivec_vcmpgefp_p:
 
7202
  return DoesNotAccessMemory;
 
7203
case Intrinsic::ppc_altivec_vcmpgtfp:
 
7204
  return DoesNotAccessMemory;
 
7205
case Intrinsic::ppc_altivec_vcmpgtfp_p:
 
7206
  return DoesNotAccessMemory;
 
7207
case Intrinsic::ppc_altivec_vcmpgtsb:
 
7208
  return DoesNotAccessMemory;
 
7209
case Intrinsic::ppc_altivec_vcmpgtsb_p:
 
7210
  return DoesNotAccessMemory;
 
7211
case Intrinsic::ppc_altivec_vcmpgtsh:
 
7212
  return DoesNotAccessMemory;
 
7213
case Intrinsic::ppc_altivec_vcmpgtsh_p:
 
7214
  return DoesNotAccessMemory;
 
7215
case Intrinsic::ppc_altivec_vcmpgtsw:
 
7216
  return DoesNotAccessMemory;
 
7217
case Intrinsic::ppc_altivec_vcmpgtsw_p:
 
7218
  return DoesNotAccessMemory;
 
7219
case Intrinsic::ppc_altivec_vcmpgtub:
 
7220
  return DoesNotAccessMemory;
 
7221
case Intrinsic::ppc_altivec_vcmpgtub_p:
 
7222
  return DoesNotAccessMemory;
 
7223
case Intrinsic::ppc_altivec_vcmpgtuh:
 
7224
  return DoesNotAccessMemory;
 
7225
case Intrinsic::ppc_altivec_vcmpgtuh_p:
 
7226
  return DoesNotAccessMemory;
 
7227
case Intrinsic::ppc_altivec_vcmpgtuw:
 
7228
  return DoesNotAccessMemory;
 
7229
case Intrinsic::ppc_altivec_vcmpgtuw_p:
 
7230
  return DoesNotAccessMemory;
 
7231
case Intrinsic::ppc_altivec_vctsxs:
 
7232
  return DoesNotAccessMemory;
 
7233
case Intrinsic::ppc_altivec_vctuxs:
 
7234
  return DoesNotAccessMemory;
 
7235
case Intrinsic::ppc_altivec_vexptefp:
 
7236
  return DoesNotAccessMemory;
 
7237
case Intrinsic::ppc_altivec_vlogefp:
 
7238
  return DoesNotAccessMemory;
 
7239
case Intrinsic::ppc_altivec_vmaddfp:
 
7240
  return DoesNotAccessMemory;
 
7241
case Intrinsic::ppc_altivec_vmaxfp:
 
7242
  return DoesNotAccessMemory;
 
7243
case Intrinsic::ppc_altivec_vmaxsb:
 
7244
  return DoesNotAccessMemory;
 
7245
case Intrinsic::ppc_altivec_vmaxsh:
 
7246
  return DoesNotAccessMemory;
 
7247
case Intrinsic::ppc_altivec_vmaxsw:
 
7248
  return DoesNotAccessMemory;
 
7249
case Intrinsic::ppc_altivec_vmaxub:
 
7250
  return DoesNotAccessMemory;
 
7251
case Intrinsic::ppc_altivec_vmaxuh:
 
7252
  return DoesNotAccessMemory;
 
7253
case Intrinsic::ppc_altivec_vmaxuw:
 
7254
  return DoesNotAccessMemory;
 
7255
case Intrinsic::ppc_altivec_vmhaddshs:
 
7256
  return DoesNotAccessMemory;
 
7257
case Intrinsic::ppc_altivec_vmhraddshs:
 
7258
  return DoesNotAccessMemory;
 
7259
case Intrinsic::ppc_altivec_vminfp:
 
7260
  return DoesNotAccessMemory;
 
7261
case Intrinsic::ppc_altivec_vminsb:
 
7262
  return DoesNotAccessMemory;
 
7263
case Intrinsic::ppc_altivec_vminsh:
 
7264
  return DoesNotAccessMemory;
 
7265
case Intrinsic::ppc_altivec_vminsw:
 
7266
  return DoesNotAccessMemory;
 
7267
case Intrinsic::ppc_altivec_vminub:
 
7268
  return DoesNotAccessMemory;
 
7269
case Intrinsic::ppc_altivec_vminuh:
 
7270
  return DoesNotAccessMemory;
 
7271
case Intrinsic::ppc_altivec_vminuw:
 
7272
  return DoesNotAccessMemory;
 
7273
case Intrinsic::ppc_altivec_vmladduhm:
 
7274
  return DoesNotAccessMemory;
 
7275
case Intrinsic::ppc_altivec_vmsummbm:
 
7276
  return DoesNotAccessMemory;
 
7277
case Intrinsic::ppc_altivec_vmsumshm:
 
7278
  return DoesNotAccessMemory;
 
7279
case Intrinsic::ppc_altivec_vmsumshs:
 
7280
  return DoesNotAccessMemory;
 
7281
case Intrinsic::ppc_altivec_vmsumubm:
 
7282
  return DoesNotAccessMemory;
 
7283
case Intrinsic::ppc_altivec_vmsumuhm:
 
7284
  return DoesNotAccessMemory;
 
7285
case Intrinsic::ppc_altivec_vmsumuhs:
 
7286
  return DoesNotAccessMemory;
 
7287
case Intrinsic::ppc_altivec_vmulesb:
 
7288
  return DoesNotAccessMemory;
 
7289
case Intrinsic::ppc_altivec_vmulesh:
 
7290
  return DoesNotAccessMemory;
 
7291
case Intrinsic::ppc_altivec_vmuleub:
 
7292
  return DoesNotAccessMemory;
 
7293
case Intrinsic::ppc_altivec_vmuleuh:
 
7294
  return DoesNotAccessMemory;
 
7295
case Intrinsic::ppc_altivec_vmulosb:
 
7296
  return DoesNotAccessMemory;
 
7297
case Intrinsic::ppc_altivec_vmulosh:
 
7298
  return DoesNotAccessMemory;
 
7299
case Intrinsic::ppc_altivec_vmuloub:
 
7300
  return DoesNotAccessMemory;
 
7301
case Intrinsic::ppc_altivec_vmulouh:
 
7302
  return DoesNotAccessMemory;
 
7303
case Intrinsic::ppc_altivec_vnmsubfp:
 
7304
  return DoesNotAccessMemory;
 
7305
case Intrinsic::ppc_altivec_vperm:
 
7306
  return DoesNotAccessMemory;
 
7307
case Intrinsic::ppc_altivec_vpkpx:
 
7308
  return DoesNotAccessMemory;
 
7309
case Intrinsic::ppc_altivec_vpkshss:
 
7310
  return DoesNotAccessMemory;
 
7311
case Intrinsic::ppc_altivec_vpkshus:
 
7312
  return DoesNotAccessMemory;
 
7313
case Intrinsic::ppc_altivec_vpkswss:
 
7314
  return DoesNotAccessMemory;
 
7315
case Intrinsic::ppc_altivec_vpkswus:
 
7316
  return DoesNotAccessMemory;
 
7317
case Intrinsic::ppc_altivec_vpkuhus:
 
7318
  return DoesNotAccessMemory;
 
7319
case Intrinsic::ppc_altivec_vpkuwus:
 
7320
  return DoesNotAccessMemory;
 
7321
case Intrinsic::ppc_altivec_vrefp:
 
7322
  return DoesNotAccessMemory;
 
7323
case Intrinsic::ppc_altivec_vrfim:
 
7324
  return DoesNotAccessMemory;
 
7325
case Intrinsic::ppc_altivec_vrfin:
 
7326
  return DoesNotAccessMemory;
 
7327
case Intrinsic::ppc_altivec_vrfip:
 
7328
  return DoesNotAccessMemory;
 
7329
case Intrinsic::ppc_altivec_vrfiz:
 
7330
  return DoesNotAccessMemory;
 
7331
case Intrinsic::ppc_altivec_vrlb:
 
7332
  return DoesNotAccessMemory;
 
7333
case Intrinsic::ppc_altivec_vrlh:
 
7334
  return DoesNotAccessMemory;
 
7335
case Intrinsic::ppc_altivec_vrlw:
 
7336
  return DoesNotAccessMemory;
 
7337
case Intrinsic::ppc_altivec_vrsqrtefp:
 
7338
  return DoesNotAccessMemory;
 
7339
case Intrinsic::ppc_altivec_vsel:
 
7340
  return DoesNotAccessMemory;
 
7341
case Intrinsic::ppc_altivec_vsl:
 
7342
  return DoesNotAccessMemory;
 
7343
case Intrinsic::ppc_altivec_vslb:
 
7344
  return DoesNotAccessMemory;
 
7345
case Intrinsic::ppc_altivec_vslh:
 
7346
  return DoesNotAccessMemory;
 
7347
case Intrinsic::ppc_altivec_vslo:
 
7348
  return DoesNotAccessMemory;
 
7349
case Intrinsic::ppc_altivec_vslw:
 
7350
  return DoesNotAccessMemory;
 
7351
case Intrinsic::ppc_altivec_vsr:
 
7352
  return DoesNotAccessMemory;
 
7353
case Intrinsic::ppc_altivec_vsrab:
 
7354
  return DoesNotAccessMemory;
 
7355
case Intrinsic::ppc_altivec_vsrah:
 
7356
  return DoesNotAccessMemory;
 
7357
case Intrinsic::ppc_altivec_vsraw:
 
7358
  return DoesNotAccessMemory;
 
7359
case Intrinsic::ppc_altivec_vsrb:
 
7360
  return DoesNotAccessMemory;
 
7361
case Intrinsic::ppc_altivec_vsrh:
 
7362
  return DoesNotAccessMemory;
 
7363
case Intrinsic::ppc_altivec_vsro:
 
7364
  return DoesNotAccessMemory;
 
7365
case Intrinsic::ppc_altivec_vsrw:
 
7366
  return DoesNotAccessMemory;
 
7367
case Intrinsic::ppc_altivec_vsubcuw:
 
7368
  return DoesNotAccessMemory;
 
7369
case Intrinsic::ppc_altivec_vsubsbs:
 
7370
  return DoesNotAccessMemory;
 
7371
case Intrinsic::ppc_altivec_vsubshs:
 
7372
  return DoesNotAccessMemory;
 
7373
case Intrinsic::ppc_altivec_vsubsws:
 
7374
  return DoesNotAccessMemory;
 
7375
case Intrinsic::ppc_altivec_vsububs:
 
7376
  return DoesNotAccessMemory;
 
7377
case Intrinsic::ppc_altivec_vsubuhs:
 
7378
  return DoesNotAccessMemory;
 
7379
case Intrinsic::ppc_altivec_vsubuws:
 
7380
  return DoesNotAccessMemory;
 
7381
case Intrinsic::ppc_altivec_vsum2sws:
 
7382
  return DoesNotAccessMemory;
 
7383
case Intrinsic::ppc_altivec_vsum4sbs:
 
7384
  return DoesNotAccessMemory;
 
7385
case Intrinsic::ppc_altivec_vsum4shs:
 
7386
  return DoesNotAccessMemory;
 
7387
case Intrinsic::ppc_altivec_vsum4ubs:
 
7388
  return DoesNotAccessMemory;
 
7389
case Intrinsic::ppc_altivec_vsumsws:
 
7390
  return DoesNotAccessMemory;
 
7391
case Intrinsic::ppc_altivec_vupkhpx:
 
7392
  return DoesNotAccessMemory;
 
7393
case Intrinsic::ppc_altivec_vupkhsb:
 
7394
  return DoesNotAccessMemory;
 
7395
case Intrinsic::ppc_altivec_vupkhsh:
 
7396
  return DoesNotAccessMemory;
 
7397
case Intrinsic::ppc_altivec_vupklpx:
 
7398
  return DoesNotAccessMemory;
 
7399
case Intrinsic::ppc_altivec_vupklsb:
 
7400
  return DoesNotAccessMemory;
 
7401
case Intrinsic::ppc_altivec_vupklsh:
 
7402
  return DoesNotAccessMemory;
 
7403
case Intrinsic::prefetch:
 
7404
  return AccessesArguments;
 
7405
case Intrinsic::returnaddress:
 
7406
  return DoesNotAccessMemory;
 
7407
case Intrinsic::sadd_with_overflow:
 
7408
  return DoesNotAccessMemory;
 
7409
case Intrinsic::sin:
 
7410
  return OnlyReadsMemory;
 
7411
case Intrinsic::smul_with_overflow:
 
7412
  return DoesNotAccessMemory;
 
7413
case Intrinsic::spu_si_a:
 
7414
  return DoesNotAccessMemory;
 
7415
case Intrinsic::spu_si_addx:
 
7416
  return DoesNotAccessMemory;
 
7417
case Intrinsic::spu_si_ah:
 
7418
  return DoesNotAccessMemory;
 
7419
case Intrinsic::spu_si_ahi:
 
7420
  return DoesNotAccessMemory;
 
7421
case Intrinsic::spu_si_ai:
 
7422
  return DoesNotAccessMemory;
 
7423
case Intrinsic::spu_si_and:
 
7424
  return DoesNotAccessMemory;
 
7425
case Intrinsic::spu_si_andbi:
 
7426
  return DoesNotAccessMemory;
 
7427
case Intrinsic::spu_si_andc:
 
7428
  return DoesNotAccessMemory;
 
7429
case Intrinsic::spu_si_andhi:
 
7430
  return DoesNotAccessMemory;
 
7431
case Intrinsic::spu_si_andi:
 
7432
  return DoesNotAccessMemory;
 
7433
case Intrinsic::spu_si_bg:
 
7434
  return DoesNotAccessMemory;
 
7435
case Intrinsic::spu_si_bgx:
 
7436
  return DoesNotAccessMemory;
 
7437
case Intrinsic::spu_si_ceq:
 
7438
  return DoesNotAccessMemory;
 
7439
case Intrinsic::spu_si_ceqb:
 
7440
  return DoesNotAccessMemory;
 
7441
case Intrinsic::spu_si_ceqbi:
 
7442
  return DoesNotAccessMemory;
 
7443
case Intrinsic::spu_si_ceqh:
 
7444
  return DoesNotAccessMemory;
 
7445
case Intrinsic::spu_si_ceqhi:
 
7446
  return DoesNotAccessMemory;
 
7447
case Intrinsic::spu_si_ceqi:
 
7448
  return DoesNotAccessMemory;
 
7449
case Intrinsic::spu_si_cg:
 
7450
  return DoesNotAccessMemory;
 
7451
case Intrinsic::spu_si_cgt:
 
7452
  return DoesNotAccessMemory;
 
7453
case Intrinsic::spu_si_cgtb:
 
7454
  return DoesNotAccessMemory;
 
7455
case Intrinsic::spu_si_cgtbi:
 
7456
  return DoesNotAccessMemory;
 
7457
case Intrinsic::spu_si_cgth:
 
7458
  return DoesNotAccessMemory;
 
7459
case Intrinsic::spu_si_cgthi:
 
7460
  return DoesNotAccessMemory;
 
7461
case Intrinsic::spu_si_cgti:
 
7462
  return DoesNotAccessMemory;
 
7463
case Intrinsic::spu_si_cgx:
 
7464
  return DoesNotAccessMemory;
 
7465
case Intrinsic::spu_si_clgt:
 
7466
  return DoesNotAccessMemory;
 
7467
case Intrinsic::spu_si_clgtb:
 
7468
  return DoesNotAccessMemory;
 
7469
case Intrinsic::spu_si_clgtbi:
 
7470
  return DoesNotAccessMemory;
 
7471
case Intrinsic::spu_si_clgth:
 
7472
  return DoesNotAccessMemory;
 
7473
case Intrinsic::spu_si_clgthi:
 
7474
  return DoesNotAccessMemory;
 
7475
case Intrinsic::spu_si_clgti:
 
7476
  return DoesNotAccessMemory;
 
7477
case Intrinsic::spu_si_dfa:
 
7478
  return DoesNotAccessMemory;
 
7479
case Intrinsic::spu_si_dfm:
 
7480
  return DoesNotAccessMemory;
 
7481
case Intrinsic::spu_si_dfma:
 
7482
  return DoesNotAccessMemory;
 
7483
case Intrinsic::spu_si_dfms:
 
7484
  return DoesNotAccessMemory;
 
7485
case Intrinsic::spu_si_dfnma:
 
7486
  return DoesNotAccessMemory;
 
7487
case Intrinsic::spu_si_dfnms:
 
7488
  return DoesNotAccessMemory;
 
7489
case Intrinsic::spu_si_dfs:
 
7490
  return DoesNotAccessMemory;
 
7491
case Intrinsic::spu_si_fa:
 
7492
  return DoesNotAccessMemory;
 
7493
case Intrinsic::spu_si_fceq:
 
7494
  return DoesNotAccessMemory;
 
7495
case Intrinsic::spu_si_fcgt:
 
7496
  return DoesNotAccessMemory;
 
7497
case Intrinsic::spu_si_fcmeq:
 
7498
  return DoesNotAccessMemory;
 
7499
case Intrinsic::spu_si_fcmgt:
 
7500
  return DoesNotAccessMemory;
 
7501
case Intrinsic::spu_si_fm:
 
7502
  return DoesNotAccessMemory;
 
7503
case Intrinsic::spu_si_fma:
 
7504
  return DoesNotAccessMemory;
 
7505
case Intrinsic::spu_si_fms:
 
7506
  return DoesNotAccessMemory;
 
7507
case Intrinsic::spu_si_fnms:
 
7508
  return DoesNotAccessMemory;
 
7509
case Intrinsic::spu_si_fs:
 
7510
  return DoesNotAccessMemory;
 
7511
case Intrinsic::spu_si_fsmbi:
 
7512
  return DoesNotAccessMemory;
 
7513
case Intrinsic::spu_si_mpy:
 
7514
  return DoesNotAccessMemory;
 
7515
case Intrinsic::spu_si_mpya:
 
7516
  return DoesNotAccessMemory;
 
7517
case Intrinsic::spu_si_mpyh:
 
7518
  return DoesNotAccessMemory;
 
7519
case Intrinsic::spu_si_mpyhh:
 
7520
  return DoesNotAccessMemory;
 
7521
case Intrinsic::spu_si_mpyhha:
 
7522
  return DoesNotAccessMemory;
 
7523
case Intrinsic::spu_si_mpyhhau:
 
7524
  return DoesNotAccessMemory;
 
7525
case Intrinsic::spu_si_mpyhhu:
 
7526
  return DoesNotAccessMemory;
 
7527
case Intrinsic::spu_si_mpyi:
 
7528
  return DoesNotAccessMemory;
 
7529
case Intrinsic::spu_si_mpys:
 
7530
  return DoesNotAccessMemory;
 
7531
case Intrinsic::spu_si_mpyu:
 
7532
  return DoesNotAccessMemory;
 
7533
case Intrinsic::spu_si_mpyui:
 
7534
  return DoesNotAccessMemory;
 
7535
case Intrinsic::spu_si_nand:
 
7536
  return DoesNotAccessMemory;
 
7537
case Intrinsic::spu_si_nor:
 
7538
  return DoesNotAccessMemory;
 
7539
case Intrinsic::spu_si_or:
 
7540
  return DoesNotAccessMemory;
 
7541
case Intrinsic::spu_si_orbi:
 
7542
  return DoesNotAccessMemory;
 
7543
case Intrinsic::spu_si_orc:
 
7544
  return DoesNotAccessMemory;
 
7545
case Intrinsic::spu_si_orhi:
 
7546
  return DoesNotAccessMemory;
 
7547
case Intrinsic::spu_si_ori:
 
7548
  return DoesNotAccessMemory;
 
7549
case Intrinsic::spu_si_sf:
 
7550
  return DoesNotAccessMemory;
 
7551
case Intrinsic::spu_si_sfh:
 
7552
  return DoesNotAccessMemory;
 
7553
case Intrinsic::spu_si_sfhi:
 
7554
  return DoesNotAccessMemory;
 
7555
case Intrinsic::spu_si_sfi:
 
7556
  return DoesNotAccessMemory;
 
7557
case Intrinsic::spu_si_sfx:
 
7558
  return DoesNotAccessMemory;
 
7559
case Intrinsic::spu_si_shli:
 
7560
  return DoesNotAccessMemory;
 
7561
case Intrinsic::spu_si_shlqbi:
 
7562
  return DoesNotAccessMemory;
 
7563
case Intrinsic::spu_si_shlqbii:
 
7564
  return DoesNotAccessMemory;
 
7565
case Intrinsic::spu_si_shlqby:
 
7566
  return DoesNotAccessMemory;
 
7567
case Intrinsic::spu_si_shlqbyi:
 
7568
  return DoesNotAccessMemory;
 
7569
case Intrinsic::spu_si_xor:
 
7570
  return DoesNotAccessMemory;
 
7571
case Intrinsic::spu_si_xorbi:
 
7572
  return DoesNotAccessMemory;
 
7573
case Intrinsic::spu_si_xorhi:
 
7574
  return DoesNotAccessMemory;
 
7575
case Intrinsic::spu_si_xori:
 
7576
  return DoesNotAccessMemory;
 
7577
case Intrinsic::sqrt:
 
7578
  return OnlyReadsMemory;
 
7579
case Intrinsic::ssub_with_overflow:
 
7580
  return DoesNotAccessMemory;
 
7581
case Intrinsic::uadd_with_overflow:
 
7582
  return DoesNotAccessMemory;
 
7583
case Intrinsic::umul_with_overflow:
 
7584
  return DoesNotAccessMemory;
 
7585
case Intrinsic::usub_with_overflow:
 
7586
  return DoesNotAccessMemory;
 
7587
case Intrinsic::x86_mmx_packssdw:
 
7588
  return DoesNotAccessMemory;
 
7589
case Intrinsic::x86_mmx_packsswb:
 
7590
  return DoesNotAccessMemory;
 
7591
case Intrinsic::x86_mmx_packuswb:
 
7592
  return DoesNotAccessMemory;
 
7593
case Intrinsic::x86_mmx_padds_b:
 
7594
  return DoesNotAccessMemory;
 
7595
case Intrinsic::x86_mmx_padds_w:
 
7596
  return DoesNotAccessMemory;
 
7597
case Intrinsic::x86_mmx_paddus_b:
 
7598
  return DoesNotAccessMemory;
 
7599
case Intrinsic::x86_mmx_paddus_w:
 
7600
  return DoesNotAccessMemory;
 
7601
case Intrinsic::x86_mmx_pavg_b:
 
7602
  return DoesNotAccessMemory;
 
7603
case Intrinsic::x86_mmx_pavg_w:
 
7604
  return DoesNotAccessMemory;
 
7605
case Intrinsic::x86_mmx_pcmpeq_b:
 
7606
  return DoesNotAccessMemory;
 
7607
case Intrinsic::x86_mmx_pcmpeq_d:
 
7608
  return DoesNotAccessMemory;
 
7609
case Intrinsic::x86_mmx_pcmpeq_w:
 
7610
  return DoesNotAccessMemory;
 
7611
case Intrinsic::x86_mmx_pcmpgt_b:
 
7612
  return DoesNotAccessMemory;
 
7613
case Intrinsic::x86_mmx_pcmpgt_d:
 
7614
  return DoesNotAccessMemory;
 
7615
case Intrinsic::x86_mmx_pcmpgt_w:
 
7616
  return DoesNotAccessMemory;
 
7617
case Intrinsic::x86_mmx_pmadd_wd:
 
7618
  return DoesNotAccessMemory;
 
7619
case Intrinsic::x86_mmx_pmaxs_w:
 
7620
  return DoesNotAccessMemory;
 
7621
case Intrinsic::x86_mmx_pmaxu_b:
 
7622
  return DoesNotAccessMemory;
 
7623
case Intrinsic::x86_mmx_pmins_w:
 
7624
  return DoesNotAccessMemory;
 
7625
case Intrinsic::x86_mmx_pminu_b:
 
7626
  return DoesNotAccessMemory;
 
7627
case Intrinsic::x86_mmx_pmovmskb:
 
7628
  return DoesNotAccessMemory;
 
7629
case Intrinsic::x86_mmx_pmulh_w:
 
7630
  return DoesNotAccessMemory;
 
7631
case Intrinsic::x86_mmx_pmulhu_w:
 
7632
  return DoesNotAccessMemory;
 
7633
case Intrinsic::x86_mmx_pmulu_dq:
 
7634
  return DoesNotAccessMemory;
 
7635
case Intrinsic::x86_mmx_psad_bw:
 
7636
  return DoesNotAccessMemory;
 
7637
case Intrinsic::x86_mmx_psll_d:
 
7638
  return DoesNotAccessMemory;
 
7639
case Intrinsic::x86_mmx_psll_q:
 
7640
  return DoesNotAccessMemory;
 
7641
case Intrinsic::x86_mmx_psll_w:
 
7642
  return DoesNotAccessMemory;
 
7643
case Intrinsic::x86_mmx_pslli_d:
 
7644
  return DoesNotAccessMemory;
 
7645
case Intrinsic::x86_mmx_pslli_q:
 
7646
  return DoesNotAccessMemory;
 
7647
case Intrinsic::x86_mmx_pslli_w:
 
7648
  return DoesNotAccessMemory;
 
7649
case Intrinsic::x86_mmx_psra_d:
 
7650
  return DoesNotAccessMemory;
 
7651
case Intrinsic::x86_mmx_psra_w:
 
7652
  return DoesNotAccessMemory;
 
7653
case Intrinsic::x86_mmx_psrai_d:
 
7654
  return DoesNotAccessMemory;
 
7655
case Intrinsic::x86_mmx_psrai_w:
 
7656
  return DoesNotAccessMemory;
 
7657
case Intrinsic::x86_mmx_psrl_d:
 
7658
  return DoesNotAccessMemory;
 
7659
case Intrinsic::x86_mmx_psrl_q:
 
7660
  return DoesNotAccessMemory;
 
7661
case Intrinsic::x86_mmx_psrl_w:
 
7662
  return DoesNotAccessMemory;
 
7663
case Intrinsic::x86_mmx_psrli_d:
 
7664
  return DoesNotAccessMemory;
 
7665
case Intrinsic::x86_mmx_psrli_q:
 
7666
  return DoesNotAccessMemory;
 
7667
case Intrinsic::x86_mmx_psrli_w:
 
7668
  return DoesNotAccessMemory;
 
7669
case Intrinsic::x86_mmx_psubs_b:
 
7670
  return DoesNotAccessMemory;
 
7671
case Intrinsic::x86_mmx_psubs_w:
 
7672
  return DoesNotAccessMemory;
 
7673
case Intrinsic::x86_mmx_psubus_b:
 
7674
  return DoesNotAccessMemory;
 
7675
case Intrinsic::x86_mmx_psubus_w:
 
7676
  return DoesNotAccessMemory;
 
7677
case Intrinsic::x86_sse2_add_sd:
 
7678
  return DoesNotAccessMemory;
 
7679
case Intrinsic::x86_sse2_cmp_pd:
 
7680
  return DoesNotAccessMemory;
 
7681
case Intrinsic::x86_sse2_cmp_sd:
 
7682
  return DoesNotAccessMemory;
 
7683
case Intrinsic::x86_sse2_comieq_sd:
 
7684
  return DoesNotAccessMemory;
 
7685
case Intrinsic::x86_sse2_comige_sd:
 
7686
  return DoesNotAccessMemory;
 
7687
case Intrinsic::x86_sse2_comigt_sd:
 
7688
  return DoesNotAccessMemory;
 
7689
case Intrinsic::x86_sse2_comile_sd:
 
7690
  return DoesNotAccessMemory;
 
7691
case Intrinsic::x86_sse2_comilt_sd:
 
7692
  return DoesNotAccessMemory;
 
7693
case Intrinsic::x86_sse2_comineq_sd:
 
7694
  return DoesNotAccessMemory;
 
7695
case Intrinsic::x86_sse2_cvtdq2pd:
 
7696
  return DoesNotAccessMemory;
 
7697
case Intrinsic::x86_sse2_cvtdq2ps:
 
7698
  return DoesNotAccessMemory;
 
7699
case Intrinsic::x86_sse2_cvtpd2dq:
 
7700
  return DoesNotAccessMemory;
 
7701
case Intrinsic::x86_sse2_cvtpd2ps:
 
7702
  return DoesNotAccessMemory;
 
7703
case Intrinsic::x86_sse2_cvtps2dq:
 
7704
  return DoesNotAccessMemory;
 
7705
case Intrinsic::x86_sse2_cvtps2pd:
 
7706
  return DoesNotAccessMemory;
 
7707
case Intrinsic::x86_sse2_cvtsd2si:
 
7708
  return DoesNotAccessMemory;
 
7709
case Intrinsic::x86_sse2_cvtsd2si64:
 
7710
  return DoesNotAccessMemory;
 
7711
case Intrinsic::x86_sse2_cvtsd2ss:
 
7712
  return DoesNotAccessMemory;
 
7713
case Intrinsic::x86_sse2_cvtsi2sd:
 
7714
  return DoesNotAccessMemory;
 
7715
case Intrinsic::x86_sse2_cvtsi642sd:
 
7716
  return DoesNotAccessMemory;
 
7717
case Intrinsic::x86_sse2_cvtss2sd:
 
7718
  return DoesNotAccessMemory;
 
7719
case Intrinsic::x86_sse2_cvttpd2dq:
 
7720
  return DoesNotAccessMemory;
 
7721
case Intrinsic::x86_sse2_cvttps2dq:
 
7722
  return DoesNotAccessMemory;
 
7723
case Intrinsic::x86_sse2_cvttsd2si:
 
7724
  return DoesNotAccessMemory;
 
7725
case Intrinsic::x86_sse2_cvttsd2si64:
 
7726
  return DoesNotAccessMemory;
 
7727
case Intrinsic::x86_sse2_div_sd:
 
7728
  return DoesNotAccessMemory;
 
7729
case Intrinsic::x86_sse2_loadu_dq:
 
7730
  return OnlyReadsMemory;
 
7731
case Intrinsic::x86_sse2_loadu_pd:
 
7732
  return OnlyReadsMemory;
 
7733
case Intrinsic::x86_sse2_max_pd:
 
7734
  return DoesNotAccessMemory;
 
7735
case Intrinsic::x86_sse2_max_sd:
 
7736
  return DoesNotAccessMemory;
 
7737
case Intrinsic::x86_sse2_min_pd:
 
7738
  return DoesNotAccessMemory;
 
7739
case Intrinsic::x86_sse2_min_sd:
 
7740
  return DoesNotAccessMemory;
 
7741
case Intrinsic::x86_sse2_movmsk_pd:
 
7742
  return DoesNotAccessMemory;
 
7743
case Intrinsic::x86_sse2_mul_sd:
 
7744
  return DoesNotAccessMemory;
 
7745
case Intrinsic::x86_sse2_packssdw_128:
 
7746
  return DoesNotAccessMemory;
 
7747
case Intrinsic::x86_sse2_packsswb_128:
 
7748
  return DoesNotAccessMemory;
 
7749
case Intrinsic::x86_sse2_packuswb_128:
 
7750
  return DoesNotAccessMemory;
 
7751
case Intrinsic::x86_sse2_padds_b:
 
7752
  return DoesNotAccessMemory;
 
7753
case Intrinsic::x86_sse2_padds_w:
 
7754
  return DoesNotAccessMemory;
 
7755
case Intrinsic::x86_sse2_paddus_b:
 
7756
  return DoesNotAccessMemory;
 
7757
case Intrinsic::x86_sse2_paddus_w:
 
7758
  return DoesNotAccessMemory;
 
7759
case Intrinsic::x86_sse2_pavg_b:
 
7760
  return DoesNotAccessMemory;
 
7761
case Intrinsic::x86_sse2_pavg_w:
 
7762
  return DoesNotAccessMemory;
 
7763
case Intrinsic::x86_sse2_pcmpeq_b:
 
7764
  return DoesNotAccessMemory;
 
7765
case Intrinsic::x86_sse2_pcmpeq_d:
 
7766
  return DoesNotAccessMemory;
 
7767
case Intrinsic::x86_sse2_pcmpeq_w:
 
7768
  return DoesNotAccessMemory;
 
7769
case Intrinsic::x86_sse2_pcmpgt_b:
 
7770
  return DoesNotAccessMemory;
 
7771
case Intrinsic::x86_sse2_pcmpgt_d:
 
7772
  return DoesNotAccessMemory;
 
7773
case Intrinsic::x86_sse2_pcmpgt_w:
 
7774
  return DoesNotAccessMemory;
 
7775
case Intrinsic::x86_sse2_pmadd_wd:
 
7776
  return DoesNotAccessMemory;
 
7777
case Intrinsic::x86_sse2_pmaxs_w:
 
7778
  return DoesNotAccessMemory;
 
7779
case Intrinsic::x86_sse2_pmaxu_b:
 
7780
  return DoesNotAccessMemory;
 
7781
case Intrinsic::x86_sse2_pmins_w:
 
7782
  return DoesNotAccessMemory;
 
7783
case Intrinsic::x86_sse2_pminu_b:
 
7784
  return DoesNotAccessMemory;
 
7785
case Intrinsic::x86_sse2_pmovmskb_128:
 
7786
  return DoesNotAccessMemory;
 
7787
case Intrinsic::x86_sse2_pmulh_w:
 
7788
  return DoesNotAccessMemory;
 
7789
case Intrinsic::x86_sse2_pmulhu_w:
 
7790
  return DoesNotAccessMemory;
 
7791
case Intrinsic::x86_sse2_pmulu_dq:
 
7792
  return DoesNotAccessMemory;
 
7793
case Intrinsic::x86_sse2_psad_bw:
 
7794
  return DoesNotAccessMemory;
 
7795
case Intrinsic::x86_sse2_psll_d:
 
7796
  return DoesNotAccessMemory;
 
7797
case Intrinsic::x86_sse2_psll_dq:
 
7798
  return DoesNotAccessMemory;
 
7799
case Intrinsic::x86_sse2_psll_dq_bs:
 
7800
  return DoesNotAccessMemory;
 
7801
case Intrinsic::x86_sse2_psll_q:
 
7802
  return DoesNotAccessMemory;
 
7803
case Intrinsic::x86_sse2_psll_w:
 
7804
  return DoesNotAccessMemory;
 
7805
case Intrinsic::x86_sse2_pslli_d:
 
7806
  return DoesNotAccessMemory;
 
7807
case Intrinsic::x86_sse2_pslli_q:
 
7808
  return DoesNotAccessMemory;
 
7809
case Intrinsic::x86_sse2_pslli_w:
 
7810
  return DoesNotAccessMemory;
 
7811
case Intrinsic::x86_sse2_psra_d:
 
7812
  return DoesNotAccessMemory;
 
7813
case Intrinsic::x86_sse2_psra_w:
 
7814
  return DoesNotAccessMemory;
 
7815
case Intrinsic::x86_sse2_psrai_d:
 
7816
  return DoesNotAccessMemory;
 
7817
case Intrinsic::x86_sse2_psrai_w:
 
7818
  return DoesNotAccessMemory;
 
7819
case Intrinsic::x86_sse2_psrl_d:
 
7820
  return DoesNotAccessMemory;
 
7821
case Intrinsic::x86_sse2_psrl_dq:
 
7822
  return DoesNotAccessMemory;
 
7823
case Intrinsic::x86_sse2_psrl_dq_bs:
 
7824
  return DoesNotAccessMemory;
 
7825
case Intrinsic::x86_sse2_psrl_q:
 
7826
  return DoesNotAccessMemory;
 
7827
case Intrinsic::x86_sse2_psrl_w:
 
7828
  return DoesNotAccessMemory;
 
7829
case Intrinsic::x86_sse2_psrli_d:
 
7830
  return DoesNotAccessMemory;
 
7831
case Intrinsic::x86_sse2_psrli_q:
 
7832
  return DoesNotAccessMemory;
 
7833
case Intrinsic::x86_sse2_psrli_w:
 
7834
  return DoesNotAccessMemory;
 
7835
case Intrinsic::x86_sse2_psubs_b:
 
7836
  return DoesNotAccessMemory;
 
7837
case Intrinsic::x86_sse2_psubs_w:
 
7838
  return DoesNotAccessMemory;
 
7839
case Intrinsic::x86_sse2_psubus_b:
 
7840
  return DoesNotAccessMemory;
 
7841
case Intrinsic::x86_sse2_psubus_w:
 
7842
  return DoesNotAccessMemory;
 
7843
case Intrinsic::x86_sse2_sqrt_pd:
 
7844
  return DoesNotAccessMemory;
 
7845
case Intrinsic::x86_sse2_sqrt_sd:
 
7846
  return DoesNotAccessMemory;
 
7847
case Intrinsic::x86_sse2_sub_sd:
 
7848
  return DoesNotAccessMemory;
 
7849
case Intrinsic::x86_sse2_ucomieq_sd:
 
7850
  return DoesNotAccessMemory;
 
7851
case Intrinsic::x86_sse2_ucomige_sd:
 
7852
  return DoesNotAccessMemory;
 
7853
case Intrinsic::x86_sse2_ucomigt_sd:
 
7854
  return DoesNotAccessMemory;
 
7855
case Intrinsic::x86_sse2_ucomile_sd:
 
7856
  return DoesNotAccessMemory;
 
7857
case Intrinsic::x86_sse2_ucomilt_sd:
 
7858
  return DoesNotAccessMemory;
 
7859
case Intrinsic::x86_sse2_ucomineq_sd:
 
7860
  return DoesNotAccessMemory;
 
7861
case Intrinsic::x86_sse3_addsub_pd:
 
7862
  return DoesNotAccessMemory;
 
7863
case Intrinsic::x86_sse3_addsub_ps:
 
7864
  return DoesNotAccessMemory;
 
7865
case Intrinsic::x86_sse3_hadd_pd:
 
7866
  return DoesNotAccessMemory;
 
7867
case Intrinsic::x86_sse3_hadd_ps:
 
7868
  return DoesNotAccessMemory;
 
7869
case Intrinsic::x86_sse3_hsub_pd:
 
7870
  return DoesNotAccessMemory;
 
7871
case Intrinsic::x86_sse3_hsub_ps:
 
7872
  return DoesNotAccessMemory;
 
7873
case Intrinsic::x86_sse3_ldu_dq:
 
7874
  return OnlyReadsMemory;
 
7875
case Intrinsic::x86_sse41_blendpd:
 
7876
  return DoesNotAccessMemory;
 
7877
case Intrinsic::x86_sse41_blendps:
 
7878
  return DoesNotAccessMemory;
 
7879
case Intrinsic::x86_sse41_blendvpd:
 
7880
  return DoesNotAccessMemory;
 
7881
case Intrinsic::x86_sse41_blendvps:
 
7882
  return DoesNotAccessMemory;
 
7883
case Intrinsic::x86_sse41_dppd:
 
7884
  return DoesNotAccessMemory;
 
7885
case Intrinsic::x86_sse41_dpps:
 
7886
  return DoesNotAccessMemory;
 
7887
case Intrinsic::x86_sse41_extractps:
 
7888
  return DoesNotAccessMemory;
 
7889
case Intrinsic::x86_sse41_insertps:
 
7890
  return DoesNotAccessMemory;
 
7891
case Intrinsic::x86_sse41_movntdqa:
 
7892
  return OnlyReadsMemory;
 
7893
case Intrinsic::x86_sse41_mpsadbw:
 
7894
  return DoesNotAccessMemory;
 
7895
case Intrinsic::x86_sse41_packusdw:
 
7896
  return DoesNotAccessMemory;
 
7897
case Intrinsic::x86_sse41_pblendvb:
 
7898
  return DoesNotAccessMemory;
 
7899
case Intrinsic::x86_sse41_pblendw:
 
7900
  return DoesNotAccessMemory;
 
7901
case Intrinsic::x86_sse41_pcmpeqq:
 
7902
  return DoesNotAccessMemory;
 
7903
case Intrinsic::x86_sse41_pextrb:
 
7904
  return DoesNotAccessMemory;
 
7905
case Intrinsic::x86_sse41_pextrd:
 
7906
  return DoesNotAccessMemory;
 
7907
case Intrinsic::x86_sse41_pextrq:
 
7908
  return DoesNotAccessMemory;
 
7909
case Intrinsic::x86_sse41_phminposuw:
 
7910
  return DoesNotAccessMemory;
 
7911
case Intrinsic::x86_sse41_pmaxsb:
 
7912
  return DoesNotAccessMemory;
 
7913
case Intrinsic::x86_sse41_pmaxsd:
 
7914
  return DoesNotAccessMemory;
 
7915
case Intrinsic::x86_sse41_pmaxud:
 
7916
  return DoesNotAccessMemory;
 
7917
case Intrinsic::x86_sse41_pmaxuw:
 
7918
  return DoesNotAccessMemory;
 
7919
case Intrinsic::x86_sse41_pminsb:
 
7920
  return DoesNotAccessMemory;
 
7921
case Intrinsic::x86_sse41_pminsd:
 
7922
  return DoesNotAccessMemory;
 
7923
case Intrinsic::x86_sse41_pminud:
 
7924
  return DoesNotAccessMemory;
 
7925
case Intrinsic::x86_sse41_pminuw:
 
7926
  return DoesNotAccessMemory;
 
7927
case Intrinsic::x86_sse41_pmovsxbd:
 
7928
  return DoesNotAccessMemory;
 
7929
case Intrinsic::x86_sse41_pmovsxbq:
 
7930
  return DoesNotAccessMemory;
 
7931
case Intrinsic::x86_sse41_pmovsxbw:
 
7932
  return DoesNotAccessMemory;
 
7933
case Intrinsic::x86_sse41_pmovsxdq:
 
7934
  return DoesNotAccessMemory;
 
7935
case Intrinsic::x86_sse41_pmovsxwd:
 
7936
  return DoesNotAccessMemory;
 
7937
case Intrinsic::x86_sse41_pmovsxwq:
 
7938
  return DoesNotAccessMemory;
 
7939
case Intrinsic::x86_sse41_pmovzxbd:
 
7940
  return DoesNotAccessMemory;
 
7941
case Intrinsic::x86_sse41_pmovzxbq:
 
7942
  return DoesNotAccessMemory;
 
7943
case Intrinsic::x86_sse41_pmovzxbw:
 
7944
  return DoesNotAccessMemory;
 
7945
case Intrinsic::x86_sse41_pmovzxdq:
 
7946
  return DoesNotAccessMemory;
 
7947
case Intrinsic::x86_sse41_pmovzxwd:
 
7948
  return DoesNotAccessMemory;
 
7949
case Intrinsic::x86_sse41_pmovzxwq:
 
7950
  return DoesNotAccessMemory;
 
7951
case Intrinsic::x86_sse41_pmuldq:
 
7952
  return DoesNotAccessMemory;
 
7953
case Intrinsic::x86_sse41_pmulld:
 
7954
  return DoesNotAccessMemory;
 
7955
case Intrinsic::x86_sse41_ptestc:
 
7956
  return DoesNotAccessMemory;
 
7957
case Intrinsic::x86_sse41_ptestnzc:
 
7958
  return DoesNotAccessMemory;
 
7959
case Intrinsic::x86_sse41_ptestz:
 
7960
  return DoesNotAccessMemory;
 
7961
case Intrinsic::x86_sse41_round_pd:
 
7962
  return DoesNotAccessMemory;
 
7963
case Intrinsic::x86_sse41_round_ps:
 
7964
  return DoesNotAccessMemory;
 
7965
case Intrinsic::x86_sse41_round_sd:
 
7966
  return DoesNotAccessMemory;
 
7967
case Intrinsic::x86_sse41_round_ss:
 
7968
  return DoesNotAccessMemory;
 
7969
case Intrinsic::x86_sse42_crc32_16:
 
7970
  return DoesNotAccessMemory;
 
7971
case Intrinsic::x86_sse42_crc32_32:
 
7972
  return DoesNotAccessMemory;
 
7973
case Intrinsic::x86_sse42_crc32_64:
 
7974
  return DoesNotAccessMemory;
 
7975
case Intrinsic::x86_sse42_crc32_8:
 
7976
  return DoesNotAccessMemory;
 
7977
case Intrinsic::x86_sse42_pcmpestri128:
 
7978
  return DoesNotAccessMemory;
 
7979
case Intrinsic::x86_sse42_pcmpestria128:
 
7980
  return DoesNotAccessMemory;
 
7981
case Intrinsic::x86_sse42_pcmpestric128:
 
7982
  return DoesNotAccessMemory;
 
7983
case Intrinsic::x86_sse42_pcmpestrio128:
 
7984
  return DoesNotAccessMemory;
 
7985
case Intrinsic::x86_sse42_pcmpestris128:
 
7986
  return DoesNotAccessMemory;
 
7987
case Intrinsic::x86_sse42_pcmpestriz128:
 
7988
  return DoesNotAccessMemory;
 
7989
case Intrinsic::x86_sse42_pcmpestrm128:
 
7990
  return DoesNotAccessMemory;
 
7991
case Intrinsic::x86_sse42_pcmpgtq:
 
7992
  return DoesNotAccessMemory;
 
7993
case Intrinsic::x86_sse42_pcmpistri128:
 
7994
  return DoesNotAccessMemory;
 
7995
case Intrinsic::x86_sse42_pcmpistria128:
 
7996
  return DoesNotAccessMemory;
 
7997
case Intrinsic::x86_sse42_pcmpistric128:
 
7998
  return DoesNotAccessMemory;
 
7999
case Intrinsic::x86_sse42_pcmpistrio128:
 
8000
  return DoesNotAccessMemory;
 
8001
case Intrinsic::x86_sse42_pcmpistris128:
 
8002
  return DoesNotAccessMemory;
 
8003
case Intrinsic::x86_sse42_pcmpistriz128:
 
8004
  return DoesNotAccessMemory;
 
8005
case Intrinsic::x86_sse42_pcmpistrm128:
 
8006
  return DoesNotAccessMemory;
 
8007
case Intrinsic::x86_sse_add_ss:
 
8008
  return DoesNotAccessMemory;
 
8009
case Intrinsic::x86_sse_cmp_ps:
 
8010
  return DoesNotAccessMemory;
 
8011
case Intrinsic::x86_sse_cmp_ss:
 
8012
  return DoesNotAccessMemory;
 
8013
case Intrinsic::x86_sse_comieq_ss:
 
8014
  return DoesNotAccessMemory;
 
8015
case Intrinsic::x86_sse_comige_ss:
 
8016
  return DoesNotAccessMemory;
 
8017
case Intrinsic::x86_sse_comigt_ss:
 
8018
  return DoesNotAccessMemory;
 
8019
case Intrinsic::x86_sse_comile_ss:
 
8020
  return DoesNotAccessMemory;
 
8021
case Intrinsic::x86_sse_comilt_ss:
 
8022
  return DoesNotAccessMemory;
 
8023
case Intrinsic::x86_sse_comineq_ss:
 
8024
  return DoesNotAccessMemory;
 
8025
case Intrinsic::x86_sse_cvtpd2pi:
 
8026
  return DoesNotAccessMemory;
 
8027
case Intrinsic::x86_sse_cvtpi2pd:
 
8028
  return DoesNotAccessMemory;
 
8029
case Intrinsic::x86_sse_cvtpi2ps:
 
8030
  return DoesNotAccessMemory;
 
8031
case Intrinsic::x86_sse_cvtps2pi:
 
8032
  return DoesNotAccessMemory;
 
8033
case Intrinsic::x86_sse_cvtsi2ss:
 
8034
  return DoesNotAccessMemory;
 
8035
case Intrinsic::x86_sse_cvtsi642ss:
 
8036
  return DoesNotAccessMemory;
 
8037
case Intrinsic::x86_sse_cvtss2si:
 
8038
  return DoesNotAccessMemory;
 
8039
case Intrinsic::x86_sse_cvtss2si64:
 
8040
  return DoesNotAccessMemory;
 
8041
case Intrinsic::x86_sse_cvttpd2pi:
 
8042
  return DoesNotAccessMemory;
 
8043
case Intrinsic::x86_sse_cvttps2pi:
 
8044
  return DoesNotAccessMemory;
 
8045
case Intrinsic::x86_sse_cvttss2si:
 
8046
  return DoesNotAccessMemory;
 
8047
case Intrinsic::x86_sse_cvttss2si64:
 
8048
  return DoesNotAccessMemory;
 
8049
case Intrinsic::x86_sse_div_ss:
 
8050
  return DoesNotAccessMemory;
 
8051
case Intrinsic::x86_sse_loadu_ps:
 
8052
  return OnlyReadsMemory;
 
8053
case Intrinsic::x86_sse_max_ps:
 
8054
  return DoesNotAccessMemory;
 
8055
case Intrinsic::x86_sse_max_ss:
 
8056
  return DoesNotAccessMemory;
 
8057
case Intrinsic::x86_sse_min_ps:
 
8058
  return DoesNotAccessMemory;
 
8059
case Intrinsic::x86_sse_min_ss:
 
8060
  return DoesNotAccessMemory;
 
8061
case Intrinsic::x86_sse_movmsk_ps:
 
8062
  return DoesNotAccessMemory;
 
8063
case Intrinsic::x86_sse_mul_ss:
 
8064
  return DoesNotAccessMemory;
 
8065
case Intrinsic::x86_sse_rcp_ps:
 
8066
  return DoesNotAccessMemory;
 
8067
case Intrinsic::x86_sse_rcp_ss:
 
8068
  return DoesNotAccessMemory;
 
8069
case Intrinsic::x86_sse_rsqrt_ps:
 
8070
  return DoesNotAccessMemory;
 
8071
case Intrinsic::x86_sse_rsqrt_ss:
 
8072
  return DoesNotAccessMemory;
 
8073
case Intrinsic::x86_sse_sqrt_ps:
 
8074
  return DoesNotAccessMemory;
 
8075
case Intrinsic::x86_sse_sqrt_ss:
 
8076
  return DoesNotAccessMemory;
 
8077
case Intrinsic::x86_sse_sub_ss:
 
8078
  return DoesNotAccessMemory;
 
8079
case Intrinsic::x86_sse_ucomieq_ss:
 
8080
  return DoesNotAccessMemory;
 
8081
case Intrinsic::x86_sse_ucomige_ss:
 
8082
  return DoesNotAccessMemory;
 
8083
case Intrinsic::x86_sse_ucomigt_ss:
 
8084
  return DoesNotAccessMemory;
 
8085
case Intrinsic::x86_sse_ucomile_ss:
 
8086
  return DoesNotAccessMemory;
 
8087
case Intrinsic::x86_sse_ucomilt_ss:
 
8088
  return DoesNotAccessMemory;
 
8089
case Intrinsic::x86_sse_ucomineq_ss:
 
8090
  return DoesNotAccessMemory;
 
8091
case Intrinsic::x86_ssse3_pabs_b:
 
8092
  return DoesNotAccessMemory;
 
8093
case Intrinsic::x86_ssse3_pabs_b_128:
 
8094
  return DoesNotAccessMemory;
 
8095
case Intrinsic::x86_ssse3_pabs_d:
 
8096
  return DoesNotAccessMemory;
 
8097
case Intrinsic::x86_ssse3_pabs_d_128:
 
8098
  return DoesNotAccessMemory;
 
8099
case Intrinsic::x86_ssse3_pabs_w:
 
8100
  return DoesNotAccessMemory;
 
8101
case Intrinsic::x86_ssse3_pabs_w_128:
 
8102
  return DoesNotAccessMemory;
 
8103
case Intrinsic::x86_ssse3_palign_r:
 
8104
  return DoesNotAccessMemory;
 
8105
case Intrinsic::x86_ssse3_palign_r_128:
 
8106
  return DoesNotAccessMemory;
 
8107
case Intrinsic::x86_ssse3_phadd_d:
 
8108
  return DoesNotAccessMemory;
 
8109
case Intrinsic::x86_ssse3_phadd_d_128:
 
8110
  return DoesNotAccessMemory;
 
8111
case Intrinsic::x86_ssse3_phadd_sw:
 
8112
  return DoesNotAccessMemory;
 
8113
case Intrinsic::x86_ssse3_phadd_sw_128:
 
8114
  return DoesNotAccessMemory;
 
8115
case Intrinsic::x86_ssse3_phadd_w:
 
8116
  return DoesNotAccessMemory;
 
8117
case Intrinsic::x86_ssse3_phadd_w_128:
 
8118
  return DoesNotAccessMemory;
 
8119
case Intrinsic::x86_ssse3_phsub_d:
 
8120
  return DoesNotAccessMemory;
 
8121
case Intrinsic::x86_ssse3_phsub_d_128:
 
8122
  return DoesNotAccessMemory;
 
8123
case Intrinsic::x86_ssse3_phsub_sw:
 
8124
  return DoesNotAccessMemory;
 
8125
case Intrinsic::x86_ssse3_phsub_sw_128:
 
8126
  return DoesNotAccessMemory;
 
8127
case Intrinsic::x86_ssse3_phsub_w:
 
8128
  return DoesNotAccessMemory;
 
8129
case Intrinsic::x86_ssse3_phsub_w_128:
 
8130
  return DoesNotAccessMemory;
 
8131
case Intrinsic::x86_ssse3_pmadd_ub_sw:
 
8132
  return DoesNotAccessMemory;
 
8133
case Intrinsic::x86_ssse3_pmadd_ub_sw_128:
 
8134
  return DoesNotAccessMemory;
 
8135
case Intrinsic::x86_ssse3_pmul_hr_sw:
 
8136
  return DoesNotAccessMemory;
 
8137
case Intrinsic::x86_ssse3_pmul_hr_sw_128:
 
8138
  return DoesNotAccessMemory;
 
8139
case Intrinsic::x86_ssse3_pshuf_b:
 
8140
  return DoesNotAccessMemory;
 
8141
case Intrinsic::x86_ssse3_pshuf_b_128:
 
8142
  return DoesNotAccessMemory;
 
8143
case Intrinsic::x86_ssse3_psign_b:
 
8144
  return DoesNotAccessMemory;
 
8145
case Intrinsic::x86_ssse3_psign_b_128:
 
8146
  return DoesNotAccessMemory;
 
8147
case Intrinsic::x86_ssse3_psign_d:
 
8148
  return DoesNotAccessMemory;
 
8149
case Intrinsic::x86_ssse3_psign_d_128:
 
8150
  return DoesNotAccessMemory;
 
8151
case Intrinsic::x86_ssse3_psign_w:
 
8152
  return DoesNotAccessMemory;
 
8153
case Intrinsic::x86_ssse3_psign_w_128:
 
8154
  return DoesNotAccessMemory;
 
8155
case Intrinsic::xcore_bitrev:
 
8156
  return DoesNotAccessMemory;
 
8157
case Intrinsic::xcore_getid:
 
8158
  return DoesNotAccessMemory;
 
8159
}
 
8160
#endif // GET_INTRINSIC_MODREF_BEHAVIOR
 
8161
 
 
8162
// Get the GCC builtin that corresponds to an LLVM intrinsic.
 
8163
#ifdef GET_GCC_BUILTIN_NAME
 
8164
  switch (F->getIntrinsicID()) {
 
8165
  default: BuiltinName = ""; break;
 
8166
  case Intrinsic::alpha_umulh: BuiltinName = "__builtin_alpha_umulh"; break;
 
8167
  case Intrinsic::arm_thread_pointer: BuiltinName = "__builtin_thread_pointer"; break;
 
8168
  case Intrinsic::atomic_cmp_swap: BuiltinName = "__sync_val_compare_and_swap"; break;
 
8169
  case Intrinsic::atomic_load_add: BuiltinName = "__sync_fetch_and_add"; break;
 
8170
  case Intrinsic::atomic_load_and: BuiltinName = "__sync_fetch_and_and"; break;
 
8171
  case Intrinsic::atomic_load_max: BuiltinName = "__sync_fetch_and_max"; break;
 
8172
  case Intrinsic::atomic_load_min: BuiltinName = "__sync_fetch_and_min"; break;
 
8173
  case Intrinsic::atomic_load_nand: BuiltinName = "__sync_fetch_and_nand"; break;
 
8174
  case Intrinsic::atomic_load_or: BuiltinName = "__sync_fetch_and_or"; break;
 
8175
  case Intrinsic::atomic_load_sub: BuiltinName = "__sync_fetch_and_sub"; break;
 
8176
  case Intrinsic::atomic_load_umax: BuiltinName = "__sync_fetch_and_umax"; break;
 
8177
  case Intrinsic::atomic_load_umin: BuiltinName = "__sync_fetch_and_umin"; break;
 
8178
  case Intrinsic::atomic_load_xor: BuiltinName = "__sync_fetch_and_xor"; break;
 
8179
  case Intrinsic::atomic_swap: BuiltinName = "__sync_lock_test_and_set"; break;
 
8180
  case Intrinsic::eh_unwind_init: BuiltinName = "__builtin_unwind_init"; break;
 
8181
  case Intrinsic::flt_rounds: BuiltinName = "__builtin_flt_rounds"; break;
 
8182
  case Intrinsic::init_trampoline: BuiltinName = "__builtin_init_trampoline"; break;
 
8183
  case Intrinsic::memory_barrier: BuiltinName = "__builtin_llvm_memory_barrier"; break;
 
8184
  case Intrinsic::objectsize: BuiltinName = "__builtin_object_size"; break;
 
8185
  case Intrinsic::ppc_altivec_dss: BuiltinName = "__builtin_altivec_dss"; break;
 
8186
  case Intrinsic::ppc_altivec_dssall: BuiltinName = "__builtin_altivec_dssall"; break;
 
8187
  case Intrinsic::ppc_altivec_dst: BuiltinName = "__builtin_altivec_dst"; break;
 
8188
  case Intrinsic::ppc_altivec_dstst: BuiltinName = "__builtin_altivec_dstst"; break;
 
8189
  case Intrinsic::ppc_altivec_dststt: BuiltinName = "__builtin_altivec_dststt"; break;
 
8190
  case Intrinsic::ppc_altivec_dstt: BuiltinName = "__builtin_altivec_dstt"; break;
 
8191
  case Intrinsic::ppc_altivec_mfvscr: BuiltinName = "__builtin_altivec_mfvscr"; break;
 
8192
  case Intrinsic::ppc_altivec_mtvscr: BuiltinName = "__builtin_altivec_mtvscr"; break;
 
8193
  case Intrinsic::ppc_altivec_vaddcuw: BuiltinName = "__builtin_altivec_vaddcuw"; break;
 
8194
  case Intrinsic::ppc_altivec_vaddsbs: BuiltinName = "__builtin_altivec_vaddsbs"; break;
 
8195
  case Intrinsic::ppc_altivec_vaddshs: BuiltinName = "__builtin_altivec_vaddshs"; break;
 
8196
  case Intrinsic::ppc_altivec_vaddsws: BuiltinName = "__builtin_altivec_vaddsws"; break;
 
8197
  case Intrinsic::ppc_altivec_vaddubs: BuiltinName = "__builtin_altivec_vaddubs"; break;
 
8198
  case Intrinsic::ppc_altivec_vadduhs: BuiltinName = "__builtin_altivec_vadduhs"; break;
 
8199
  case Intrinsic::ppc_altivec_vadduws: BuiltinName = "__builtin_altivec_vadduws"; break;
 
8200
  case Intrinsic::ppc_altivec_vavgsb: BuiltinName = "__builtin_altivec_vavgsb"; break;
 
8201
  case Intrinsic::ppc_altivec_vavgsh: BuiltinName = "__builtin_altivec_vavgsh"; break;
 
8202
  case Intrinsic::ppc_altivec_vavgsw: BuiltinName = "__builtin_altivec_vavgsw"; break;
 
8203
  case Intrinsic::ppc_altivec_vavgub: BuiltinName = "__builtin_altivec_vavgub"; break;
 
8204
  case Intrinsic::ppc_altivec_vavguh: BuiltinName = "__builtin_altivec_vavguh"; break;
 
8205
  case Intrinsic::ppc_altivec_vavguw: BuiltinName = "__builtin_altivec_vavguw"; break;
 
8206
  case Intrinsic::ppc_altivec_vcfsx: BuiltinName = "__builtin_altivec_vcfsx"; break;
 
8207
  case Intrinsic::ppc_altivec_vcfux: BuiltinName = "__builtin_altivec_vcfux"; break;
 
8208
  case Intrinsic::ppc_altivec_vcmpbfp: BuiltinName = "__builtin_altivec_vcmpbfp"; break;
 
8209
  case Intrinsic::ppc_altivec_vcmpbfp_p: BuiltinName = "__builtin_altivec_vcmpbfp_p"; break;
 
8210
  case Intrinsic::ppc_altivec_vcmpeqfp: BuiltinName = "__builtin_altivec_vcmpeqfp"; break;
 
8211
  case Intrinsic::ppc_altivec_vcmpeqfp_p: BuiltinName = "__builtin_altivec_vcmpeqfp_p"; break;
 
8212
  case Intrinsic::ppc_altivec_vcmpequb: BuiltinName = "__builtin_altivec_vcmpequb"; break;
 
8213
  case Intrinsic::ppc_altivec_vcmpequb_p: BuiltinName = "__builtin_altivec_vcmpequb_p"; break;
 
8214
  case Intrinsic::ppc_altivec_vcmpequh: BuiltinName = "__builtin_altivec_vcmpequh"; break;
 
8215
  case Intrinsic::ppc_altivec_vcmpequh_p: BuiltinName = "__builtin_altivec_vcmpequh_p"; break;
 
8216
  case Intrinsic::ppc_altivec_vcmpequw: BuiltinName = "__builtin_altivec_vcmpequw"; break;
 
8217
  case Intrinsic::ppc_altivec_vcmpequw_p: BuiltinName = "__builtin_altivec_vcmpequw_p"; break;
 
8218
  case Intrinsic::ppc_altivec_vcmpgefp: BuiltinName = "__builtin_altivec_vcmpgefp"; break;
 
8219
  case Intrinsic::ppc_altivec_vcmpgefp_p: BuiltinName = "__builtin_altivec_vcmpgefp_p"; break;
 
8220
  case Intrinsic::ppc_altivec_vcmpgtfp: BuiltinName = "__builtin_altivec_vcmpgtfp"; break;
 
8221
  case Intrinsic::ppc_altivec_vcmpgtfp_p: BuiltinName = "__builtin_altivec_vcmpgtfp_p"; break;
 
8222
  case Intrinsic::ppc_altivec_vcmpgtsb: BuiltinName = "__builtin_altivec_vcmpgtsb"; break;
 
8223
  case Intrinsic::ppc_altivec_vcmpgtsb_p: BuiltinName = "__builtin_altivec_vcmpgtsb_p"; break;
 
8224
  case Intrinsic::ppc_altivec_vcmpgtsh: BuiltinName = "__builtin_altivec_vcmpgtsh"; break;
 
8225
  case Intrinsic::ppc_altivec_vcmpgtsh_p: BuiltinName = "__builtin_altivec_vcmpgtsh_p"; break;
 
8226
  case Intrinsic::ppc_altivec_vcmpgtsw: BuiltinName = "__builtin_altivec_vcmpgtsw"; break;
 
8227
  case Intrinsic::ppc_altivec_vcmpgtsw_p: BuiltinName = "__builtin_altivec_vcmpgtsw_p"; break;
 
8228
  case Intrinsic::ppc_altivec_vcmpgtub: BuiltinName = "__builtin_altivec_vcmpgtub"; break;
 
8229
  case Intrinsic::ppc_altivec_vcmpgtub_p: BuiltinName = "__builtin_altivec_vcmpgtub_p"; break;
 
8230
  case Intrinsic::ppc_altivec_vcmpgtuh: BuiltinName = "__builtin_altivec_vcmpgtuh"; break;
 
8231
  case Intrinsic::ppc_altivec_vcmpgtuh_p: BuiltinName = "__builtin_altivec_vcmpgtuh_p"; break;
 
8232
  case Intrinsic::ppc_altivec_vcmpgtuw: BuiltinName = "__builtin_altivec_vcmpgtuw"; break;
 
8233
  case Intrinsic::ppc_altivec_vcmpgtuw_p: BuiltinName = "__builtin_altivec_vcmpgtuw_p"; break;
 
8234
  case Intrinsic::ppc_altivec_vctsxs: BuiltinName = "__builtin_altivec_vctsxs"; break;
 
8235
  case Intrinsic::ppc_altivec_vctuxs: BuiltinName = "__builtin_altivec_vctuxs"; break;
 
8236
  case Intrinsic::ppc_altivec_vexptefp: BuiltinName = "__builtin_altivec_vexptefp"; break;
 
8237
  case Intrinsic::ppc_altivec_vlogefp: BuiltinName = "__builtin_altivec_vlogefp"; break;
 
8238
  case Intrinsic::ppc_altivec_vmaddfp: BuiltinName = "__builtin_altivec_vmaddfp"; break;
 
8239
  case Intrinsic::ppc_altivec_vmaxfp: BuiltinName = "__builtin_altivec_vmaxfp"; break;
 
8240
  case Intrinsic::ppc_altivec_vmaxsb: BuiltinName = "__builtin_altivec_vmaxsb"; break;
 
8241
  case Intrinsic::ppc_altivec_vmaxsh: BuiltinName = "__builtin_altivec_vmaxsh"; break;
 
8242
  case Intrinsic::ppc_altivec_vmaxsw: BuiltinName = "__builtin_altivec_vmaxsw"; break;
 
8243
  case Intrinsic::ppc_altivec_vmaxub: BuiltinName = "__builtin_altivec_vmaxub"; break;
 
8244
  case Intrinsic::ppc_altivec_vmaxuh: BuiltinName = "__builtin_altivec_vmaxuh"; break;
 
8245
  case Intrinsic::ppc_altivec_vmaxuw: BuiltinName = "__builtin_altivec_vmaxuw"; break;
 
8246
  case Intrinsic::ppc_altivec_vmhaddshs: BuiltinName = "__builtin_altivec_vmhaddshs"; break;
 
8247
  case Intrinsic::ppc_altivec_vmhraddshs: BuiltinName = "__builtin_altivec_vmhraddshs"; break;
 
8248
  case Intrinsic::ppc_altivec_vminfp: BuiltinName = "__builtin_altivec_vminfp"; break;
 
8249
  case Intrinsic::ppc_altivec_vminsb: BuiltinName = "__builtin_altivec_vminsb"; break;
 
8250
  case Intrinsic::ppc_altivec_vminsh: BuiltinName = "__builtin_altivec_vminsh"; break;
 
8251
  case Intrinsic::ppc_altivec_vminsw: BuiltinName = "__builtin_altivec_vminsw"; break;
 
8252
  case Intrinsic::ppc_altivec_vminub: BuiltinName = "__builtin_altivec_vminub"; break;
 
8253
  case Intrinsic::ppc_altivec_vminuh: BuiltinName = "__builtin_altivec_vminuh"; break;
 
8254
  case Intrinsic::ppc_altivec_vminuw: BuiltinName = "__builtin_altivec_vminuw"; break;
 
8255
  case Intrinsic::ppc_altivec_vmladduhm: BuiltinName = "__builtin_altivec_vmladduhm"; break;
 
8256
  case Intrinsic::ppc_altivec_vmsummbm: BuiltinName = "__builtin_altivec_vmsummbm"; break;
 
8257
  case Intrinsic::ppc_altivec_vmsumshm: BuiltinName = "__builtin_altivec_vmsumshm"; break;
 
8258
  case Intrinsic::ppc_altivec_vmsumshs: BuiltinName = "__builtin_altivec_vmsumshs"; break;
 
8259
  case Intrinsic::ppc_altivec_vmsumubm: BuiltinName = "__builtin_altivec_vmsumubm"; break;
 
8260
  case Intrinsic::ppc_altivec_vmsumuhm: BuiltinName = "__builtin_altivec_vmsumuhm"; break;
 
8261
  case Intrinsic::ppc_altivec_vmsumuhs: BuiltinName = "__builtin_altivec_vmsumuhs"; break;
 
8262
  case Intrinsic::ppc_altivec_vmulesb: BuiltinName = "__builtin_altivec_vmulesb"; break;
 
8263
  case Intrinsic::ppc_altivec_vmulesh: BuiltinName = "__builtin_altivec_vmulesh"; break;
 
8264
  case Intrinsic::ppc_altivec_vmuleub: BuiltinName = "__builtin_altivec_vmuleub"; break;
 
8265
  case Intrinsic::ppc_altivec_vmuleuh: BuiltinName = "__builtin_altivec_vmuleuh"; break;
 
8266
  case Intrinsic::ppc_altivec_vmulosb: BuiltinName = "__builtin_altivec_vmulosb"; break;
 
8267
  case Intrinsic::ppc_altivec_vmulosh: BuiltinName = "__builtin_altivec_vmulosh"; break;
 
8268
  case Intrinsic::ppc_altivec_vmuloub: BuiltinName = "__builtin_altivec_vmuloub"; break;
 
8269
  case Intrinsic::ppc_altivec_vmulouh: BuiltinName = "__builtin_altivec_vmulouh"; break;
 
8270
  case Intrinsic::ppc_altivec_vnmsubfp: BuiltinName = "__builtin_altivec_vnmsubfp"; break;
 
8271
  case Intrinsic::ppc_altivec_vperm: BuiltinName = "__builtin_altivec_vperm_4si"; break;
 
8272
  case Intrinsic::ppc_altivec_vpkpx: BuiltinName = "__builtin_altivec_vpkpx"; break;
 
8273
  case Intrinsic::ppc_altivec_vpkshss: BuiltinName = "__builtin_altivec_vpkshss"; break;
 
8274
  case Intrinsic::ppc_altivec_vpkshus: BuiltinName = "__builtin_altivec_vpkshus"; break;
 
8275
  case Intrinsic::ppc_altivec_vpkswss: BuiltinName = "__builtin_altivec_vpkswss"; break;
 
8276
  case Intrinsic::ppc_altivec_vpkswus: BuiltinName = "__builtin_altivec_vpkswus"; break;
 
8277
  case Intrinsic::ppc_altivec_vpkuhus: BuiltinName = "__builtin_altivec_vpkuhus"; break;
 
8278
  case Intrinsic::ppc_altivec_vpkuwus: BuiltinName = "__builtin_altivec_vpkuwus"; break;
 
8279
  case Intrinsic::ppc_altivec_vrefp: BuiltinName = "__builtin_altivec_vrefp"; break;
 
8280
  case Intrinsic::ppc_altivec_vrfim: BuiltinName = "__builtin_altivec_vrfim"; break;
 
8281
  case Intrinsic::ppc_altivec_vrfin: BuiltinName = "__builtin_altivec_vrfin"; break;
 
8282
  case Intrinsic::ppc_altivec_vrfip: BuiltinName = "__builtin_altivec_vrfip"; break;
 
8283
  case Intrinsic::ppc_altivec_vrfiz: BuiltinName = "__builtin_altivec_vrfiz"; break;
 
8284
  case Intrinsic::ppc_altivec_vrlb: BuiltinName = "__builtin_altivec_vrlb"; break;
 
8285
  case Intrinsic::ppc_altivec_vrlh: BuiltinName = "__builtin_altivec_vrlh"; break;
 
8286
  case Intrinsic::ppc_altivec_vrlw: BuiltinName = "__builtin_altivec_vrlw"; break;
 
8287
  case Intrinsic::ppc_altivec_vrsqrtefp: BuiltinName = "__builtin_altivec_vrsqrtefp"; break;
 
8288
  case Intrinsic::ppc_altivec_vsel: BuiltinName = "__builtin_altivec_vsel_4si"; break;
 
8289
  case Intrinsic::ppc_altivec_vsl: BuiltinName = "__builtin_altivec_vsl"; break;
 
8290
  case Intrinsic::ppc_altivec_vslb: BuiltinName = "__builtin_altivec_vslb"; break;
 
8291
  case Intrinsic::ppc_altivec_vslh: BuiltinName = "__builtin_altivec_vslh"; break;
 
8292
  case Intrinsic::ppc_altivec_vslo: BuiltinName = "__builtin_altivec_vslo"; break;
 
8293
  case Intrinsic::ppc_altivec_vslw: BuiltinName = "__builtin_altivec_vslw"; break;
 
8294
  case Intrinsic::ppc_altivec_vsr: BuiltinName = "__builtin_altivec_vsr"; break;
 
8295
  case Intrinsic::ppc_altivec_vsrab: BuiltinName = "__builtin_altivec_vsrab"; break;
 
8296
  case Intrinsic::ppc_altivec_vsrah: BuiltinName = "__builtin_altivec_vsrah"; break;
 
8297
  case Intrinsic::ppc_altivec_vsraw: BuiltinName = "__builtin_altivec_vsraw"; break;
 
8298
  case Intrinsic::ppc_altivec_vsrb: BuiltinName = "__builtin_altivec_vsrb"; break;
 
8299
  case Intrinsic::ppc_altivec_vsrh: BuiltinName = "__builtin_altivec_vsrh"; break;
 
8300
  case Intrinsic::ppc_altivec_vsro: BuiltinName = "__builtin_altivec_vsro"; break;
 
8301
  case Intrinsic::ppc_altivec_vsrw: BuiltinName = "__builtin_altivec_vsrw"; break;
 
8302
  case Intrinsic::ppc_altivec_vsubcuw: BuiltinName = "__builtin_altivec_vsubcuw"; break;
 
8303
  case Intrinsic::ppc_altivec_vsubsbs: BuiltinName = "__builtin_altivec_vsubsbs"; break;
 
8304
  case Intrinsic::ppc_altivec_vsubshs: BuiltinName = "__builtin_altivec_vsubshs"; break;
 
8305
  case Intrinsic::ppc_altivec_vsubsws: BuiltinName = "__builtin_altivec_vsubsws"; break;
 
8306
  case Intrinsic::ppc_altivec_vsububs: BuiltinName = "__builtin_altivec_vsububs"; break;
 
8307
  case Intrinsic::ppc_altivec_vsubuhs: BuiltinName = "__builtin_altivec_vsubuhs"; break;
 
8308
  case Intrinsic::ppc_altivec_vsubuws: BuiltinName = "__builtin_altivec_vsubuws"; break;
 
8309
  case Intrinsic::ppc_altivec_vsum2sws: BuiltinName = "__builtin_altivec_vsum2sws"; break;
 
8310
  case Intrinsic::ppc_altivec_vsum4sbs: BuiltinName = "__builtin_altivec_vsum4sbs"; break;
 
8311
  case Intrinsic::ppc_altivec_vsum4shs: BuiltinName = "__builtin_altivec_vsum4shs"; break;
 
8312
  case Intrinsic::ppc_altivec_vsum4ubs: BuiltinName = "__builtin_altivec_vsum4ubs"; break;
 
8313
  case Intrinsic::ppc_altivec_vsumsws: BuiltinName = "__builtin_altivec_vsumsws"; break;
 
8314
  case Intrinsic::ppc_altivec_vupkhpx: BuiltinName = "__builtin_altivec_vupkhpx"; break;
 
8315
  case Intrinsic::ppc_altivec_vupkhsb: BuiltinName = "__builtin_altivec_vupkhsb"; break;
 
8316
  case Intrinsic::ppc_altivec_vupkhsh: BuiltinName = "__builtin_altivec_vupkhsh"; break;
 
8317
  case Intrinsic::ppc_altivec_vupklpx: BuiltinName = "__builtin_altivec_vupklpx"; break;
 
8318
  case Intrinsic::ppc_altivec_vupklsb: BuiltinName = "__builtin_altivec_vupklsb"; break;
 
8319
  case Intrinsic::ppc_altivec_vupklsh: BuiltinName = "__builtin_altivec_vupklsh"; break;
 
8320
  case Intrinsic::spu_si_a: BuiltinName = "__builtin_si_a"; break;
 
8321
  case Intrinsic::spu_si_addx: BuiltinName = "__builtin_si_addx"; break;
 
8322
  case Intrinsic::spu_si_ah: BuiltinName = "__builtin_si_ah"; break;
 
8323
  case Intrinsic::spu_si_ahi: BuiltinName = "__builtin_si_ahi"; break;
 
8324
  case Intrinsic::spu_si_ai: BuiltinName = "__builtin_si_ai"; break;
 
8325
  case Intrinsic::spu_si_and: BuiltinName = "__builtin_si_and"; break;
 
8326
  case Intrinsic::spu_si_andbi: BuiltinName = "__builtin_si_andbi"; break;
 
8327
  case Intrinsic::spu_si_andc: BuiltinName = "__builtin_si_andc"; break;
 
8328
  case Intrinsic::spu_si_andhi: BuiltinName = "__builtin_si_andhi"; break;
 
8329
  case Intrinsic::spu_si_andi: BuiltinName = "__builtin_si_andi"; break;
 
8330
  case Intrinsic::spu_si_bg: BuiltinName = "__builtin_si_bg"; break;
 
8331
  case Intrinsic::spu_si_bgx: BuiltinName = "__builtin_si_bgx"; break;
 
8332
  case Intrinsic::spu_si_ceq: BuiltinName = "__builtin_si_ceq"; break;
 
8333
  case Intrinsic::spu_si_ceqb: BuiltinName = "__builtin_si_ceqb"; break;
 
8334
  case Intrinsic::spu_si_ceqbi: BuiltinName = "__builtin_si_ceqbi"; break;
 
8335
  case Intrinsic::spu_si_ceqh: BuiltinName = "__builtin_si_ceqh"; break;
 
8336
  case Intrinsic::spu_si_ceqhi: BuiltinName = "__builtin_si_ceqhi"; break;
 
8337
  case Intrinsic::spu_si_ceqi: BuiltinName = "__builtin_si_ceqi"; break;
 
8338
  case Intrinsic::spu_si_cg: BuiltinName = "__builtin_si_cg"; break;
 
8339
  case Intrinsic::spu_si_cgt: BuiltinName = "__builtin_si_cgt"; break;
 
8340
  case Intrinsic::spu_si_cgtb: BuiltinName = "__builtin_si_cgtb"; break;
 
8341
  case Intrinsic::spu_si_cgtbi: BuiltinName = "__builtin_si_cgtbi"; break;
 
8342
  case Intrinsic::spu_si_cgth: BuiltinName = "__builtin_si_cgth"; break;
 
8343
  case Intrinsic::spu_si_cgthi: BuiltinName = "__builtin_si_cgthi"; break;
 
8344
  case Intrinsic::spu_si_cgti: BuiltinName = "__builtin_si_cgti"; break;
 
8345
  case Intrinsic::spu_si_cgx: BuiltinName = "__builtin_si_cgx"; break;
 
8346
  case Intrinsic::spu_si_clgt: BuiltinName = "__builtin_si_clgt"; break;
 
8347
  case Intrinsic::spu_si_clgtb: BuiltinName = "__builtin_si_clgtb"; break;
 
8348
  case Intrinsic::spu_si_clgtbi: BuiltinName = "__builtin_si_clgtbi"; break;
 
8349
  case Intrinsic::spu_si_clgth: BuiltinName = "__builtin_si_clgth"; break;
 
8350
  case Intrinsic::spu_si_clgthi: BuiltinName = "__builtin_si_clgthi"; break;
 
8351
  case Intrinsic::spu_si_clgti: BuiltinName = "__builtin_si_clgti"; break;
 
8352
  case Intrinsic::spu_si_dfa: BuiltinName = "__builtin_si_dfa"; break;
 
8353
  case Intrinsic::spu_si_dfm: BuiltinName = "__builtin_si_dfm"; break;
 
8354
  case Intrinsic::spu_si_dfma: BuiltinName = "__builtin_si_dfma"; break;
 
8355
  case Intrinsic::spu_si_dfms: BuiltinName = "__builtin_si_dfms"; break;
 
8356
  case Intrinsic::spu_si_dfnma: BuiltinName = "__builtin_si_dfnma"; break;
 
8357
  case Intrinsic::spu_si_dfnms: BuiltinName = "__builtin_si_dfnms"; break;
 
8358
  case Intrinsic::spu_si_dfs: BuiltinName = "__builtin_si_dfs"; break;
 
8359
  case Intrinsic::spu_si_fa: BuiltinName = "__builtin_si_fa"; break;
 
8360
  case Intrinsic::spu_si_fceq: BuiltinName = "__builtin_si_fceq"; break;
 
8361
  case Intrinsic::spu_si_fcgt: BuiltinName = "__builtin_si_fcgt"; break;
 
8362
  case Intrinsic::spu_si_fcmeq: BuiltinName = "__builtin_si_fcmeq"; break;
 
8363
  case Intrinsic::spu_si_fcmgt: BuiltinName = "__builtin_si_fcmgt"; break;
 
8364
  case Intrinsic::spu_si_fm: BuiltinName = "__builtin_si_fm"; break;
 
8365
  case Intrinsic::spu_si_fma: BuiltinName = "__builtin_si_fma"; break;
 
8366
  case Intrinsic::spu_si_fms: BuiltinName = "__builtin_si_fms"; break;
 
8367
  case Intrinsic::spu_si_fnms: BuiltinName = "__builtin_si_fnms"; break;
 
8368
  case Intrinsic::spu_si_fs: BuiltinName = "__builtin_si_fs"; break;
 
8369
  case Intrinsic::spu_si_fsmbi: BuiltinName = "__builtin_si_fsmbi"; break;
 
8370
  case Intrinsic::spu_si_mpy: BuiltinName = "__builtin_si_mpy"; break;
 
8371
  case Intrinsic::spu_si_mpya: BuiltinName = "__builtin_si_mpya"; break;
 
8372
  case Intrinsic::spu_si_mpyh: BuiltinName = "__builtin_si_mpyh"; break;
 
8373
  case Intrinsic::spu_si_mpyhh: BuiltinName = "__builtin_si_mpyhh"; break;
 
8374
  case Intrinsic::spu_si_mpyhha: BuiltinName = "__builtin_si_mpyhha"; break;
 
8375
  case Intrinsic::spu_si_mpyhhau: BuiltinName = "__builtin_si_mpyhhau"; break;
 
8376
  case Intrinsic::spu_si_mpyhhu: BuiltinName = "__builtin_si_mpyhhu"; break;
 
8377
  case Intrinsic::spu_si_mpyi: BuiltinName = "__builtin_si_mpyi"; break;
 
8378
  case Intrinsic::spu_si_mpys: BuiltinName = "__builtin_si_mpys"; break;
 
8379
  case Intrinsic::spu_si_mpyu: BuiltinName = "__builtin_si_mpyu"; break;
 
8380
  case Intrinsic::spu_si_mpyui: BuiltinName = "__builtin_si_mpyui"; break;
 
8381
  case Intrinsic::spu_si_nand: BuiltinName = "__builtin_si_nand"; break;
 
8382
  case Intrinsic::spu_si_nor: BuiltinName = "__builtin_si_nor"; break;
 
8383
  case Intrinsic::spu_si_or: BuiltinName = "__builtin_si_or"; break;
 
8384
  case Intrinsic::spu_si_orbi: BuiltinName = "__builtin_si_orbi"; break;
 
8385
  case Intrinsic::spu_si_orc: BuiltinName = "__builtin_si_orc"; break;
 
8386
  case Intrinsic::spu_si_orhi: BuiltinName = "__builtin_si_orhi"; break;
 
8387
  case Intrinsic::spu_si_ori: BuiltinName = "__builtin_si_ori"; break;
 
8388
  case Intrinsic::spu_si_sf: BuiltinName = "__builtin_si_sf"; break;
 
8389
  case Intrinsic::spu_si_sfh: BuiltinName = "__builtin_si_sfh"; break;
 
8390
  case Intrinsic::spu_si_sfhi: BuiltinName = "__builtin_si_sfhi"; break;
 
8391
  case Intrinsic::spu_si_sfi: BuiltinName = "__builtin_si_sfi"; break;
 
8392
  case Intrinsic::spu_si_sfx: BuiltinName = "__builtin_si_sfx"; break;
 
8393
  case Intrinsic::spu_si_shli: BuiltinName = "__builtin_si_shli"; break;
 
8394
  case Intrinsic::spu_si_shlqbi: BuiltinName = "__builtin_si_shlqbi"; break;
 
8395
  case Intrinsic::spu_si_shlqbii: BuiltinName = "__builtin_si_shlqbii"; break;
 
8396
  case Intrinsic::spu_si_shlqby: BuiltinName = "__builtin_si_shlqby"; break;
 
8397
  case Intrinsic::spu_si_shlqbyi: BuiltinName = "__builtin_si_shlqbyi"; break;
 
8398
  case Intrinsic::spu_si_xor: BuiltinName = "__builtin_si_xor"; break;
 
8399
  case Intrinsic::spu_si_xorbi: BuiltinName = "__builtin_si_xorbi"; break;
 
8400
  case Intrinsic::spu_si_xorhi: BuiltinName = "__builtin_si_xorhi"; break;
 
8401
  case Intrinsic::spu_si_xori: BuiltinName = "__builtin_si_xori"; break;
 
8402
  case Intrinsic::stackrestore: BuiltinName = "__builtin_stack_restore"; break;
 
8403
  case Intrinsic::stacksave: BuiltinName = "__builtin_stack_save"; break;
 
8404
  case Intrinsic::trap: BuiltinName = "__builtin_trap"; break;
 
8405
  case Intrinsic::x86_mmx_emms: BuiltinName = "__builtin_ia32_emms"; break;
 
8406
  case Intrinsic::x86_mmx_femms: BuiltinName = "__builtin_ia32_femms"; break;
 
8407
  case Intrinsic::x86_mmx_maskmovq: BuiltinName = "__builtin_ia32_maskmovq"; break;
 
8408
  case Intrinsic::x86_mmx_movnt_dq: BuiltinName = "__builtin_ia32_movntq"; break;
 
8409
  case Intrinsic::x86_mmx_packssdw: BuiltinName = "__builtin_ia32_packssdw"; break;
 
8410
  case Intrinsic::x86_mmx_packsswb: BuiltinName = "__builtin_ia32_packsswb"; break;
 
8411
  case Intrinsic::x86_mmx_packuswb: BuiltinName = "__builtin_ia32_packuswb"; break;
 
8412
  case Intrinsic::x86_mmx_padds_b: BuiltinName = "__builtin_ia32_paddsb"; break;
 
8413
  case Intrinsic::x86_mmx_padds_w: BuiltinName = "__builtin_ia32_paddsw"; break;
 
8414
  case Intrinsic::x86_mmx_paddus_b: BuiltinName = "__builtin_ia32_paddusb"; break;
 
8415
  case Intrinsic::x86_mmx_paddus_w: BuiltinName = "__builtin_ia32_paddusw"; break;
 
8416
  case Intrinsic::x86_mmx_pavg_b: BuiltinName = "__builtin_ia32_pavgb"; break;
 
8417
  case Intrinsic::x86_mmx_pavg_w: BuiltinName = "__builtin_ia32_pavgw"; break;
 
8418
  case Intrinsic::x86_mmx_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb"; break;
 
8419
  case Intrinsic::x86_mmx_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd"; break;
 
8420
  case Intrinsic::x86_mmx_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw"; break;
 
8421
  case Intrinsic::x86_mmx_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb"; break;
 
8422
  case Intrinsic::x86_mmx_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd"; break;
 
8423
  case Intrinsic::x86_mmx_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw"; break;
 
8424
  case Intrinsic::x86_mmx_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd"; break;
 
8425
  case Intrinsic::x86_mmx_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw"; break;
 
8426
  case Intrinsic::x86_mmx_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub"; break;
 
8427
  case Intrinsic::x86_mmx_pmins_w: BuiltinName = "__builtin_ia32_pminsw"; break;
 
8428
  case Intrinsic::x86_mmx_pminu_b: BuiltinName = "__builtin_ia32_pminub"; break;
 
8429
  case Intrinsic::x86_mmx_pmovmskb: BuiltinName = "__builtin_ia32_pmovmskb"; break;
 
8430
  case Intrinsic::x86_mmx_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw"; break;
 
8431
  case Intrinsic::x86_mmx_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw"; break;
 
8432
  case Intrinsic::x86_mmx_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq"; break;
 
8433
  case Intrinsic::x86_mmx_psad_bw: BuiltinName = "__builtin_ia32_psadbw"; break;
 
8434
  case Intrinsic::x86_mmx_psll_d: BuiltinName = "__builtin_ia32_pslld"; break;
 
8435
  case Intrinsic::x86_mmx_psll_q: BuiltinName = "__builtin_ia32_psllq"; break;
 
8436
  case Intrinsic::x86_mmx_psll_w: BuiltinName = "__builtin_ia32_psllw"; break;
 
8437
  case Intrinsic::x86_mmx_pslli_d: BuiltinName = "__builtin_ia32_pslldi"; break;
 
8438
  case Intrinsic::x86_mmx_pslli_q: BuiltinName = "__builtin_ia32_psllqi"; break;
 
8439
  case Intrinsic::x86_mmx_pslli_w: BuiltinName = "__builtin_ia32_psllwi"; break;
 
8440
  case Intrinsic::x86_mmx_psra_d: BuiltinName = "__builtin_ia32_psrad"; break;
 
8441
  case Intrinsic::x86_mmx_psra_w: BuiltinName = "__builtin_ia32_psraw"; break;
 
8442
  case Intrinsic::x86_mmx_psrai_d: BuiltinName = "__builtin_ia32_psradi"; break;
 
8443
  case Intrinsic::x86_mmx_psrai_w: BuiltinName = "__builtin_ia32_psrawi"; break;
 
8444
  case Intrinsic::x86_mmx_psrl_d: BuiltinName = "__builtin_ia32_psrld"; break;
 
8445
  case Intrinsic::x86_mmx_psrl_q: BuiltinName = "__builtin_ia32_psrlq"; break;
 
8446
  case Intrinsic::x86_mmx_psrl_w: BuiltinName = "__builtin_ia32_psrlw"; break;
 
8447
  case Intrinsic::x86_mmx_psrli_d: BuiltinName = "__builtin_ia32_psrldi"; break;
 
8448
  case Intrinsic::x86_mmx_psrli_q: BuiltinName = "__builtin_ia32_psrlqi"; break;
 
8449
  case Intrinsic::x86_mmx_psrli_w: BuiltinName = "__builtin_ia32_psrlwi"; break;
 
8450
  case Intrinsic::x86_mmx_psubs_b: BuiltinName = "__builtin_ia32_psubsb"; break;
 
8451
  case Intrinsic::x86_mmx_psubs_w: BuiltinName = "__builtin_ia32_psubsw"; break;
 
8452
  case Intrinsic::x86_mmx_psubus_b: BuiltinName = "__builtin_ia32_psubusb"; break;
 
8453
  case Intrinsic::x86_mmx_psubus_w: BuiltinName = "__builtin_ia32_psubusw"; break;
 
8454
  case Intrinsic::x86_sse2_add_sd: BuiltinName = "__builtin_ia32_addsd"; break;
 
8455
  case Intrinsic::x86_sse2_clflush: BuiltinName = "__builtin_ia32_clflush"; break;
 
8456
  case Intrinsic::x86_sse2_comieq_sd: BuiltinName = "__builtin_ia32_comisdeq"; break;
 
8457
  case Intrinsic::x86_sse2_comige_sd: BuiltinName = "__builtin_ia32_comisdge"; break;
 
8458
  case Intrinsic::x86_sse2_comigt_sd: BuiltinName = "__builtin_ia32_comisdgt"; break;
 
8459
  case Intrinsic::x86_sse2_comile_sd: BuiltinName = "__builtin_ia32_comisdle"; break;
 
8460
  case Intrinsic::x86_sse2_comilt_sd: BuiltinName = "__builtin_ia32_comisdlt"; break;
 
8461
  case Intrinsic::x86_sse2_comineq_sd: BuiltinName = "__builtin_ia32_comisdneq"; break;
 
8462
  case Intrinsic::x86_sse2_cvtdq2pd: BuiltinName = "__builtin_ia32_cvtdq2pd"; break;
 
8463
  case Intrinsic::x86_sse2_cvtdq2ps: BuiltinName = "__builtin_ia32_cvtdq2ps"; break;
 
8464
  case Intrinsic::x86_sse2_cvtpd2dq: BuiltinName = "__builtin_ia32_cvtpd2dq"; break;
 
8465
  case Intrinsic::x86_sse2_cvtpd2ps: BuiltinName = "__builtin_ia32_cvtpd2ps"; break;
 
8466
  case Intrinsic::x86_sse2_cvtps2dq: BuiltinName = "__builtin_ia32_cvtps2dq"; break;
 
8467
  case Intrinsic::x86_sse2_cvtps2pd: BuiltinName = "__builtin_ia32_cvtps2pd"; break;
 
8468
  case Intrinsic::x86_sse2_cvtsd2si: BuiltinName = "__builtin_ia32_cvtsd2si"; break;
 
8469
  case Intrinsic::x86_sse2_cvtsd2si64: BuiltinName = "__builtin_ia32_cvtsd2si64"; break;
 
8470
  case Intrinsic::x86_sse2_cvtsd2ss: BuiltinName = "__builtin_ia32_cvtsd2ss"; break;
 
8471
  case Intrinsic::x86_sse2_cvtsi2sd: BuiltinName = "__builtin_ia32_cvtsi2sd"; break;
 
8472
  case Intrinsic::x86_sse2_cvtsi642sd: BuiltinName = "__builtin_ia32_cvtsi642sd"; break;
 
8473
  case Intrinsic::x86_sse2_cvtss2sd: BuiltinName = "__builtin_ia32_cvtss2sd"; break;
 
8474
  case Intrinsic::x86_sse2_cvttpd2dq: BuiltinName = "__builtin_ia32_cvttpd2dq"; break;
 
8475
  case Intrinsic::x86_sse2_cvttps2dq: BuiltinName = "__builtin_ia32_cvttps2dq"; break;
 
8476
  case Intrinsic::x86_sse2_cvttsd2si: BuiltinName = "__builtin_ia32_cvttsd2si"; break;
 
8477
  case Intrinsic::x86_sse2_cvttsd2si64: BuiltinName = "__builtin_ia32_cvttsd2si64"; break;
 
8478
  case Intrinsic::x86_sse2_div_sd: BuiltinName = "__builtin_ia32_divsd"; break;
 
8479
  case Intrinsic::x86_sse2_lfence: BuiltinName = "__builtin_ia32_lfence"; break;
 
8480
  case Intrinsic::x86_sse2_loadu_dq: BuiltinName = "__builtin_ia32_loaddqu"; break;
 
8481
  case Intrinsic::x86_sse2_loadu_pd: BuiltinName = "__builtin_ia32_loadupd"; break;
 
8482
  case Intrinsic::x86_sse2_maskmov_dqu: BuiltinName = "__builtin_ia32_maskmovdqu"; break;
 
8483
  case Intrinsic::x86_sse2_max_pd: BuiltinName = "__builtin_ia32_maxpd"; break;
 
8484
  case Intrinsic::x86_sse2_max_sd: BuiltinName = "__builtin_ia32_maxsd"; break;
 
8485
  case Intrinsic::x86_sse2_mfence: BuiltinName = "__builtin_ia32_mfence"; break;
 
8486
  case Intrinsic::x86_sse2_min_pd: BuiltinName = "__builtin_ia32_minpd"; break;
 
8487
  case Intrinsic::x86_sse2_min_sd: BuiltinName = "__builtin_ia32_minsd"; break;
 
8488
  case Intrinsic::x86_sse2_movmsk_pd: BuiltinName = "__builtin_ia32_movmskpd"; break;
 
8489
  case Intrinsic::x86_sse2_movnt_dq: BuiltinName = "__builtin_ia32_movntdq"; break;
 
8490
  case Intrinsic::x86_sse2_movnt_i: BuiltinName = "__builtin_ia32_movnti"; break;
 
8491
  case Intrinsic::x86_sse2_movnt_pd: BuiltinName = "__builtin_ia32_movntpd"; break;
 
8492
  case Intrinsic::x86_sse2_mul_sd: BuiltinName = "__builtin_ia32_mulsd"; break;
 
8493
  case Intrinsic::x86_sse2_packssdw_128: BuiltinName = "__builtin_ia32_packssdw128"; break;
 
8494
  case Intrinsic::x86_sse2_packsswb_128: BuiltinName = "__builtin_ia32_packsswb128"; break;
 
8495
  case Intrinsic::x86_sse2_packuswb_128: BuiltinName = "__builtin_ia32_packuswb128"; break;
 
8496
  case Intrinsic::x86_sse2_padds_b: BuiltinName = "__builtin_ia32_paddsb128"; break;
 
8497
  case Intrinsic::x86_sse2_padds_w: BuiltinName = "__builtin_ia32_paddsw128"; break;
 
8498
  case Intrinsic::x86_sse2_paddus_b: BuiltinName = "__builtin_ia32_paddusb128"; break;
 
8499
  case Intrinsic::x86_sse2_paddus_w: BuiltinName = "__builtin_ia32_paddusw128"; break;
 
8500
  case Intrinsic::x86_sse2_pavg_b: BuiltinName = "__builtin_ia32_pavgb128"; break;
 
8501
  case Intrinsic::x86_sse2_pavg_w: BuiltinName = "__builtin_ia32_pavgw128"; break;
 
8502
  case Intrinsic::x86_sse2_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb128"; break;
 
8503
  case Intrinsic::x86_sse2_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd128"; break;
 
8504
  case Intrinsic::x86_sse2_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw128"; break;
 
8505
  case Intrinsic::x86_sse2_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb128"; break;
 
8506
  case Intrinsic::x86_sse2_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd128"; break;
 
8507
  case Intrinsic::x86_sse2_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw128"; break;
 
8508
  case Intrinsic::x86_sse2_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd128"; break;
 
8509
  case Intrinsic::x86_sse2_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw128"; break;
 
8510
  case Intrinsic::x86_sse2_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub128"; break;
 
8511
  case Intrinsic::x86_sse2_pmins_w: BuiltinName = "__builtin_ia32_pminsw128"; break;
 
8512
  case Intrinsic::x86_sse2_pminu_b: BuiltinName = "__builtin_ia32_pminub128"; break;
 
8513
  case Intrinsic::x86_sse2_pmovmskb_128: BuiltinName = "__builtin_ia32_pmovmskb128"; break;
 
8514
  case Intrinsic::x86_sse2_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw128"; break;
 
8515
  case Intrinsic::x86_sse2_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw128"; break;
 
8516
  case Intrinsic::x86_sse2_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq128"; break;
 
8517
  case Intrinsic::x86_sse2_psad_bw: BuiltinName = "__builtin_ia32_psadbw128"; break;
 
8518
  case Intrinsic::x86_sse2_psll_d: BuiltinName = "__builtin_ia32_pslld128"; break;
 
8519
  case Intrinsic::x86_sse2_psll_dq: BuiltinName = "__builtin_ia32_pslldqi128"; break;
 
8520
  case Intrinsic::x86_sse2_psll_dq_bs: BuiltinName = "__builtin_ia32_pslldqi128_byteshift"; break;
 
8521
  case Intrinsic::x86_sse2_psll_q: BuiltinName = "__builtin_ia32_psllq128"; break;
 
8522
  case Intrinsic::x86_sse2_psll_w: BuiltinName = "__builtin_ia32_psllw128"; break;
 
8523
  case Intrinsic::x86_sse2_pslli_d: BuiltinName = "__builtin_ia32_pslldi128"; break;
 
8524
  case Intrinsic::x86_sse2_pslli_q: BuiltinName = "__builtin_ia32_psllqi128"; break;
 
8525
  case Intrinsic::x86_sse2_pslli_w: BuiltinName = "__builtin_ia32_psllwi128"; break;
 
8526
  case Intrinsic::x86_sse2_psra_d: BuiltinName = "__builtin_ia32_psrad128"; break;
 
8527
  case Intrinsic::x86_sse2_psra_w: BuiltinName = "__builtin_ia32_psraw128"; break;
 
8528
  case Intrinsic::x86_sse2_psrai_d: BuiltinName = "__builtin_ia32_psradi128"; break;
 
8529
  case Intrinsic::x86_sse2_psrai_w: BuiltinName = "__builtin_ia32_psrawi128"; break;
 
8530
  case Intrinsic::x86_sse2_psrl_d: BuiltinName = "__builtin_ia32_psrld128"; break;
 
8531
  case Intrinsic::x86_sse2_psrl_dq: BuiltinName = "__builtin_ia32_psrldqi128"; break;
 
8532
  case Intrinsic::x86_sse2_psrl_dq_bs: BuiltinName = "__builtin_ia32_psrldqi128_byteshift"; break;
 
8533
  case Intrinsic::x86_sse2_psrl_q: BuiltinName = "__builtin_ia32_psrlq128"; break;
 
8534
  case Intrinsic::x86_sse2_psrl_w: BuiltinName = "__builtin_ia32_psrlw128"; break;
 
8535
  case Intrinsic::x86_sse2_psrli_d: BuiltinName = "__builtin_ia32_psrldi128"; break;
 
8536
  case Intrinsic::x86_sse2_psrli_q: BuiltinName = "__builtin_ia32_psrlqi128"; break;
 
8537
  case Intrinsic::x86_sse2_psrli_w: BuiltinName = "__builtin_ia32_psrlwi128"; break;
 
8538
  case Intrinsic::x86_sse2_psubs_b: BuiltinName = "__builtin_ia32_psubsb128"; break;
 
8539
  case Intrinsic::x86_sse2_psubs_w: BuiltinName = "__builtin_ia32_psubsw128"; break;
 
8540
  case Intrinsic::x86_sse2_psubus_b: BuiltinName = "__builtin_ia32_psubusb128"; break;
 
8541
  case Intrinsic::x86_sse2_psubus_w: BuiltinName = "__builtin_ia32_psubusw128"; break;
 
8542
  case Intrinsic::x86_sse2_sqrt_pd: BuiltinName = "__builtin_ia32_sqrtpd"; break;
 
8543
  case Intrinsic::x86_sse2_sqrt_sd: BuiltinName = "__builtin_ia32_sqrtsd"; break;
 
8544
  case Intrinsic::x86_sse2_storel_dq: BuiltinName = "__builtin_ia32_storelv4si"; break;
 
8545
  case Intrinsic::x86_sse2_storeu_dq: BuiltinName = "__builtin_ia32_storedqu"; break;
 
8546
  case Intrinsic::x86_sse2_storeu_pd: BuiltinName = "__builtin_ia32_storeupd"; break;
 
8547
  case Intrinsic::x86_sse2_sub_sd: BuiltinName = "__builtin_ia32_subsd"; break;
 
8548
  case Intrinsic::x86_sse2_ucomieq_sd: BuiltinName = "__builtin_ia32_ucomisdeq"; break;
 
8549
  case Intrinsic::x86_sse2_ucomige_sd: BuiltinName = "__builtin_ia32_ucomisdge"; break;
 
8550
  case Intrinsic::x86_sse2_ucomigt_sd: BuiltinName = "__builtin_ia32_ucomisdgt"; break;
 
8551
  case Intrinsic::x86_sse2_ucomile_sd: BuiltinName = "__builtin_ia32_ucomisdle"; break;
 
8552
  case Intrinsic::x86_sse2_ucomilt_sd: BuiltinName = "__builtin_ia32_ucomisdlt"; break;
 
8553
  case Intrinsic::x86_sse2_ucomineq_sd: BuiltinName = "__builtin_ia32_ucomisdneq"; break;
 
8554
  case Intrinsic::x86_sse3_addsub_pd: BuiltinName = "__builtin_ia32_addsubpd"; break;
 
8555
  case Intrinsic::x86_sse3_addsub_ps: BuiltinName = "__builtin_ia32_addsubps"; break;
 
8556
  case Intrinsic::x86_sse3_hadd_pd: BuiltinName = "__builtin_ia32_haddpd"; break;
 
8557
  case Intrinsic::x86_sse3_hadd_ps: BuiltinName = "__builtin_ia32_haddps"; break;
 
8558
  case Intrinsic::x86_sse3_hsub_pd: BuiltinName = "__builtin_ia32_hsubpd"; break;
 
8559
  case Intrinsic::x86_sse3_hsub_ps: BuiltinName = "__builtin_ia32_hsubps"; break;
 
8560
  case Intrinsic::x86_sse3_ldu_dq: BuiltinName = "__builtin_ia32_lddqu"; break;
 
8561
  case Intrinsic::x86_sse3_monitor: BuiltinName = "__builtin_ia32_monitor"; break;
 
8562
  case Intrinsic::x86_sse3_mwait: BuiltinName = "__builtin_ia32_mwait"; break;
 
8563
  case Intrinsic::x86_sse41_blendpd: BuiltinName = "__builtin_ia32_blendpd"; break;
 
8564
  case Intrinsic::x86_sse41_blendps: BuiltinName = "__builtin_ia32_blendps"; break;
 
8565
  case Intrinsic::x86_sse41_blendvpd: BuiltinName = "__builtin_ia32_blendvpd"; break;
 
8566
  case Intrinsic::x86_sse41_blendvps: BuiltinName = "__builtin_ia32_blendvps"; break;
 
8567
  case Intrinsic::x86_sse41_dppd: BuiltinName = "__builtin_ia32_dppd"; break;
 
8568
  case Intrinsic::x86_sse41_dpps: BuiltinName = "__builtin_ia32_dpps"; break;
 
8569
  case Intrinsic::x86_sse41_extractps: BuiltinName = "__builtin_ia32_extractps128"; break;
 
8570
  case Intrinsic::x86_sse41_insertps: BuiltinName = "__builtin_ia32_insertps128"; break;
 
8571
  case Intrinsic::x86_sse41_movntdqa: BuiltinName = "__builtin_ia32_movntdqa"; break;
 
8572
  case Intrinsic::x86_sse41_mpsadbw: BuiltinName = "__builtin_ia32_mpsadbw128"; break;
 
8573
  case Intrinsic::x86_sse41_packusdw: BuiltinName = "__builtin_ia32_packusdw128"; break;
 
8574
  case Intrinsic::x86_sse41_pblendvb: BuiltinName = "__builtin_ia32_pblendvb128"; break;
 
8575
  case Intrinsic::x86_sse41_pblendw: BuiltinName = "__builtin_ia32_pblendw128"; break;
 
8576
  case Intrinsic::x86_sse41_pcmpeqq: BuiltinName = "__builtin_ia32_pcmpeqq"; break;
 
8577
  case Intrinsic::x86_sse41_phminposuw: BuiltinName = "__builtin_ia32_phminposuw128"; break;
 
8578
  case Intrinsic::x86_sse41_pmaxsb: BuiltinName = "__builtin_ia32_pmaxsb128"; break;
 
8579
  case Intrinsic::x86_sse41_pmaxsd: BuiltinName = "__builtin_ia32_pmaxsd128"; break;
 
8580
  case Intrinsic::x86_sse41_pmaxud: BuiltinName = "__builtin_ia32_pmaxud128"; break;
 
8581
  case Intrinsic::x86_sse41_pmaxuw: BuiltinName = "__builtin_ia32_pmaxuw128"; break;
 
8582
  case Intrinsic::x86_sse41_pminsb: BuiltinName = "__builtin_ia32_pminsb128"; break;
 
8583
  case Intrinsic::x86_sse41_pminsd: BuiltinName = "__builtin_ia32_pminsd128"; break;
 
8584
  case Intrinsic::x86_sse41_pminud: BuiltinName = "__builtin_ia32_pminud128"; break;
 
8585
  case Intrinsic::x86_sse41_pminuw: BuiltinName = "__builtin_ia32_pminuw128"; break;
 
8586
  case Intrinsic::x86_sse41_pmovsxbd: BuiltinName = "__builtin_ia32_pmovsxbd128"; break;
 
8587
  case Intrinsic::x86_sse41_pmovsxbq: BuiltinName = "__builtin_ia32_pmovsxbq128"; break;
 
8588
  case Intrinsic::x86_sse41_pmovsxbw: BuiltinName = "__builtin_ia32_pmovsxbw128"; break;
 
8589
  case Intrinsic::x86_sse41_pmovsxdq: BuiltinName = "__builtin_ia32_pmovsxdq128"; break;
 
8590
  case Intrinsic::x86_sse41_pmovsxwd: BuiltinName = "__builtin_ia32_pmovsxwd128"; break;
 
8591
  case Intrinsic::x86_sse41_pmovsxwq: BuiltinName = "__builtin_ia32_pmovsxwq128"; break;
 
8592
  case Intrinsic::x86_sse41_pmovzxbd: BuiltinName = "__builtin_ia32_pmovzxbd128"; break;
 
8593
  case Intrinsic::x86_sse41_pmovzxbq: BuiltinName = "__builtin_ia32_pmovzxbq128"; break;
 
8594
  case Intrinsic::x86_sse41_pmovzxbw: BuiltinName = "__builtin_ia32_pmovzxbw128"; break;
 
8595
  case Intrinsic::x86_sse41_pmovzxdq: BuiltinName = "__builtin_ia32_pmovzxdq128"; break;
 
8596
  case Intrinsic::x86_sse41_pmovzxwd: BuiltinName = "__builtin_ia32_pmovzxwd128"; break;
 
8597
  case Intrinsic::x86_sse41_pmovzxwq: BuiltinName = "__builtin_ia32_pmovzxwq128"; break;
 
8598
  case Intrinsic::x86_sse41_pmuldq: BuiltinName = "__builtin_ia32_pmuldq128"; break;
 
8599
  case Intrinsic::x86_sse41_pmulld: BuiltinName = "__builtin_ia32_pmulld128"; break;
 
8600
  case Intrinsic::x86_sse41_ptestc: BuiltinName = "__builtin_ia32_ptestc128"; break;
 
8601
  case Intrinsic::x86_sse41_ptestnzc: BuiltinName = "__builtin_ia32_ptestnzc128"; break;
 
8602
  case Intrinsic::x86_sse41_ptestz: BuiltinName = "__builtin_ia32_ptestz128"; break;
 
8603
  case Intrinsic::x86_sse41_round_pd: BuiltinName = "__builtin_ia32_roundpd"; break;
 
8604
  case Intrinsic::x86_sse41_round_ps: BuiltinName = "__builtin_ia32_roundps"; break;
 
8605
  case Intrinsic::x86_sse41_round_sd: BuiltinName = "__builtin_ia32_roundsd"; break;
 
8606
  case Intrinsic::x86_sse41_round_ss: BuiltinName = "__builtin_ia32_roundss"; break;
 
8607
  case Intrinsic::x86_sse42_crc32_16: BuiltinName = "__builtin_ia32_crc32hi"; break;
 
8608
  case Intrinsic::x86_sse42_crc32_32: BuiltinName = "__builtin_ia32_crc32si"; break;
 
8609
  case Intrinsic::x86_sse42_crc32_64: BuiltinName = "__builtin_ia32_crc32di"; break;
 
8610
  case Intrinsic::x86_sse42_crc32_8: BuiltinName = "__builtin_ia32_crc32qi"; break;
 
8611
  case Intrinsic::x86_sse42_pcmpestri128: BuiltinName = "__builtin_ia32_pcmpestri128"; break;
 
8612
  case Intrinsic::x86_sse42_pcmpestria128: BuiltinName = "__builtin_ia32_pcmpestria128"; break;
 
8613
  case Intrinsic::x86_sse42_pcmpestric128: BuiltinName = "__builtin_ia32_pcmpestric128"; break;
 
8614
  case Intrinsic::x86_sse42_pcmpestrio128: BuiltinName = "__builtin_ia32_pcmpestrio128"; break;
 
8615
  case Intrinsic::x86_sse42_pcmpestris128: BuiltinName = "__builtin_ia32_pcmpestris128"; break;
 
8616
  case Intrinsic::x86_sse42_pcmpestriz128: BuiltinName = "__builtin_ia32_pcmpestriz128"; break;
 
8617
  case Intrinsic::x86_sse42_pcmpestrm128: BuiltinName = "__builtin_ia32_pcmpestrm128"; break;
 
8618
  case Intrinsic::x86_sse42_pcmpgtq: BuiltinName = "__builtin_ia32_pcmpgtq"; break;
 
8619
  case Intrinsic::x86_sse42_pcmpistri128: BuiltinName = "__builtin_ia32_pcmpistri128"; break;
 
8620
  case Intrinsic::x86_sse42_pcmpistria128: BuiltinName = "__builtin_ia32_pcmpistria128"; break;
 
8621
  case Intrinsic::x86_sse42_pcmpistric128: BuiltinName = "__builtin_ia32_pcmpistric128"; break;
 
8622
  case Intrinsic::x86_sse42_pcmpistrio128: BuiltinName = "__builtin_ia32_pcmpistrio128"; break;
 
8623
  case Intrinsic::x86_sse42_pcmpistris128: BuiltinName = "__builtin_ia32_pcmpistris128"; break;
 
8624
  case Intrinsic::x86_sse42_pcmpistriz128: BuiltinName = "__builtin_ia32_pcmpistriz128"; break;
 
8625
  case Intrinsic::x86_sse42_pcmpistrm128: BuiltinName = "__builtin_ia32_pcmpistrm128"; break;
 
8626
  case Intrinsic::x86_sse_add_ss: BuiltinName = "__builtin_ia32_addss"; break;
 
8627
  case Intrinsic::x86_sse_comieq_ss: BuiltinName = "__builtin_ia32_comieq"; break;
 
8628
  case Intrinsic::x86_sse_comige_ss: BuiltinName = "__builtin_ia32_comige"; break;
 
8629
  case Intrinsic::x86_sse_comigt_ss: BuiltinName = "__builtin_ia32_comigt"; break;
 
8630
  case Intrinsic::x86_sse_comile_ss: BuiltinName = "__builtin_ia32_comile"; break;
 
8631
  case Intrinsic::x86_sse_comilt_ss: BuiltinName = "__builtin_ia32_comilt"; break;
 
8632
  case Intrinsic::x86_sse_comineq_ss: BuiltinName = "__builtin_ia32_comineq"; break;
 
8633
  case Intrinsic::x86_sse_cvtpd2pi: BuiltinName = "__builtin_ia32_cvtpd2pi"; break;
 
8634
  case Intrinsic::x86_sse_cvtpi2pd: BuiltinName = "__builtin_ia32_cvtpi2pd"; break;
 
8635
  case Intrinsic::x86_sse_cvtpi2ps: BuiltinName = "__builtin_ia32_cvtpi2ps"; break;
 
8636
  case Intrinsic::x86_sse_cvtps2pi: BuiltinName = "__builtin_ia32_cvtps2pi"; break;
 
8637
  case Intrinsic::x86_sse_cvtsi2ss: BuiltinName = "__builtin_ia32_cvtsi2ss"; break;
 
8638
  case Intrinsic::x86_sse_cvtsi642ss: BuiltinName = "__builtin_ia32_cvtsi642ss"; break;
 
8639
  case Intrinsic::x86_sse_cvtss2si: BuiltinName = "__builtin_ia32_cvtss2si"; break;
 
8640
  case Intrinsic::x86_sse_cvtss2si64: BuiltinName = "__builtin_ia32_cvtss2si64"; break;
 
8641
  case Intrinsic::x86_sse_cvttpd2pi: BuiltinName = "__builtin_ia32_cvttpd2pi"; break;
 
8642
  case Intrinsic::x86_sse_cvttps2pi: BuiltinName = "__builtin_ia32_cvttps2pi"; break;
 
8643
  case Intrinsic::x86_sse_cvttss2si: BuiltinName = "__builtin_ia32_cvttss2si"; break;
 
8644
  case Intrinsic::x86_sse_cvttss2si64: BuiltinName = "__builtin_ia32_cvttss2si64"; break;
 
8645
  case Intrinsic::x86_sse_div_ss: BuiltinName = "__builtin_ia32_divss"; break;
 
8646
  case Intrinsic::x86_sse_loadu_ps: BuiltinName = "__builtin_ia32_loadups"; break;
 
8647
  case Intrinsic::x86_sse_max_ps: BuiltinName = "__builtin_ia32_maxps"; break;
 
8648
  case Intrinsic::x86_sse_max_ss: BuiltinName = "__builtin_ia32_maxss"; break;
 
8649
  case Intrinsic::x86_sse_min_ps: BuiltinName = "__builtin_ia32_minps"; break;
 
8650
  case Intrinsic::x86_sse_min_ss: BuiltinName = "__builtin_ia32_minss"; break;
 
8651
  case Intrinsic::x86_sse_movmsk_ps: BuiltinName = "__builtin_ia32_movmskps"; break;
 
8652
  case Intrinsic::x86_sse_movnt_ps: BuiltinName = "__builtin_ia32_movntps"; break;
 
8653
  case Intrinsic::x86_sse_mul_ss: BuiltinName = "__builtin_ia32_mulss"; break;
 
8654
  case Intrinsic::x86_sse_rcp_ps: BuiltinName = "__builtin_ia32_rcpps"; break;
 
8655
  case Intrinsic::x86_sse_rcp_ss: BuiltinName = "__builtin_ia32_rcpss"; break;
 
8656
  case Intrinsic::x86_sse_rsqrt_ps: BuiltinName = "__builtin_ia32_rsqrtps"; break;
 
8657
  case Intrinsic::x86_sse_rsqrt_ss: BuiltinName = "__builtin_ia32_rsqrtss"; break;
 
8658
  case Intrinsic::x86_sse_sfence: BuiltinName = "__builtin_ia32_sfence"; break;
 
8659
  case Intrinsic::x86_sse_sqrt_ps: BuiltinName = "__builtin_ia32_sqrtps"; break;
 
8660
  case Intrinsic::x86_sse_sqrt_ss: BuiltinName = "__builtin_ia32_sqrtss"; break;
 
8661
  case Intrinsic::x86_sse_storeu_ps: BuiltinName = "__builtin_ia32_storeups"; break;
 
8662
  case Intrinsic::x86_sse_sub_ss: BuiltinName = "__builtin_ia32_subss"; break;
 
8663
  case Intrinsic::x86_sse_ucomieq_ss: BuiltinName = "__builtin_ia32_ucomieq"; break;
 
8664
  case Intrinsic::x86_sse_ucomige_ss: BuiltinName = "__builtin_ia32_ucomige"; break;
 
8665
  case Intrinsic::x86_sse_ucomigt_ss: BuiltinName = "__builtin_ia32_ucomigt"; break;
 
8666
  case Intrinsic::x86_sse_ucomile_ss: BuiltinName = "__builtin_ia32_ucomile"; break;
 
8667
  case Intrinsic::x86_sse_ucomilt_ss: BuiltinName = "__builtin_ia32_ucomilt"; break;
 
8668
  case Intrinsic::x86_sse_ucomineq_ss: BuiltinName = "__builtin_ia32_ucomineq"; break;
 
8669
  case Intrinsic::x86_ssse3_pabs_b: BuiltinName = "__builtin_ia32_pabsb"; break;
 
8670
  case Intrinsic::x86_ssse3_pabs_b_128: BuiltinName = "__builtin_ia32_pabsb128"; break;
 
8671
  case Intrinsic::x86_ssse3_pabs_d: BuiltinName = "__builtin_ia32_pabsd"; break;
 
8672
  case Intrinsic::x86_ssse3_pabs_d_128: BuiltinName = "__builtin_ia32_pabsd128"; break;
 
8673
  case Intrinsic::x86_ssse3_pabs_w: BuiltinName = "__builtin_ia32_pabsw"; break;
 
8674
  case Intrinsic::x86_ssse3_pabs_w_128: BuiltinName = "__builtin_ia32_pabsw128"; break;
 
8675
  case Intrinsic::x86_ssse3_phadd_d: BuiltinName = "__builtin_ia32_phaddd"; break;
 
8676
  case Intrinsic::x86_ssse3_phadd_d_128: BuiltinName = "__builtin_ia32_phaddd128"; break;
 
8677
  case Intrinsic::x86_ssse3_phadd_sw: BuiltinName = "__builtin_ia32_phaddsw"; break;
 
8678
  case Intrinsic::x86_ssse3_phadd_sw_128: BuiltinName = "__builtin_ia32_phaddsw128"; break;
 
8679
  case Intrinsic::x86_ssse3_phadd_w: BuiltinName = "__builtin_ia32_phaddw"; break;
 
8680
  case Intrinsic::x86_ssse3_phadd_w_128: BuiltinName = "__builtin_ia32_phaddw128"; break;
 
8681
  case Intrinsic::x86_ssse3_phsub_d: BuiltinName = "__builtin_ia32_phsubd"; break;
 
8682
  case Intrinsic::x86_ssse3_phsub_d_128: BuiltinName = "__builtin_ia32_phsubd128"; break;
 
8683
  case Intrinsic::x86_ssse3_phsub_sw: BuiltinName = "__builtin_ia32_phsubsw"; break;
 
8684
  case Intrinsic::x86_ssse3_phsub_sw_128: BuiltinName = "__builtin_ia32_phsubsw128"; break;
 
8685
  case Intrinsic::x86_ssse3_phsub_w: BuiltinName = "__builtin_ia32_phsubw"; break;
 
8686
  case Intrinsic::x86_ssse3_phsub_w_128: BuiltinName = "__builtin_ia32_phsubw128"; break;
 
8687
  case Intrinsic::x86_ssse3_pmadd_ub_sw: BuiltinName = "__builtin_ia32_pmaddubsw"; break;
 
8688
  case Intrinsic::x86_ssse3_pmadd_ub_sw_128: BuiltinName = "__builtin_ia32_pmaddubsw128"; break;
 
8689
  case Intrinsic::x86_ssse3_pmul_hr_sw: BuiltinName = "__builtin_ia32_pmulhrsw"; break;
 
8690
  case Intrinsic::x86_ssse3_pmul_hr_sw_128: BuiltinName = "__builtin_ia32_pmulhrsw128"; break;
 
8691
  case Intrinsic::x86_ssse3_pshuf_b: BuiltinName = "__builtin_ia32_pshufb"; break;
 
8692
  case Intrinsic::x86_ssse3_pshuf_b_128: BuiltinName = "__builtin_ia32_pshufb128"; break;
 
8693
  case Intrinsic::x86_ssse3_psign_b: BuiltinName = "__builtin_ia32_psignb"; break;
 
8694
  case Intrinsic::x86_ssse3_psign_b_128: BuiltinName = "__builtin_ia32_psignb128"; break;
 
8695
  case Intrinsic::x86_ssse3_psign_d: BuiltinName = "__builtin_ia32_psignd"; break;
 
8696
  case Intrinsic::x86_ssse3_psign_d_128: BuiltinName = "__builtin_ia32_psignd128"; break;
 
8697
  case Intrinsic::x86_ssse3_psign_w: BuiltinName = "__builtin_ia32_psignw"; break;
 
8698
  case Intrinsic::x86_ssse3_psign_w_128: BuiltinName = "__builtin_ia32_psignw128"; break;
 
8699
  }
 
8700
#endif
 
8701
 
 
8702
// Get the LLVM intrinsic that corresponds to a GCC builtin.
 
8703
// This is used by the C front-end.  The GCC builtin name is passed
 
8704
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
 
8705
// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
 
8706
#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
 
8707
Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefix, const char *BuiltinName) {
 
8708
  Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic;
 
8709
  /* Target Independent Builtins */ {
 
8710
    switch (strlen(BuiltinName)) {
 
8711
    default: break;
 
8712
    case 14:
 
8713
      if (!memcmp(BuiltinName, "__builtin_trap", 14))
 
8714
        IntrinsicID = Intrinsic::trap;
 
8715
      break;
 
8716
    case 19:
 
8717
      if (!memcmp(BuiltinName, "__sync_fetch_and_or", 19))
 
8718
        IntrinsicID = Intrinsic::atomic_load_or;
 
8719
      break;
 
8720
    case 20:
 
8721
      if (!memcmp(BuiltinName, "__", 2)) {
 
8722
        switch (BuiltinName[2]) {  // "__"
 
8723
        case 'b':
 
8724
          if (!memcmp(BuiltinName+3, "uiltin_", 7)) {
 
8725
            switch (BuiltinName[10]) {  // "__builtin_"
 
8726
            case 'f':
 
8727
              if (!memcmp(BuiltinName+11, "lt_rounds", 9))
 
8728
                IntrinsicID = Intrinsic::flt_rounds;
 
8729
              break;
 
8730
            case 's':
 
8731
              if (!memcmp(BuiltinName+11, "tack_save", 9))
 
8732
                IntrinsicID = Intrinsic::stacksave;
 
8733
              break;
 
8734
            }
 
8735
          }
 
8736
          break;
 
8737
        case 's':
 
8738
          if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) {
 
8739
            switch (BuiltinName[17]) {  // "__sync_fetch_and_"
 
8740
            case 'a':
 
8741
              switch (BuiltinName[18]) {  // "__sync_fetch_and_a"
 
8742
              case 'd':
 
8743
                if (!memcmp(BuiltinName+19, "d", 1))
 
8744
                  IntrinsicID = Intrinsic::atomic_load_add;
 
8745
                break;
 
8746
              case 'n':
 
8747
                if (!memcmp(BuiltinName+19, "d", 1))
 
8748
                  IntrinsicID = Intrinsic::atomic_load_and;
 
8749
                break;
 
8750
              }
 
8751
              break;
 
8752
            case 'm':
 
8753
              switch (BuiltinName[18]) {  // "__sync_fetch_and_m"
 
8754
              case 'a':
 
8755
                if (!memcmp(BuiltinName+19, "x", 1))
 
8756
                  IntrinsicID = Intrinsic::atomic_load_max;
 
8757
                break;
 
8758
              case 'i':
 
8759
                if (!memcmp(BuiltinName+19, "n", 1))
 
8760
                  IntrinsicID = Intrinsic::atomic_load_min;
 
8761
                break;
 
8762
              }
 
8763
              break;
 
8764
            case 's':
 
8765
              if (!memcmp(BuiltinName+18, "ub", 2))
 
8766
                IntrinsicID = Intrinsic::atomic_load_sub;
 
8767
              break;
 
8768
            case 'x':
 
8769
              if (!memcmp(BuiltinName+18, "or", 2))
 
8770
                IntrinsicID = Intrinsic::atomic_load_xor;
 
8771
              break;
 
8772
            }
 
8773
          }
 
8774
          break;
 
8775
        }
 
8776
      }
 
8777
      break;
 
8778
    case 21:
 
8779
      if (!memcmp(BuiltinName, "__", 2)) {
 
8780
        switch (BuiltinName[2]) {  // "__"
 
8781
        case 'b':
 
8782
          if (!memcmp(BuiltinName+3, "uiltin_", 7)) {
 
8783
            switch (BuiltinName[10]) {  // "__builtin_"
 
8784
            case 'o':
 
8785
              if (!memcmp(BuiltinName+11, "bject_size", 10))
 
8786
                IntrinsicID = Intrinsic::objectsize;
 
8787
              break;
 
8788
            case 'u':
 
8789
              if (!memcmp(BuiltinName+11, "nwind_init", 10))
 
8790
                IntrinsicID = Intrinsic::eh_unwind_init;
 
8791
              break;
 
8792
            }
 
8793
          }
 
8794
          break;
 
8795
        case 's':
 
8796
          if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) {
 
8797
            switch (BuiltinName[17]) {  // "__sync_fetch_and_"
 
8798
            case 'n':
 
8799
              if (!memcmp(BuiltinName+18, "and", 3))
 
8800
                IntrinsicID = Intrinsic::atomic_load_nand;
 
8801
              break;
 
8802
            case 'u':
 
8803
              if (!memcmp(BuiltinName+18, "m", 1)) {
 
8804
                switch (BuiltinName[19]) {  // "__sync_fetch_and_um"
 
8805
                case 'a':
 
8806
                  if (!memcmp(BuiltinName+20, "x", 1))
 
8807
                    IntrinsicID = Intrinsic::atomic_load_umax;
 
8808
                  break;
 
8809
                case 'i':
 
8810
                  if (!memcmp(BuiltinName+20, "n", 1))
 
8811
                    IntrinsicID = Intrinsic::atomic_load_umin;
 
8812
                  break;
 
8813
                }
 
8814
              }
 
8815
              break;
 
8816
            }
 
8817
          }
 
8818
          break;
 
8819
        }
 
8820
      }
 
8821
      break;
 
8822
    case 23:
 
8823
      if (!memcmp(BuiltinName, "__builtin_stack_restore", 23))
 
8824
        IntrinsicID = Intrinsic::stackrestore;
 
8825
      break;
 
8826
    case 24:
 
8827
      if (!memcmp(BuiltinName, "__sync_lock_test_and_set", 24))
 
8828
        IntrinsicID = Intrinsic::atomic_swap;
 
8829
      break;
 
8830
    case 25:
 
8831
      if (!memcmp(BuiltinName, "__builtin_init_trampoline", 25))
 
8832
        IntrinsicID = Intrinsic::init_trampoline;
 
8833
      break;
 
8834
    case 27:
 
8835
      if (!memcmp(BuiltinName, "__sync_val_compare_and_swap", 27))
 
8836
        IntrinsicID = Intrinsic::atomic_cmp_swap;
 
8837
      break;
 
8838
    case 29:
 
8839
      if (!memcmp(BuiltinName, "__builtin_llvm_memory_barrier", 29))
 
8840
        IntrinsicID = Intrinsic::memory_barrier;
 
8841
      break;
 
8842
    }
 
8843
  }
 
8844
  if (!strcmp(TargetPrefix, "alpha")) {
 
8845
    switch (strlen(BuiltinName)) {
 
8846
    default: break;
 
8847
    case 21:
 
8848
      if (!memcmp(BuiltinName, "__builtin_alpha_umulh", 21))
 
8849
        IntrinsicID = Intrinsic::alpha_umulh;
 
8850
      break;
 
8851
    }
 
8852
  }
 
8853
  if (!strcmp(TargetPrefix, "arm")) {
 
8854
    switch (strlen(BuiltinName)) {
 
8855
    default: break;
 
8856
    case 24:
 
8857
      if (!memcmp(BuiltinName, "__builtin_thread_pointer", 24))
 
8858
        IntrinsicID = Intrinsic::arm_thread_pointer;
 
8859
      break;
 
8860
    }
 
8861
  }
 
8862
  if (!strcmp(TargetPrefix, "ppc")) {
 
8863
    switch (strlen(BuiltinName)) {
 
8864
    default: break;
 
8865
    case 21:
 
8866
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
 
8867
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
 
8868
        case 'd':
 
8869
          if (!memcmp(BuiltinName+19, "s", 1)) {
 
8870
            switch (BuiltinName[20]) {  // "__builtin_altivec_ds"
 
8871
            case 's':
 
8872
              IntrinsicID = Intrinsic::ppc_altivec_dss;
 
8873
              break;
 
8874
            case 't':
 
8875
              IntrinsicID = Intrinsic::ppc_altivec_dst;
 
8876
              break;
 
8877
            }
 
8878
          }
 
8879
          break;
 
8880
        case 'v':
 
8881
          if (!memcmp(BuiltinName+19, "s", 1)) {
 
8882
            switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
 
8883
            case 'l':
 
8884
              IntrinsicID = Intrinsic::ppc_altivec_vsl;
 
8885
              break;
 
8886
            case 'r':
 
8887
              IntrinsicID = Intrinsic::ppc_altivec_vsr;
 
8888
              break;
 
8889
            }
 
8890
          }
 
8891
          break;
 
8892
        }
 
8893
      }
 
8894
      break;
 
8895
    case 22:
 
8896
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
 
8897
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
 
8898
        case 'd':
 
8899
          if (!memcmp(BuiltinName+19, "stt", 3))
 
8900
            IntrinsicID = Intrinsic::ppc_altivec_dstt;
 
8901
          break;
 
8902
        case 'v':
 
8903
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
8904
          case 'r':
 
8905
            if (!memcmp(BuiltinName+20, "l", 1)) {
 
8906
              switch (BuiltinName[21]) {  // "__builtin_altivec_vrl"
 
8907
              case 'b':
 
8908
                IntrinsicID = Intrinsic::ppc_altivec_vrlb;
 
8909
                break;
 
8910
              case 'h':
 
8911
                IntrinsicID = Intrinsic::ppc_altivec_vrlh;
 
8912
                break;
 
8913
              case 'w':
 
8914
                IntrinsicID = Intrinsic::ppc_altivec_vrlw;
 
8915
                break;
 
8916
              }
 
8917
            }
 
8918
            break;
 
8919
          case 's':
 
8920
            switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
 
8921
            case 'l':
 
8922
              switch (BuiltinName[21]) {  // "__builtin_altivec_vsl"
 
8923
              case 'b':
 
8924
                IntrinsicID = Intrinsic::ppc_altivec_vslb;
 
8925
                break;
 
8926
              case 'h':
 
8927
                IntrinsicID = Intrinsic::ppc_altivec_vslh;
 
8928
                break;
 
8929
              case 'o':
 
8930
                IntrinsicID = Intrinsic::ppc_altivec_vslo;
 
8931
                break;
 
8932
              case 'w':
 
8933
                IntrinsicID = Intrinsic::ppc_altivec_vslw;
 
8934
                break;
 
8935
              }
 
8936
              break;
 
8937
            case 'r':
 
8938
              switch (BuiltinName[21]) {  // "__builtin_altivec_vsr"
 
8939
              case 'b':
 
8940
                IntrinsicID = Intrinsic::ppc_altivec_vsrb;
 
8941
                break;
 
8942
              case 'h':
 
8943
                IntrinsicID = Intrinsic::ppc_altivec_vsrh;
 
8944
                break;
 
8945
              case 'o':
 
8946
                IntrinsicID = Intrinsic::ppc_altivec_vsro;
 
8947
                break;
 
8948
              case 'w':
 
8949
                IntrinsicID = Intrinsic::ppc_altivec_vsrw;
 
8950
                break;
 
8951
              }
 
8952
              break;
 
8953
            }
 
8954
            break;
 
8955
          }
 
8956
          break;
 
8957
        }
 
8958
      }
 
8959
      break;
 
8960
    case 23:
 
8961
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
 
8962
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
 
8963
        case 'd':
 
8964
          if (!memcmp(BuiltinName+19, "stst", 4))
 
8965
            IntrinsicID = Intrinsic::ppc_altivec_dstst;
 
8966
          break;
 
8967
        case 'v':
 
8968
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
8969
          case 'c':
 
8970
            if (!memcmp(BuiltinName+20, "f", 1)) {
 
8971
              switch (BuiltinName[21]) {  // "__builtin_altivec_vcf"
 
8972
              case 's':
 
8973
                if (!memcmp(BuiltinName+22, "x", 1))
 
8974
                  IntrinsicID = Intrinsic::ppc_altivec_vcfsx;
 
8975
                break;
 
8976
              case 'u':
 
8977
                if (!memcmp(BuiltinName+22, "x", 1))
 
8978
                  IntrinsicID = Intrinsic::ppc_altivec_vcfux;
 
8979
                break;
 
8980
              }
 
8981
            }
 
8982
            break;
 
8983
          case 'p':
 
8984
            if (!memcmp(BuiltinName+20, "kpx", 3))
 
8985
              IntrinsicID = Intrinsic::ppc_altivec_vpkpx;
 
8986
            break;
 
8987
          case 'r':
 
8988
            switch (BuiltinName[20]) {  // "__builtin_altivec_vr"
 
8989
            case 'e':
 
8990
              if (!memcmp(BuiltinName+21, "fp", 2))
 
8991
                IntrinsicID = Intrinsic::ppc_altivec_vrefp;
 
8992
              break;
 
8993
            case 'f':
 
8994
              if (!memcmp(BuiltinName+21, "i", 1)) {
 
8995
                switch (BuiltinName[22]) {  // "__builtin_altivec_vrfi"
 
8996
                case 'm':
 
8997
                  IntrinsicID = Intrinsic::ppc_altivec_vrfim;
 
8998
                  break;
 
8999
                case 'n':
 
9000
                  IntrinsicID = Intrinsic::ppc_altivec_vrfin;
 
9001
                  break;
 
9002
                case 'p':
 
9003
                  IntrinsicID = Intrinsic::ppc_altivec_vrfip;
 
9004
                  break;
 
9005
                case 'z':
 
9006
                  IntrinsicID = Intrinsic::ppc_altivec_vrfiz;
 
9007
                  break;
 
9008
                }
 
9009
              }
 
9010
              break;
 
9011
            }
 
9012
            break;
 
9013
          case 's':
 
9014
            if (!memcmp(BuiltinName+20, "ra", 2)) {
 
9015
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsra"
 
9016
              case 'b':
 
9017
                IntrinsicID = Intrinsic::ppc_altivec_vsrab;
 
9018
                break;
 
9019
              case 'h':
 
9020
                IntrinsicID = Intrinsic::ppc_altivec_vsrah;
 
9021
                break;
 
9022
              case 'w':
 
9023
                IntrinsicID = Intrinsic::ppc_altivec_vsraw;
 
9024
                break;
 
9025
              }
 
9026
            }
 
9027
            break;
 
9028
          }
 
9029
          break;
 
9030
        }
 
9031
      }
 
9032
      break;
 
9033
    case 24:
 
9034
      if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) {
 
9035
        switch (BuiltinName[18]) {  // "__builtin_altivec_"
 
9036
        case 'd':
 
9037
          if (!memcmp(BuiltinName+19, "s", 1)) {
 
9038
            switch (BuiltinName[20]) {  // "__builtin_altivec_ds"
 
9039
            case 's':
 
9040
              if (!memcmp(BuiltinName+21, "all", 3))
 
9041
                IntrinsicID = Intrinsic::ppc_altivec_dssall;
 
9042
              break;
 
9043
            case 't':
 
9044
              if (!memcmp(BuiltinName+21, "stt", 3))
 
9045
                IntrinsicID = Intrinsic::ppc_altivec_dststt;
 
9046
              break;
 
9047
            }
 
9048
          }
 
9049
          break;
 
9050
        case 'm':
 
9051
          switch (BuiltinName[19]) {  // "__builtin_altivec_m"
 
9052
          case 'f':
 
9053
            if (!memcmp(BuiltinName+20, "vscr", 4))
 
9054
              IntrinsicID = Intrinsic::ppc_altivec_mfvscr;
 
9055
            break;
 
9056
          case 't':
 
9057
            if (!memcmp(BuiltinName+20, "vscr", 4))
 
9058
              IntrinsicID = Intrinsic::ppc_altivec_mtvscr;
 
9059
            break;
 
9060
          }
 
9061
          break;
 
9062
        case 'v':
 
9063
          switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
9064
          case 'a':
 
9065
            if (!memcmp(BuiltinName+20, "vg", 2)) {
 
9066
              switch (BuiltinName[22]) {  // "__builtin_altivec_vavg"
 
9067
              case 's':
 
9068
                switch (BuiltinName[23]) {  // "__builtin_altivec_vavgs"
 
9069
                case 'b':
 
9070
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsb;
 
9071
                  break;
 
9072
                case 'h':
 
9073
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsh;
 
9074
                  break;
 
9075
                case 'w':
 
9076
                  IntrinsicID = Intrinsic::ppc_altivec_vavgsw;
 
9077
                  break;
 
9078
                }
 
9079
                break;
 
9080
              case 'u':
 
9081
                switch (BuiltinName[23]) {  // "__builtin_altivec_vavgu"
 
9082
                case 'b':
 
9083
                  IntrinsicID = Intrinsic::ppc_altivec_vavgub;
 
9084
                  break;
 
9085
                case 'h':
 
9086
                  IntrinsicID = Intrinsic::ppc_altivec_vavguh;
 
9087
                  break;
 
9088
                case 'w':
 
9089
                  IntrinsicID = Intrinsic::ppc_altivec_vavguw;
 
9090
                  break;
 
9091
                }
 
9092
                break;
 
9093
              }
 
9094
            }
 
9095
            break;
 
9096
          case 'c':
 
9097
            if (!memcmp(BuiltinName+20, "t", 1)) {
 
9098
              switch (BuiltinName[21]) {  // "__builtin_altivec_vct"
 
9099
              case 's':
 
9100
                if (!memcmp(BuiltinName+22, "xs", 2))
 
9101
                  IntrinsicID = Intrinsic::ppc_altivec_vctsxs;
 
9102
                break;
 
9103
              case 'u':
 
9104
                if (!memcmp(BuiltinName+22, "xs", 2))
 
9105
                  IntrinsicID = Intrinsic::ppc_altivec_vctuxs;
 
9106
                break;
 
9107
              }
 
9108
            }
 
9109
            break;
 
9110
          case 'm':
 
9111
            switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
 
9112
            case 'a':
 
9113
              if (!memcmp(BuiltinName+21, "x", 1)) {
 
9114
                switch (BuiltinName[22]) {  // "__builtin_altivec_vmax"
 
9115
                case 'f':
 
9116
                  if (!memcmp(BuiltinName+23, "p", 1))
 
9117
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxfp;
 
9118
                  break;
 
9119
                case 's':
 
9120
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmaxs"
 
9121
                  case 'b':
 
9122
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsb;
 
9123
                    break;
 
9124
                  case 'h':
 
9125
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsh;
 
9126
                    break;
 
9127
                  case 'w':
 
9128
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxsw;
 
9129
                    break;
 
9130
                  }
 
9131
                  break;
 
9132
                case 'u':
 
9133
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmaxu"
 
9134
                  case 'b':
 
9135
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxub;
 
9136
                    break;
 
9137
                  case 'h':
 
9138
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxuh;
 
9139
                    break;
 
9140
                  case 'w':
 
9141
                    IntrinsicID = Intrinsic::ppc_altivec_vmaxuw;
 
9142
                    break;
 
9143
                  }
 
9144
                  break;
 
9145
                }
 
9146
              }
 
9147
              break;
 
9148
            case 'i':
 
9149
              if (!memcmp(BuiltinName+21, "n", 1)) {
 
9150
                switch (BuiltinName[22]) {  // "__builtin_altivec_vmin"
 
9151
                case 'f':
 
9152
                  if (!memcmp(BuiltinName+23, "p", 1))
 
9153
                    IntrinsicID = Intrinsic::ppc_altivec_vminfp;
 
9154
                  break;
 
9155
                case 's':
 
9156
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vmins"
 
9157
                  case 'b':
 
9158
                    IntrinsicID = Intrinsic::ppc_altivec_vminsb;
 
9159
                    break;
 
9160
                  case 'h':
 
9161
                    IntrinsicID = Intrinsic::ppc_altivec_vminsh;
 
9162
                    break;
 
9163
                  case 'w':
 
9164
                    IntrinsicID = Intrinsic::ppc_altivec_vminsw;
 
9165
                    break;
 
9166
                  }
 
9167
                  break;
 
9168
                case 'u':
 
9169
                  switch (BuiltinName[23]) {  // "__builtin_altivec_vminu"
 
9170
                  case 'b':
 
9171
                    IntrinsicID = Intrinsic::ppc_altivec_vminub;
 
9172
                    break;
 
9173
                  case 'h':
 
9174
                    IntrinsicID = Intrinsic::ppc_altivec_vminuh;
 
9175
                    break;
 
9176
                  case 'w':
 
9177
                    IntrinsicID = Intrinsic::ppc_altivec_vminuw;
 
9178
                    break;
 
9179
                  }
 
9180
                  break;
 
9181
                }
 
9182
              }
 
9183
              break;
 
9184
            }
 
9185
            break;
 
9186
          }
 
9187
          break;
 
9188
        }
 
9189
      }
 
9190
      break;
 
9191
    case 25:
 
9192
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
 
9193
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
9194
        case 'a':
 
9195
          if (!memcmp(BuiltinName+20, "dd", 2)) {
 
9196
            switch (BuiltinName[22]) {  // "__builtin_altivec_vadd"
 
9197
            case 'c':
 
9198
              if (!memcmp(BuiltinName+23, "uw", 2))
 
9199
                IntrinsicID = Intrinsic::ppc_altivec_vaddcuw;
 
9200
              break;
 
9201
            case 's':
 
9202
              switch (BuiltinName[23]) {  // "__builtin_altivec_vadds"
 
9203
              case 'b':
 
9204
                if (!memcmp(BuiltinName+24, "s", 1))
 
9205
                  IntrinsicID = Intrinsic::ppc_altivec_vaddsbs;
 
9206
                break;
 
9207
              case 'h':
 
9208
                if (!memcmp(BuiltinName+24, "s", 1))
 
9209
                  IntrinsicID = Intrinsic::ppc_altivec_vaddshs;
 
9210
                break;
 
9211
              case 'w':
 
9212
                if (!memcmp(BuiltinName+24, "s", 1))
 
9213
                  IntrinsicID = Intrinsic::ppc_altivec_vaddsws;
 
9214
                break;
 
9215
              }
 
9216
              break;
 
9217
            case 'u':
 
9218
              switch (BuiltinName[23]) {  // "__builtin_altivec_vaddu"
 
9219
              case 'b':
 
9220
                if (!memcmp(BuiltinName+24, "s", 1))
 
9221
                  IntrinsicID = Intrinsic::ppc_altivec_vaddubs;
 
9222
                break;
 
9223
              case 'h':
 
9224
                if (!memcmp(BuiltinName+24, "s", 1))
 
9225
                  IntrinsicID = Intrinsic::ppc_altivec_vadduhs;
 
9226
                break;
 
9227
              case 'w':
 
9228
                if (!memcmp(BuiltinName+24, "s", 1))
 
9229
                  IntrinsicID = Intrinsic::ppc_altivec_vadduws;
 
9230
                break;
 
9231
              }
 
9232
              break;
 
9233
            }
 
9234
          }
 
9235
          break;
 
9236
        case 'c':
 
9237
          if (!memcmp(BuiltinName+20, "mpbfp", 5))
 
9238
            IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp;
 
9239
          break;
 
9240
        case 'l':
 
9241
          if (!memcmp(BuiltinName+20, "ogefp", 5))
 
9242
            IntrinsicID = Intrinsic::ppc_altivec_vlogefp;
 
9243
          break;
 
9244
        case 'm':
 
9245
          switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
 
9246
          case 'a':
 
9247
            if (!memcmp(BuiltinName+21, "ddfp", 4))
 
9248
              IntrinsicID = Intrinsic::ppc_altivec_vmaddfp;
 
9249
            break;
 
9250
          case 'u':
 
9251
            if (!memcmp(BuiltinName+21, "l", 1)) {
 
9252
              switch (BuiltinName[22]) {  // "__builtin_altivec_vmul"
 
9253
              case 'e':
 
9254
                switch (BuiltinName[23]) {  // "__builtin_altivec_vmule"
 
9255
                case 's':
 
9256
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmules"
 
9257
                  case 'b':
 
9258
                    IntrinsicID = Intrinsic::ppc_altivec_vmulesb;
 
9259
                    break;
 
9260
                  case 'h':
 
9261
                    IntrinsicID = Intrinsic::ppc_altivec_vmulesh;
 
9262
                    break;
 
9263
                  }
 
9264
                  break;
 
9265
                case 'u':
 
9266
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmuleu"
 
9267
                  case 'b':
 
9268
                    IntrinsicID = Intrinsic::ppc_altivec_vmuleub;
 
9269
                    break;
 
9270
                  case 'h':
 
9271
                    IntrinsicID = Intrinsic::ppc_altivec_vmuleuh;
 
9272
                    break;
 
9273
                  }
 
9274
                  break;
 
9275
                }
 
9276
                break;
 
9277
              case 'o':
 
9278
                switch (BuiltinName[23]) {  // "__builtin_altivec_vmulo"
 
9279
                case 's':
 
9280
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmulos"
 
9281
                  case 'b':
 
9282
                    IntrinsicID = Intrinsic::ppc_altivec_vmulosb;
 
9283
                    break;
 
9284
                  case 'h':
 
9285
                    IntrinsicID = Intrinsic::ppc_altivec_vmulosh;
 
9286
                    break;
 
9287
                  }
 
9288
                  break;
 
9289
                case 'u':
 
9290
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vmulou"
 
9291
                  case 'b':
 
9292
                    IntrinsicID = Intrinsic::ppc_altivec_vmuloub;
 
9293
                    break;
 
9294
                  case 'h':
 
9295
                    IntrinsicID = Intrinsic::ppc_altivec_vmulouh;
 
9296
                    break;
 
9297
                  }
 
9298
                  break;
 
9299
                }
 
9300
                break;
 
9301
              }
 
9302
            }
 
9303
            break;
 
9304
          }
 
9305
          break;
 
9306
        case 'p':
 
9307
          if (!memcmp(BuiltinName+20, "k", 1)) {
 
9308
            switch (BuiltinName[21]) {  // "__builtin_altivec_vpk"
 
9309
            case 's':
 
9310
              switch (BuiltinName[22]) {  // "__builtin_altivec_vpks"
 
9311
              case 'h':
 
9312
                switch (BuiltinName[23]) {  // "__builtin_altivec_vpksh"
 
9313
                case 's':
 
9314
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9315
                    IntrinsicID = Intrinsic::ppc_altivec_vpkshss;
 
9316
                  break;
 
9317
                case 'u':
 
9318
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9319
                    IntrinsicID = Intrinsic::ppc_altivec_vpkshus;
 
9320
                  break;
 
9321
                }
 
9322
                break;
 
9323
              case 'w':
 
9324
                switch (BuiltinName[23]) {  // "__builtin_altivec_vpksw"
 
9325
                case 's':
 
9326
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9327
                    IntrinsicID = Intrinsic::ppc_altivec_vpkswss;
 
9328
                  break;
 
9329
                case 'u':
 
9330
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9331
                    IntrinsicID = Intrinsic::ppc_altivec_vpkswus;
 
9332
                  break;
 
9333
                }
 
9334
                break;
 
9335
              }
 
9336
              break;
 
9337
            case 'u':
 
9338
              switch (BuiltinName[22]) {  // "__builtin_altivec_vpku"
 
9339
              case 'h':
 
9340
                if (!memcmp(BuiltinName+23, "us", 2))
 
9341
                  IntrinsicID = Intrinsic::ppc_altivec_vpkuhus;
 
9342
                break;
 
9343
              case 'w':
 
9344
                if (!memcmp(BuiltinName+23, "us", 2))
 
9345
                  IntrinsicID = Intrinsic::ppc_altivec_vpkuwus;
 
9346
                break;
 
9347
              }
 
9348
              break;
 
9349
            }
 
9350
          }
 
9351
          break;
 
9352
        case 's':
 
9353
          if (!memcmp(BuiltinName+20, "u", 1)) {
 
9354
            switch (BuiltinName[21]) {  // "__builtin_altivec_vsu"
 
9355
            case 'b':
 
9356
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsub"
 
9357
              case 'c':
 
9358
                if (!memcmp(BuiltinName+23, "uw", 2))
 
9359
                  IntrinsicID = Intrinsic::ppc_altivec_vsubcuw;
 
9360
                break;
 
9361
              case 's':
 
9362
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsubs"
 
9363
                case 'b':
 
9364
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9365
                    IntrinsicID = Intrinsic::ppc_altivec_vsubsbs;
 
9366
                  break;
 
9367
                case 'h':
 
9368
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9369
                    IntrinsicID = Intrinsic::ppc_altivec_vsubshs;
 
9370
                  break;
 
9371
                case 'w':
 
9372
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9373
                    IntrinsicID = Intrinsic::ppc_altivec_vsubsws;
 
9374
                  break;
 
9375
                }
 
9376
                break;
 
9377
              case 'u':
 
9378
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsubu"
 
9379
                case 'b':
 
9380
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9381
                    IntrinsicID = Intrinsic::ppc_altivec_vsububs;
 
9382
                  break;
 
9383
                case 'h':
 
9384
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9385
                    IntrinsicID = Intrinsic::ppc_altivec_vsubuhs;
 
9386
                  break;
 
9387
                case 'w':
 
9388
                  if (!memcmp(BuiltinName+24, "s", 1))
 
9389
                    IntrinsicID = Intrinsic::ppc_altivec_vsubuws;
 
9390
                  break;
 
9391
                }
 
9392
                break;
 
9393
              }
 
9394
              break;
 
9395
            case 'm':
 
9396
              if (!memcmp(BuiltinName+22, "sws", 3))
 
9397
                IntrinsicID = Intrinsic::ppc_altivec_vsumsws;
 
9398
              break;
 
9399
            }
 
9400
          }
 
9401
          break;
 
9402
        case 'u':
 
9403
          if (!memcmp(BuiltinName+20, "pk", 2)) {
 
9404
            switch (BuiltinName[22]) {  // "__builtin_altivec_vupk"
 
9405
            case 'h':
 
9406
              switch (BuiltinName[23]) {  // "__builtin_altivec_vupkh"
 
9407
              case 'p':
 
9408
                if (!memcmp(BuiltinName+24, "x", 1))
 
9409
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhpx;
 
9410
                break;
 
9411
              case 's':
 
9412
                switch (BuiltinName[24]) {  // "__builtin_altivec_vupkhs"
 
9413
                case 'b':
 
9414
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhsb;
 
9415
                  break;
 
9416
                case 'h':
 
9417
                  IntrinsicID = Intrinsic::ppc_altivec_vupkhsh;
 
9418
                  break;
 
9419
                }
 
9420
                break;
 
9421
              }
 
9422
              break;
 
9423
            case 'l':
 
9424
              switch (BuiltinName[23]) {  // "__builtin_altivec_vupkl"
 
9425
              case 'p':
 
9426
                if (!memcmp(BuiltinName+24, "x", 1))
 
9427
                  IntrinsicID = Intrinsic::ppc_altivec_vupklpx;
 
9428
                break;
 
9429
              case 's':
 
9430
                switch (BuiltinName[24]) {  // "__builtin_altivec_vupkls"
 
9431
                case 'b':
 
9432
                  IntrinsicID = Intrinsic::ppc_altivec_vupklsb;
 
9433
                  break;
 
9434
                case 'h':
 
9435
                  IntrinsicID = Intrinsic::ppc_altivec_vupklsh;
 
9436
                  break;
 
9437
                }
 
9438
                break;
 
9439
              }
 
9440
              break;
 
9441
            }
 
9442
          }
 
9443
          break;
 
9444
        }
 
9445
      }
 
9446
      break;
 
9447
    case 26:
 
9448
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
 
9449
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
9450
        case 'c':
 
9451
          if (!memcmp(BuiltinName+20, "mp", 2)) {
 
9452
            switch (BuiltinName[22]) {  // "__builtin_altivec_vcmp"
 
9453
            case 'e':
 
9454
              if (!memcmp(BuiltinName+23, "q", 1)) {
 
9455
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpeq"
 
9456
                case 'f':
 
9457
                  if (!memcmp(BuiltinName+25, "p", 1))
 
9458
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp;
 
9459
                  break;
 
9460
                case 'u':
 
9461
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpequ"
 
9462
                  case 'b':
 
9463
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequb;
 
9464
                    break;
 
9465
                  case 'h':
 
9466
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequh;
 
9467
                    break;
 
9468
                  case 'w':
 
9469
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpequw;
 
9470
                    break;
 
9471
                  }
 
9472
                  break;
 
9473
                }
 
9474
              }
 
9475
              break;
 
9476
            case 'g':
 
9477
              switch (BuiltinName[23]) {  // "__builtin_altivec_vcmpg"
 
9478
              case 'e':
 
9479
                if (!memcmp(BuiltinName+24, "fp", 2))
 
9480
                  IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp;
 
9481
                break;
 
9482
              case 't':
 
9483
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpgt"
 
9484
                case 'f':
 
9485
                  if (!memcmp(BuiltinName+25, "p", 1))
 
9486
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp;
 
9487
                  break;
 
9488
                case 's':
 
9489
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgts"
 
9490
                  case 'b':
 
9491
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb;
 
9492
                    break;
 
9493
                  case 'h':
 
9494
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh;
 
9495
                    break;
 
9496
                  case 'w':
 
9497
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw;
 
9498
                    break;
 
9499
                  }
 
9500
                  break;
 
9501
                case 'u':
 
9502
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgtu"
 
9503
                  case 'b':
 
9504
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub;
 
9505
                    break;
 
9506
                  case 'h':
 
9507
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh;
 
9508
                    break;
 
9509
                  case 'w':
 
9510
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw;
 
9511
                    break;
 
9512
                  }
 
9513
                  break;
 
9514
                }
 
9515
                break;
 
9516
              }
 
9517
              break;
 
9518
            }
 
9519
          }
 
9520
          break;
 
9521
        case 'e':
 
9522
          if (!memcmp(BuiltinName+20, "xptefp", 6))
 
9523
            IntrinsicID = Intrinsic::ppc_altivec_vexptefp;
 
9524
          break;
 
9525
        case 'm':
 
9526
          if (!memcmp(BuiltinName+20, "sum", 3)) {
 
9527
            switch (BuiltinName[23]) {  // "__builtin_altivec_vmsum"
 
9528
            case 'm':
 
9529
              if (!memcmp(BuiltinName+24, "bm", 2))
 
9530
                IntrinsicID = Intrinsic::ppc_altivec_vmsummbm;
 
9531
              break;
 
9532
            case 's':
 
9533
              if (!memcmp(BuiltinName+24, "h", 1)) {
 
9534
                switch (BuiltinName[25]) {  // "__builtin_altivec_vmsumsh"
 
9535
                case 'm':
 
9536
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumshm;
 
9537
                  break;
 
9538
                case 's':
 
9539
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumshs;
 
9540
                  break;
 
9541
                }
 
9542
              }
 
9543
              break;
 
9544
            case 'u':
 
9545
              switch (BuiltinName[24]) {  // "__builtin_altivec_vmsumu"
 
9546
              case 'b':
 
9547
                if (!memcmp(BuiltinName+25, "m", 1))
 
9548
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumubm;
 
9549
                break;
 
9550
              case 'h':
 
9551
                switch (BuiltinName[25]) {  // "__builtin_altivec_vmsumuh"
 
9552
                case 'm':
 
9553
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumuhm;
 
9554
                  break;
 
9555
                case 's':
 
9556
                  IntrinsicID = Intrinsic::ppc_altivec_vmsumuhs;
 
9557
                  break;
 
9558
                }
 
9559
                break;
 
9560
              }
 
9561
              break;
 
9562
            }
 
9563
          }
 
9564
          break;
 
9565
        case 'n':
 
9566
          if (!memcmp(BuiltinName+20, "msubfp", 6))
 
9567
            IntrinsicID = Intrinsic::ppc_altivec_vnmsubfp;
 
9568
          break;
 
9569
        case 's':
 
9570
          switch (BuiltinName[20]) {  // "__builtin_altivec_vs"
 
9571
          case 'e':
 
9572
            if (!memcmp(BuiltinName+21, "l_4si", 5))
 
9573
              IntrinsicID = Intrinsic::ppc_altivec_vsel;
 
9574
            break;
 
9575
          case 'u':
 
9576
            if (!memcmp(BuiltinName+21, "m", 1)) {
 
9577
              switch (BuiltinName[22]) {  // "__builtin_altivec_vsum"
 
9578
              case '2':
 
9579
                if (!memcmp(BuiltinName+23, "sws", 3))
 
9580
                  IntrinsicID = Intrinsic::ppc_altivec_vsum2sws;
 
9581
                break;
 
9582
              case '4':
 
9583
                switch (BuiltinName[23]) {  // "__builtin_altivec_vsum4"
 
9584
                case 's':
 
9585
                  switch (BuiltinName[24]) {  // "__builtin_altivec_vsum4s"
 
9586
                  case 'b':
 
9587
                    if (!memcmp(BuiltinName+25, "s", 1))
 
9588
                      IntrinsicID = Intrinsic::ppc_altivec_vsum4sbs;
 
9589
                    break;
 
9590
                  case 'h':
 
9591
                    if (!memcmp(BuiltinName+25, "s", 1))
 
9592
                      IntrinsicID = Intrinsic::ppc_altivec_vsum4shs;
 
9593
                    break;
 
9594
                  }
 
9595
                  break;
 
9596
                case 'u':
 
9597
                  if (!memcmp(BuiltinName+24, "bs", 2))
 
9598
                    IntrinsicID = Intrinsic::ppc_altivec_vsum4ubs;
 
9599
                  break;
 
9600
                }
 
9601
                break;
 
9602
              }
 
9603
            }
 
9604
            break;
 
9605
          }
 
9606
          break;
 
9607
        }
 
9608
      }
 
9609
      break;
 
9610
    case 27:
 
9611
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
 
9612
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
9613
        case 'c':
 
9614
          if (!memcmp(BuiltinName+20, "mpbfp_p", 7))
 
9615
            IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp_p;
 
9616
          break;
 
9617
        case 'm':
 
9618
          switch (BuiltinName[20]) {  // "__builtin_altivec_vm"
 
9619
          case 'h':
 
9620
            if (!memcmp(BuiltinName+21, "addshs", 6))
 
9621
              IntrinsicID = Intrinsic::ppc_altivec_vmhaddshs;
 
9622
            break;
 
9623
          case 'l':
 
9624
            if (!memcmp(BuiltinName+21, "adduhm", 6))
 
9625
              IntrinsicID = Intrinsic::ppc_altivec_vmladduhm;
 
9626
            break;
 
9627
          }
 
9628
          break;
 
9629
        case 'p':
 
9630
          if (!memcmp(BuiltinName+20, "erm_4si", 7))
 
9631
            IntrinsicID = Intrinsic::ppc_altivec_vperm;
 
9632
          break;
 
9633
        case 'r':
 
9634
          if (!memcmp(BuiltinName+20, "sqrtefp", 7))
 
9635
            IntrinsicID = Intrinsic::ppc_altivec_vrsqrtefp;
 
9636
          break;
 
9637
        }
 
9638
      }
 
9639
      break;
 
9640
    case 28:
 
9641
      if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) {
 
9642
        switch (BuiltinName[19]) {  // "__builtin_altivec_v"
 
9643
        case 'c':
 
9644
          if (!memcmp(BuiltinName+20, "mp", 2)) {
 
9645
            switch (BuiltinName[22]) {  // "__builtin_altivec_vcmp"
 
9646
            case 'e':
 
9647
              if (!memcmp(BuiltinName+23, "q", 1)) {
 
9648
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpeq"
 
9649
                case 'f':
 
9650
                  if (!memcmp(BuiltinName+25, "p_p", 3))
 
9651
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp_p;
 
9652
                  break;
 
9653
                case 'u':
 
9654
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpequ"
 
9655
                  case 'b':
 
9656
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9657
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequb_p;
 
9658
                    break;
 
9659
                  case 'h':
 
9660
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9661
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequh_p;
 
9662
                    break;
 
9663
                  case 'w':
 
9664
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9665
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpequw_p;
 
9666
                    break;
 
9667
                  }
 
9668
                  break;
 
9669
                }
 
9670
              }
 
9671
              break;
 
9672
            case 'g':
 
9673
              switch (BuiltinName[23]) {  // "__builtin_altivec_vcmpg"
 
9674
              case 'e':
 
9675
                if (!memcmp(BuiltinName+24, "fp_p", 4))
 
9676
                  IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp_p;
 
9677
                break;
 
9678
              case 't':
 
9679
                switch (BuiltinName[24]) {  // "__builtin_altivec_vcmpgt"
 
9680
                case 'f':
 
9681
                  if (!memcmp(BuiltinName+25, "p_p", 3))
 
9682
                    IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp_p;
 
9683
                  break;
 
9684
                case 's':
 
9685
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgts"
 
9686
                  case 'b':
 
9687
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9688
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb_p;
 
9689
                    break;
 
9690
                  case 'h':
 
9691
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9692
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh_p;
 
9693
                    break;
 
9694
                  case 'w':
 
9695
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9696
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw_p;
 
9697
                    break;
 
9698
                  }
 
9699
                  break;
 
9700
                case 'u':
 
9701
                  switch (BuiltinName[25]) {  // "__builtin_altivec_vcmpgtu"
 
9702
                  case 'b':
 
9703
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9704
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub_p;
 
9705
                    break;
 
9706
                  case 'h':
 
9707
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9708
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh_p;
 
9709
                    break;
 
9710
                  case 'w':
 
9711
                    if (!memcmp(BuiltinName+26, "_p", 2))
 
9712
                      IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw_p;
 
9713
                    break;
 
9714
                  }
 
9715
                  break;
 
9716
                }
 
9717
                break;
 
9718
              }
 
9719
              break;
 
9720
            }
 
9721
          }
 
9722
          break;
 
9723
        case 'm':
 
9724
          if (!memcmp(BuiltinName+20, "hraddshs", 8))
 
9725
            IntrinsicID = Intrinsic::ppc_altivec_vmhraddshs;
 
9726
          break;
 
9727
        }
 
9728
      }
 
9729
      break;
 
9730
    }
 
9731
  }
 
9732
  if (!strcmp(TargetPrefix, "spu")) {
 
9733
    switch (strlen(BuiltinName)) {
 
9734
    default: break;
 
9735
    case 14:
 
9736
      if (!memcmp(BuiltinName, "__builtin_si_a", 14))
 
9737
        IntrinsicID = Intrinsic::spu_si_a;
 
9738
      break;
 
9739
    case 15:
 
9740
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
9741
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
9742
        case 'a':
 
9743
          switch (BuiltinName[14]) {  // "__builtin_si_a"
 
9744
          case 'h':
 
9745
            IntrinsicID = Intrinsic::spu_si_ah;
 
9746
            break;
 
9747
          case 'i':
 
9748
            IntrinsicID = Intrinsic::spu_si_ai;
 
9749
            break;
 
9750
          }
 
9751
          break;
 
9752
        case 'b':
 
9753
          if (!memcmp(BuiltinName+14, "g", 1))
 
9754
            IntrinsicID = Intrinsic::spu_si_bg;
 
9755
          break;
 
9756
        case 'c':
 
9757
          if (!memcmp(BuiltinName+14, "g", 1))
 
9758
            IntrinsicID = Intrinsic::spu_si_cg;
 
9759
          break;
 
9760
        case 'f':
 
9761
          switch (BuiltinName[14]) {  // "__builtin_si_f"
 
9762
          case 'a':
 
9763
            IntrinsicID = Intrinsic::spu_si_fa;
 
9764
            break;
 
9765
          case 'm':
 
9766
            IntrinsicID = Intrinsic::spu_si_fm;
 
9767
            break;
 
9768
          case 's':
 
9769
            IntrinsicID = Intrinsic::spu_si_fs;
 
9770
            break;
 
9771
          }
 
9772
          break;
 
9773
        case 'o':
 
9774
          if (!memcmp(BuiltinName+14, "r", 1))
 
9775
            IntrinsicID = Intrinsic::spu_si_or;
 
9776
          break;
 
9777
        case 's':
 
9778
          if (!memcmp(BuiltinName+14, "f", 1))
 
9779
            IntrinsicID = Intrinsic::spu_si_sf;
 
9780
          break;
 
9781
        }
 
9782
      }
 
9783
      break;
 
9784
    case 16:
 
9785
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
9786
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
9787
        case 'a':
 
9788
          switch (BuiltinName[14]) {  // "__builtin_si_a"
 
9789
          case 'h':
 
9790
            if (!memcmp(BuiltinName+15, "i", 1))
 
9791
              IntrinsicID = Intrinsic::spu_si_ahi;
 
9792
            break;
 
9793
          case 'n':
 
9794
            if (!memcmp(BuiltinName+15, "d", 1))
 
9795
              IntrinsicID = Intrinsic::spu_si_and;
 
9796
            break;
 
9797
          }
 
9798
          break;
 
9799
        case 'b':
 
9800
          if (!memcmp(BuiltinName+14, "gx", 2))
 
9801
            IntrinsicID = Intrinsic::spu_si_bgx;
 
9802
          break;
 
9803
        case 'c':
 
9804
          switch (BuiltinName[14]) {  // "__builtin_si_c"
 
9805
          case 'e':
 
9806
            if (!memcmp(BuiltinName+15, "q", 1))
 
9807
              IntrinsicID = Intrinsic::spu_si_ceq;
 
9808
            break;
 
9809
          case 'g':
 
9810
            switch (BuiltinName[15]) {  // "__builtin_si_cg"
 
9811
            case 't':
 
9812
              IntrinsicID = Intrinsic::spu_si_cgt;
 
9813
              break;
 
9814
            case 'x':
 
9815
              IntrinsicID = Intrinsic::spu_si_cgx;
 
9816
              break;
 
9817
            }
 
9818
            break;
 
9819
          }
 
9820
          break;
 
9821
        case 'd':
 
9822
          if (!memcmp(BuiltinName+14, "f", 1)) {
 
9823
            switch (BuiltinName[15]) {  // "__builtin_si_df"
 
9824
            case 'a':
 
9825
              IntrinsicID = Intrinsic::spu_si_dfa;
 
9826
              break;
 
9827
            case 'm':
 
9828
              IntrinsicID = Intrinsic::spu_si_dfm;
 
9829
              break;
 
9830
            case 's':
 
9831
              IntrinsicID = Intrinsic::spu_si_dfs;
 
9832
              break;
 
9833
            }
 
9834
          }
 
9835
          break;
 
9836
        case 'f':
 
9837
          if (!memcmp(BuiltinName+14, "m", 1)) {
 
9838
            switch (BuiltinName[15]) {  // "__builtin_si_fm"
 
9839
            case 'a':
 
9840
              IntrinsicID = Intrinsic::spu_si_fma;
 
9841
              break;
 
9842
            case 's':
 
9843
              IntrinsicID = Intrinsic::spu_si_fms;
 
9844
              break;
 
9845
            }
 
9846
          }
 
9847
          break;
 
9848
        case 'm':
 
9849
          if (!memcmp(BuiltinName+14, "py", 2))
 
9850
            IntrinsicID = Intrinsic::spu_si_mpy;
 
9851
          break;
 
9852
        case 'n':
 
9853
          if (!memcmp(BuiltinName+14, "or", 2))
 
9854
            IntrinsicID = Intrinsic::spu_si_nor;
 
9855
          break;
 
9856
        case 'o':
 
9857
          if (!memcmp(BuiltinName+14, "r", 1)) {
 
9858
            switch (BuiltinName[15]) {  // "__builtin_si_or"
 
9859
            case 'c':
 
9860
              IntrinsicID = Intrinsic::spu_si_orc;
 
9861
              break;
 
9862
            case 'i':
 
9863
              IntrinsicID = Intrinsic::spu_si_ori;
 
9864
              break;
 
9865
            }
 
9866
          }
 
9867
          break;
 
9868
        case 's':
 
9869
          if (!memcmp(BuiltinName+14, "f", 1)) {
 
9870
            switch (BuiltinName[15]) {  // "__builtin_si_sf"
 
9871
            case 'h':
 
9872
              IntrinsicID = Intrinsic::spu_si_sfh;
 
9873
              break;
 
9874
            case 'i':
 
9875
              IntrinsicID = Intrinsic::spu_si_sfi;
 
9876
              break;
 
9877
            case 'x':
 
9878
              IntrinsicID = Intrinsic::spu_si_sfx;
 
9879
              break;
 
9880
            }
 
9881
          }
 
9882
          break;
 
9883
        case 'x':
 
9884
          if (!memcmp(BuiltinName+14, "or", 2))
 
9885
            IntrinsicID = Intrinsic::spu_si_xor;
 
9886
          break;
 
9887
        }
 
9888
      }
 
9889
      break;
 
9890
    case 17:
 
9891
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
9892
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
9893
        case 'a':
 
9894
          switch (BuiltinName[14]) {  // "__builtin_si_a"
 
9895
          case 'd':
 
9896
            if (!memcmp(BuiltinName+15, "dx", 2))
 
9897
              IntrinsicID = Intrinsic::spu_si_addx;
 
9898
            break;
 
9899
          case 'n':
 
9900
            if (!memcmp(BuiltinName+15, "d", 1)) {
 
9901
              switch (BuiltinName[16]) {  // "__builtin_si_and"
 
9902
              case 'c':
 
9903
                IntrinsicID = Intrinsic::spu_si_andc;
 
9904
                break;
 
9905
              case 'i':
 
9906
                IntrinsicID = Intrinsic::spu_si_andi;
 
9907
                break;
 
9908
              }
 
9909
            }
 
9910
            break;
 
9911
          }
 
9912
          break;
 
9913
        case 'c':
 
9914
          switch (BuiltinName[14]) {  // "__builtin_si_c"
 
9915
          case 'e':
 
9916
            if (!memcmp(BuiltinName+15, "q", 1)) {
 
9917
              switch (BuiltinName[16]) {  // "__builtin_si_ceq"
 
9918
              case 'b':
 
9919
                IntrinsicID = Intrinsic::spu_si_ceqb;
 
9920
                break;
 
9921
              case 'h':
 
9922
                IntrinsicID = Intrinsic::spu_si_ceqh;
 
9923
                break;
 
9924
              case 'i':
 
9925
                IntrinsicID = Intrinsic::spu_si_ceqi;
 
9926
                break;
 
9927
              }
 
9928
            }
 
9929
            break;
 
9930
          case 'g':
 
9931
            if (!memcmp(BuiltinName+15, "t", 1)) {
 
9932
              switch (BuiltinName[16]) {  // "__builtin_si_cgt"
 
9933
              case 'b':
 
9934
                IntrinsicID = Intrinsic::spu_si_cgtb;
 
9935
                break;
 
9936
              case 'h':
 
9937
                IntrinsicID = Intrinsic::spu_si_cgth;
 
9938
                break;
 
9939
              case 'i':
 
9940
                IntrinsicID = Intrinsic::spu_si_cgti;
 
9941
                break;
 
9942
              }
 
9943
            }
 
9944
            break;
 
9945
          case 'l':
 
9946
            if (!memcmp(BuiltinName+15, "gt", 2))
 
9947
              IntrinsicID = Intrinsic::spu_si_clgt;
 
9948
            break;
 
9949
          }
 
9950
          break;
 
9951
        case 'd':
 
9952
          if (!memcmp(BuiltinName+14, "fm", 2)) {
 
9953
            switch (BuiltinName[16]) {  // "__builtin_si_dfm"
 
9954
            case 'a':
 
9955
              IntrinsicID = Intrinsic::spu_si_dfma;
 
9956
              break;
 
9957
            case 's':
 
9958
              IntrinsicID = Intrinsic::spu_si_dfms;
 
9959
              break;
 
9960
            }
 
9961
          }
 
9962
          break;
 
9963
        case 'f':
 
9964
          switch (BuiltinName[14]) {  // "__builtin_si_f"
 
9965
          case 'c':
 
9966
            switch (BuiltinName[15]) {  // "__builtin_si_fc"
 
9967
            case 'e':
 
9968
              if (!memcmp(BuiltinName+16, "q", 1))
 
9969
                IntrinsicID = Intrinsic::spu_si_fceq;
 
9970
              break;
 
9971
            case 'g':
 
9972
              if (!memcmp(BuiltinName+16, "t", 1))
 
9973
                IntrinsicID = Intrinsic::spu_si_fcgt;
 
9974
              break;
 
9975
            }
 
9976
            break;
 
9977
          case 'n':
 
9978
            if (!memcmp(BuiltinName+15, "ms", 2))
 
9979
              IntrinsicID = Intrinsic::spu_si_fnms;
 
9980
            break;
 
9981
          }
 
9982
          break;
 
9983
        case 'm':
 
9984
          if (!memcmp(BuiltinName+14, "py", 2)) {
 
9985
            switch (BuiltinName[16]) {  // "__builtin_si_mpy"
 
9986
            case 'a':
 
9987
              IntrinsicID = Intrinsic::spu_si_mpya;
 
9988
              break;
 
9989
            case 'h':
 
9990
              IntrinsicID = Intrinsic::spu_si_mpyh;
 
9991
              break;
 
9992
            case 'i':
 
9993
              IntrinsicID = Intrinsic::spu_si_mpyi;
 
9994
              break;
 
9995
            case 's':
 
9996
              IntrinsicID = Intrinsic::spu_si_mpys;
 
9997
              break;
 
9998
            case 'u':
 
9999
              IntrinsicID = Intrinsic::spu_si_mpyu;
 
10000
              break;
 
10001
            }
 
10002
          }
 
10003
          break;
 
10004
        case 'n':
 
10005
          if (!memcmp(BuiltinName+14, "and", 3))
 
10006
            IntrinsicID = Intrinsic::spu_si_nand;
 
10007
          break;
 
10008
        case 'o':
 
10009
          if (!memcmp(BuiltinName+14, "r", 1)) {
 
10010
            switch (BuiltinName[15]) {  // "__builtin_si_or"
 
10011
            case 'b':
 
10012
              if (!memcmp(BuiltinName+16, "i", 1))
 
10013
                IntrinsicID = Intrinsic::spu_si_orbi;
 
10014
              break;
 
10015
            case 'h':
 
10016
              if (!memcmp(BuiltinName+16, "i", 1))
 
10017
                IntrinsicID = Intrinsic::spu_si_orhi;
 
10018
              break;
 
10019
            }
 
10020
          }
 
10021
          break;
 
10022
        case 's':
 
10023
          switch (BuiltinName[14]) {  // "__builtin_si_s"
 
10024
          case 'f':
 
10025
            if (!memcmp(BuiltinName+15, "hi", 2))
 
10026
              IntrinsicID = Intrinsic::spu_si_sfhi;
 
10027
            break;
 
10028
          case 'h':
 
10029
            if (!memcmp(BuiltinName+15, "li", 2))
 
10030
              IntrinsicID = Intrinsic::spu_si_shli;
 
10031
            break;
 
10032
          }
 
10033
          break;
 
10034
        case 'x':
 
10035
          if (!memcmp(BuiltinName+14, "ori", 3))
 
10036
            IntrinsicID = Intrinsic::spu_si_xori;
 
10037
          break;
 
10038
        }
 
10039
      }
 
10040
      break;
 
10041
    case 18:
 
10042
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
10043
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
10044
        case 'a':
 
10045
          if (!memcmp(BuiltinName+14, "nd", 2)) {
 
10046
            switch (BuiltinName[16]) {  // "__builtin_si_and"
 
10047
            case 'b':
 
10048
              if (!memcmp(BuiltinName+17, "i", 1))
 
10049
                IntrinsicID = Intrinsic::spu_si_andbi;
 
10050
              break;
 
10051
            case 'h':
 
10052
              if (!memcmp(BuiltinName+17, "i", 1))
 
10053
                IntrinsicID = Intrinsic::spu_si_andhi;
 
10054
              break;
 
10055
            }
 
10056
          }
 
10057
          break;
 
10058
        case 'c':
 
10059
          switch (BuiltinName[14]) {  // "__builtin_si_c"
 
10060
          case 'e':
 
10061
            if (!memcmp(BuiltinName+15, "q", 1)) {
 
10062
              switch (BuiltinName[16]) {  // "__builtin_si_ceq"
 
10063
              case 'b':
 
10064
                if (!memcmp(BuiltinName+17, "i", 1))
 
10065
                  IntrinsicID = Intrinsic::spu_si_ceqbi;
 
10066
                break;
 
10067
              case 'h':
 
10068
                if (!memcmp(BuiltinName+17, "i", 1))
 
10069
                  IntrinsicID = Intrinsic::spu_si_ceqhi;
 
10070
                break;
 
10071
              }
 
10072
            }
 
10073
            break;
 
10074
          case 'g':
 
10075
            if (!memcmp(BuiltinName+15, "t", 1)) {
 
10076
              switch (BuiltinName[16]) {  // "__builtin_si_cgt"
 
10077
              case 'b':
 
10078
                if (!memcmp(BuiltinName+17, "i", 1))
 
10079
                  IntrinsicID = Intrinsic::spu_si_cgtbi;
 
10080
                break;
 
10081
              case 'h':
 
10082
                if (!memcmp(BuiltinName+17, "i", 1))
 
10083
                  IntrinsicID = Intrinsic::spu_si_cgthi;
 
10084
                break;
 
10085
              }
 
10086
            }
 
10087
            break;
 
10088
          case 'l':
 
10089
            if (!memcmp(BuiltinName+15, "gt", 2)) {
 
10090
              switch (BuiltinName[17]) {  // "__builtin_si_clgt"
 
10091
              case 'b':
 
10092
                IntrinsicID = Intrinsic::spu_si_clgtb;
 
10093
                break;
 
10094
              case 'h':
 
10095
                IntrinsicID = Intrinsic::spu_si_clgth;
 
10096
                break;
 
10097
              case 'i':
 
10098
                IntrinsicID = Intrinsic::spu_si_clgti;
 
10099
                break;
 
10100
              }
 
10101
            }
 
10102
            break;
 
10103
          }
 
10104
          break;
 
10105
        case 'd':
 
10106
          if (!memcmp(BuiltinName+14, "fnm", 3)) {
 
10107
            switch (BuiltinName[17]) {  // "__builtin_si_dfnm"
 
10108
            case 'a':
 
10109
              IntrinsicID = Intrinsic::spu_si_dfnma;
 
10110
              break;
 
10111
            case 's':
 
10112
              IntrinsicID = Intrinsic::spu_si_dfnms;
 
10113
              break;
 
10114
            }
 
10115
          }
 
10116
          break;
 
10117
        case 'f':
 
10118
          switch (BuiltinName[14]) {  // "__builtin_si_f"
 
10119
          case 'c':
 
10120
            if (!memcmp(BuiltinName+15, "m", 1)) {
 
10121
              switch (BuiltinName[16]) {  // "__builtin_si_fcm"
 
10122
              case 'e':
 
10123
                if (!memcmp(BuiltinName+17, "q", 1))
 
10124
                  IntrinsicID = Intrinsic::spu_si_fcmeq;
 
10125
                break;
 
10126
              case 'g':
 
10127
                if (!memcmp(BuiltinName+17, "t", 1))
 
10128
                  IntrinsicID = Intrinsic::spu_si_fcmgt;
 
10129
                break;
 
10130
              }
 
10131
            }
 
10132
            break;
 
10133
          case 's':
 
10134
            if (!memcmp(BuiltinName+15, "mbi", 3))
 
10135
              IntrinsicID = Intrinsic::spu_si_fsmbi;
 
10136
            break;
 
10137
          }
 
10138
          break;
 
10139
        case 'm':
 
10140
          if (!memcmp(BuiltinName+14, "py", 2)) {
 
10141
            switch (BuiltinName[16]) {  // "__builtin_si_mpy"
 
10142
            case 'h':
 
10143
              if (!memcmp(BuiltinName+17, "h", 1))
 
10144
                IntrinsicID = Intrinsic::spu_si_mpyhh;
 
10145
              break;
 
10146
            case 'u':
 
10147
              if (!memcmp(BuiltinName+17, "i", 1))
 
10148
                IntrinsicID = Intrinsic::spu_si_mpyui;
 
10149
              break;
 
10150
            }
 
10151
          }
 
10152
          break;
 
10153
        case 'x':
 
10154
          if (!memcmp(BuiltinName+14, "or", 2)) {
 
10155
            switch (BuiltinName[16]) {  // "__builtin_si_xor"
 
10156
            case 'b':
 
10157
              if (!memcmp(BuiltinName+17, "i", 1))
 
10158
                IntrinsicID = Intrinsic::spu_si_xorbi;
 
10159
              break;
 
10160
            case 'h':
 
10161
              if (!memcmp(BuiltinName+17, "i", 1))
 
10162
                IntrinsicID = Intrinsic::spu_si_xorhi;
 
10163
              break;
 
10164
            }
 
10165
          }
 
10166
          break;
 
10167
        }
 
10168
      }
 
10169
      break;
 
10170
    case 19:
 
10171
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
10172
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
10173
        case 'c':
 
10174
          if (!memcmp(BuiltinName+14, "lgt", 3)) {
 
10175
            switch (BuiltinName[17]) {  // "__builtin_si_clgt"
 
10176
            case 'b':
 
10177
              if (!memcmp(BuiltinName+18, "i", 1))
 
10178
                IntrinsicID = Intrinsic::spu_si_clgtbi;
 
10179
              break;
 
10180
            case 'h':
 
10181
              if (!memcmp(BuiltinName+18, "i", 1))
 
10182
                IntrinsicID = Intrinsic::spu_si_clgthi;
 
10183
              break;
 
10184
            }
 
10185
          }
 
10186
          break;
 
10187
        case 'm':
 
10188
          if (!memcmp(BuiltinName+14, "pyhh", 4)) {
 
10189
            switch (BuiltinName[18]) {  // "__builtin_si_mpyhh"
 
10190
            case 'a':
 
10191
              IntrinsicID = Intrinsic::spu_si_mpyhha;
 
10192
              break;
 
10193
            case 'u':
 
10194
              IntrinsicID = Intrinsic::spu_si_mpyhhu;
 
10195
              break;
 
10196
            }
 
10197
          }
 
10198
          break;
 
10199
        case 's':
 
10200
          if (!memcmp(BuiltinName+14, "hlqb", 4)) {
 
10201
            switch (BuiltinName[18]) {  // "__builtin_si_shlqb"
 
10202
            case 'i':
 
10203
              IntrinsicID = Intrinsic::spu_si_shlqbi;
 
10204
              break;
 
10205
            case 'y':
 
10206
              IntrinsicID = Intrinsic::spu_si_shlqby;
 
10207
              break;
 
10208
            }
 
10209
          }
 
10210
          break;
 
10211
        }
 
10212
      }
 
10213
      break;
 
10214
    case 20:
 
10215
      if (!memcmp(BuiltinName, "__builtin_si_", 13)) {
 
10216
        switch (BuiltinName[13]) {  // "__builtin_si_"
 
10217
        case 'm':
 
10218
          if (!memcmp(BuiltinName+14, "pyhhau", 6))
 
10219
            IntrinsicID = Intrinsic::spu_si_mpyhhau;
 
10220
          break;
 
10221
        case 's':
 
10222
          if (!memcmp(BuiltinName+14, "hlqb", 4)) {
 
10223
            switch (BuiltinName[18]) {  // "__builtin_si_shlqb"
 
10224
            case 'i':
 
10225
              if (!memcmp(BuiltinName+19, "i", 1))
 
10226
                IntrinsicID = Intrinsic::spu_si_shlqbii;
 
10227
              break;
 
10228
            case 'y':
 
10229
              if (!memcmp(BuiltinName+19, "i", 1))
 
10230
                IntrinsicID = Intrinsic::spu_si_shlqbyi;
 
10231
              break;
 
10232
            }
 
10233
          }
 
10234
          break;
 
10235
        }
 
10236
      }
 
10237
      break;
 
10238
    }
 
10239
  }
 
10240
  if (!strcmp(TargetPrefix, "x86")) {
 
10241
    switch (strlen(BuiltinName)) {
 
10242
    default: break;
 
10243
    case 19:
 
10244
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
10245
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
10246
        case 'd':
 
10247
          if (!memcmp(BuiltinName+16, "pp", 2)) {
 
10248
            switch (BuiltinName[18]) {  // "__builtin_ia32_dpp"
 
10249
            case 'd':
 
10250
              IntrinsicID = Intrinsic::x86_sse41_dppd;
 
10251
              break;
 
10252
            case 's':
 
10253
              IntrinsicID = Intrinsic::x86_sse41_dpps;
 
10254
              break;
 
10255
            }
 
10256
          }
 
10257
          break;
 
10258
        case 'e':
 
10259
          if (!memcmp(BuiltinName+16, "mms", 3))
 
10260
            IntrinsicID = Intrinsic::x86_mmx_emms;
 
10261
          break;
 
10262
        }
 
10263
      }
 
10264
      break;
 
10265
    case 20:
 
10266
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
10267
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
10268
        case 'a':
 
10269
          if (!memcmp(BuiltinName+16, "dds", 3)) {
 
10270
            switch (BuiltinName[19]) {  // "__builtin_ia32_adds"
 
10271
            case 'd':
 
10272
              IntrinsicID = Intrinsic::x86_sse2_add_sd;
 
10273
              break;
 
10274
            case 's':
 
10275
              IntrinsicID = Intrinsic::x86_sse_add_ss;
 
10276
              break;
 
10277
            }
 
10278
          }
 
10279
          break;
 
10280
        case 'd':
 
10281
          if (!memcmp(BuiltinName+16, "ivs", 3)) {
 
10282
            switch (BuiltinName[19]) {  // "__builtin_ia32_divs"
 
10283
            case 'd':
 
10284
              IntrinsicID = Intrinsic::x86_sse2_div_sd;
 
10285
              break;
 
10286
            case 's':
 
10287
              IntrinsicID = Intrinsic::x86_sse_div_ss;
 
10288
              break;
 
10289
            }
 
10290
          }
 
10291
          break;
 
10292
        case 'f':
 
10293
          if (!memcmp(BuiltinName+16, "emms", 4))
 
10294
            IntrinsicID = Intrinsic::x86_mmx_femms;
 
10295
          break;
 
10296
        case 'l':
 
10297
          if (!memcmp(BuiltinName+16, "ddqu", 4))
 
10298
            IntrinsicID = Intrinsic::x86_sse3_ldu_dq;
 
10299
          break;
 
10300
        case 'm':
 
10301
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
 
10302
          case 'a':
 
10303
            if (!memcmp(BuiltinName+17, "x", 1)) {
 
10304
              switch (BuiltinName[18]) {  // "__builtin_ia32_max"
 
10305
              case 'p':
 
10306
                switch (BuiltinName[19]) {  // "__builtin_ia32_maxp"
 
10307
                case 'd':
 
10308
                  IntrinsicID = Intrinsic::x86_sse2_max_pd;
 
10309
                  break;
 
10310
                case 's':
 
10311
                  IntrinsicID = Intrinsic::x86_sse_max_ps;
 
10312
                  break;
 
10313
                }
 
10314
                break;
 
10315
              case 's':
 
10316
                switch (BuiltinName[19]) {  // "__builtin_ia32_maxs"
 
10317
                case 'd':
 
10318
                  IntrinsicID = Intrinsic::x86_sse2_max_sd;
 
10319
                  break;
 
10320
                case 's':
 
10321
                  IntrinsicID = Intrinsic::x86_sse_max_ss;
 
10322
                  break;
 
10323
                }
 
10324
                break;
 
10325
              }
 
10326
            }
 
10327
            break;
 
10328
          case 'i':
 
10329
            if (!memcmp(BuiltinName+17, "n", 1)) {
 
10330
              switch (BuiltinName[18]) {  // "__builtin_ia32_min"
 
10331
              case 'p':
 
10332
                switch (BuiltinName[19]) {  // "__builtin_ia32_minp"
 
10333
                case 'd':
 
10334
                  IntrinsicID = Intrinsic::x86_sse2_min_pd;
 
10335
                  break;
 
10336
                case 's':
 
10337
                  IntrinsicID = Intrinsic::x86_sse_min_ps;
 
10338
                  break;
 
10339
                }
 
10340
                break;
 
10341
              case 's':
 
10342
                switch (BuiltinName[19]) {  // "__builtin_ia32_mins"
 
10343
                case 'd':
 
10344
                  IntrinsicID = Intrinsic::x86_sse2_min_sd;
 
10345
                  break;
 
10346
                case 's':
 
10347
                  IntrinsicID = Intrinsic::x86_sse_min_ss;
 
10348
                  break;
 
10349
                }
 
10350
                break;
 
10351
              }
 
10352
            }
 
10353
            break;
 
10354
          case 'u':
 
10355
            if (!memcmp(BuiltinName+17, "ls", 2)) {
 
10356
              switch (BuiltinName[19]) {  // "__builtin_ia32_muls"
 
10357
              case 'd':
 
10358
                IntrinsicID = Intrinsic::x86_sse2_mul_sd;
 
10359
                break;
 
10360
              case 's':
 
10361
                IntrinsicID = Intrinsic::x86_sse_mul_ss;
 
10362
                break;
 
10363
              }
 
10364
            }
 
10365
            break;
 
10366
          case 'w':
 
10367
            if (!memcmp(BuiltinName+17, "ait", 3))
 
10368
              IntrinsicID = Intrinsic::x86_sse3_mwait;
 
10369
            break;
 
10370
          }
 
10371
          break;
 
10372
        case 'p':
 
10373
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
10374
          case 'a':
 
10375
            switch (BuiltinName[17]) {  // "__builtin_ia32_pa"
 
10376
            case 'b':
 
10377
              if (!memcmp(BuiltinName+18, "s", 1)) {
 
10378
                switch (BuiltinName[19]) {  // "__builtin_ia32_pabs"
 
10379
                case 'b':
 
10380
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_b;
 
10381
                  break;
 
10382
                case 'd':
 
10383
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_d;
 
10384
                  break;
 
10385
                case 'w':
 
10386
                  IntrinsicID = Intrinsic::x86_ssse3_pabs_w;
 
10387
                  break;
 
10388
                }
 
10389
              }
 
10390
              break;
 
10391
            case 'v':
 
10392
              if (!memcmp(BuiltinName+18, "g", 1)) {
 
10393
                switch (BuiltinName[19]) {  // "__builtin_ia32_pavg"
 
10394
                case 'b':
 
10395
                  IntrinsicID = Intrinsic::x86_mmx_pavg_b;
 
10396
                  break;
 
10397
                case 'w':
 
10398
                  IntrinsicID = Intrinsic::x86_mmx_pavg_w;
 
10399
                  break;
 
10400
                }
 
10401
              }
 
10402
              break;
 
10403
            }
 
10404
            break;
 
10405
          case 's':
 
10406
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
10407
            case 'l':
 
10408
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
10409
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
 
10410
                case 'd':
 
10411
                  IntrinsicID = Intrinsic::x86_mmx_psll_d;
 
10412
                  break;
 
10413
                case 'q':
 
10414
                  IntrinsicID = Intrinsic::x86_mmx_psll_q;
 
10415
                  break;
 
10416
                case 'w':
 
10417
                  IntrinsicID = Intrinsic::x86_mmx_psll_w;
 
10418
                  break;
 
10419
                }
 
10420
              }
 
10421
              break;
 
10422
            case 'r':
 
10423
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
 
10424
              case 'a':
 
10425
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
 
10426
                case 'd':
 
10427
                  IntrinsicID = Intrinsic::x86_mmx_psra_d;
 
10428
                  break;
 
10429
                case 'w':
 
10430
                  IntrinsicID = Intrinsic::x86_mmx_psra_w;
 
10431
                  break;
 
10432
                }
 
10433
                break;
 
10434
              case 'l':
 
10435
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
 
10436
                case 'd':
 
10437
                  IntrinsicID = Intrinsic::x86_mmx_psrl_d;
 
10438
                  break;
 
10439
                case 'q':
 
10440
                  IntrinsicID = Intrinsic::x86_mmx_psrl_q;
 
10441
                  break;
 
10442
                case 'w':
 
10443
                  IntrinsicID = Intrinsic::x86_mmx_psrl_w;
 
10444
                  break;
 
10445
                }
 
10446
                break;
 
10447
              }
 
10448
              break;
 
10449
            }
 
10450
            break;
 
10451
          }
 
10452
          break;
 
10453
        case 'r':
 
10454
          if (!memcmp(BuiltinName+16, "cp", 2)) {
 
10455
            switch (BuiltinName[18]) {  // "__builtin_ia32_rcp"
 
10456
            case 'p':
 
10457
              if (!memcmp(BuiltinName+19, "s", 1))
 
10458
                IntrinsicID = Intrinsic::x86_sse_rcp_ps;
 
10459
              break;
 
10460
            case 's':
 
10461
              if (!memcmp(BuiltinName+19, "s", 1))
 
10462
                IntrinsicID = Intrinsic::x86_sse_rcp_ss;
 
10463
              break;
 
10464
            }
 
10465
          }
 
10466
          break;
 
10467
        case 's':
 
10468
          if (!memcmp(BuiltinName+16, "ubs", 3)) {
 
10469
            switch (BuiltinName[19]) {  // "__builtin_ia32_subs"
 
10470
            case 'd':
 
10471
              IntrinsicID = Intrinsic::x86_sse2_sub_sd;
 
10472
              break;
 
10473
            case 's':
 
10474
              IntrinsicID = Intrinsic::x86_sse_sub_ss;
 
10475
              break;
 
10476
            }
 
10477
          }
 
10478
          break;
 
10479
        }
 
10480
      }
 
10481
      break;
 
10482
    case 21:
 
10483
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
10484
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
10485
        case 'c':
 
10486
          if (!memcmp(BuiltinName+16, "omi", 3)) {
 
10487
            switch (BuiltinName[19]) {  // "__builtin_ia32_comi"
 
10488
            case 'e':
 
10489
              if (!memcmp(BuiltinName+20, "q", 1))
 
10490
                IntrinsicID = Intrinsic::x86_sse_comieq_ss;
 
10491
              break;
 
10492
            case 'g':
 
10493
              switch (BuiltinName[20]) {  // "__builtin_ia32_comig"
 
10494
              case 'e':
 
10495
                IntrinsicID = Intrinsic::x86_sse_comige_ss;
 
10496
                break;
 
10497
              case 't':
 
10498
                IntrinsicID = Intrinsic::x86_sse_comigt_ss;
 
10499
                break;
 
10500
              }
 
10501
              break;
 
10502
            case 'l':
 
10503
              switch (BuiltinName[20]) {  // "__builtin_ia32_comil"
 
10504
              case 'e':
 
10505
                IntrinsicID = Intrinsic::x86_sse_comile_ss;
 
10506
                break;
 
10507
              case 't':
 
10508
                IntrinsicID = Intrinsic::x86_sse_comilt_ss;
 
10509
                break;
 
10510
              }
 
10511
              break;
 
10512
            }
 
10513
          }
 
10514
          break;
 
10515
        case 'h':
 
10516
          switch (BuiltinName[16]) {  // "__builtin_ia32_h"
 
10517
          case 'a':
 
10518
            if (!memcmp(BuiltinName+17, "ddp", 3)) {
 
10519
              switch (BuiltinName[20]) {  // "__builtin_ia32_haddp"
 
10520
              case 'd':
 
10521
                IntrinsicID = Intrinsic::x86_sse3_hadd_pd;
 
10522
                break;
 
10523
              case 's':
 
10524
                IntrinsicID = Intrinsic::x86_sse3_hadd_ps;
 
10525
                break;
 
10526
              }
 
10527
            }
 
10528
            break;
 
10529
          case 's':
 
10530
            if (!memcmp(BuiltinName+17, "ubp", 3)) {
 
10531
              switch (BuiltinName[20]) {  // "__builtin_ia32_hsubp"
 
10532
              case 'd':
 
10533
                IntrinsicID = Intrinsic::x86_sse3_hsub_pd;
 
10534
                break;
 
10535
              case 's':
 
10536
                IntrinsicID = Intrinsic::x86_sse3_hsub_ps;
 
10537
                break;
 
10538
              }
 
10539
            }
 
10540
            break;
 
10541
          }
 
10542
          break;
 
10543
        case 'l':
 
10544
          if (!memcmp(BuiltinName+16, "fence", 5))
 
10545
            IntrinsicID = Intrinsic::x86_sse2_lfence;
 
10546
          break;
 
10547
        case 'm':
 
10548
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
 
10549
          case 'f':
 
10550
            if (!memcmp(BuiltinName+17, "ence", 4))
 
10551
              IntrinsicID = Intrinsic::x86_sse2_mfence;
 
10552
            break;
 
10553
          case 'o':
 
10554
            if (!memcmp(BuiltinName+17, "vnt", 3)) {
 
10555
              switch (BuiltinName[20]) {  // "__builtin_ia32_movnt"
 
10556
              case 'i':
 
10557
                IntrinsicID = Intrinsic::x86_sse2_movnt_i;
 
10558
                break;
 
10559
              case 'q':
 
10560
                IntrinsicID = Intrinsic::x86_mmx_movnt_dq;
 
10561
                break;
 
10562
              }
 
10563
            }
 
10564
            break;
 
10565
          }
 
10566
          break;
 
10567
        case 'p':
 
10568
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
10569
          case 'a':
 
10570
            if (!memcmp(BuiltinName+17, "dds", 3)) {
 
10571
              switch (BuiltinName[20]) {  // "__builtin_ia32_padds"
 
10572
              case 'b':
 
10573
                IntrinsicID = Intrinsic::x86_mmx_padds_b;
 
10574
                break;
 
10575
              case 'w':
 
10576
                IntrinsicID = Intrinsic::x86_mmx_padds_w;
 
10577
                break;
 
10578
              }
 
10579
            }
 
10580
            break;
 
10581
          case 'h':
 
10582
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
 
10583
            case 'a':
 
10584
              if (!memcmp(BuiltinName+18, "dd", 2)) {
 
10585
                switch (BuiltinName[20]) {  // "__builtin_ia32_phadd"
 
10586
                case 'd':
 
10587
                  IntrinsicID = Intrinsic::x86_ssse3_phadd_d;
 
10588
                  break;
 
10589
                case 'w':
 
10590
                  IntrinsicID = Intrinsic::x86_ssse3_phadd_w;
 
10591
                  break;
 
10592
                }
 
10593
              }
 
10594
              break;
 
10595
            case 's':
 
10596
              if (!memcmp(BuiltinName+18, "ub", 2)) {
 
10597
                switch (BuiltinName[20]) {  // "__builtin_ia32_phsub"
 
10598
                case 'd':
 
10599
                  IntrinsicID = Intrinsic::x86_ssse3_phsub_d;
 
10600
                  break;
 
10601
                case 'w':
 
10602
                  IntrinsicID = Intrinsic::x86_ssse3_phsub_w;
 
10603
                  break;
 
10604
                }
 
10605
              }
 
10606
              break;
 
10607
            }
 
10608
            break;
 
10609
          case 'm':
 
10610
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
10611
            case 'a':
 
10612
              if (!memcmp(BuiltinName+18, "x", 1)) {
 
10613
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmax"
 
10614
                case 's':
 
10615
                  if (!memcmp(BuiltinName+20, "w", 1))
 
10616
                    IntrinsicID = Intrinsic::x86_mmx_pmaxs_w;
 
10617
                  break;
 
10618
                case 'u':
 
10619
                  if (!memcmp(BuiltinName+20, "b", 1))
 
10620
                    IntrinsicID = Intrinsic::x86_mmx_pmaxu_b;
 
10621
                  break;
 
10622
                }
 
10623
              }
 
10624
              break;
 
10625
            case 'i':
 
10626
              if (!memcmp(BuiltinName+18, "n", 1)) {
 
10627
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmin"
 
10628
                case 's':
 
10629
                  if (!memcmp(BuiltinName+20, "w", 1))
 
10630
                    IntrinsicID = Intrinsic::x86_mmx_pmins_w;
 
10631
                  break;
 
10632
                case 'u':
 
10633
                  if (!memcmp(BuiltinName+20, "b", 1))
 
10634
                    IntrinsicID = Intrinsic::x86_mmx_pminu_b;
 
10635
                  break;
 
10636
                }
 
10637
              }
 
10638
              break;
 
10639
            case 'u':
 
10640
              if (!memcmp(BuiltinName+18, "lhw", 3))
 
10641
                IntrinsicID = Intrinsic::x86_mmx_pmulh_w;
 
10642
              break;
 
10643
            }
 
10644
            break;
 
10645
          case 's':
 
10646
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
10647
            case 'a':
 
10648
              if (!memcmp(BuiltinName+18, "dbw", 3))
 
10649
                IntrinsicID = Intrinsic::x86_mmx_psad_bw;
 
10650
              break;
 
10651
            case 'h':
 
10652
              if (!memcmp(BuiltinName+18, "ufb", 3))
 
10653
                IntrinsicID = Intrinsic::x86_ssse3_pshuf_b;
 
10654
              break;
 
10655
            case 'i':
 
10656
              if (!memcmp(BuiltinName+18, "gn", 2)) {
 
10657
                switch (BuiltinName[20]) {  // "__builtin_ia32_psign"
 
10658
                case 'b':
 
10659
                  IntrinsicID = Intrinsic::x86_ssse3_psign_b;
 
10660
                  break;
 
10661
                case 'd':
 
10662
                  IntrinsicID = Intrinsic::x86_ssse3_psign_d;
 
10663
                  break;
 
10664
                case 'w':
 
10665
                  IntrinsicID = Intrinsic::x86_ssse3_psign_w;
 
10666
                  break;
 
10667
                }
 
10668
              }
 
10669
              break;
 
10670
            case 'l':
 
10671
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
10672
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
 
10673
                case 'd':
 
10674
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10675
                    IntrinsicID = Intrinsic::x86_mmx_pslli_d;
 
10676
                  break;
 
10677
                case 'q':
 
10678
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10679
                    IntrinsicID = Intrinsic::x86_mmx_pslli_q;
 
10680
                  break;
 
10681
                case 'w':
 
10682
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10683
                    IntrinsicID = Intrinsic::x86_mmx_pslli_w;
 
10684
                  break;
 
10685
                }
 
10686
              }
 
10687
              break;
 
10688
            case 'r':
 
10689
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
 
10690
              case 'a':
 
10691
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
 
10692
                case 'd':
 
10693
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10694
                    IntrinsicID = Intrinsic::x86_mmx_psrai_d;
 
10695
                  break;
 
10696
                case 'w':
 
10697
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10698
                    IntrinsicID = Intrinsic::x86_mmx_psrai_w;
 
10699
                  break;
 
10700
                }
 
10701
                break;
 
10702
              case 'l':
 
10703
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
 
10704
                case 'd':
 
10705
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10706
                    IntrinsicID = Intrinsic::x86_mmx_psrli_d;
 
10707
                  break;
 
10708
                case 'q':
 
10709
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10710
                    IntrinsicID = Intrinsic::x86_mmx_psrli_q;
 
10711
                  break;
 
10712
                case 'w':
 
10713
                  if (!memcmp(BuiltinName+20, "i", 1))
 
10714
                    IntrinsicID = Intrinsic::x86_mmx_psrli_w;
 
10715
                  break;
 
10716
                }
 
10717
                break;
 
10718
              }
 
10719
              break;
 
10720
            case 'u':
 
10721
              if (!memcmp(BuiltinName+18, "bs", 2)) {
 
10722
                switch (BuiltinName[20]) {  // "__builtin_ia32_psubs"
 
10723
                case 'b':
 
10724
                  IntrinsicID = Intrinsic::x86_mmx_psubs_b;
 
10725
                  break;
 
10726
                case 'w':
 
10727
                  IntrinsicID = Intrinsic::x86_mmx_psubs_w;
 
10728
                  break;
 
10729
                }
 
10730
              }
 
10731
              break;
 
10732
            }
 
10733
            break;
 
10734
          }
 
10735
          break;
 
10736
        case 's':
 
10737
          switch (BuiltinName[16]) {  // "__builtin_ia32_s"
 
10738
          case 'f':
 
10739
            if (!memcmp(BuiltinName+17, "ence", 4))
 
10740
              IntrinsicID = Intrinsic::x86_sse_sfence;
 
10741
            break;
 
10742
          case 'q':
 
10743
            if (!memcmp(BuiltinName+17, "rt", 2)) {
 
10744
              switch (BuiltinName[19]) {  // "__builtin_ia32_sqrt"
 
10745
              case 'p':
 
10746
                switch (BuiltinName[20]) {  // "__builtin_ia32_sqrtp"
 
10747
                case 'd':
 
10748
                  IntrinsicID = Intrinsic::x86_sse2_sqrt_pd;
 
10749
                  break;
 
10750
                case 's':
 
10751
                  IntrinsicID = Intrinsic::x86_sse_sqrt_ps;
 
10752
                  break;
 
10753
                }
 
10754
                break;
 
10755
              case 's':
 
10756
                switch (BuiltinName[20]) {  // "__builtin_ia32_sqrts"
 
10757
                case 'd':
 
10758
                  IntrinsicID = Intrinsic::x86_sse2_sqrt_sd;
 
10759
                  break;
 
10760
                case 's':
 
10761
                  IntrinsicID = Intrinsic::x86_sse_sqrt_ss;
 
10762
                  break;
 
10763
                }
 
10764
                break;
 
10765
              }
 
10766
            }
 
10767
            break;
 
10768
          }
 
10769
          break;
 
10770
        }
 
10771
      }
 
10772
      break;
 
10773
    case 22:
 
10774
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
10775
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
10776
        case 'b':
 
10777
          if (!memcmp(BuiltinName+16, "lendp", 5)) {
 
10778
            switch (BuiltinName[21]) {  // "__builtin_ia32_blendp"
 
10779
            case 'd':
 
10780
              IntrinsicID = Intrinsic::x86_sse41_blendpd;
 
10781
              break;
 
10782
            case 's':
 
10783
              IntrinsicID = Intrinsic::x86_sse41_blendps;
 
10784
              break;
 
10785
            }
 
10786
          }
 
10787
          break;
 
10788
        case 'c':
 
10789
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
 
10790
          case 'l':
 
10791
            if (!memcmp(BuiltinName+17, "flush", 5))
 
10792
              IntrinsicID = Intrinsic::x86_sse2_clflush;
 
10793
            break;
 
10794
          case 'o':
 
10795
            if (!memcmp(BuiltinName+17, "mineq", 5))
 
10796
              IntrinsicID = Intrinsic::x86_sse_comineq_ss;
 
10797
            break;
 
10798
          case 'r':
 
10799
            if (!memcmp(BuiltinName+17, "c32", 3)) {
 
10800
              switch (BuiltinName[20]) {  // "__builtin_ia32_crc32"
 
10801
              case 'd':
 
10802
                if (!memcmp(BuiltinName+21, "i", 1))
 
10803
                  IntrinsicID = Intrinsic::x86_sse42_crc32_64;
 
10804
                break;
 
10805
              case 'h':
 
10806
                if (!memcmp(BuiltinName+21, "i", 1))
 
10807
                  IntrinsicID = Intrinsic::x86_sse42_crc32_16;
 
10808
                break;
 
10809
              case 'q':
 
10810
                if (!memcmp(BuiltinName+21, "i", 1))
 
10811
                  IntrinsicID = Intrinsic::x86_sse42_crc32_8;
 
10812
                break;
 
10813
              case 's':
 
10814
                if (!memcmp(BuiltinName+21, "i", 1))
 
10815
                  IntrinsicID = Intrinsic::x86_sse42_crc32_32;
 
10816
                break;
 
10817
              }
 
10818
            }
 
10819
            break;
 
10820
          }
 
10821
          break;
 
10822
        case 'l':
 
10823
          if (!memcmp(BuiltinName+16, "oad", 3)) {
 
10824
            switch (BuiltinName[19]) {  // "__builtin_ia32_load"
 
10825
            case 'd':
 
10826
              if (!memcmp(BuiltinName+20, "qu", 2))
 
10827
                IntrinsicID = Intrinsic::x86_sse2_loadu_dq;
 
10828
              break;
 
10829
            case 'u':
 
10830
              if (!memcmp(BuiltinName+20, "p", 1)) {
 
10831
                switch (BuiltinName[21]) {  // "__builtin_ia32_loadup"
 
10832
                case 'd':
 
10833
                  IntrinsicID = Intrinsic::x86_sse2_loadu_pd;
 
10834
                  break;
 
10835
                case 's':
 
10836
                  IntrinsicID = Intrinsic::x86_sse_loadu_ps;
 
10837
                  break;
 
10838
                }
 
10839
              }
 
10840
              break;
 
10841
            }
 
10842
          }
 
10843
          break;
 
10844
        case 'm':
 
10845
          if (!memcmp(BuiltinName+16, "o", 1)) {
 
10846
            switch (BuiltinName[17]) {  // "__builtin_ia32_mo"
 
10847
            case 'n':
 
10848
              if (!memcmp(BuiltinName+18, "itor", 4))
 
10849
                IntrinsicID = Intrinsic::x86_sse3_monitor;
 
10850
              break;
 
10851
            case 'v':
 
10852
              if (!memcmp(BuiltinName+18, "nt", 2)) {
 
10853
                switch (BuiltinName[20]) {  // "__builtin_ia32_movnt"
 
10854
                case 'd':
 
10855
                  if (!memcmp(BuiltinName+21, "q", 1))
 
10856
                    IntrinsicID = Intrinsic::x86_sse2_movnt_dq;
 
10857
                  break;
 
10858
                case 'p':
 
10859
                  switch (BuiltinName[21]) {  // "__builtin_ia32_movntp"
 
10860
                  case 'd':
 
10861
                    IntrinsicID = Intrinsic::x86_sse2_movnt_pd;
 
10862
                    break;
 
10863
                  case 's':
 
10864
                    IntrinsicID = Intrinsic::x86_sse_movnt_ps;
 
10865
                    break;
 
10866
                  }
 
10867
                  break;
 
10868
                }
 
10869
              }
 
10870
              break;
 
10871
            }
 
10872
          }
 
10873
          break;
 
10874
        case 'p':
 
10875
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
10876
          case 'a':
 
10877
            if (!memcmp(BuiltinName+17, "ddus", 4)) {
 
10878
              switch (BuiltinName[21]) {  // "__builtin_ia32_paddus"
 
10879
              case 'b':
 
10880
                IntrinsicID = Intrinsic::x86_mmx_paddus_b;
 
10881
                break;
 
10882
              case 'w':
 
10883
                IntrinsicID = Intrinsic::x86_mmx_paddus_w;
 
10884
                break;
 
10885
              }
 
10886
            }
 
10887
            break;
 
10888
          case 'c':
 
10889
            if (!memcmp(BuiltinName+17, "mp", 2)) {
 
10890
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
 
10891
              case 'e':
 
10892
                if (!memcmp(BuiltinName+20, "q", 1)) {
 
10893
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpeq"
 
10894
                  case 'b':
 
10895
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_b;
 
10896
                    break;
 
10897
                  case 'd':
 
10898
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_d;
 
10899
                    break;
 
10900
                  case 'q':
 
10901
                    IntrinsicID = Intrinsic::x86_sse41_pcmpeqq;
 
10902
                    break;
 
10903
                  case 'w':
 
10904
                    IntrinsicID = Intrinsic::x86_mmx_pcmpeq_w;
 
10905
                    break;
 
10906
                  }
 
10907
                }
 
10908
                break;
 
10909
              case 'g':
 
10910
                if (!memcmp(BuiltinName+20, "t", 1)) {
 
10911
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpgt"
 
10912
                  case 'b':
 
10913
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_b;
 
10914
                    break;
 
10915
                  case 'd':
 
10916
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_d;
 
10917
                    break;
 
10918
                  case 'q':
 
10919
                    IntrinsicID = Intrinsic::x86_sse42_pcmpgtq;
 
10920
                    break;
 
10921
                  case 'w':
 
10922
                    IntrinsicID = Intrinsic::x86_mmx_pcmpgt_w;
 
10923
                    break;
 
10924
                  }
 
10925
                }
 
10926
                break;
 
10927
              }
 
10928
            }
 
10929
            break;
 
10930
          case 'h':
 
10931
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
 
10932
            case 'a':
 
10933
              if (!memcmp(BuiltinName+18, "ddsw", 4))
 
10934
                IntrinsicID = Intrinsic::x86_ssse3_phadd_sw;
 
10935
              break;
 
10936
            case 's':
 
10937
              if (!memcmp(BuiltinName+18, "ubsw", 4))
 
10938
                IntrinsicID = Intrinsic::x86_ssse3_phsub_sw;
 
10939
              break;
 
10940
            }
 
10941
            break;
 
10942
          case 'm':
 
10943
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
10944
            case 'a':
 
10945
              if (!memcmp(BuiltinName+18, "ddwd", 4))
 
10946
                IntrinsicID = Intrinsic::x86_mmx_pmadd_wd;
 
10947
              break;
 
10948
            case 'u':
 
10949
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
10950
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
 
10951
                case 'h':
 
10952
                  if (!memcmp(BuiltinName+20, "uw", 2))
 
10953
                    IntrinsicID = Intrinsic::x86_mmx_pmulhu_w;
 
10954
                  break;
 
10955
                case 'u':
 
10956
                  if (!memcmp(BuiltinName+20, "dq", 2))
 
10957
                    IntrinsicID = Intrinsic::x86_mmx_pmulu_dq;
 
10958
                  break;
 
10959
                }
 
10960
              }
 
10961
              break;
 
10962
            }
 
10963
            break;
 
10964
          case 's':
 
10965
            if (!memcmp(BuiltinName+17, "ubus", 4)) {
 
10966
              switch (BuiltinName[21]) {  // "__builtin_ia32_psubus"
 
10967
              case 'b':
 
10968
                IntrinsicID = Intrinsic::x86_mmx_psubus_b;
 
10969
                break;
 
10970
              case 'w':
 
10971
                IntrinsicID = Intrinsic::x86_mmx_psubus_w;
 
10972
                break;
 
10973
              }
 
10974
            }
 
10975
            break;
 
10976
          }
 
10977
          break;
 
10978
        case 'r':
 
10979
          switch (BuiltinName[16]) {  // "__builtin_ia32_r"
 
10980
          case 'o':
 
10981
            if (!memcmp(BuiltinName+17, "und", 3)) {
 
10982
              switch (BuiltinName[20]) {  // "__builtin_ia32_round"
 
10983
              case 'p':
 
10984
                switch (BuiltinName[21]) {  // "__builtin_ia32_roundp"
 
10985
                case 'd':
 
10986
                  IntrinsicID = Intrinsic::x86_sse41_round_pd;
 
10987
                  break;
 
10988
                case 's':
 
10989
                  IntrinsicID = Intrinsic::x86_sse41_round_ps;
 
10990
                  break;
 
10991
                }
 
10992
                break;
 
10993
              case 's':
 
10994
                switch (BuiltinName[21]) {  // "__builtin_ia32_rounds"
 
10995
                case 'd':
 
10996
                  IntrinsicID = Intrinsic::x86_sse41_round_sd;
 
10997
                  break;
 
10998
                case 's':
 
10999
                  IntrinsicID = Intrinsic::x86_sse41_round_ss;
 
11000
                  break;
 
11001
                }
 
11002
                break;
 
11003
              }
 
11004
            }
 
11005
            break;
 
11006
          case 's':
 
11007
            if (!memcmp(BuiltinName+17, "qrt", 3)) {
 
11008
              switch (BuiltinName[20]) {  // "__builtin_ia32_rsqrt"
 
11009
              case 'p':
 
11010
                if (!memcmp(BuiltinName+21, "s", 1))
 
11011
                  IntrinsicID = Intrinsic::x86_sse_rsqrt_ps;
 
11012
                break;
 
11013
              case 's':
 
11014
                if (!memcmp(BuiltinName+21, "s", 1))
 
11015
                  IntrinsicID = Intrinsic::x86_sse_rsqrt_ss;
 
11016
                break;
 
11017
              }
 
11018
            }
 
11019
            break;
 
11020
          }
 
11021
          break;
 
11022
        case 'u':
 
11023
          if (!memcmp(BuiltinName+16, "comi", 4)) {
 
11024
            switch (BuiltinName[20]) {  // "__builtin_ia32_ucomi"
 
11025
            case 'e':
 
11026
              if (!memcmp(BuiltinName+21, "q", 1))
 
11027
                IntrinsicID = Intrinsic::x86_sse_ucomieq_ss;
 
11028
              break;
 
11029
            case 'g':
 
11030
              switch (BuiltinName[21]) {  // "__builtin_ia32_ucomig"
 
11031
              case 'e':
 
11032
                IntrinsicID = Intrinsic::x86_sse_ucomige_ss;
 
11033
                break;
 
11034
              case 't':
 
11035
                IntrinsicID = Intrinsic::x86_sse_ucomigt_ss;
 
11036
                break;
 
11037
              }
 
11038
              break;
 
11039
            case 'l':
 
11040
              switch (BuiltinName[21]) {  // "__builtin_ia32_ucomil"
 
11041
              case 'e':
 
11042
                IntrinsicID = Intrinsic::x86_sse_ucomile_ss;
 
11043
                break;
 
11044
              case 't':
 
11045
                IntrinsicID = Intrinsic::x86_sse_ucomilt_ss;
 
11046
                break;
 
11047
              }
 
11048
              break;
 
11049
            }
 
11050
          }
 
11051
          break;
 
11052
        }
 
11053
      }
 
11054
      break;
 
11055
    case 23:
 
11056
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
11057
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
11058
        case 'a':
 
11059
          if (!memcmp(BuiltinName+16, "ddsubp", 6)) {
 
11060
            switch (BuiltinName[22]) {  // "__builtin_ia32_addsubp"
 
11061
            case 'd':
 
11062
              IntrinsicID = Intrinsic::x86_sse3_addsub_pd;
 
11063
              break;
 
11064
            case 's':
 
11065
              IntrinsicID = Intrinsic::x86_sse3_addsub_ps;
 
11066
              break;
 
11067
            }
 
11068
          }
 
11069
          break;
 
11070
        case 'b':
 
11071
          if (!memcmp(BuiltinName+16, "lendvp", 6)) {
 
11072
            switch (BuiltinName[22]) {  // "__builtin_ia32_blendvp"
 
11073
            case 'd':
 
11074
              IntrinsicID = Intrinsic::x86_sse41_blendvpd;
 
11075
              break;
 
11076
            case 's':
 
11077
              IntrinsicID = Intrinsic::x86_sse41_blendvps;
 
11078
              break;
 
11079
            }
 
11080
          }
 
11081
          break;
 
11082
        case 'c':
 
11083
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
 
11084
          case 'o':
 
11085
            if (!memcmp(BuiltinName+17, "misd", 4)) {
 
11086
              switch (BuiltinName[21]) {  // "__builtin_ia32_comisd"
 
11087
              case 'e':
 
11088
                if (!memcmp(BuiltinName+22, "q", 1))
 
11089
                  IntrinsicID = Intrinsic::x86_sse2_comieq_sd;
 
11090
                break;
 
11091
              case 'g':
 
11092
                switch (BuiltinName[22]) {  // "__builtin_ia32_comisdg"
 
11093
                case 'e':
 
11094
                  IntrinsicID = Intrinsic::x86_sse2_comige_sd;
 
11095
                  break;
 
11096
                case 't':
 
11097
                  IntrinsicID = Intrinsic::x86_sse2_comigt_sd;
 
11098
                  break;
 
11099
                }
 
11100
                break;
 
11101
              case 'l':
 
11102
                switch (BuiltinName[22]) {  // "__builtin_ia32_comisdl"
 
11103
                case 'e':
 
11104
                  IntrinsicID = Intrinsic::x86_sse2_comile_sd;
 
11105
                  break;
 
11106
                case 't':
 
11107
                  IntrinsicID = Intrinsic::x86_sse2_comilt_sd;
 
11108
                  break;
 
11109
                }
 
11110
                break;
 
11111
              }
 
11112
            }
 
11113
            break;
 
11114
          case 'v':
 
11115
            if (!memcmp(BuiltinName+17, "t", 1)) {
 
11116
              switch (BuiltinName[18]) {  // "__builtin_ia32_cvt"
 
11117
              case 'd':
 
11118
                if (!memcmp(BuiltinName+19, "q2p", 3)) {
 
11119
                  switch (BuiltinName[22]) {  // "__builtin_ia32_cvtdq2p"
 
11120
                  case 'd':
 
11121
                    IntrinsicID = Intrinsic::x86_sse2_cvtdq2pd;
 
11122
                    break;
 
11123
                  case 's':
 
11124
                    IntrinsicID = Intrinsic::x86_sse2_cvtdq2ps;
 
11125
                    break;
 
11126
                  }
 
11127
                }
 
11128
                break;
 
11129
              case 'p':
 
11130
                switch (BuiltinName[19]) {  // "__builtin_ia32_cvtp"
 
11131
                case 'd':
 
11132
                  if (!memcmp(BuiltinName+20, "2", 1)) {
 
11133
                    switch (BuiltinName[21]) {  // "__builtin_ia32_cvtpd2"
 
11134
                    case 'd':
 
11135
                      if (!memcmp(BuiltinName+22, "q", 1))
 
11136
                        IntrinsicID = Intrinsic::x86_sse2_cvtpd2dq;
 
11137
                      break;
 
11138
                    case 'p':
 
11139
                      switch (BuiltinName[22]) {  // "__builtin_ia32_cvtpd2p"
 
11140
                      case 'i':
 
11141
                        IntrinsicID = Intrinsic::x86_sse_cvtpd2pi;
 
11142
                        break;
 
11143
                      case 's':
 
11144
                        IntrinsicID = Intrinsic::x86_sse2_cvtpd2ps;
 
11145
                        break;
 
11146
                      }
 
11147
                      break;
 
11148
                    }
 
11149
                  }
 
11150
                  break;
 
11151
                case 'i':
 
11152
                  if (!memcmp(BuiltinName+20, "2p", 2)) {
 
11153
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtpi2p"
 
11154
                    case 'd':
 
11155
                      IntrinsicID = Intrinsic::x86_sse_cvtpi2pd;
 
11156
                      break;
 
11157
                    case 's':
 
11158
                      IntrinsicID = Intrinsic::x86_sse_cvtpi2ps;
 
11159
                      break;
 
11160
                    }
 
11161
                  }
 
11162
                  break;
 
11163
                case 's':
 
11164
                  if (!memcmp(BuiltinName+20, "2", 1)) {
 
11165
                    switch (BuiltinName[21]) {  // "__builtin_ia32_cvtps2"
 
11166
                    case 'd':
 
11167
                      if (!memcmp(BuiltinName+22, "q", 1))
 
11168
                        IntrinsicID = Intrinsic::x86_sse2_cvtps2dq;
 
11169
                      break;
 
11170
                    case 'p':
 
11171
                      switch (BuiltinName[22]) {  // "__builtin_ia32_cvtps2p"
 
11172
                      case 'd':
 
11173
                        IntrinsicID = Intrinsic::x86_sse2_cvtps2pd;
 
11174
                        break;
 
11175
                      case 'i':
 
11176
                        IntrinsicID = Intrinsic::x86_sse_cvtps2pi;
 
11177
                        break;
 
11178
                      }
 
11179
                      break;
 
11180
                    }
 
11181
                  }
 
11182
                  break;
 
11183
                }
 
11184
                break;
 
11185
              case 's':
 
11186
                switch (BuiltinName[19]) {  // "__builtin_ia32_cvts"
 
11187
                case 'd':
 
11188
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
 
11189
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtsd2s"
 
11190
                    case 'i':
 
11191
                      IntrinsicID = Intrinsic::x86_sse2_cvtsd2si;
 
11192
                      break;
 
11193
                    case 's':
 
11194
                      IntrinsicID = Intrinsic::x86_sse2_cvtsd2ss;
 
11195
                      break;
 
11196
                    }
 
11197
                  }
 
11198
                  break;
 
11199
                case 'i':
 
11200
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
 
11201
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtsi2s"
 
11202
                    case 'd':
 
11203
                      IntrinsicID = Intrinsic::x86_sse2_cvtsi2sd;
 
11204
                      break;
 
11205
                    case 's':
 
11206
                      IntrinsicID = Intrinsic::x86_sse_cvtsi2ss;
 
11207
                      break;
 
11208
                    }
 
11209
                  }
 
11210
                  break;
 
11211
                case 's':
 
11212
                  if (!memcmp(BuiltinName+20, "2s", 2)) {
 
11213
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvtss2s"
 
11214
                    case 'd':
 
11215
                      IntrinsicID = Intrinsic::x86_sse2_cvtss2sd;
 
11216
                      break;
 
11217
                    case 'i':
 
11218
                      IntrinsicID = Intrinsic::x86_sse_cvtss2si;
 
11219
                      break;
 
11220
                    }
 
11221
                  }
 
11222
                  break;
 
11223
                }
 
11224
                break;
 
11225
              }
 
11226
            }
 
11227
            break;
 
11228
          }
 
11229
          break;
 
11230
        case 'm':
 
11231
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
 
11232
          case 'a':
 
11233
            if (!memcmp(BuiltinName+17, "skmovq", 6))
 
11234
              IntrinsicID = Intrinsic::x86_mmx_maskmovq;
 
11235
            break;
 
11236
          case 'o':
 
11237
            if (!memcmp(BuiltinName+17, "v", 1)) {
 
11238
              switch (BuiltinName[18]) {  // "__builtin_ia32_mov"
 
11239
              case 'm':
 
11240
                if (!memcmp(BuiltinName+19, "skp", 3)) {
 
11241
                  switch (BuiltinName[22]) {  // "__builtin_ia32_movmskp"
 
11242
                  case 'd':
 
11243
                    IntrinsicID = Intrinsic::x86_sse2_movmsk_pd;
 
11244
                    break;
 
11245
                  case 's':
 
11246
                    IntrinsicID = Intrinsic::x86_sse_movmsk_ps;
 
11247
                    break;
 
11248
                  }
 
11249
                }
 
11250
                break;
 
11251
              case 'n':
 
11252
                if (!memcmp(BuiltinName+19, "tdqa", 4))
 
11253
                  IntrinsicID = Intrinsic::x86_sse41_movntdqa;
 
11254
                break;
 
11255
              }
 
11256
            }
 
11257
            break;
 
11258
          }
 
11259
          break;
 
11260
        case 'p':
 
11261
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
11262
          case 'a':
 
11263
            switch (BuiltinName[17]) {  // "__builtin_ia32_pa"
 
11264
            case 'b':
 
11265
              if (!memcmp(BuiltinName+18, "s", 1)) {
 
11266
                switch (BuiltinName[19]) {  // "__builtin_ia32_pabs"
 
11267
                case 'b':
 
11268
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11269
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_b_128;
 
11270
                  break;
 
11271
                case 'd':
 
11272
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11273
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_d_128;
 
11274
                  break;
 
11275
                case 'w':
 
11276
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11277
                    IntrinsicID = Intrinsic::x86_ssse3_pabs_w_128;
 
11278
                  break;
 
11279
                }
 
11280
              }
 
11281
              break;
 
11282
            case 'c':
 
11283
              if (!memcmp(BuiltinName+18, "k", 1)) {
 
11284
                switch (BuiltinName[19]) {  // "__builtin_ia32_pack"
 
11285
                case 's':
 
11286
                  if (!memcmp(BuiltinName+20, "s", 1)) {
 
11287
                    switch (BuiltinName[21]) {  // "__builtin_ia32_packss"
 
11288
                    case 'd':
 
11289
                      if (!memcmp(BuiltinName+22, "w", 1))
 
11290
                        IntrinsicID = Intrinsic::x86_mmx_packssdw;
 
11291
                      break;
 
11292
                    case 'w':
 
11293
                      if (!memcmp(BuiltinName+22, "b", 1))
 
11294
                        IntrinsicID = Intrinsic::x86_mmx_packsswb;
 
11295
                      break;
 
11296
                    }
 
11297
                  }
 
11298
                  break;
 
11299
                case 'u':
 
11300
                  if (!memcmp(BuiltinName+20, "swb", 3))
 
11301
                    IntrinsicID = Intrinsic::x86_mmx_packuswb;
 
11302
                  break;
 
11303
                }
 
11304
              }
 
11305
              break;
 
11306
            case 'v':
 
11307
              if (!memcmp(BuiltinName+18, "g", 1)) {
 
11308
                switch (BuiltinName[19]) {  // "__builtin_ia32_pavg"
 
11309
                case 'b':
 
11310
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11311
                    IntrinsicID = Intrinsic::x86_sse2_pavg_b;
 
11312
                  break;
 
11313
                case 'w':
 
11314
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11315
                    IntrinsicID = Intrinsic::x86_sse2_pavg_w;
 
11316
                  break;
 
11317
                }
 
11318
              }
 
11319
              break;
 
11320
            }
 
11321
            break;
 
11322
          case 'm':
 
11323
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
11324
            case 'o':
 
11325
              if (!memcmp(BuiltinName+18, "vmskb", 5))
 
11326
                IntrinsicID = Intrinsic::x86_mmx_pmovmskb;
 
11327
              break;
 
11328
            case 'u':
 
11329
              if (!memcmp(BuiltinName+18, "lhrsw", 5))
 
11330
                IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw;
 
11331
              break;
 
11332
            }
 
11333
            break;
 
11334
          case 's':
 
11335
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
11336
            case 'l':
 
11337
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
11338
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
 
11339
                case 'd':
 
11340
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11341
                    IntrinsicID = Intrinsic::x86_sse2_psll_d;
 
11342
                  break;
 
11343
                case 'q':
 
11344
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11345
                    IntrinsicID = Intrinsic::x86_sse2_psll_q;
 
11346
                  break;
 
11347
                case 'w':
 
11348
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11349
                    IntrinsicID = Intrinsic::x86_sse2_psll_w;
 
11350
                  break;
 
11351
                }
 
11352
              }
 
11353
              break;
 
11354
            case 'r':
 
11355
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
 
11356
              case 'a':
 
11357
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
 
11358
                case 'd':
 
11359
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11360
                    IntrinsicID = Intrinsic::x86_sse2_psra_d;
 
11361
                  break;
 
11362
                case 'w':
 
11363
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11364
                    IntrinsicID = Intrinsic::x86_sse2_psra_w;
 
11365
                  break;
 
11366
                }
 
11367
                break;
 
11368
              case 'l':
 
11369
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
 
11370
                case 'd':
 
11371
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11372
                    IntrinsicID = Intrinsic::x86_sse2_psrl_d;
 
11373
                  break;
 
11374
                case 'q':
 
11375
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11376
                    IntrinsicID = Intrinsic::x86_sse2_psrl_q;
 
11377
                  break;
 
11378
                case 'w':
 
11379
                  if (!memcmp(BuiltinName+20, "128", 3))
 
11380
                    IntrinsicID = Intrinsic::x86_sse2_psrl_w;
 
11381
                  break;
 
11382
                }
 
11383
                break;
 
11384
              }
 
11385
              break;
 
11386
            }
 
11387
            break;
 
11388
          }
 
11389
          break;
 
11390
        case 's':
 
11391
          if (!memcmp(BuiltinName+16, "tore", 4)) {
 
11392
            switch (BuiltinName[20]) {  // "__builtin_ia32_store"
 
11393
            case 'd':
 
11394
              if (!memcmp(BuiltinName+21, "qu", 2))
 
11395
                IntrinsicID = Intrinsic::x86_sse2_storeu_dq;
 
11396
              break;
 
11397
            case 'u':
 
11398
              if (!memcmp(BuiltinName+21, "p", 1)) {
 
11399
                switch (BuiltinName[22]) {  // "__builtin_ia32_storeup"
 
11400
                case 'd':
 
11401
                  IntrinsicID = Intrinsic::x86_sse2_storeu_pd;
 
11402
                  break;
 
11403
                case 's':
 
11404
                  IntrinsicID = Intrinsic::x86_sse_storeu_ps;
 
11405
                  break;
 
11406
                }
 
11407
              }
 
11408
              break;
 
11409
            }
 
11410
          }
 
11411
          break;
 
11412
        case 'u':
 
11413
          if (!memcmp(BuiltinName+16, "comineq", 7))
 
11414
            IntrinsicID = Intrinsic::x86_sse_ucomineq_ss;
 
11415
          break;
 
11416
        }
 
11417
      }
 
11418
      break;
 
11419
    case 24:
 
11420
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
11421
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
11422
        case 'c':
 
11423
          switch (BuiltinName[16]) {  // "__builtin_ia32_c"
 
11424
          case 'o':
 
11425
            if (!memcmp(BuiltinName+17, "misdneq", 7))
 
11426
              IntrinsicID = Intrinsic::x86_sse2_comineq_sd;
 
11427
            break;
 
11428
          case 'v':
 
11429
            if (!memcmp(BuiltinName+17, "tt", 2)) {
 
11430
              switch (BuiltinName[19]) {  // "__builtin_ia32_cvtt"
 
11431
              case 'p':
 
11432
                switch (BuiltinName[20]) {  // "__builtin_ia32_cvttp"
 
11433
                case 'd':
 
11434
                  if (!memcmp(BuiltinName+21, "2", 1)) {
 
11435
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvttpd2"
 
11436
                    case 'd':
 
11437
                      if (!memcmp(BuiltinName+23, "q", 1))
 
11438
                        IntrinsicID = Intrinsic::x86_sse2_cvttpd2dq;
 
11439
                      break;
 
11440
                    case 'p':
 
11441
                      if (!memcmp(BuiltinName+23, "i", 1))
 
11442
                        IntrinsicID = Intrinsic::x86_sse_cvttpd2pi;
 
11443
                      break;
 
11444
                    }
 
11445
                  }
 
11446
                  break;
 
11447
                case 's':
 
11448
                  if (!memcmp(BuiltinName+21, "2", 1)) {
 
11449
                    switch (BuiltinName[22]) {  // "__builtin_ia32_cvttps2"
 
11450
                    case 'd':
 
11451
                      if (!memcmp(BuiltinName+23, "q", 1))
 
11452
                        IntrinsicID = Intrinsic::x86_sse2_cvttps2dq;
 
11453
                      break;
 
11454
                    case 'p':
 
11455
                      if (!memcmp(BuiltinName+23, "i", 1))
 
11456
                        IntrinsicID = Intrinsic::x86_sse_cvttps2pi;
 
11457
                      break;
 
11458
                    }
 
11459
                  }
 
11460
                  break;
 
11461
                }
 
11462
                break;
 
11463
              case 's':
 
11464
                switch (BuiltinName[20]) {  // "__builtin_ia32_cvtts"
 
11465
                case 'd':
 
11466
                  if (!memcmp(BuiltinName+21, "2si", 3))
 
11467
                    IntrinsicID = Intrinsic::x86_sse2_cvttsd2si;
 
11468
                  break;
 
11469
                case 's':
 
11470
                  if (!memcmp(BuiltinName+21, "2si", 3))
 
11471
                    IntrinsicID = Intrinsic::x86_sse_cvttss2si;
 
11472
                  break;
 
11473
                }
 
11474
                break;
 
11475
              }
 
11476
            }
 
11477
            break;
 
11478
          }
 
11479
          break;
 
11480
        case 'p':
 
11481
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
11482
          case 'a':
 
11483
            if (!memcmp(BuiltinName+17, "dds", 3)) {
 
11484
              switch (BuiltinName[20]) {  // "__builtin_ia32_padds"
 
11485
              case 'b':
 
11486
                if (!memcmp(BuiltinName+21, "128", 3))
 
11487
                  IntrinsicID = Intrinsic::x86_sse2_padds_b;
 
11488
                break;
 
11489
              case 'w':
 
11490
                if (!memcmp(BuiltinName+21, "128", 3))
 
11491
                  IntrinsicID = Intrinsic::x86_sse2_padds_w;
 
11492
                break;
 
11493
              }
 
11494
            }
 
11495
            break;
 
11496
          case 'h':
 
11497
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
 
11498
            case 'a':
 
11499
              if (!memcmp(BuiltinName+18, "dd", 2)) {
 
11500
                switch (BuiltinName[20]) {  // "__builtin_ia32_phadd"
 
11501
                case 'd':
 
11502
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11503
                    IntrinsicID = Intrinsic::x86_ssse3_phadd_d_128;
 
11504
                  break;
 
11505
                case 'w':
 
11506
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11507
                    IntrinsicID = Intrinsic::x86_ssse3_phadd_w_128;
 
11508
                  break;
 
11509
                }
 
11510
              }
 
11511
              break;
 
11512
            case 's':
 
11513
              if (!memcmp(BuiltinName+18, "ub", 2)) {
 
11514
                switch (BuiltinName[20]) {  // "__builtin_ia32_phsub"
 
11515
                case 'd':
 
11516
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11517
                    IntrinsicID = Intrinsic::x86_ssse3_phsub_d_128;
 
11518
                  break;
 
11519
                case 'w':
 
11520
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11521
                    IntrinsicID = Intrinsic::x86_ssse3_phsub_w_128;
 
11522
                  break;
 
11523
                }
 
11524
              }
 
11525
              break;
 
11526
            }
 
11527
            break;
 
11528
          case 'm':
 
11529
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
11530
            case 'a':
 
11531
              switch (BuiltinName[18]) {  // "__builtin_ia32_pma"
 
11532
              case 'd':
 
11533
                if (!memcmp(BuiltinName+19, "dubsw", 5))
 
11534
                  IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw;
 
11535
                break;
 
11536
              case 'x':
 
11537
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmax"
 
11538
                case 's':
 
11539
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmaxs"
 
11540
                  case 'b':
 
11541
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11542
                      IntrinsicID = Intrinsic::x86_sse41_pmaxsb;
 
11543
                    break;
 
11544
                  case 'd':
 
11545
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11546
                      IntrinsicID = Intrinsic::x86_sse41_pmaxsd;
 
11547
                    break;
 
11548
                  case 'w':
 
11549
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11550
                      IntrinsicID = Intrinsic::x86_sse2_pmaxs_w;
 
11551
                    break;
 
11552
                  }
 
11553
                  break;
 
11554
                case 'u':
 
11555
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmaxu"
 
11556
                  case 'b':
 
11557
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11558
                      IntrinsicID = Intrinsic::x86_sse2_pmaxu_b;
 
11559
                    break;
 
11560
                  case 'd':
 
11561
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11562
                      IntrinsicID = Intrinsic::x86_sse41_pmaxud;
 
11563
                    break;
 
11564
                  case 'w':
 
11565
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11566
                      IntrinsicID = Intrinsic::x86_sse41_pmaxuw;
 
11567
                    break;
 
11568
                  }
 
11569
                  break;
 
11570
                }
 
11571
                break;
 
11572
              }
 
11573
              break;
 
11574
            case 'i':
 
11575
              if (!memcmp(BuiltinName+18, "n", 1)) {
 
11576
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmin"
 
11577
                case 's':
 
11578
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pmins"
 
11579
                  case 'b':
 
11580
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11581
                      IntrinsicID = Intrinsic::x86_sse41_pminsb;
 
11582
                    break;
 
11583
                  case 'd':
 
11584
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11585
                      IntrinsicID = Intrinsic::x86_sse41_pminsd;
 
11586
                    break;
 
11587
                  case 'w':
 
11588
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11589
                      IntrinsicID = Intrinsic::x86_sse2_pmins_w;
 
11590
                    break;
 
11591
                  }
 
11592
                  break;
 
11593
                case 'u':
 
11594
                  switch (BuiltinName[20]) {  // "__builtin_ia32_pminu"
 
11595
                  case 'b':
 
11596
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11597
                      IntrinsicID = Intrinsic::x86_sse2_pminu_b;
 
11598
                    break;
 
11599
                  case 'd':
 
11600
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11601
                      IntrinsicID = Intrinsic::x86_sse41_pminud;
 
11602
                    break;
 
11603
                  case 'w':
 
11604
                    if (!memcmp(BuiltinName+21, "128", 3))
 
11605
                      IntrinsicID = Intrinsic::x86_sse41_pminuw;
 
11606
                    break;
 
11607
                  }
 
11608
                  break;
 
11609
                }
 
11610
              }
 
11611
              break;
 
11612
            case 'u':
 
11613
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
11614
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
 
11615
                case 'd':
 
11616
                  if (!memcmp(BuiltinName+20, "q128", 4))
 
11617
                    IntrinsicID = Intrinsic::x86_sse41_pmuldq;
 
11618
                  break;
 
11619
                case 'h':
 
11620
                  if (!memcmp(BuiltinName+20, "w128", 4))
 
11621
                    IntrinsicID = Intrinsic::x86_sse2_pmulh_w;
 
11622
                  break;
 
11623
                case 'l':
 
11624
                  if (!memcmp(BuiltinName+20, "d128", 4))
 
11625
                    IntrinsicID = Intrinsic::x86_sse41_pmulld;
 
11626
                  break;
 
11627
                }
 
11628
              }
 
11629
              break;
 
11630
            }
 
11631
            break;
 
11632
          case 's':
 
11633
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
11634
            case 'a':
 
11635
              if (!memcmp(BuiltinName+18, "dbw128", 6))
 
11636
                IntrinsicID = Intrinsic::x86_sse2_psad_bw;
 
11637
              break;
 
11638
            case 'h':
 
11639
              if (!memcmp(BuiltinName+18, "ufb128", 6))
 
11640
                IntrinsicID = Intrinsic::x86_ssse3_pshuf_b_128;
 
11641
              break;
 
11642
            case 'i':
 
11643
              if (!memcmp(BuiltinName+18, "gn", 2)) {
 
11644
                switch (BuiltinName[20]) {  // "__builtin_ia32_psign"
 
11645
                case 'b':
 
11646
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11647
                    IntrinsicID = Intrinsic::x86_ssse3_psign_b_128;
 
11648
                  break;
 
11649
                case 'd':
 
11650
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11651
                    IntrinsicID = Intrinsic::x86_ssse3_psign_d_128;
 
11652
                  break;
 
11653
                case 'w':
 
11654
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11655
                    IntrinsicID = Intrinsic::x86_ssse3_psign_w_128;
 
11656
                  break;
 
11657
                }
 
11658
              }
 
11659
              break;
 
11660
            case 'l':
 
11661
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
11662
                switch (BuiltinName[19]) {  // "__builtin_ia32_psll"
 
11663
                case 'd':
 
11664
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11665
                    IntrinsicID = Intrinsic::x86_sse2_pslli_d;
 
11666
                  break;
 
11667
                case 'q':
 
11668
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11669
                    IntrinsicID = Intrinsic::x86_sse2_pslli_q;
 
11670
                  break;
 
11671
                case 'w':
 
11672
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11673
                    IntrinsicID = Intrinsic::x86_sse2_pslli_w;
 
11674
                  break;
 
11675
                }
 
11676
              }
 
11677
              break;
 
11678
            case 'r':
 
11679
              switch (BuiltinName[18]) {  // "__builtin_ia32_psr"
 
11680
              case 'a':
 
11681
                switch (BuiltinName[19]) {  // "__builtin_ia32_psra"
 
11682
                case 'd':
 
11683
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11684
                    IntrinsicID = Intrinsic::x86_sse2_psrai_d;
 
11685
                  break;
 
11686
                case 'w':
 
11687
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11688
                    IntrinsicID = Intrinsic::x86_sse2_psrai_w;
 
11689
                  break;
 
11690
                }
 
11691
                break;
 
11692
              case 'l':
 
11693
                switch (BuiltinName[19]) {  // "__builtin_ia32_psrl"
 
11694
                case 'd':
 
11695
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11696
                    IntrinsicID = Intrinsic::x86_sse2_psrli_d;
 
11697
                  break;
 
11698
                case 'q':
 
11699
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11700
                    IntrinsicID = Intrinsic::x86_sse2_psrli_q;
 
11701
                  break;
 
11702
                case 'w':
 
11703
                  if (!memcmp(BuiltinName+20, "i128", 4))
 
11704
                    IntrinsicID = Intrinsic::x86_sse2_psrli_w;
 
11705
                  break;
 
11706
                }
 
11707
                break;
 
11708
              }
 
11709
              break;
 
11710
            case 'u':
 
11711
              if (!memcmp(BuiltinName+18, "bs", 2)) {
 
11712
                switch (BuiltinName[20]) {  // "__builtin_ia32_psubs"
 
11713
                case 'b':
 
11714
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11715
                    IntrinsicID = Intrinsic::x86_sse2_psubs_b;
 
11716
                  break;
 
11717
                case 'w':
 
11718
                  if (!memcmp(BuiltinName+21, "128", 3))
 
11719
                    IntrinsicID = Intrinsic::x86_sse2_psubs_w;
 
11720
                  break;
 
11721
                }
 
11722
              }
 
11723
              break;
 
11724
            }
 
11725
            break;
 
11726
          case 't':
 
11727
            if (!memcmp(BuiltinName+17, "est", 3)) {
 
11728
              switch (BuiltinName[20]) {  // "__builtin_ia32_ptest"
 
11729
              case 'c':
 
11730
                if (!memcmp(BuiltinName+21, "128", 3))
 
11731
                  IntrinsicID = Intrinsic::x86_sse41_ptestc;
 
11732
                break;
 
11733
              case 'z':
 
11734
                if (!memcmp(BuiltinName+21, "128", 3))
 
11735
                  IntrinsicID = Intrinsic::x86_sse41_ptestz;
 
11736
                break;
 
11737
              }
 
11738
            }
 
11739
            break;
 
11740
          }
 
11741
          break;
 
11742
        case 'u':
 
11743
          if (!memcmp(BuiltinName+16, "comisd", 6)) {
 
11744
            switch (BuiltinName[22]) {  // "__builtin_ia32_ucomisd"
 
11745
            case 'e':
 
11746
              if (!memcmp(BuiltinName+23, "q", 1))
 
11747
                IntrinsicID = Intrinsic::x86_sse2_ucomieq_sd;
 
11748
              break;
 
11749
            case 'g':
 
11750
              switch (BuiltinName[23]) {  // "__builtin_ia32_ucomisdg"
 
11751
              case 'e':
 
11752
                IntrinsicID = Intrinsic::x86_sse2_ucomige_sd;
 
11753
                break;
 
11754
              case 't':
 
11755
                IntrinsicID = Intrinsic::x86_sse2_ucomigt_sd;
 
11756
                break;
 
11757
              }
 
11758
              break;
 
11759
            case 'l':
 
11760
              switch (BuiltinName[23]) {  // "__builtin_ia32_ucomisdl"
 
11761
              case 'e':
 
11762
                IntrinsicID = Intrinsic::x86_sse2_ucomile_sd;
 
11763
                break;
 
11764
              case 't':
 
11765
                IntrinsicID = Intrinsic::x86_sse2_ucomilt_sd;
 
11766
                break;
 
11767
              }
 
11768
              break;
 
11769
            }
 
11770
          }
 
11771
          break;
 
11772
        }
 
11773
      }
 
11774
      break;
 
11775
    case 25:
 
11776
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
11777
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
11778
        case 'c':
 
11779
          if (!memcmp(BuiltinName+16, "vts", 3)) {
 
11780
            switch (BuiltinName[19]) {  // "__builtin_ia32_cvts"
 
11781
            case 'd':
 
11782
              if (!memcmp(BuiltinName+20, "2si64", 5))
 
11783
                IntrinsicID = Intrinsic::x86_sse2_cvtsd2si64;
 
11784
              break;
 
11785
            case 'i':
 
11786
              if (!memcmp(BuiltinName+20, "642s", 4)) {
 
11787
                switch (BuiltinName[24]) {  // "__builtin_ia32_cvtsi642s"
 
11788
                case 'd':
 
11789
                  IntrinsicID = Intrinsic::x86_sse2_cvtsi642sd;
 
11790
                  break;
 
11791
                case 's':
 
11792
                  IntrinsicID = Intrinsic::x86_sse_cvtsi642ss;
 
11793
                  break;
 
11794
                }
 
11795
              }
 
11796
              break;
 
11797
            case 's':
 
11798
              if (!memcmp(BuiltinName+20, "2si64", 5))
 
11799
                IntrinsicID = Intrinsic::x86_sse_cvtss2si64;
 
11800
              break;
 
11801
            }
 
11802
          }
 
11803
          break;
 
11804
        case 'm':
 
11805
          switch (BuiltinName[16]) {  // "__builtin_ia32_m"
 
11806
          case 'a':
 
11807
            if (!memcmp(BuiltinName+17, "skmovdqu", 8))
 
11808
              IntrinsicID = Intrinsic::x86_sse2_maskmov_dqu;
 
11809
            break;
 
11810
          case 'p':
 
11811
            if (!memcmp(BuiltinName+17, "sadbw128", 8))
 
11812
              IntrinsicID = Intrinsic::x86_sse41_mpsadbw;
 
11813
            break;
 
11814
          }
 
11815
          break;
 
11816
        case 'p':
 
11817
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
11818
          case 'a':
 
11819
            if (!memcmp(BuiltinName+17, "ddus", 4)) {
 
11820
              switch (BuiltinName[21]) {  // "__builtin_ia32_paddus"
 
11821
              case 'b':
 
11822
                if (!memcmp(BuiltinName+22, "128", 3))
 
11823
                  IntrinsicID = Intrinsic::x86_sse2_paddus_b;
 
11824
                break;
 
11825
              case 'w':
 
11826
                if (!memcmp(BuiltinName+22, "128", 3))
 
11827
                  IntrinsicID = Intrinsic::x86_sse2_paddus_w;
 
11828
                break;
 
11829
              }
 
11830
            }
 
11831
            break;
 
11832
          case 'b':
 
11833
            if (!memcmp(BuiltinName+17, "lendw128", 8))
 
11834
              IntrinsicID = Intrinsic::x86_sse41_pblendw;
 
11835
            break;
 
11836
          case 'c':
 
11837
            if (!memcmp(BuiltinName+17, "mp", 2)) {
 
11838
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
 
11839
              case 'e':
 
11840
                if (!memcmp(BuiltinName+20, "q", 1)) {
 
11841
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpeq"
 
11842
                  case 'b':
 
11843
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11844
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_b;
 
11845
                    break;
 
11846
                  case 'd':
 
11847
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11848
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_d;
 
11849
                    break;
 
11850
                  case 'w':
 
11851
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11852
                      IntrinsicID = Intrinsic::x86_sse2_pcmpeq_w;
 
11853
                    break;
 
11854
                  }
 
11855
                }
 
11856
                break;
 
11857
              case 'g':
 
11858
                if (!memcmp(BuiltinName+20, "t", 1)) {
 
11859
                  switch (BuiltinName[21]) {  // "__builtin_ia32_pcmpgt"
 
11860
                  case 'b':
 
11861
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11862
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_b;
 
11863
                    break;
 
11864
                  case 'd':
 
11865
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11866
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_d;
 
11867
                    break;
 
11868
                  case 'w':
 
11869
                    if (!memcmp(BuiltinName+22, "128", 3))
 
11870
                      IntrinsicID = Intrinsic::x86_sse2_pcmpgt_w;
 
11871
                    break;
 
11872
                  }
 
11873
                }
 
11874
                break;
 
11875
              }
 
11876
            }
 
11877
            break;
 
11878
          case 'h':
 
11879
            switch (BuiltinName[17]) {  // "__builtin_ia32_ph"
 
11880
            case 'a':
 
11881
              if (!memcmp(BuiltinName+18, "ddsw128", 7))
 
11882
                IntrinsicID = Intrinsic::x86_ssse3_phadd_sw_128;
 
11883
              break;
 
11884
            case 's':
 
11885
              if (!memcmp(BuiltinName+18, "ubsw128", 7))
 
11886
                IntrinsicID = Intrinsic::x86_ssse3_phsub_sw_128;
 
11887
              break;
 
11888
            }
 
11889
            break;
 
11890
          case 'm':
 
11891
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
11892
            case 'a':
 
11893
              if (!memcmp(BuiltinName+18, "ddwd128", 7))
 
11894
                IntrinsicID = Intrinsic::x86_sse2_pmadd_wd;
 
11895
              break;
 
11896
            case 'u':
 
11897
              if (!memcmp(BuiltinName+18, "l", 1)) {
 
11898
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmul"
 
11899
                case 'h':
 
11900
                  if (!memcmp(BuiltinName+20, "uw128", 5))
 
11901
                    IntrinsicID = Intrinsic::x86_sse2_pmulhu_w;
 
11902
                  break;
 
11903
                case 'u':
 
11904
                  if (!memcmp(BuiltinName+20, "dq128", 5))
 
11905
                    IntrinsicID = Intrinsic::x86_sse2_pmulu_dq;
 
11906
                  break;
 
11907
                }
 
11908
              }
 
11909
              break;
 
11910
            }
 
11911
            break;
 
11912
          case 's':
 
11913
            switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
11914
            case 'l':
 
11915
              if (!memcmp(BuiltinName+18, "ldqi128", 7))
 
11916
                IntrinsicID = Intrinsic::x86_sse2_psll_dq;
 
11917
              break;
 
11918
            case 'r':
 
11919
              if (!memcmp(BuiltinName+18, "ldqi128", 7))
 
11920
                IntrinsicID = Intrinsic::x86_sse2_psrl_dq;
 
11921
              break;
 
11922
            case 'u':
 
11923
              if (!memcmp(BuiltinName+18, "bus", 3)) {
 
11924
                switch (BuiltinName[21]) {  // "__builtin_ia32_psubus"
 
11925
                case 'b':
 
11926
                  if (!memcmp(BuiltinName+22, "128", 3))
 
11927
                    IntrinsicID = Intrinsic::x86_sse2_psubus_b;
 
11928
                  break;
 
11929
                case 'w':
 
11930
                  if (!memcmp(BuiltinName+22, "128", 3))
 
11931
                    IntrinsicID = Intrinsic::x86_sse2_psubus_w;
 
11932
                  break;
 
11933
                }
 
11934
              }
 
11935
              break;
 
11936
            }
 
11937
            break;
 
11938
          }
 
11939
          break;
 
11940
        case 's':
 
11941
          if (!memcmp(BuiltinName+16, "torelv4si", 9))
 
11942
            IntrinsicID = Intrinsic::x86_sse2_storel_dq;
 
11943
          break;
 
11944
        case 'u':
 
11945
          if (!memcmp(BuiltinName+16, "comisdneq", 9))
 
11946
            IntrinsicID = Intrinsic::x86_sse2_ucomineq_sd;
 
11947
          break;
 
11948
        }
 
11949
      }
 
11950
      break;
 
11951
    case 26:
 
11952
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
11953
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
11954
        case 'c':
 
11955
          if (!memcmp(BuiltinName+16, "vtts", 4)) {
 
11956
            switch (BuiltinName[20]) {  // "__builtin_ia32_cvtts"
 
11957
            case 'd':
 
11958
              if (!memcmp(BuiltinName+21, "2si64", 5))
 
11959
                IntrinsicID = Intrinsic::x86_sse2_cvttsd2si64;
 
11960
              break;
 
11961
            case 's':
 
11962
              if (!memcmp(BuiltinName+21, "2si64", 5))
 
11963
                IntrinsicID = Intrinsic::x86_sse_cvttss2si64;
 
11964
              break;
 
11965
            }
 
11966
          }
 
11967
          break;
 
11968
        case 'i':
 
11969
          if (!memcmp(BuiltinName+16, "nsertps128", 10))
 
11970
            IntrinsicID = Intrinsic::x86_sse41_insertps;
 
11971
          break;
 
11972
        case 'p':
 
11973
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
11974
          case 'a':
 
11975
            if (!memcmp(BuiltinName+17, "ck", 2)) {
 
11976
              switch (BuiltinName[19]) {  // "__builtin_ia32_pack"
 
11977
              case 's':
 
11978
                if (!memcmp(BuiltinName+20, "s", 1)) {
 
11979
                  switch (BuiltinName[21]) {  // "__builtin_ia32_packss"
 
11980
                  case 'd':
 
11981
                    if (!memcmp(BuiltinName+22, "w128", 4))
 
11982
                      IntrinsicID = Intrinsic::x86_sse2_packssdw_128;
 
11983
                    break;
 
11984
                  case 'w':
 
11985
                    if (!memcmp(BuiltinName+22, "b128", 4))
 
11986
                      IntrinsicID = Intrinsic::x86_sse2_packsswb_128;
 
11987
                    break;
 
11988
                  }
 
11989
                }
 
11990
                break;
 
11991
              case 'u':
 
11992
                if (!memcmp(BuiltinName+20, "s", 1)) {
 
11993
                  switch (BuiltinName[21]) {  // "__builtin_ia32_packus"
 
11994
                  case 'd':
 
11995
                    if (!memcmp(BuiltinName+22, "w128", 4))
 
11996
                      IntrinsicID = Intrinsic::x86_sse41_packusdw;
 
11997
                    break;
 
11998
                  case 'w':
 
11999
                    if (!memcmp(BuiltinName+22, "b128", 4))
 
12000
                      IntrinsicID = Intrinsic::x86_sse2_packuswb_128;
 
12001
                    break;
 
12002
                  }
 
12003
                }
 
12004
                break;
 
12005
              }
 
12006
            }
 
12007
            break;
 
12008
          case 'b':
 
12009
            if (!memcmp(BuiltinName+17, "lendvb128", 9))
 
12010
              IntrinsicID = Intrinsic::x86_sse41_pblendvb;
 
12011
            break;
 
12012
          case 'm':
 
12013
            switch (BuiltinName[17]) {  // "__builtin_ia32_pm"
 
12014
            case 'o':
 
12015
              if (!memcmp(BuiltinName+18, "v", 1)) {
 
12016
                switch (BuiltinName[19]) {  // "__builtin_ia32_pmov"
 
12017
                case 'm':
 
12018
                  if (!memcmp(BuiltinName+20, "skb128", 6))
 
12019
                    IntrinsicID = Intrinsic::x86_sse2_pmovmskb_128;
 
12020
                  break;
 
12021
                case 's':
 
12022
                  if (!memcmp(BuiltinName+20, "x", 1)) {
 
12023
                    switch (BuiltinName[21]) {  // "__builtin_ia32_pmovsx"
 
12024
                    case 'b':
 
12025
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovsxb"
 
12026
                      case 'd':
 
12027
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12028
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbd;
 
12029
                        break;
 
12030
                      case 'q':
 
12031
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12032
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbq;
 
12033
                        break;
 
12034
                      case 'w':
 
12035
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12036
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxbw;
 
12037
                        break;
 
12038
                      }
 
12039
                      break;
 
12040
                    case 'd':
 
12041
                      if (!memcmp(BuiltinName+22, "q128", 4))
 
12042
                        IntrinsicID = Intrinsic::x86_sse41_pmovsxdq;
 
12043
                      break;
 
12044
                    case 'w':
 
12045
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovsxw"
 
12046
                      case 'd':
 
12047
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12048
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxwd;
 
12049
                        break;
 
12050
                      case 'q':
 
12051
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12052
                          IntrinsicID = Intrinsic::x86_sse41_pmovsxwq;
 
12053
                        break;
 
12054
                      }
 
12055
                      break;
 
12056
                    }
 
12057
                  }
 
12058
                  break;
 
12059
                case 'z':
 
12060
                  if (!memcmp(BuiltinName+20, "x", 1)) {
 
12061
                    switch (BuiltinName[21]) {  // "__builtin_ia32_pmovzx"
 
12062
                    case 'b':
 
12063
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovzxb"
 
12064
                      case 'd':
 
12065
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12066
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbd;
 
12067
                        break;
 
12068
                      case 'q':
 
12069
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12070
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbq;
 
12071
                        break;
 
12072
                      case 'w':
 
12073
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12074
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxbw;
 
12075
                        break;
 
12076
                      }
 
12077
                      break;
 
12078
                    case 'd':
 
12079
                      if (!memcmp(BuiltinName+22, "q128", 4))
 
12080
                        IntrinsicID = Intrinsic::x86_sse41_pmovzxdq;
 
12081
                      break;
 
12082
                    case 'w':
 
12083
                      switch (BuiltinName[22]) {  // "__builtin_ia32_pmovzxw"
 
12084
                      case 'd':
 
12085
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12086
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxwd;
 
12087
                        break;
 
12088
                      case 'q':
 
12089
                        if (!memcmp(BuiltinName+23, "128", 3))
 
12090
                          IntrinsicID = Intrinsic::x86_sse41_pmovzxwq;
 
12091
                        break;
 
12092
                      }
 
12093
                      break;
 
12094
                    }
 
12095
                  }
 
12096
                  break;
 
12097
                }
 
12098
              }
 
12099
              break;
 
12100
            case 'u':
 
12101
              if (!memcmp(BuiltinName+18, "lhrsw128", 8))
 
12102
                IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw_128;
 
12103
              break;
 
12104
            }
 
12105
            break;
 
12106
          case 't':
 
12107
            if (!memcmp(BuiltinName+17, "estnzc128", 9))
 
12108
              IntrinsicID = Intrinsic::x86_sse41_ptestnzc;
 
12109
            break;
 
12110
          }
 
12111
          break;
 
12112
        }
 
12113
      }
 
12114
      break;
 
12115
    case 27:
 
12116
      if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) {
 
12117
        switch (BuiltinName[15]) {  // "__builtin_ia32_"
 
12118
        case 'e':
 
12119
          if (!memcmp(BuiltinName+16, "xtractps128", 11))
 
12120
            IntrinsicID = Intrinsic::x86_sse41_extractps;
 
12121
          break;
 
12122
        case 'p':
 
12123
          switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
12124
          case 'c':
 
12125
            if (!memcmp(BuiltinName+17, "mp", 2)) {
 
12126
              switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
 
12127
              case 'e':
 
12128
                if (!memcmp(BuiltinName+20, "str", 3)) {
 
12129
                  switch (BuiltinName[23]) {  // "__builtin_ia32_pcmpestr"
 
12130
                  case 'i':
 
12131
                    if (!memcmp(BuiltinName+24, "128", 3))
 
12132
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestri128;
 
12133
                    break;
 
12134
                  case 'm':
 
12135
                    if (!memcmp(BuiltinName+24, "128", 3))
 
12136
                      IntrinsicID = Intrinsic::x86_sse42_pcmpestrm128;
 
12137
                    break;
 
12138
                  }
 
12139
                }
 
12140
                break;
 
12141
              case 'i':
 
12142
                if (!memcmp(BuiltinName+20, "str", 3)) {
 
12143
                  switch (BuiltinName[23]) {  // "__builtin_ia32_pcmpistr"
 
12144
                  case 'i':
 
12145
                    if (!memcmp(BuiltinName+24, "128", 3))
 
12146
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistri128;
 
12147
                    break;
 
12148
                  case 'm':
 
12149
                    if (!memcmp(BuiltinName+24, "128", 3))
 
12150
                      IntrinsicID = Intrinsic::x86_sse42_pcmpistrm128;
 
12151
                    break;
 
12152
                  }
 
12153
                }
 
12154
                break;
 
12155
              }
 
12156
            }
 
12157
            break;
 
12158
          case 'm':
 
12159
            if (!memcmp(BuiltinName+17, "addubsw128", 10))
 
12160
              IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw_128;
 
12161
            break;
 
12162
          }
 
12163
          break;
 
12164
        }
 
12165
      }
 
12166
      break;
 
12167
    case 28:
 
12168
      if (!memcmp(BuiltinName, "__builtin_ia32_p", 16)) {
 
12169
        switch (BuiltinName[16]) {  // "__builtin_ia32_p"
 
12170
        case 'c':
 
12171
          if (!memcmp(BuiltinName+17, "mp", 2)) {
 
12172
            switch (BuiltinName[19]) {  // "__builtin_ia32_pcmp"
 
12173
            case 'e':
 
12174
              if (!memcmp(BuiltinName+20, "stri", 4)) {
 
12175
                switch (BuiltinName[24]) {  // "__builtin_ia32_pcmpestri"
 
12176
                case 'a':
 
12177
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12178
                    IntrinsicID = Intrinsic::x86_sse42_pcmpestria128;
 
12179
                  break;
 
12180
                case 'c':
 
12181
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12182
                    IntrinsicID = Intrinsic::x86_sse42_pcmpestric128;
 
12183
                  break;
 
12184
                case 'o':
 
12185
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12186
                    IntrinsicID = Intrinsic::x86_sse42_pcmpestrio128;
 
12187
                  break;
 
12188
                case 's':
 
12189
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12190
                    IntrinsicID = Intrinsic::x86_sse42_pcmpestris128;
 
12191
                  break;
 
12192
                case 'z':
 
12193
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12194
                    IntrinsicID = Intrinsic::x86_sse42_pcmpestriz128;
 
12195
                  break;
 
12196
                }
 
12197
              }
 
12198
              break;
 
12199
            case 'i':
 
12200
              if (!memcmp(BuiltinName+20, "stri", 4)) {
 
12201
                switch (BuiltinName[24]) {  // "__builtin_ia32_pcmpistri"
 
12202
                case 'a':
 
12203
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12204
                    IntrinsicID = Intrinsic::x86_sse42_pcmpistria128;
 
12205
                  break;
 
12206
                case 'c':
 
12207
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12208
                    IntrinsicID = Intrinsic::x86_sse42_pcmpistric128;
 
12209
                  break;
 
12210
                case 'o':
 
12211
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12212
                    IntrinsicID = Intrinsic::x86_sse42_pcmpistrio128;
 
12213
                  break;
 
12214
                case 's':
 
12215
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12216
                    IntrinsicID = Intrinsic::x86_sse42_pcmpistris128;
 
12217
                  break;
 
12218
                case 'z':
 
12219
                  if (!memcmp(BuiltinName+25, "128", 3))
 
12220
                    IntrinsicID = Intrinsic::x86_sse42_pcmpistriz128;
 
12221
                  break;
 
12222
                }
 
12223
              }
 
12224
              break;
 
12225
            }
 
12226
          }
 
12227
          break;
 
12228
        case 'h':
 
12229
          if (!memcmp(BuiltinName+17, "minposuw128", 11))
 
12230
            IntrinsicID = Intrinsic::x86_sse41_phminposuw;
 
12231
          break;
 
12232
        }
 
12233
      }
 
12234
      break;
 
12235
    case 35:
 
12236
      if (!memcmp(BuiltinName, "__builtin_ia32_ps", 17)) {
 
12237
        switch (BuiltinName[17]) {  // "__builtin_ia32_ps"
 
12238
        case 'l':
 
12239
          if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17))
 
12240
            IntrinsicID = Intrinsic::x86_sse2_psll_dq_bs;
 
12241
          break;
 
12242
        case 'r':
 
12243
          if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17))
 
12244
            IntrinsicID = Intrinsic::x86_sse2_psrl_dq_bs;
 
12245
          break;
 
12246
        }
 
12247
      }
 
12248
      break;
 
12249
    }
 
12250
  }
 
12251
  return IntrinsicID;
 
12252
}
 
12253
#endif
 
12254