1
; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32
2
; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
4
; Though it is undefined, we want xor undef,undef to produce zero.
5
define <4 x i32> @test1() nounwind {
6
%tmp = xor <4 x i32> undef, undef
10
; X32: xorps %xmm0, %xmm0
14
; Though it is undefined, we want xor undef,undef to produce zero.
15
define i32 @test2() nounwind{
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%tmp = xor i32 undef, undef
19
; X32: xorl %eax, %eax
23
define i32 @test3(i32 %a, i32 %b) nounwind {
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%tmp1not = xor i32 %b, -2
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%tmp3 = and i32 %tmp1not, %a
27
%tmp4 = lshr i32 %tmp3, 1
32
; X64: andl %edi, %esi
33
; X64: movl %esi, %eax
38
; X32: movl 8(%esp), %eax
40
; X32: andl 4(%esp), %eax
45
define i32 @test4(i32 %a, i32 %b) nounwind {
49
%b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
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%a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ]
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%tmp3 = xor i32 %a_addr.0, %b_addr.0
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%tmp4not = xor i32 %tmp3, 2147483647
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%tmp6 = and i32 %tmp4not, %b_addr.0
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%tmp8 = shl i32 %tmp6, 1
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%tmp10 = icmp eq i32 %tmp8, 0
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br i1 %tmp10, label %bb12, label %bb
61
; X64: notl [[REG:%[a-z]+]]
62
; X64: andl {{.*}}[[REG]]
64
; X32: notl [[REG:%[a-z]+]]
65
; X32: andl {{.*}}[[REG]]
68
define i16 @test5(i16 %a, i16 %b) nounwind {
72
%b_addr.0 = phi i16 [ %b, %entry ], [ %tmp8, %bb ]
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%a_addr.0 = phi i16 [ %a, %entry ], [ %tmp3, %bb ]
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%tmp3 = xor i16 %a_addr.0, %b_addr.0
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%tmp4not = xor i16 %tmp3, 32767
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%tmp6 = and i16 %tmp4not, %b_addr.0
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%tmp8 = shl i16 %tmp6, 1
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%tmp10 = icmp eq i16 %tmp8, 0
79
br i1 %tmp10, label %bb12, label %bb
83
; X64: notw [[REG:%[a-z]+]]
84
; X64: andw {{.*}}[[REG]]
86
; X32: notw [[REG:%[a-z]+]]
87
; X32: andw {{.*}}[[REG]]
90
define i8 @test6(i8 %a, i8 %b) nounwind {
94
%b_addr.0 = phi i8 [ %b, %entry ], [ %tmp8, %bb ]
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%a_addr.0 = phi i8 [ %a, %entry ], [ %tmp3, %bb ]
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%tmp3 = xor i8 %a_addr.0, %b_addr.0
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%tmp4not = xor i8 %tmp3, 127
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%tmp6 = and i8 %tmp4not, %b_addr.0
99
%tmp8 = shl i8 %tmp6, 1
100
%tmp10 = icmp eq i8 %tmp8, 0
101
br i1 %tmp10, label %bb12, label %bb
105
; X64: notb [[REG:%[a-z]+]]
106
; X64: andb {{.*}}[[REG]]
108
; X32: notb [[REG:%[a-z]+]]
109
; X32: andb {{.*}}[[REG]]
112
define i32 @test7(i32 %a, i32 %b) nounwind {
116
%b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
117
%a_addr.0 = phi i32 [ %a, %entry ], [ %tmp3, %bb ]
118
%tmp3 = xor i32 %a_addr.0, %b_addr.0
119
%tmp4not = xor i32 %tmp3, 2147483646
120
%tmp6 = and i32 %tmp4not, %b_addr.0
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%tmp8 = shl i32 %tmp6, 1
122
%tmp10 = icmp eq i32 %tmp8, 0
123
br i1 %tmp10, label %bb12, label %bb
127
; X64: xorl $2147483646, [[REG:%[a-z]+]]
128
; X64: andl {{.*}}[[REG]]
130
; X32: xorl $2147483646, [[REG:%[a-z]+]]
131
; X32: andl {{.*}}[[REG]]
134
define i32 @test8(i32 %a) nounwind {
138
%t2 = add i32 %t1, -1