1
//===- Thumb1InstrInfo.h - Thumb-1 Instruction Information ------*- C++ -*-===//
3
// The LLVM Compiler Infrastructure
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
8
//===----------------------------------------------------------------------===//
10
// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
12
//===----------------------------------------------------------------------===//
14
#ifndef THUMB1INSTRUCTIONINFO_H
15
#define THUMB1INSTRUCTIONINFO_H
17
#include "llvm/Target/TargetInstrInfo.h"
19
#include "ARMInstrInfo.h"
20
#include "Thumb1RegisterInfo.h"
25
class Thumb1InstrInfo : public ARMBaseInstrInfo {
26
Thumb1RegisterInfo RI;
28
explicit Thumb1InstrInfo(const ARMSubtarget &STI);
30
// Return the non-pre/post incrementing version of 'Opc'. Return 0
31
// if there is not such an opcode.
32
unsigned getUnindexedOpcode(unsigned Opc) const;
34
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
35
/// such, whenever a client has an instance of instruction info, it should
36
/// always be able to get register info as well (through this method).
38
const Thumb1RegisterInfo &getRegisterInfo() const { return RI; }
40
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
41
MachineBasicBlock::iterator MI,
42
const std::vector<CalleeSavedInfo> &CSI) const;
43
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
44
MachineBasicBlock::iterator MI,
45
const std::vector<CalleeSavedInfo> &CSI) const;
47
bool copyRegToReg(MachineBasicBlock &MBB,
48
MachineBasicBlock::iterator I,
49
unsigned DestReg, unsigned SrcReg,
50
const TargetRegisterClass *DestRC,
51
const TargetRegisterClass *SrcRC) const;
52
void storeRegToStackSlot(MachineBasicBlock &MBB,
53
MachineBasicBlock::iterator MBBI,
54
unsigned SrcReg, bool isKill, int FrameIndex,
55
const TargetRegisterClass *RC) const;
57
void loadRegFromStackSlot(MachineBasicBlock &MBB,
58
MachineBasicBlock::iterator MBBI,
59
unsigned DestReg, int FrameIndex,
60
const TargetRegisterClass *RC) const;
62
bool canFoldMemoryOperand(const MachineInstr *MI,
63
const SmallVectorImpl<unsigned> &Ops) const;
65
MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
67
const SmallVectorImpl<unsigned> &Ops,
68
int FrameIndex) const;
70
MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
72
const SmallVectorImpl<unsigned> &Ops,
73
MachineInstr* LoadMI) const {
79
#endif // THUMB1INSTRUCTIONINFO_H