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* P1010si Device Tree Source
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* Copyright 2011 Freescale Semiconductor Inc.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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compatible = "fsl,P1010";
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next-level-cache = <&L2>;
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compatible = "fsl,ifc", "simple-bus";
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reg = <0x0 0xffe1e000 0 0x2000>;
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interrupts = <16 2 19 2>;
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-immr", "simple-bus";
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ranges = <0x0 0x0 0xffe00000 0x100000>;
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bus-frequency = <0>; // Filled out by uboot.
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compatible = "fsl,ecm-law";
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compatible = "fsl,p1010-ecm", "fsl,ecm";
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reg = <0x1000 0x1000>;
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interrupt-parent = <&mpic>;
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memory-controller@2000 {
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compatible = "fsl,p1010-memory-controller";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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compatible = "fsl-i2c";
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interrupt-parent = <&mpic>;
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compatible = "fsl-i2c";
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interrupt-parent = <&mpic>;
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serial0: serial@4500 {
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device_type = "serial";
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compatible = "ns16550";
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clock-frequency = <0>;
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interrupt-parent = <&mpic>;
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serial1: serial@4600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupt-parent = <&mpic>;
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#address-cells = <1>;
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compatible = "fsl,mpc8536-espi";
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reg = <0x7000 0x1000>;
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interrupts = <59 0x2>;
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interrupt-parent = <&mpic>;
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fsl,espi-num-chipselects = <1>;
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gpio: gpio-controller@f000 {
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compatible = "fsl,mpc8572-gpio";
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reg = <0xf000 0x100>;
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interrupts = <47 0x2>;
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interrupt-parent = <&mpic>;
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compatible = "fsl,pq-sata-v2";
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reg = <0x18000 0x1000>;
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interrupts = <74 0x2>;
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interrupt-parent = <&mpic>;
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compatible = "fsl,pq-sata-v2";
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reg = <0x19000 0x1000>;
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interrupts = <41 0x2>;
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-flexcan";
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reg = <0x1c000 0x1000>;
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interrupts = <48 0x2>;
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-flexcan";
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reg = <0x1d000 0x1000>;
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interrupts = <61 0x2>;
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interrupt-parent = <&mpic>;
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L2: l2-cache-controller@20000 {
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compatible = "fsl,p1010-l2-cache-controller",
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"fsl,p1014-l2-cache-controller";
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reg = <0x20000 0x1000>;
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cache-line-size = <32>; // 32 bytes
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cache-size = <0x40000>; // L2,256K
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interrupt-parent = <&mpic>;
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#address-cells = <1>;
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compatible = "fsl,p1010-dma", "fsl,eloplus-dma";
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ranges = <0x0 0x21100 0x200>;
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compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
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interrupt-parent = <&mpic>;
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compatible = "fsl-usb2-dr";
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reg = <0x22000 0x1000>;
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#address-cells = <1>;
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interrupt-parent = <&mpic>;
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interrupts = <28 0x2>;
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#address-cells = <1>;
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compatible = "fsl,etsec2-mdio";
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reg = <0x24000 0x1000 0xb0030 0x4>;
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#address-cells = <1>;
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compatible = "fsl,etsec2-tbi";
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reg = <0x25000 0x1000 0xb1030 0x4>;
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device_type = "tbi-phy";
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#address-cells = <1>;
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compatible = "fsl,etsec2-tbi";
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reg = <0x26000 0x1000 0xb1030 0x4>;
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device_type = "tbi-phy";
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compatible = "fsl,esdhc";
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reg = <0x2e000 0x1000>;
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interrupts = <72 0x8>;
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interrupt-parent = <&mpic>;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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fsl,sdhci-auto-cmd12;
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enet0: ethernet@b0000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "fsl,etsec2";
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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#address-cells = <1>;
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reg = <0xb0000 0x1000>;
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <29 2 30 2 34 2>;
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enet1: ethernet@b1000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "fsl,etsec2";
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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#address-cells = <1>;
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reg = <0xb1000 0x1000>;
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <35 2 36 2 40 2>;
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enet2: ethernet@b2000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "fsl,etsec2";
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fsl,num_rx_queues = <0x8>;
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fsl,num_tx_queues = <0x8>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupt-parent = <&mpic>;
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#address-cells = <1>;
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reg = <0xb2000 0x1000>;
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fsl,rx-bit-map = <0xff>;
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fsl,tx-bit-map = <0xff>;
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interrupts = <31 2 32 2 33 2>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0x40000 0x40000>;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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compatible = "fsl,p1010-msi", "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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msi-available-ranges = <0 0x100>;
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interrupt-parent = <&mpic>;
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,p1010-guts";
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reg = <0xe0000 0x1000>;
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pci0: pcie@ffe09000 {
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compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
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#address-cells = <3>;
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reg = <0 0xffe09000 0 0x1000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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pci1: pcie@ffe0a000 {
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compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
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#address-cells = <3>;
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reg = <0 0xffe0a000 0 0x1000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;