2
* AD7792/AD7793 SPI ADC driver
4
* Copyright 2011 Analog Devices Inc.
6
* Licensed under the GPL-2.
9
#include <linux/interrupt.h>
10
#include <linux/device.h>
11
#include <linux/kernel.h>
12
#include <linux/slab.h>
13
#include <linux/sysfs.h>
14
#include <linux/spi/spi.h>
15
#include <linux/regulator/consumer.h>
16
#include <linux/err.h>
17
#include <linux/sched.h>
18
#include <linux/delay.h>
19
#include <linux/module.h>
23
#include "../buffer_generic.h"
24
#include "../ring_sw.h"
25
#include "../trigger.h"
26
#include "../trigger_consumer.h"
31
* The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
32
* In order to avoid contentions on the SPI bus, it's therefore necessary
33
* to use spi bus locking.
35
* The DOUT/RDY output must also be wired to an interrupt capable GPIO.
38
struct ad7793_chip_info {
39
struct iio_chan_spec channel[7];
43
struct spi_device *spi;
44
struct iio_trigger *trig;
45
const struct ad7793_chip_info *chip_info;
46
struct regulator *reg;
47
struct ad7793_platform_data *pdata;
48
wait_queue_head_t wq_data_avail;
54
u32 scale_avail[8][2];
55
/* Note this uses fact that 8 the mask always fits in a long */
56
unsigned long available_scan_masks[7];
58
* DMA (thus cache coherency maintenance) requires the
59
* transfer buffers to live in their own cache lines.
61
u8 data[4] ____cacheline_aligned;
64
enum ad7793_supported_device_ids {
69
static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
70
bool cs_change, unsigned char reg,
71
unsigned size, unsigned val)
74
struct spi_transfer t = {
77
.cs_change = cs_change,
81
data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
100
spi_message_init(&m);
101
spi_message_add_tail(&t, &m);
104
return spi_sync_locked(st->spi, &m);
106
return spi_sync(st->spi, &m);
109
static int ad7793_write_reg(struct ad7793_state *st,
110
unsigned reg, unsigned size, unsigned val)
112
return __ad7793_write_reg(st, false, false, reg, size, val);
115
static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
116
bool cs_change, unsigned char reg,
117
int *val, unsigned size)
121
struct spi_transfer t[] = {
128
.cs_change = cs_change,
131
struct spi_message m;
133
data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
135
spi_message_init(&m);
136
spi_message_add_tail(&t[0], &m);
137
spi_message_add_tail(&t[1], &m);
140
ret = spi_sync_locked(st->spi, &m);
142
ret = spi_sync(st->spi, &m);
149
*val = data[0] << 16 | data[1] << 8 | data[2];
152
*val = data[0] << 8 | data[1];
164
static int ad7793_read_reg(struct ad7793_state *st,
165
unsigned reg, int *val, unsigned size)
167
return __ad7793_read_reg(st, 0, 0, reg, val, size);
170
static int ad7793_read(struct ad7793_state *st, unsigned ch,
171
unsigned len, int *val)
174
st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
175
st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
176
AD7793_MODE_SEL(AD7793_MODE_SINGLE);
178
ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
180
spi_bus_lock(st->spi->master);
183
ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
184
sizeof(st->mode), st->mode);
189
enable_irq(st->spi->irq);
190
wait_event_interruptible(st->wq_data_avail, st->done);
192
ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
194
spi_bus_unlock(st->spi->master);
199
static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
203
st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
204
st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
206
ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
208
spi_bus_lock(st->spi->master);
211
ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
212
sizeof(st->mode), st->mode);
217
enable_irq(st->spi->irq);
218
wait_event_interruptible(st->wq_data_avail, st->done);
220
st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
221
AD7793_MODE_SEL(AD7793_MODE_IDLE);
223
ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
224
sizeof(st->mode), st->mode);
226
spi_bus_unlock(st->spi->master);
231
static const u8 ad7793_calib_arr[6][2] = {
232
{AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
233
{AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
234
{AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
235
{AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
236
{AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
237
{AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
240
static int ad7793_calibrate_all(struct ad7793_state *st)
244
for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
245
ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
246
ad7793_calib_arr[i][1]);
253
dev_err(&st->spi->dev, "Calibration failed\n");
257
static int ad7793_setup(struct ad7793_state *st)
260
unsigned long long scale_uv;
263
/* reset the serial interface */
264
ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
267
msleep(1); /* Wait for at least 500us */
269
/* write/read test for device presence */
270
ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
274
id &= AD7793_ID_MASK;
276
if (!((id == AD7792_ID) || (id == AD7793_ID))) {
277
dev_err(&st->spi->dev, "device ID query failed\n");
281
st->mode = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
282
AD7793_MODE_SEL(AD7793_MODE_IDLE);
283
st->conf = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
285
ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
289
ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
293
ret = ad7793_write_reg(st, AD7793_REG_IO,
294
sizeof(st->pdata->io), st->pdata->io);
298
ret = ad7793_calibrate_all(st);
302
/* Populate available ADC input ranges */
303
for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
304
scale_uv = ((u64)st->int_vref_mv * 100000000)
305
>> (st->chip_info->channel[0].scan_type.realbits -
306
(!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
309
st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
310
st->scale_avail[i][0] = scale_uv;
315
dev_err(&st->spi->dev, "setup failed\n");
319
static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
321
struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
324
u32 *dat32 = (u32 *)dat64;
326
if (!(test_bit(ch, ring->scan_mask)))
329
ret = ring->access->read_last(ring, (u8 *) &dat64);
338
static int ad7793_ring_preenable(struct iio_dev *indio_dev)
340
struct ad7793_state *st = iio_priv(indio_dev);
341
struct iio_buffer *ring = indio_dev->buffer;
345
if (!ring->scan_count)
348
channel = find_first_bit(ring->scan_mask,
349
indio_dev->masklength);
351
d_size = ring->scan_count *
352
indio_dev->channels[0].scan_type.storagebits / 8;
354
if (ring->scan_timestamp) {
355
d_size += sizeof(s64);
357
if (d_size % sizeof(s64))
358
d_size += sizeof(s64) - (d_size % sizeof(s64));
361
if (indio_dev->buffer->access->set_bytes_per_datum)
362
indio_dev->buffer->access->
363
set_bytes_per_datum(indio_dev->buffer, d_size);
365
st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
366
AD7793_MODE_SEL(AD7793_MODE_CONT);
367
st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) |
368
AD7793_CONF_CHAN(indio_dev->channels[channel].address);
370
ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
372
spi_bus_lock(st->spi->master);
373
__ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
374
sizeof(st->mode), st->mode);
377
enable_irq(st->spi->irq);
382
static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
384
struct ad7793_state *st = iio_priv(indio_dev);
386
st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
387
AD7793_MODE_SEL(AD7793_MODE_IDLE);
390
wait_event_interruptible(st->wq_data_avail, st->done);
393
disable_irq_nosync(st->spi->irq);
395
__ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
396
sizeof(st->mode), st->mode);
398
return spi_bus_unlock(st->spi->master);
402
* ad7793_trigger_handler() bh of trigger launched polling to ring buffer
405
static irqreturn_t ad7793_trigger_handler(int irq, void *p)
407
struct iio_poll_func *pf = p;
408
struct iio_dev *indio_dev = pf->indio_dev;
409
struct iio_buffer *ring = indio_dev->buffer;
410
struct ad7793_state *st = iio_priv(indio_dev);
412
s32 *dat32 = (s32 *)dat64;
414
if (ring->scan_count)
415
__ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
417
indio_dev->channels[0].scan_type.realbits/8);
419
/* Guaranteed to be aligned with 8 byte boundary */
420
if (ring->scan_timestamp)
421
dat64[1] = pf->timestamp;
423
ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
425
iio_trigger_notify_done(indio_dev->trig);
427
enable_irq(st->spi->irq);
432
static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
433
.preenable = &ad7793_ring_preenable,
434
.postenable = &iio_triggered_buffer_postenable,
435
.predisable = &iio_triggered_buffer_predisable,
436
.postdisable = &ad7793_ring_postdisable,
439
static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
443
indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
444
if (!indio_dev->buffer) {
448
/* Effectively select the ring buffer implementation */
449
indio_dev->buffer->access = &ring_sw_access_funcs;
450
indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
451
&ad7793_trigger_handler,
456
if (indio_dev->pollfunc == NULL) {
458
goto error_deallocate_sw_rb;
461
/* Ring buffer functions - here trigger setup related */
462
indio_dev->buffer->setup_ops = &ad7793_ring_setup_ops;
464
/* Flag that polled ring buffering is possible */
465
indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
468
error_deallocate_sw_rb:
469
iio_sw_rb_free(indio_dev->buffer);
474
static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
476
iio_dealloc_pollfunc(indio_dev->pollfunc);
477
iio_sw_rb_free(indio_dev->buffer);
481
* ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
483
static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
485
struct ad7793_state *st = iio_priv(private);
488
wake_up_interruptible(&st->wq_data_avail);
489
disable_irq_nosync(irq);
491
iio_trigger_poll(st->trig, iio_get_time_ns());
496
static int ad7793_probe_trigger(struct iio_dev *indio_dev)
498
struct ad7793_state *st = iio_priv(indio_dev);
501
st->trig = iio_allocate_trigger("%s-dev%d",
502
spi_get_device_id(st->spi)->name,
504
if (st->trig == NULL) {
509
ret = request_irq(st->spi->irq,
510
ad7793_data_rdy_trig_poll,
512
spi_get_device_id(st->spi)->name,
515
goto error_free_trig;
517
disable_irq_nosync(st->spi->irq);
519
st->trig->dev.parent = &st->spi->dev;
520
st->trig->owner = THIS_MODULE;
521
st->trig->private_data = indio_dev;
523
ret = iio_trigger_register(st->trig);
525
/* select default trigger */
526
indio_dev->trig = st->trig;
533
free_irq(st->spi->irq, indio_dev);
535
iio_free_trigger(st->trig);
540
static void ad7793_remove_trigger(struct iio_dev *indio_dev)
542
struct ad7793_state *st = iio_priv(indio_dev);
544
iio_trigger_unregister(st->trig);
545
free_irq(st->spi->irq, indio_dev);
546
iio_free_trigger(st->trig);
549
static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
550
17, 16, 12, 10, 8, 6, 4};
552
static ssize_t ad7793_read_frequency(struct device *dev,
553
struct device_attribute *attr,
556
struct iio_dev *indio_dev = dev_get_drvdata(dev);
557
struct ad7793_state *st = iio_priv(indio_dev);
559
return sprintf(buf, "%d\n",
560
sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
563
static ssize_t ad7793_write_frequency(struct device *dev,
564
struct device_attribute *attr,
568
struct iio_dev *indio_dev = dev_get_drvdata(dev);
569
struct ad7793_state *st = iio_priv(indio_dev);
573
mutex_lock(&indio_dev->mlock);
574
if (iio_buffer_enabled(indio_dev)) {
575
mutex_unlock(&indio_dev->mlock);
578
mutex_unlock(&indio_dev->mlock);
580
ret = strict_strtol(buf, 10, &lval);
586
for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
587
if (lval == sample_freq_avail[i]) {
588
mutex_lock(&indio_dev->mlock);
589
st->mode &= ~AD7793_MODE_RATE(-1);
590
st->mode |= AD7793_MODE_RATE(i);
591
ad7793_write_reg(st, AD7793_REG_MODE,
592
sizeof(st->mode), st->mode);
593
mutex_unlock(&indio_dev->mlock);
597
return ret ? ret : len;
600
static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
601
ad7793_read_frequency,
602
ad7793_write_frequency);
604
static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
605
"470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
607
static ssize_t ad7793_show_scale_available(struct device *dev,
608
struct device_attribute *attr, char *buf)
610
struct iio_dev *indio_dev = dev_get_drvdata(dev);
611
struct ad7793_state *st = iio_priv(indio_dev);
614
for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
615
len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
616
st->scale_avail[i][1]);
618
len += sprintf(buf + len, "\n");
623
static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
624
S_IRUGO, ad7793_show_scale_available, NULL, 0);
626
static struct attribute *ad7793_attributes[] = {
627
&iio_dev_attr_sampling_frequency.dev_attr.attr,
628
&iio_const_attr_sampling_frequency_available.dev_attr.attr,
629
&iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
633
static const struct attribute_group ad7793_attribute_group = {
634
.attrs = ad7793_attributes,
637
static int ad7793_read_raw(struct iio_dev *indio_dev,
638
struct iio_chan_spec const *chan,
643
struct ad7793_state *st = iio_priv(indio_dev);
645
unsigned long long scale_uv;
646
bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
650
mutex_lock(&indio_dev->mlock);
651
if (iio_buffer_enabled(indio_dev))
652
ret = ad7793_scan_from_ring(st,
653
chan->scan_index, &smpl);
655
ret = ad7793_read(st, chan->address,
656
chan->scan_type.realbits / 8, &smpl);
657
mutex_unlock(&indio_dev->mlock);
662
*val = (smpl >> chan->scan_type.shift) &
663
((1 << (chan->scan_type.realbits)) - 1);
666
*val -= (1 << (chan->scan_type.realbits - 1));
670
case (1 << IIO_CHAN_INFO_SCALE_SHARED):
671
*val = st->scale_avail[(st->conf >> 8) & 0x7][0];
672
*val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
674
return IIO_VAL_INT_PLUS_NANO;
676
case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
677
switch (chan->type) {
679
/* 1170mV / 2^23 * 6 */
680
scale_uv = (1170ULL * 100000000ULL * 6ULL)
681
>> (chan->scan_type.realbits -
685
/* Always uses unity gain and internal ref */
686
scale_uv = (2500ULL * 100000000ULL)
687
>> (chan->scan_type.realbits -
694
*val2 = do_div(scale_uv, 100000000) * 10;
697
return IIO_VAL_INT_PLUS_NANO;
702
static int ad7793_write_raw(struct iio_dev *indio_dev,
703
struct iio_chan_spec const *chan,
708
struct ad7793_state *st = iio_priv(indio_dev);
712
mutex_lock(&indio_dev->mlock);
713
if (iio_buffer_enabled(indio_dev)) {
714
mutex_unlock(&indio_dev->mlock);
719
case (1 << IIO_CHAN_INFO_SCALE_SHARED):
721
for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
722
if (val2 == st->scale_avail[i][1]) {
724
st->conf &= ~AD7793_CONF_GAIN(-1);
725
st->conf |= AD7793_CONF_GAIN(i);
727
if (tmp != st->conf) {
728
ad7793_write_reg(st, AD7793_REG_CONF,
731
ad7793_calibrate_all(st);
740
mutex_unlock(&indio_dev->mlock);
744
static int ad7793_validate_trigger(struct iio_dev *indio_dev,
745
struct iio_trigger *trig)
747
if (indio_dev->trig != trig)
753
static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
754
struct iio_chan_spec const *chan,
757
return IIO_VAL_INT_PLUS_NANO;
760
static const struct iio_info ad7793_info = {
761
.read_raw = &ad7793_read_raw,
762
.write_raw = &ad7793_write_raw,
763
.write_raw_get_fmt = &ad7793_write_raw_get_fmt,
764
.attrs = &ad7793_attribute_group,
765
.validate_trigger = ad7793_validate_trigger,
766
.driver_module = THIS_MODULE,
769
static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
777
.address = AD7793_CH_AIN1P_AIN1M,
778
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
780
.scan_type = IIO_ST('s', 24, 32, 0)
788
.address = AD7793_CH_AIN2P_AIN2M,
789
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
791
.scan_type = IIO_ST('s', 24, 32, 0)
799
.address = AD7793_CH_AIN3P_AIN3M,
800
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
802
.scan_type = IIO_ST('s', 24, 32, 0)
807
.extend_name = "shorted",
811
.address = AD7793_CH_AIN1M_AIN1M,
812
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
814
.scan_type = IIO_ST('s', 24, 32, 0)
820
.address = AD7793_CH_TEMP,
821
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
823
.scan_type = IIO_ST('s', 24, 32, 0),
827
.extend_name = "supply",
830
.address = AD7793_CH_AVDD_MONITOR,
831
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
833
.scan_type = IIO_ST('s', 24, 32, 0),
835
.channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
844
.address = AD7793_CH_AIN1P_AIN1M,
845
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
847
.scan_type = IIO_ST('s', 16, 32, 0)
855
.address = AD7793_CH_AIN2P_AIN2M,
856
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
858
.scan_type = IIO_ST('s', 16, 32, 0)
866
.address = AD7793_CH_AIN3P_AIN3M,
867
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
869
.scan_type = IIO_ST('s', 16, 32, 0)
874
.extend_name = "shorted",
878
.address = AD7793_CH_AIN1M_AIN1M,
879
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED),
881
.scan_type = IIO_ST('s', 16, 32, 0)
887
.address = AD7793_CH_TEMP,
888
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
890
.scan_type = IIO_ST('s', 16, 32, 0),
894
.extend_name = "supply",
897
.address = AD7793_CH_AVDD_MONITOR,
898
.info_mask = (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
900
.scan_type = IIO_ST('s', 16, 32, 0),
902
.channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
906
static int __devinit ad7793_probe(struct spi_device *spi)
908
struct ad7793_platform_data *pdata = spi->dev.platform_data;
909
struct ad7793_state *st;
910
struct iio_dev *indio_dev;
911
int ret, i, voltage_uv = 0;
914
dev_err(&spi->dev, "no platform data?\n");
919
dev_err(&spi->dev, "no IRQ?\n");
923
indio_dev = iio_allocate_device(sizeof(*st));
924
if (indio_dev == NULL)
927
st = iio_priv(indio_dev);
929
st->reg = regulator_get(&spi->dev, "vcc");
930
if (!IS_ERR(st->reg)) {
931
ret = regulator_enable(st->reg);
935
voltage_uv = regulator_get_voltage(st->reg);
939
&ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
943
if (pdata && pdata->vref_mv)
944
st->int_vref_mv = pdata->vref_mv;
946
st->int_vref_mv = voltage_uv / 1000;
948
st->int_vref_mv = 2500; /* Build-in ref */
950
spi_set_drvdata(spi, indio_dev);
953
indio_dev->dev.parent = &spi->dev;
954
indio_dev->name = spi_get_device_id(spi)->name;
955
indio_dev->modes = INDIO_DIRECT_MODE;
956
indio_dev->channels = st->chip_info->channel;
957
indio_dev->available_scan_masks = st->available_scan_masks;
958
indio_dev->num_channels = 7;
959
indio_dev->info = &ad7793_info;
961
for (i = 0; i < indio_dev->num_channels; i++) {
962
set_bit(i, &st->available_scan_masks[i]);
964
channels[indio_dev->num_channels - 1].scan_index,
965
&st->available_scan_masks[i]);
968
init_waitqueue_head(&st->wq_data_avail);
970
ret = ad7793_register_ring_funcs_and_init(indio_dev);
972
goto error_disable_reg;
974
ret = ad7793_probe_trigger(indio_dev);
976
goto error_unreg_ring;
978
ret = iio_buffer_register(indio_dev,
980
indio_dev->num_channels);
982
goto error_remove_trigger;
984
ret = ad7793_setup(st);
986
goto error_uninitialize_ring;
988
ret = iio_device_register(indio_dev);
990
goto error_uninitialize_ring;
994
error_uninitialize_ring:
995
iio_buffer_unregister(indio_dev);
996
error_remove_trigger:
997
ad7793_remove_trigger(indio_dev);
999
ad7793_ring_cleanup(indio_dev);
1001
if (!IS_ERR(st->reg))
1002
regulator_disable(st->reg);
1004
if (!IS_ERR(st->reg))
1005
regulator_put(st->reg);
1007
iio_free_device(indio_dev);
1012
static int ad7793_remove(struct spi_device *spi)
1014
struct iio_dev *indio_dev = spi_get_drvdata(spi);
1015
struct ad7793_state *st = iio_priv(indio_dev);
1017
iio_device_unregister(indio_dev);
1018
iio_buffer_unregister(indio_dev);
1019
ad7793_remove_trigger(indio_dev);
1020
ad7793_ring_cleanup(indio_dev);
1022
if (!IS_ERR(st->reg)) {
1023
regulator_disable(st->reg);
1024
regulator_put(st->reg);
1027
iio_free_device(indio_dev);
1032
static const struct spi_device_id ad7793_id[] = {
1033
{"ad7792", ID_AD7792},
1034
{"ad7793", ID_AD7793},
1038
static struct spi_driver ad7793_driver = {
1041
.bus = &spi_bus_type,
1042
.owner = THIS_MODULE,
1044
.probe = ad7793_probe,
1045
.remove = __devexit_p(ad7793_remove),
1046
.id_table = ad7793_id,
1049
static int __init ad7793_init(void)
1051
return spi_register_driver(&ad7793_driver);
1053
module_init(ad7793_init);
1055
static void __exit ad7793_exit(void)
1057
spi_unregister_driver(&ad7793_driver);
1059
module_exit(ad7793_exit);
1061
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
1062
MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
1063
MODULE_LICENSE("GPL v2");