1
/* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3
Copyright (c) 2001, 2002 by D-Link Corporation
4
Written by Edward Peng.<edward_peng@dlink.com.tw>
5
Created 03-May-2001, base on Linux' sundance.c.
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 2 of the License, or
10
(at your option) any later version.
13
#define DRV_NAME "DL2000/TC902x-based linux driver"
14
#define DRV_VERSION "v1.19"
15
#define DRV_RELDATE "2007/08/12"
17
#include <linux/dma-mapping.h>
19
static char version[] __devinitdata =
20
KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
22
static int mtu[MAX_UNITS];
23
static int vlan[MAX_UNITS];
24
static int jumbo[MAX_UNITS];
25
static char *media[MAX_UNITS];
26
static int tx_flow=-1;
27
static int rx_flow=-1;
28
static int copy_thresh;
29
static int rx_coalesce=10; /* Rx frame count each interrupt */
30
static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */
31
static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */
34
MODULE_AUTHOR ("Edward Peng");
35
MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
36
MODULE_LICENSE("GPL");
37
module_param_array(mtu, int, NULL, 0);
38
module_param_array(media, charp, NULL, 0);
39
module_param_array(vlan, int, NULL, 0);
40
module_param_array(jumbo, int, NULL, 0);
41
module_param(tx_flow, int, 0);
42
module_param(rx_flow, int, 0);
43
module_param(copy_thresh, int, 0);
44
module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */
45
module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */
46
module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
49
/* Enable the default interrupts */
50
#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51
UpdateStats | LinkEvent)
53
writew(DEFAULT_INTR, ioaddr + IntEnable)
55
static const int max_intrloop = 50;
56
static const int multicast_filter_limit = 0x40;
58
static int rio_open (struct net_device *dev);
59
static void rio_timer (unsigned long data);
60
static void rio_tx_timeout (struct net_device *dev);
61
static void alloc_list (struct net_device *dev);
62
static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev);
63
static irqreturn_t rio_interrupt (int irq, void *dev_instance);
64
static void rio_free_tx (struct net_device *dev, int irq);
65
static void tx_error (struct net_device *dev, int tx_status);
66
static int receive_packet (struct net_device *dev);
67
static void rio_error (struct net_device *dev, int int_status);
68
static int change_mtu (struct net_device *dev, int new_mtu);
69
static void set_multicast (struct net_device *dev);
70
static struct net_device_stats *get_stats (struct net_device *dev);
71
static int clear_stats (struct net_device *dev);
72
static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
73
static int rio_close (struct net_device *dev);
74
static int find_miiphy (struct net_device *dev);
75
static int parse_eeprom (struct net_device *dev);
76
static int read_eeprom (long ioaddr, int eep_addr);
77
static int mii_wait_link (struct net_device *dev, int wait);
78
static int mii_set_media (struct net_device *dev);
79
static int mii_get_media (struct net_device *dev);
80
static int mii_set_media_pcs (struct net_device *dev);
81
static int mii_get_media_pcs (struct net_device *dev);
82
static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
83
static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
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static const struct ethtool_ops ethtool_ops;
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static const struct net_device_ops netdev_ops = {
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.ndo_start_xmit = start_xmit,
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.ndo_stop = rio_close,
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.ndo_get_stats = get_stats,
93
.ndo_validate_addr = eth_validate_addr,
94
.ndo_set_mac_address = eth_mac_addr,
95
.ndo_set_multicast_list = set_multicast,
96
.ndo_do_ioctl = rio_ioctl,
97
.ndo_tx_timeout = rio_tx_timeout,
98
.ndo_change_mtu = change_mtu,
102
rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
104
struct net_device *dev;
105
struct netdev_private *np;
107
int chip_idx = ent->driver_data;
110
static int version_printed;
114
if (!version_printed++)
115
printk ("%s", version);
117
err = pci_enable_device (pdev);
122
err = pci_request_regions (pdev, "dl2k");
124
goto err_out_disable;
126
pci_set_master (pdev);
127
dev = alloc_etherdev (sizeof (*np));
132
SET_NETDEV_DEV(dev, &pdev->dev);
135
ioaddr = pci_resource_start (pdev, 1);
136
ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE);
142
ioaddr = pci_resource_start (pdev, 0);
144
dev->base_addr = ioaddr;
146
np = netdev_priv(dev);
147
np->chip_id = chip_idx;
149
spin_lock_init (&np->tx_lock);
150
spin_lock_init (&np->rx_lock);
152
/* Parse manual configuration */
155
if (card_idx < MAX_UNITS) {
156
if (media[card_idx] != NULL) {
158
if (strcmp (media[card_idx], "auto") == 0 ||
159
strcmp (media[card_idx], "autosense") == 0 ||
160
strcmp (media[card_idx], "0") == 0 ) {
162
} else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
163
strcmp (media[card_idx], "4") == 0) {
166
} else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||
167
strcmp (media[card_idx], "3") == 0) {
170
} else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
171
strcmp (media[card_idx], "2") == 0) {
174
} else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
175
strcmp (media[card_idx], "1") == 0) {
178
} else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
179
strcmp (media[card_idx], "6") == 0) {
182
} else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
183
strcmp (media[card_idx], "5") == 0) {
190
if (jumbo[card_idx] != 0) {
192
dev->mtu = MAX_JUMBO;
195
if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
196
dev->mtu = mtu[card_idx];
198
np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
200
if (rx_coalesce > 0 && rx_timeout > 0) {
201
np->rx_coalesce = rx_coalesce;
202
np->rx_timeout = rx_timeout;
205
np->tx_flow = (tx_flow == 0) ? 0 : 1;
206
np->rx_flow = (rx_flow == 0) ? 0 : 1;
210
else if (tx_coalesce > TX_RING_SIZE-1)
211
tx_coalesce = TX_RING_SIZE - 1;
213
dev->netdev_ops = &netdev_ops;
214
dev->watchdog_timeo = TX_TIMEOUT;
215
SET_ETHTOOL_OPS(dev, ðtool_ops);
217
dev->features = NETIF_F_IP_CSUM;
219
pci_set_drvdata (pdev, dev);
221
ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
223
goto err_out_iounmap;
224
np->tx_ring = (struct netdev_desc *) ring_space;
225
np->tx_ring_dma = ring_dma;
227
ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
229
goto err_out_unmap_tx;
230
np->rx_ring = (struct netdev_desc *) ring_space;
231
np->rx_ring_dma = ring_dma;
233
/* Parse eeprom data */
236
/* Find PHY address */
237
err = find_miiphy (dev);
239
goto err_out_unmap_rx;
242
np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0;
244
/* Set media and reset PHY */
246
/* default Auto-Negotiation for fiber deivices */
247
if (np->an_enable == 2) {
250
mii_set_media_pcs (dev);
252
/* Auto-Negotiation is mandatory for 1000BASE-T,
253
IEEE 802.3ab Annex 28D page 14 */
254
if (np->speed == 1000)
259
err = register_netdev (dev);
261
goto err_out_unmap_rx;
265
printk (KERN_INFO "%s: %s, %pM, IRQ %d\n",
266
dev->name, np->name, dev->dev_addr, irq);
268
printk(KERN_INFO "tx_coalesce:\t%d packets\n",
272
"rx_coalesce:\t%d packets\n"
273
"rx_timeout: \t%d ns\n",
274
np->rx_coalesce, np->rx_timeout*640);
276
printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
280
pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
282
pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
285
iounmap ((void *) ioaddr);
292
pci_release_regions (pdev);
295
pci_disable_device (pdev);
300
find_miiphy (struct net_device *dev)
302
int i, phy_found = 0;
303
struct netdev_private *np;
305
np = netdev_priv(dev);
306
ioaddr = dev->base_addr;
309
for (i = 31; i >= 0; i--) {
310
int mii_status = mii_read (dev, i, 1);
311
if (mii_status != 0xffff && mii_status != 0x0000) {
317
printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
324
parse_eeprom (struct net_device *dev)
327
long ioaddr = dev->base_addr;
331
PSROM_t psrom = (PSROM_t) sromdata;
332
struct netdev_private *np = netdev_priv(dev);
337
ioaddr = pci_resource_start (np->pdev, 0);
340
for (i = 0; i < 128; i++) {
341
((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom (ioaddr, i));
344
ioaddr = dev->base_addr;
346
if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
348
crc = ~ether_crc_le (256 - 4, sromdata);
349
if (psrom->crc != cpu_to_le32(crc)) {
350
printk (KERN_ERR "%s: EEPROM data CRC error.\n",
356
/* Set MAC address */
357
for (i = 0; i < 6; i++)
358
dev->dev_addr[i] = psrom->mac_addr[i];
360
if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
364
/* Parse Software Information Block */
366
psib = (u8 *) sromdata;
370
if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
371
printk (KERN_ERR "Cell data error\n");
375
case 0: /* Format version */
377
case 1: /* End of cell */
379
case 2: /* Duplex Polarity */
380
np->duplex_polarity = psib[i];
381
writeb (readb (ioaddr + PhyCtrl) | psib[i],
384
case 3: /* Wake Polarity */
385
np->wake_polarity = psib[i];
387
case 9: /* Adapter description */
388
j = (next - i > 255) ? 255 : next - i;
389
memcpy (np->name, &(psib[i]), j);
395
case 8: /* Reversed */
397
default: /* Unknown cell */
407
rio_open (struct net_device *dev)
409
struct netdev_private *np = netdev_priv(dev);
410
long ioaddr = dev->base_addr;
414
i = request_irq (dev->irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
418
/* Reset all logic functions */
419
writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset,
420
ioaddr + ASICCtrl + 2);
423
/* DebugCtrl bit 4, 5, 9 must set */
424
writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl);
428
writew (MAX_JUMBO+14, ioaddr + MaxFrameSize);
432
/* Get station address */
433
for (i = 0; i < 6; i++)
434
writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i);
438
writel (np->rx_coalesce | np->rx_timeout << 16,
439
ioaddr + RxDMAIntCtrl);
441
/* Set RIO to poll every N*320nsec. */
442
writeb (0x20, ioaddr + RxDMAPollPeriod);
443
writeb (0xff, ioaddr + TxDMAPollPeriod);
444
writeb (0x30, ioaddr + RxDMABurstThresh);
445
writeb (0x30, ioaddr + RxDMAUrgentThresh);
446
writel (0x0007ffff, ioaddr + RmonStatMask);
447
/* clear statistics */
452
/* priority field in RxDMAIntCtrl */
453
writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10,
454
ioaddr + RxDMAIntCtrl);
456
writew (np->vlan, ioaddr + VLANId);
457
/* Length/Type should be 0x8100 */
458
writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag);
459
/* Enable AutoVLANuntagging, but disable AutoVLANtagging.
460
VLAN information tagged by TFC' VID, CFI fields. */
461
writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging,
465
init_timer (&np->timer);
466
np->timer.expires = jiffies + 1*HZ;
467
np->timer.data = (unsigned long) dev;
468
np->timer.function = rio_timer;
469
add_timer (&np->timer);
472
writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable,
476
macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
477
macctrl |= (np->full_duplex) ? DuplexSelect : 0;
478
macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
479
macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
480
writew(macctrl, ioaddr + MACCtrl);
482
netif_start_queue (dev);
484
/* Enable default interrupts */
490
rio_timer (unsigned long data)
492
struct net_device *dev = (struct net_device *)data;
493
struct netdev_private *np = netdev_priv(dev);
495
int next_tick = 1*HZ;
498
spin_lock_irqsave(&np->rx_lock, flags);
499
/* Recover rx ring exhausted error */
500
if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
501
printk(KERN_INFO "Try to recover rx ring exhausted...\n");
502
/* Re-allocate skbuffs to fill the descriptor ring */
503
for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
505
entry = np->old_rx % RX_RING_SIZE;
506
/* Dropped packets don't need to re-allocate */
507
if (np->rx_skbuff[entry] == NULL) {
508
skb = netdev_alloc_skb_ip_align(dev,
511
np->rx_ring[entry].fraginfo = 0;
513
"%s: Still unable to re-allocate Rx skbuff.#%d\n",
517
np->rx_skbuff[entry] = skb;
518
np->rx_ring[entry].fraginfo =
519
cpu_to_le64 (pci_map_single
520
(np->pdev, skb->data, np->rx_buf_sz,
521
PCI_DMA_FROMDEVICE));
523
np->rx_ring[entry].fraginfo |=
524
cpu_to_le64((u64)np->rx_buf_sz << 48);
525
np->rx_ring[entry].status = 0;
528
spin_unlock_irqrestore (&np->rx_lock, flags);
529
np->timer.expires = jiffies + next_tick;
530
add_timer(&np->timer);
534
rio_tx_timeout (struct net_device *dev)
536
long ioaddr = dev->base_addr;
538
printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
539
dev->name, readl (ioaddr + TxStatus));
542
dev->trans_start = jiffies; /* prevent tx timeout */
545
/* allocate and initialize Tx and Rx descriptors */
547
alloc_list (struct net_device *dev)
549
struct netdev_private *np = netdev_priv(dev);
552
np->cur_rx = np->cur_tx = 0;
553
np->old_rx = np->old_tx = 0;
554
np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
556
/* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
557
for (i = 0; i < TX_RING_SIZE; i++) {
558
np->tx_skbuff[i] = NULL;
559
np->tx_ring[i].status = cpu_to_le64 (TFDDone);
560
np->tx_ring[i].next_desc = cpu_to_le64 (np->tx_ring_dma +
561
((i+1)%TX_RING_SIZE) *
562
sizeof (struct netdev_desc));
565
/* Initialize Rx descriptors */
566
for (i = 0; i < RX_RING_SIZE; i++) {
567
np->rx_ring[i].next_desc = cpu_to_le64 (np->rx_ring_dma +
568
((i + 1) % RX_RING_SIZE) *
569
sizeof (struct netdev_desc));
570
np->rx_ring[i].status = 0;
571
np->rx_ring[i].fraginfo = 0;
572
np->rx_skbuff[i] = NULL;
575
/* Allocate the rx buffers */
576
for (i = 0; i < RX_RING_SIZE; i++) {
577
/* Allocated fixed size of skbuff */
580
skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
581
np->rx_skbuff[i] = skb;
584
"%s: alloc_list: allocate Rx buffer error! ",
588
/* Rubicon now supports 40 bits of addressing space. */
589
np->rx_ring[i].fraginfo =
590
cpu_to_le64 ( pci_map_single (
591
np->pdev, skb->data, np->rx_buf_sz,
592
PCI_DMA_FROMDEVICE));
593
np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48);
597
writel (np->rx_ring_dma, dev->base_addr + RFDListPtr0);
598
writel (0, dev->base_addr + RFDListPtr1);
602
start_xmit (struct sk_buff *skb, struct net_device *dev)
604
struct netdev_private *np = netdev_priv(dev);
605
struct netdev_desc *txdesc;
608
u64 tfc_vlan_tag = 0;
610
if (np->link_status == 0) { /* Link Down */
614
ioaddr = dev->base_addr;
615
entry = np->cur_tx % TX_RING_SIZE;
616
np->tx_skbuff[entry] = skb;
617
txdesc = &np->tx_ring[entry];
620
if (skb->ip_summed == CHECKSUM_PARTIAL) {
622
cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
627
tfc_vlan_tag = VLANTagInsert |
628
((u64)np->vlan << 32) |
629
((u64)skb->priority << 45);
631
txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
634
txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48);
636
/* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
637
* Work around: Always use 1 descriptor in 10Mbps mode */
638
if (entry % np->tx_coalesce == 0 || np->speed == 10)
639
txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
642
(1 << FragCountShift));
644
txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
646
(1 << FragCountShift));
649
writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl);
651
writel(10000, ioaddr + CountDown);
652
np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
653
if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
654
< TX_QUEUE_LEN - 1 && np->speed != 10) {
656
} else if (!netif_queue_stopped(dev)) {
657
netif_stop_queue (dev);
660
/* The first TFDListPtr */
661
if (readl (dev->base_addr + TFDListPtr0) == 0) {
662
writel (np->tx_ring_dma + entry * sizeof (struct netdev_desc),
663
dev->base_addr + TFDListPtr0);
664
writel (0, dev->base_addr + TFDListPtr1);
671
rio_interrupt (int irq, void *dev_instance)
673
struct net_device *dev = dev_instance;
674
struct netdev_private *np;
677
int cnt = max_intrloop;
680
ioaddr = dev->base_addr;
681
np = netdev_priv(dev);
683
int_status = readw (ioaddr + IntStatus);
684
writew (int_status, ioaddr + IntStatus);
685
int_status &= DEFAULT_INTR;
686
if (int_status == 0 || --cnt < 0)
689
/* Processing received packets */
690
if (int_status & RxDMAComplete)
691
receive_packet (dev);
692
/* TxDMAComplete interrupt */
693
if ((int_status & (TxDMAComplete|IntRequested))) {
695
tx_status = readl (ioaddr + TxStatus);
696
if (tx_status & 0x01)
697
tx_error (dev, tx_status);
698
/* Free used tx skbuffs */
699
rio_free_tx (dev, 1);
702
/* Handle uncommon events */
704
(HostError | LinkEvent | UpdateStats))
705
rio_error (dev, int_status);
707
if (np->cur_tx != np->old_tx)
708
writel (100, ioaddr + CountDown);
709
return IRQ_RETVAL(handled);
712
static inline dma_addr_t desc_to_dma(struct netdev_desc *desc)
714
return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48);
718
rio_free_tx (struct net_device *dev, int irq)
720
struct netdev_private *np = netdev_priv(dev);
721
int entry = np->old_tx % TX_RING_SIZE;
723
unsigned long flag = 0;
726
spin_lock(&np->tx_lock);
728
spin_lock_irqsave(&np->tx_lock, flag);
730
/* Free used tx skbuffs */
731
while (entry != np->cur_tx) {
734
if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone)))
736
skb = np->tx_skbuff[entry];
737
pci_unmap_single (np->pdev,
738
desc_to_dma(&np->tx_ring[entry]),
739
skb->len, PCI_DMA_TODEVICE);
741
dev_kfree_skb_irq (skb);
745
np->tx_skbuff[entry] = NULL;
746
entry = (entry + 1) % TX_RING_SIZE;
750
spin_unlock(&np->tx_lock);
752
spin_unlock_irqrestore(&np->tx_lock, flag);
755
/* If the ring is no longer full, clear tx_full and
756
call netif_wake_queue() */
758
if (netif_queue_stopped(dev) &&
759
((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
760
< TX_QUEUE_LEN - 1 || np->speed == 10)) {
761
netif_wake_queue (dev);
766
tx_error (struct net_device *dev, int tx_status)
768
struct netdev_private *np;
769
long ioaddr = dev->base_addr;
773
np = netdev_priv(dev);
775
frame_id = (tx_status & 0xffff0000);
776
printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
777
dev->name, tx_status, frame_id);
778
np->stats.tx_errors++;
779
/* Ttransmit Underrun */
780
if (tx_status & 0x10) {
781
np->stats.tx_fifo_errors++;
782
writew (readw (ioaddr + TxStartThresh) + 0x10,
783
ioaddr + TxStartThresh);
784
/* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
785
writew (TxReset | DMAReset | FIFOReset | NetworkReset,
786
ioaddr + ASICCtrl + 2);
787
/* Wait for ResetBusy bit clear */
788
for (i = 50; i > 0; i--) {
789
if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
793
rio_free_tx (dev, 1);
794
/* Reset TFDListPtr */
795
writel (np->tx_ring_dma +
796
np->old_tx * sizeof (struct netdev_desc),
797
dev->base_addr + TFDListPtr0);
798
writel (0, dev->base_addr + TFDListPtr1);
800
/* Let TxStartThresh stay default value */
803
if (tx_status & 0x04) {
804
np->stats.tx_fifo_errors++;
805
/* TxReset and clear FIFO */
806
writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);
807
/* Wait reset done */
808
for (i = 50; i > 0; i--) {
809
if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
813
/* Let TxStartThresh stay default value */
815
/* Maximum Collisions */
817
if (tx_status & 0x08)
818
np->stats.collisions16++;
820
if (tx_status & 0x08)
821
np->stats.collisions++;
824
writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);
828
receive_packet (struct net_device *dev)
830
struct netdev_private *np = netdev_priv(dev);
831
int entry = np->cur_rx % RX_RING_SIZE;
834
/* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
836
struct netdev_desc *desc = &np->rx_ring[entry];
840
if (!(desc->status & cpu_to_le64(RFDDone)) ||
841
!(desc->status & cpu_to_le64(FrameStart)) ||
842
!(desc->status & cpu_to_le64(FrameEnd)))
845
/* Chip omits the CRC. */
846
frame_status = le64_to_cpu(desc->status);
847
pkt_len = frame_status & 0xffff;
850
/* Update rx error statistics, drop packet. */
851
if (frame_status & RFS_Errors) {
852
np->stats.rx_errors++;
853
if (frame_status & (RxRuntFrame | RxLengthError))
854
np->stats.rx_length_errors++;
855
if (frame_status & RxFCSError)
856
np->stats.rx_crc_errors++;
857
if (frame_status & RxAlignmentError && np->speed != 1000)
858
np->stats.rx_frame_errors++;
859
if (frame_status & RxFIFOOverrun)
860
np->stats.rx_fifo_errors++;
864
/* Small skbuffs for short packets */
865
if (pkt_len > copy_thresh) {
866
pci_unmap_single (np->pdev,
870
skb_put (skb = np->rx_skbuff[entry], pkt_len);
871
np->rx_skbuff[entry] = NULL;
872
} else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {
873
pci_dma_sync_single_for_cpu(np->pdev,
877
skb_copy_to_linear_data (skb,
878
np->rx_skbuff[entry]->data,
880
skb_put (skb, pkt_len);
881
pci_dma_sync_single_for_device(np->pdev,
886
skb->protocol = eth_type_trans (skb, dev);
888
/* Checksum done by hw, but csum value unavailable. */
889
if (np->pdev->pci_rev_id >= 0x0c &&
890
!(frame_status & (TCPError | UDPError | IPError))) {
891
skb->ip_summed = CHECKSUM_UNNECESSARY;
896
entry = (entry + 1) % RX_RING_SIZE;
898
spin_lock(&np->rx_lock);
900
/* Re-allocate skbuffs to fill the descriptor ring */
902
while (entry != np->cur_rx) {
904
/* Dropped packets don't need to re-allocate */
905
if (np->rx_skbuff[entry] == NULL) {
906
skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
908
np->rx_ring[entry].fraginfo = 0;
910
"%s: receive_packet: "
911
"Unable to re-allocate Rx skbuff.#%d\n",
915
np->rx_skbuff[entry] = skb;
916
np->rx_ring[entry].fraginfo =
917
cpu_to_le64 (pci_map_single
918
(np->pdev, skb->data, np->rx_buf_sz,
919
PCI_DMA_FROMDEVICE));
921
np->rx_ring[entry].fraginfo |=
922
cpu_to_le64((u64)np->rx_buf_sz << 48);
923
np->rx_ring[entry].status = 0;
924
entry = (entry + 1) % RX_RING_SIZE;
927
spin_unlock(&np->rx_lock);
932
rio_error (struct net_device *dev, int int_status)
934
long ioaddr = dev->base_addr;
935
struct netdev_private *np = netdev_priv(dev);
938
/* Link change event */
939
if (int_status & LinkEvent) {
940
if (mii_wait_link (dev, 10) == 0) {
941
printk (KERN_INFO "%s: Link up\n", dev->name);
943
mii_get_media_pcs (dev);
946
if (np->speed == 1000)
947
np->tx_coalesce = tx_coalesce;
951
macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
952
macctrl |= (np->full_duplex) ? DuplexSelect : 0;
953
macctrl |= (np->tx_flow) ?
954
TxFlowControlEnable : 0;
955
macctrl |= (np->rx_flow) ?
956
RxFlowControlEnable : 0;
957
writew(macctrl, ioaddr + MACCtrl);
959
netif_carrier_on(dev);
961
printk (KERN_INFO "%s: Link off\n", dev->name);
963
netif_carrier_off(dev);
967
/* UpdateStats statistics registers */
968
if (int_status & UpdateStats) {
972
/* PCI Error, a catastronphic error related to the bus interface
973
occurs, set GlobalReset and HostReset to reset. */
974
if (int_status & HostError) {
975
printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
976
dev->name, int_status);
977
writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2);
982
static struct net_device_stats *
983
get_stats (struct net_device *dev)
985
long ioaddr = dev->base_addr;
986
struct netdev_private *np = netdev_priv(dev);
990
unsigned int stat_reg;
992
/* All statistics registers need to be acknowledged,
993
else statistic overflow could cause problems */
995
np->stats.rx_packets += readl (ioaddr + FramesRcvOk);
996
np->stats.tx_packets += readl (ioaddr + FramesXmtOk);
997
np->stats.rx_bytes += readl (ioaddr + OctetRcvOk);
998
np->stats.tx_bytes += readl (ioaddr + OctetXmtOk);
1000
np->stats.multicast = readl (ioaddr + McstFramesRcvdOk);
1001
np->stats.collisions += readl (ioaddr + SingleColFrames)
1002
+ readl (ioaddr + MultiColFrames);
1004
/* detailed tx errors */
1005
stat_reg = readw (ioaddr + FramesAbortXSColls);
1006
np->stats.tx_aborted_errors += stat_reg;
1007
np->stats.tx_errors += stat_reg;
1009
stat_reg = readw (ioaddr + CarrierSenseErrors);
1010
np->stats.tx_carrier_errors += stat_reg;
1011
np->stats.tx_errors += stat_reg;
1013
/* Clear all other statistic register. */
1014
readl (ioaddr + McstOctetXmtOk);
1015
readw (ioaddr + BcstFramesXmtdOk);
1016
readl (ioaddr + McstFramesXmtdOk);
1017
readw (ioaddr + BcstFramesRcvdOk);
1018
readw (ioaddr + MacControlFramesRcvd);
1019
readw (ioaddr + FrameTooLongErrors);
1020
readw (ioaddr + InRangeLengthErrors);
1021
readw (ioaddr + FramesCheckSeqErrors);
1022
readw (ioaddr + FramesLostRxErrors);
1023
readl (ioaddr + McstOctetXmtOk);
1024
readl (ioaddr + BcstOctetXmtOk);
1025
readl (ioaddr + McstFramesXmtdOk);
1026
readl (ioaddr + FramesWDeferredXmt);
1027
readl (ioaddr + LateCollisions);
1028
readw (ioaddr + BcstFramesXmtdOk);
1029
readw (ioaddr + MacControlFramesXmtd);
1030
readw (ioaddr + FramesWEXDeferal);
1033
for (i = 0x100; i <= 0x150; i += 4)
1036
readw (ioaddr + TxJumboFrames);
1037
readw (ioaddr + RxJumboFrames);
1038
readw (ioaddr + TCPCheckSumErrors);
1039
readw (ioaddr + UDPCheckSumErrors);
1040
readw (ioaddr + IPCheckSumErrors);
1045
clear_stats (struct net_device *dev)
1047
long ioaddr = dev->base_addr;
1052
/* All statistics registers need to be acknowledged,
1053
else statistic overflow could cause problems */
1054
readl (ioaddr + FramesRcvOk);
1055
readl (ioaddr + FramesXmtOk);
1056
readl (ioaddr + OctetRcvOk);
1057
readl (ioaddr + OctetXmtOk);
1059
readl (ioaddr + McstFramesRcvdOk);
1060
readl (ioaddr + SingleColFrames);
1061
readl (ioaddr + MultiColFrames);
1062
readl (ioaddr + LateCollisions);
1063
/* detailed rx errors */
1064
readw (ioaddr + FrameTooLongErrors);
1065
readw (ioaddr + InRangeLengthErrors);
1066
readw (ioaddr + FramesCheckSeqErrors);
1067
readw (ioaddr + FramesLostRxErrors);
1069
/* detailed tx errors */
1070
readw (ioaddr + FramesAbortXSColls);
1071
readw (ioaddr + CarrierSenseErrors);
1073
/* Clear all other statistic register. */
1074
readl (ioaddr + McstOctetXmtOk);
1075
readw (ioaddr + BcstFramesXmtdOk);
1076
readl (ioaddr + McstFramesXmtdOk);
1077
readw (ioaddr + BcstFramesRcvdOk);
1078
readw (ioaddr + MacControlFramesRcvd);
1079
readl (ioaddr + McstOctetXmtOk);
1080
readl (ioaddr + BcstOctetXmtOk);
1081
readl (ioaddr + McstFramesXmtdOk);
1082
readl (ioaddr + FramesWDeferredXmt);
1083
readw (ioaddr + BcstFramesXmtdOk);
1084
readw (ioaddr + MacControlFramesXmtd);
1085
readw (ioaddr + FramesWEXDeferal);
1087
for (i = 0x100; i <= 0x150; i += 4)
1090
readw (ioaddr + TxJumboFrames);
1091
readw (ioaddr + RxJumboFrames);
1092
readw (ioaddr + TCPCheckSumErrors);
1093
readw (ioaddr + UDPCheckSumErrors);
1094
readw (ioaddr + IPCheckSumErrors);
1100
change_mtu (struct net_device *dev, int new_mtu)
1102
struct netdev_private *np = netdev_priv(dev);
1103
int max = (np->jumbo) ? MAX_JUMBO : 1536;
1105
if ((new_mtu < 68) || (new_mtu > max)) {
1115
set_multicast (struct net_device *dev)
1117
long ioaddr = dev->base_addr;
1120
struct netdev_private *np = netdev_priv(dev);
1122
hash_table[0] = hash_table[1] = 0;
1123
/* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1124
hash_table[1] |= 0x02000000;
1125
if (dev->flags & IFF_PROMISC) {
1126
/* Receive all frames promiscuously. */
1127
rx_mode = ReceiveAllFrames;
1128
} else if ((dev->flags & IFF_ALLMULTI) ||
1129
(netdev_mc_count(dev) > multicast_filter_limit)) {
1130
/* Receive broadcast and multicast frames */
1131
rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1132
} else if (!netdev_mc_empty(dev)) {
1133
struct netdev_hw_addr *ha;
1134
/* Receive broadcast frames and multicast frames filtering
1137
ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1138
netdev_for_each_mc_addr(ha, dev) {
1140
int crc = ether_crc_le(ETH_ALEN, ha->addr);
1141
/* The inverted high significant 6 bits of CRC are
1142
used as an index to hashtable */
1143
for (bit = 0; bit < 6; bit++)
1144
if (crc & (1 << (31 - bit)))
1145
index |= (1 << bit);
1146
hash_table[index / 32] |= (1 << (index % 32));
1149
rx_mode = ReceiveBroadcast | ReceiveUnicast;
1152
/* ReceiveVLANMatch field in ReceiveMode */
1153
rx_mode |= ReceiveVLANMatch;
1156
writel (hash_table[0], ioaddr + HashTable0);
1157
writel (hash_table[1], ioaddr + HashTable1);
1158
writew (rx_mode, ioaddr + ReceiveMode);
1161
static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1163
struct netdev_private *np = netdev_priv(dev);
1164
strcpy(info->driver, "dl2k");
1165
strcpy(info->version, DRV_VERSION);
1166
strcpy(info->bus_info, pci_name(np->pdev));
1169
static int rio_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1171
struct netdev_private *np = netdev_priv(dev);
1172
if (np->phy_media) {
1174
cmd->supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1175
cmd->advertising= ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1176
cmd->port = PORT_FIBRE;
1177
cmd->transceiver = XCVR_INTERNAL;
1180
cmd->supported = SUPPORTED_10baseT_Half |
1181
SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1182
| SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1183
SUPPORTED_Autoneg | SUPPORTED_MII;
1184
cmd->advertising = ADVERTISED_10baseT_Half |
1185
ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1186
ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full|
1187
ADVERTISED_Autoneg | ADVERTISED_MII;
1188
cmd->port = PORT_MII;
1189
cmd->transceiver = XCVR_INTERNAL;
1191
if ( np->link_status ) {
1192
ethtool_cmd_speed_set(cmd, np->speed);
1193
cmd->duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1195
ethtool_cmd_speed_set(cmd, -1);
1199
cmd->autoneg = AUTONEG_ENABLE;
1201
cmd->autoneg = AUTONEG_DISABLE;
1203
cmd->phy_address = np->phy_addr;
1207
static int rio_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1209
struct netdev_private *np = netdev_priv(dev);
1210
netif_carrier_off(dev);
1211
if (cmd->autoneg == AUTONEG_ENABLE) {
1221
if (np->speed == 1000) {
1222
ethtool_cmd_speed_set(cmd, SPEED_100);
1223
cmd->duplex = DUPLEX_FULL;
1224
printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1226
switch (ethtool_cmd_speed(cmd)) {
1229
np->full_duplex = (cmd->duplex == DUPLEX_FULL);
1233
np->full_duplex = (cmd->duplex == DUPLEX_FULL);
1235
case SPEED_1000: /* not supported */
1244
static u32 rio_get_link(struct net_device *dev)
1246
struct netdev_private *np = netdev_priv(dev);
1247
return np->link_status;
1250
static const struct ethtool_ops ethtool_ops = {
1251
.get_drvinfo = rio_get_drvinfo,
1252
.get_settings = rio_get_settings,
1253
.set_settings = rio_set_settings,
1254
.get_link = rio_get_link,
1258
rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1261
struct netdev_private *np = netdev_priv(dev);
1262
struct mii_data *miidata = (struct mii_data *) &rq->ifr_ifru;
1264
struct netdev_desc *desc;
1267
phy_addr = np->phy_addr;
1269
case SIOCDEVPRIVATE:
1272
case SIOCDEVPRIVATE + 1:
1273
miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num);
1275
case SIOCDEVPRIVATE + 2:
1276
mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value);
1278
case SIOCDEVPRIVATE + 3:
1280
case SIOCDEVPRIVATE + 4:
1282
case SIOCDEVPRIVATE + 5:
1283
netif_stop_queue (dev);
1285
case SIOCDEVPRIVATE + 6:
1286
netif_wake_queue (dev);
1288
case SIOCDEVPRIVATE + 7:
1290
("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1291
netif_queue_stopped(dev), np->cur_tx, np->old_tx, np->cur_rx,
1294
case SIOCDEVPRIVATE + 8:
1295
printk("TX ring:\n");
1296
for (i = 0; i < TX_RING_SIZE; i++) {
1297
desc = &np->tx_ring[i];
1299
("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1301
(u32) (np->tx_ring_dma + i * sizeof (*desc)),
1302
(u32)le64_to_cpu(desc->next_desc),
1303
(u32)le64_to_cpu(desc->status),
1304
(u32)(le64_to_cpu(desc->fraginfo) >> 32),
1305
(u32)le64_to_cpu(desc->fraginfo));
1317
#define EEP_READ 0x0200
1318
#define EEP_BUSY 0x8000
1319
/* Read the EEPROM word */
1320
/* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1322
read_eeprom (long ioaddr, int eep_addr)
1325
outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl);
1327
if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) {
1328
return inw (ioaddr + EepromData);
1334
enum phy_ctrl_bits {
1335
MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1339
#define mii_delay() readb(ioaddr)
1341
mii_sendbit (struct net_device *dev, u32 data)
1343
long ioaddr = dev->base_addr + PhyCtrl;
1344
data = (data) ? MII_DATA1 : 0;
1346
data |= (readb (ioaddr) & 0xf8) | MII_WRITE;
1347
writeb (data, ioaddr);
1349
writeb (data | MII_CLK, ioaddr);
1354
mii_getbit (struct net_device *dev)
1356
long ioaddr = dev->base_addr + PhyCtrl;
1359
data = (readb (ioaddr) & 0xf8) | MII_READ;
1360
writeb (data, ioaddr);
1362
writeb (data | MII_CLK, ioaddr);
1364
return ((readb (ioaddr) >> 1) & 1);
1368
mii_send_bits (struct net_device *dev, u32 data, int len)
1371
for (i = len - 1; i >= 0; i--) {
1372
mii_sendbit (dev, data & (1 << i));
1377
mii_read (struct net_device *dev, int phy_addr, int reg_num)
1384
mii_send_bits (dev, 0xffffffff, 32);
1385
/* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1386
/* ST,OP = 0110'b for read operation */
1387
cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1388
mii_send_bits (dev, cmd, 14);
1390
if (mii_getbit (dev))
1393
for (i = 0; i < 16; i++) {
1394
retval |= mii_getbit (dev);
1399
return (retval >> 1) & 0xffff;
1405
mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1410
mii_send_bits (dev, 0xffffffff, 32);
1411
/* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1412
/* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1413
cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1414
mii_send_bits (dev, cmd, 32);
1420
mii_wait_link (struct net_device *dev, int wait)
1424
struct netdev_private *np;
1426
np = netdev_priv(dev);
1427
phy_addr = np->phy_addr;
1430
bmsr = mii_read (dev, phy_addr, MII_BMSR);
1431
if (bmsr & MII_BMSR_LINK_STATUS)
1434
} while (--wait > 0);
1438
mii_get_media (struct net_device *dev)
1445
struct netdev_private *np;
1447
np = netdev_priv(dev);
1448
phy_addr = np->phy_addr;
1450
bmsr = mii_read (dev, phy_addr, MII_BMSR);
1451
if (np->an_enable) {
1452
if (!(bmsr & MII_BMSR_AN_COMPLETE)) {
1453
/* Auto-Negotiation not completed */
1456
negotiate = mii_read (dev, phy_addr, MII_ANAR) &
1457
mii_read (dev, phy_addr, MII_ANLPAR);
1458
mscr = mii_read (dev, phy_addr, MII_MSCR);
1459
mssr = mii_read (dev, phy_addr, MII_MSSR);
1460
if (mscr & MII_MSCR_1000BT_FD && mssr & MII_MSSR_LP_1000BT_FD) {
1462
np->full_duplex = 1;
1463
printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1464
} else if (mscr & MII_MSCR_1000BT_HD && mssr & MII_MSSR_LP_1000BT_HD) {
1466
np->full_duplex = 0;
1467
printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1468
} else if (negotiate & MII_ANAR_100BX_FD) {
1470
np->full_duplex = 1;
1471
printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1472
} else if (negotiate & MII_ANAR_100BX_HD) {
1474
np->full_duplex = 0;
1475
printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1476
} else if (negotiate & MII_ANAR_10BT_FD) {
1478
np->full_duplex = 1;
1479
printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1480
} else if (negotiate & MII_ANAR_10BT_HD) {
1482
np->full_duplex = 0;
1483
printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1485
if (negotiate & MII_ANAR_PAUSE) {
1488
} else if (negotiate & MII_ANAR_ASYMMETRIC) {
1492
/* else tx_flow, rx_flow = user select */
1494
__u16 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1495
switch (bmcr & (MII_BMCR_SPEED_100 | MII_BMCR_SPEED_1000)) {
1496
case MII_BMCR_SPEED_1000:
1497
printk (KERN_INFO "Operating at 1000 Mbps, ");
1499
case MII_BMCR_SPEED_100:
1500
printk (KERN_INFO "Operating at 100 Mbps, ");
1503
printk (KERN_INFO "Operating at 10 Mbps, ");
1505
if (bmcr & MII_BMCR_DUPLEX_MODE) {
1506
printk (KERN_CONT "Full duplex\n");
1508
printk (KERN_CONT "Half duplex\n");
1512
printk(KERN_INFO "Enable Tx Flow Control\n");
1514
printk(KERN_INFO "Disable Tx Flow Control\n");
1516
printk(KERN_INFO "Enable Rx Flow Control\n");
1518
printk(KERN_INFO "Disable Rx Flow Control\n");
1524
mii_set_media (struct net_device *dev)
1531
struct netdev_private *np;
1532
np = netdev_priv(dev);
1533
phy_addr = np->phy_addr;
1535
/* Does user set speed? */
1536
if (np->an_enable) {
1537
/* Advertise capabilities */
1538
bmsr = mii_read (dev, phy_addr, MII_BMSR);
1539
anar = mii_read (dev, phy_addr, MII_ANAR) &
1540
~MII_ANAR_100BX_FD &
1541
~MII_ANAR_100BX_HD &
1545
if (bmsr & MII_BMSR_100BX_FD)
1546
anar |= MII_ANAR_100BX_FD;
1547
if (bmsr & MII_BMSR_100BX_HD)
1548
anar |= MII_ANAR_100BX_HD;
1549
if (bmsr & MII_BMSR_100BT4)
1550
anar |= MII_ANAR_100BT4;
1551
if (bmsr & MII_BMSR_10BT_FD)
1552
anar |= MII_ANAR_10BT_FD;
1553
if (bmsr & MII_BMSR_10BT_HD)
1554
anar |= MII_ANAR_10BT_HD;
1555
anar |= MII_ANAR_PAUSE | MII_ANAR_ASYMMETRIC;
1556
mii_write (dev, phy_addr, MII_ANAR, anar);
1558
/* Enable Auto crossover */
1559
pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1560
pscr |= 3 << 5; /* 11'b */
1561
mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1563
/* Soft reset PHY */
1564
mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1565
bmcr = MII_BMCR_AN_ENABLE | MII_BMCR_RESTART_AN | MII_BMCR_RESET;
1566
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1569
/* Force speed setting */
1570
/* 1) Disable Auto crossover */
1571
pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1573
mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1576
bmcr = mii_read (dev, phy_addr, MII_BMCR);
1577
bmcr |= MII_BMCR_RESET;
1578
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1581
bmcr = 0x1940; /* must be 0x1940 */
1582
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1583
mdelay (100); /* wait a certain time */
1585
/* 4) Advertise nothing */
1586
mii_write (dev, phy_addr, MII_ANAR, 0);
1588
/* 5) Set media and Power Up */
1589
bmcr = MII_BMCR_POWER_DOWN;
1590
if (np->speed == 100) {
1591
bmcr |= MII_BMCR_SPEED_100;
1592
printk (KERN_INFO "Manual 100 Mbps, ");
1593
} else if (np->speed == 10) {
1594
printk (KERN_INFO "Manual 10 Mbps, ");
1596
if (np->full_duplex) {
1597
bmcr |= MII_BMCR_DUPLEX_MODE;
1598
printk (KERN_CONT "Full duplex\n");
1600
printk (KERN_CONT "Half duplex\n");
1603
/* Set 1000BaseT Master/Slave setting */
1604
mscr = mii_read (dev, phy_addr, MII_MSCR);
1605
mscr |= MII_MSCR_CFG_ENABLE;
1606
mscr &= ~MII_MSCR_CFG_VALUE = 0;
1608
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1615
mii_get_media_pcs (struct net_device *dev)
1620
struct netdev_private *np;
1622
np = netdev_priv(dev);
1623
phy_addr = np->phy_addr;
1625
bmsr = mii_read (dev, phy_addr, PCS_BMSR);
1626
if (np->an_enable) {
1627
if (!(bmsr & MII_BMSR_AN_COMPLETE)) {
1628
/* Auto-Negotiation not completed */
1631
negotiate = mii_read (dev, phy_addr, PCS_ANAR) &
1632
mii_read (dev, phy_addr, PCS_ANLPAR);
1634
if (negotiate & PCS_ANAR_FULL_DUPLEX) {
1635
printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1636
np->full_duplex = 1;
1638
printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1639
np->full_duplex = 0;
1641
if (negotiate & PCS_ANAR_PAUSE) {
1644
} else if (negotiate & PCS_ANAR_ASYMMETRIC) {
1648
/* else tx_flow, rx_flow = user select */
1650
__u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR);
1651
printk (KERN_INFO "Operating at 1000 Mbps, ");
1652
if (bmcr & MII_BMCR_DUPLEX_MODE) {
1653
printk (KERN_CONT "Full duplex\n");
1655
printk (KERN_CONT "Half duplex\n");
1659
printk(KERN_INFO "Enable Tx Flow Control\n");
1661
printk(KERN_INFO "Disable Tx Flow Control\n");
1663
printk(KERN_INFO "Enable Rx Flow Control\n");
1665
printk(KERN_INFO "Disable Rx Flow Control\n");
1671
mii_set_media_pcs (struct net_device *dev)
1677
struct netdev_private *np;
1678
np = netdev_priv(dev);
1679
phy_addr = np->phy_addr;
1681
/* Auto-Negotiation? */
1682
if (np->an_enable) {
1683
/* Advertise capabilities */
1684
esr = mii_read (dev, phy_addr, PCS_ESR);
1685
anar = mii_read (dev, phy_addr, MII_ANAR) &
1686
~PCS_ANAR_HALF_DUPLEX &
1687
~PCS_ANAR_FULL_DUPLEX;
1688
if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD))
1689
anar |= PCS_ANAR_HALF_DUPLEX;
1690
if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD))
1691
anar |= PCS_ANAR_FULL_DUPLEX;
1692
anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC;
1693
mii_write (dev, phy_addr, MII_ANAR, anar);
1695
/* Soft reset PHY */
1696
mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1697
bmcr = MII_BMCR_AN_ENABLE | MII_BMCR_RESTART_AN |
1699
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1702
/* Force speed setting */
1704
bmcr = MII_BMCR_RESET;
1705
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1707
if (np->full_duplex) {
1708
bmcr = MII_BMCR_DUPLEX_MODE;
1709
printk (KERN_INFO "Manual full duplex\n");
1712
printk (KERN_INFO "Manual half duplex\n");
1714
mii_write (dev, phy_addr, MII_BMCR, bmcr);
1717
/* Advertise nothing */
1718
mii_write (dev, phy_addr, MII_ANAR, 0);
1725
rio_close (struct net_device *dev)
1727
long ioaddr = dev->base_addr;
1728
struct netdev_private *np = netdev_priv(dev);
1729
struct sk_buff *skb;
1732
netif_stop_queue (dev);
1734
/* Disable interrupts */
1735
writew (0, ioaddr + IntEnable);
1737
/* Stop Tx and Rx logics */
1738
writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);
1740
free_irq (dev->irq, dev);
1741
del_timer_sync (&np->timer);
1743
/* Free all the skbuffs in the queue. */
1744
for (i = 0; i < RX_RING_SIZE; i++) {
1745
skb = np->rx_skbuff[i];
1747
pci_unmap_single(np->pdev,
1748
desc_to_dma(&np->rx_ring[i]),
1749
skb->len, PCI_DMA_FROMDEVICE);
1750
dev_kfree_skb (skb);
1751
np->rx_skbuff[i] = NULL;
1753
np->rx_ring[i].status = 0;
1754
np->rx_ring[i].fraginfo = 0;
1756
for (i = 0; i < TX_RING_SIZE; i++) {
1757
skb = np->tx_skbuff[i];
1759
pci_unmap_single(np->pdev,
1760
desc_to_dma(&np->tx_ring[i]),
1761
skb->len, PCI_DMA_TODEVICE);
1762
dev_kfree_skb (skb);
1763
np->tx_skbuff[i] = NULL;
1770
static void __devexit
1771
rio_remove1 (struct pci_dev *pdev)
1773
struct net_device *dev = pci_get_drvdata (pdev);
1776
struct netdev_private *np = netdev_priv(dev);
1778
unregister_netdev (dev);
1779
pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1781
pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1784
iounmap ((char *) (dev->base_addr));
1787
pci_release_regions (pdev);
1788
pci_disable_device (pdev);
1790
pci_set_drvdata (pdev, NULL);
1793
static struct pci_driver rio_driver = {
1795
.id_table = rio_pci_tbl,
1796
.probe = rio_probe1,
1797
.remove = __devexit_p(rio_remove1),
1803
return pci_register_driver(&rio_driver);
1809
pci_unregister_driver (&rio_driver);
1812
module_init (rio_init);
1813
module_exit (rio_exit);
1819
gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1821
Read Documentation/networking/dl2k.txt for details.
added
removed
drivers/net/dl2k.c
