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//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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// The LLVM Compiler Infrastructure
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//===----------------------------------------------------------------------===//
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// This file defines the TargetMachine and LLVMTargetMachine classes.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/ADT/StringRef.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Target/TargetOptions.h"
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class InstrItineraryData;
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class MachineFunctionInitializer;
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class MCSubtargetInfo;
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class TargetLibraryInfo;
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class TargetFrameLowering;
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class TargetIRAnalysis;
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class TargetIntrinsicInfo;
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class TargetPassConfig;
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class TargetRegisterInfo;
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class TargetSelectionDAGInfo;
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class TargetSubtargetInfo;
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class TargetTransformInfo;
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class formatted_raw_ostream;
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class raw_pwrite_stream;
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class TargetLoweringObjectFile;
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// The old pass manager infrastructure is hidden in a legacy namespace now.
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class PassManagerBase;
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using legacy::PassManagerBase;
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//===----------------------------------------------------------------------===//
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/// Primary interface to the complete machine description for the target
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/// machine. All target-specific information should be accessible through this
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TargetMachine(const TargetMachine &) = delete;
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void operator=(const TargetMachine &) = delete;
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protected: // Can only create subclasses.
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TargetMachine(const Target &T, StringRef DataLayoutString,
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const Triple &TargetTriple, StringRef CPU, StringRef FS,
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const TargetOptions &Options);
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/// The Target that this machine was created for.
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const Target &TheTarget;
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/// For ABI type size and alignment.
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/// Triple string, CPU name, and target feature strings the TargetMachine
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/// instance is created with.
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std::string TargetCPU;
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/// Low level target information such as relocation model. Non-const to
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/// allow resetting optimization level per-function.
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MCCodeGenInfo *CodeGenInfo;
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/// Contains target specific asm information.
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const MCAsmInfo *AsmInfo;
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const MCRegisterInfo *MRI;
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const MCInstrInfo *MII;
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const MCSubtargetInfo *STI;
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unsigned RequireStructuredCFG : 1;
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mutable TargetOptions Options;
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virtual ~TargetMachine();
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const Target &getTarget() const { return TheTarget; }
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const Triple &getTargetTriple() const { return TargetTriple; }
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StringRef getTargetCPU() const { return TargetCPU; }
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StringRef getTargetFeatureString() const { return TargetFS; }
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/// Virtual method implemented by subclasses that returns a reference to that
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/// target's TargetSubtargetInfo-derived member variable.
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virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
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virtual TargetLoweringObjectFile *getObjFileLowering() const {
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/// This method returns a pointer to the specified type of
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/// TargetSubtargetInfo. In debug builds, it verifies that the object being
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/// returned is of the correct type.
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template <typename STC> const STC &getSubtarget(const Function &F) const {
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return *static_cast<const STC*>(getSubtargetImpl(F));
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/// This method returns a pointer to the DataLayout for the target. It should
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/// be unchanging for every subtarget.
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const DataLayout *getDataLayout() const { return &DL; }
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/// \brief Reset the target options based on the function's attributes.
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// FIXME: Remove TargetOptions that affect per-function code generation
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// from TargetMachine.
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void resetTargetOptions(const Function &F) const;
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/// Return target specific asm information.
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const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
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const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
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const MCInstrInfo *getMCInstrInfo() const { return MII; }
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const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
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/// If intrinsic information is available, return it. If not, return null.
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virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
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bool requiresStructuredCFG() const { return RequireStructuredCFG; }
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void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
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/// Returns the code generation relocation model. The choices are static, PIC,
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/// and dynamic-no-pic, and target default.
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Reloc::Model getRelocationModel() const;
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/// Returns the code model. The choices are small, kernel, medium, large, and
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CodeModel::Model getCodeModel() const;
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/// Returns the TLS model which should be used for the given global variable.
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TLSModel::Model getTLSModel(const GlobalValue *GV) const;
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/// Returns the optimization level: None, Less, Default, or Aggressive.
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CodeGenOpt::Level getOptLevel() const;
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/// \brief Overrides the optimization level.
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void setOptLevel(CodeGenOpt::Level Level) const;
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void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
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bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
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/// Returns the default value of asm verbosity.
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bool getAsmVerbosityDefault() const {
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return Options.MCOptions.AsmVerbose;
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bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
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/// Return true if data objects should be emitted into their own section,
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/// corresponds to -fdata-sections.
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bool getDataSections() const {
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return Options.DataSections;
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/// Return true if functions should be emitted into their own section,
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/// corresponding to -ffunction-sections.
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bool getFunctionSections() const {
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return Options.FunctionSections;
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/// \brief Get a \c TargetIRAnalysis appropriate for the target.
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/// This is used to construct the new pass manager's target IR analysis pass,
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/// set up appropriately for this target machine. Even the old pass manager
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/// uses this to answer queries about the IR.
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virtual TargetIRAnalysis getTargetIRAnalysis();
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/// These enums are meant to be passed into addPassesToEmitFile to indicate
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/// what type of file to emit, and returned by it to indicate what type of
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/// file could actually be made.
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enum CodeGenFileType {
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CGFT_Null // Do not emit any output.
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/// Add passes to the specified pass manager to get the specified file
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/// emitted. Typically this will involve several steps of code generation.
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/// This method should return true if emission of this file type is not
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/// supported, or false on success.
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virtual bool addPassesToEmitFile(
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PassManagerBase &, raw_pwrite_stream &, CodeGenFileType,
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bool /*DisableVerify*/ = true, AnalysisID /*StartBefore*/ = nullptr,
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AnalysisID /*StartAfter*/ = nullptr, AnalysisID /*StopAfter*/ = nullptr,
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MachineFunctionInitializer * /*MFInitializer*/ = nullptr) {
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/// Add passes to the specified pass manager to get machine code emitted with
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/// the MCJIT. This method returns true if machine code is not supported. It
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/// fills the MCContext Ctx pointer which can be used to build custom
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virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
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bool /*DisableVerify*/ = true) {
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void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
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Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
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MCSymbol *getSymbol(const GlobalValue *GV, Mangler &Mang) const;
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/// This class describes a target machine that is implemented with the LLVM
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/// target-independent code generator.
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class LLVMTargetMachine : public TargetMachine {
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protected: // Can only create subclasses.
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LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
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const Triple &TargetTriple, StringRef CPU, StringRef FS,
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TargetOptions Options, Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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/// \brief Get a TargetIRAnalysis implementation for the target.
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/// This analysis will produce a TTI result which uses the common code
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/// generator to answer queries about the IR.
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TargetIRAnalysis getTargetIRAnalysis() override;
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/// Create a pass configuration object to be used by addPassToEmitX methods
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/// for generating a pipeline of CodeGen passes.
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virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
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/// Add passes to the specified pass manager to get the specified file
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/// emitted. Typically this will involve several steps of code generation.
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bool addPassesToEmitFile(
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PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType,
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bool DisableVerify = true, AnalysisID StartBefore = nullptr,
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AnalysisID StartAfter = nullptr, AnalysisID StopAfter = nullptr,
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MachineFunctionInitializer *MFInitializer = nullptr) override;
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/// Add passes to the specified pass manager to get machine code emitted with
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/// the MCJIT. This method returns true if machine code is not supported. It
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/// fills the MCContext Ctx pointer which can be used to build custom
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bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
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raw_pwrite_stream &OS,
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bool DisableVerify = true) override;
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} // End llvm namespace