1
set(LLVM_TARGET_DEFINITIONS AArch64.td)
3
tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
4
tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
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tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
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tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
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tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
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tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
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tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
15
add_public_tablegen_target(AArch64CommonTableGen)
17
add_llvm_target(AArch64CodeGen
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AArch64A57FPLoadBalancing.cpp
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AArch64AddressTypePromotion.cpp
20
AArch64AdvSIMDScalarPass.cpp
22
AArch64BranchRelaxation.cpp
23
AArch64CleanupLocalDynamicTLSPass.cpp
25
AArch64ConditionalCompares.cpp
26
AArch64DeadRegisterDefinitionsPass.cpp
27
AArch64ExpandPseudoInsts.cpp
29
AArch64A53Fix835769.cpp
30
AArch64FrameLowering.cpp
31
AArch64ConditionOptimizer.cpp
32
AArch64ISelDAGToDAG.cpp
33
AArch64ISelLowering.cpp
35
AArch64LoadStoreOptimizer.cpp
36
AArch64MCInstLower.cpp
37
AArch64PromoteConstant.cpp
38
AArch64PBQPRegAlloc.cpp
39
AArch64RegisterInfo.cpp
40
AArch64SelectionDAGInfo.cpp
41
AArch64StorePairSuppress.cpp
43
AArch64TargetMachine.cpp
44
AArch64TargetObjectFile.cpp
45
AArch64TargetTransformInfo.cpp
48
add_dependencies(LLVMAArch64CodeGen intrinsics_gen)
50
add_subdirectory(TargetInfo)
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add_subdirectory(AsmParser)
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add_subdirectory(Disassembler)
53
add_subdirectory(InstPrinter)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(Utils)