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//===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
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// The LLVM Compiler Infrastructure
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Instruction format superclass
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//===----------------------------------------------------------------------===//
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class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
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let Namespace = "XCore";
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dag OutOperandList = outs;
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dag InOperandList = ins;
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let AsmString = asmstr;
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let Pattern = pattern;
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field bits<32> SoftFail = 0;
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// XCore pseudo instructions format
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class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<0, outs, ins, asmstr, pattern> {
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//===----------------------------------------------------------------------===//
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// Instruction formats
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//===----------------------------------------------------------------------===//
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class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc;
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let DecoderMethod = "Decode3RInstruction";
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// 3R with first operand as an immediate. Used for TSETR where the first
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// operand is treated as an immediate since it refers to a register number in
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class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: _F3R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "Decode3RImmInstruction";
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class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc{8-4};
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let Inst{26-20} = 0b1111110;
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let Inst{19-16} = opc{3-0};
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let Inst{15-11} = 0b11111;
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let DecoderMethod = "DecodeL3RInstruction";
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// L3R with first operand as both a source and a destination.
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class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr,
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list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeL3RSrcDstInstruction";
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class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc;
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let DecoderMethod = "Decode2RUSInstruction";
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// 2RUS with bitp operand
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class _F2RUSBitp<bits<5> opc, dag outs, dag ins, string asmstr,
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: _F2RUS<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "Decode2RUSBitpInstruction";
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class _FL2RUS<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc{8-4};
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let Inst{26-20} = 0b1111110;
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let Inst{19-16} = opc{3-0};
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let Inst{15-11} = 0b11111;
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let DecoderMethod = "DecodeL2RUSInstruction";
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// L2RUS with bitp operand
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class _FL2RUSBitp<bits<9> opc, dag outs, dag ins, string asmstr,
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: _FL2RUS<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeL2RUSBitpInstruction";
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class _FRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-10} = opc;
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class _FLRU6<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-26} = opc;
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let Inst{21-16} = b{5-0};
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let Inst{15-10} = 0b111100;
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let Inst{9-0} = b{15-6};
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class _FU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-6} = opc;
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class _FLU6<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-22} = opc;
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let Inst{21-16} = a{5-0};
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let Inst{15-10} = 0b111100;
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let Inst{9-0} = a{15-6};
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class _FU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-10} = opc;
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class _FLU10<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-26} = opc;
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let Inst{25-16} = a{9-0};
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let Inst{15-10} = 0b111100;
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let Inst{9-0} = a{19-10};
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class _F2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc{5-1};
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let Inst{4} = opc{0};
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let DecoderMethod = "Decode2RInstruction";
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// 2R with first operand as an immediate. Used for TSETMR where the first
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// operand is treated as an immediate since it refers to a register number in
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class _F2RImm<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: _F2R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "Decode2RImmInstruction";
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// 2R with first operand as both a source and a destination.
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class _F2RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,
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list<dag> pattern> : _F2R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "Decode2RSrcDstInstruction";
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// Same as 2R with last two operands swapped
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class _FR2R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: _F2R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeR2RInstruction";
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class _FRUS<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc{5-1};
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let Inst{4} = opc{0};
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let DecoderMethod = "DecodeRUSInstruction";
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// RUS with bitp operand
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class _FRUSBitp<bits<6> opc, dag outs, dag ins, string asmstr,
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: _FRUS<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeRUSBitpInstruction";
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// RUS with first operand as both a source and a destination and a bitp second
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class _FRUSSrcDstBitp<bits<6> opc, dag outs, dag ins, string asmstr,
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: _FRUS<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeRUSSrcDstBitpInstruction";
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class _FL2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc{9-5};
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let Inst{26-20} = 0b1111110;
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let Inst{19-16} = opc{4-1};
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let Inst{15-11} = 0b11111;
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let Inst{4} = opc{0};
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let DecoderMethod = "DecodeL2RInstruction";
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// Same as L2R with last two operands swapped
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class _FLR2R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: _FL2R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeLR2RInstruction";
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class _F1R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc{5-1};
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let Inst{10-5} = 0b111111;
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let Inst{4} = opc{0};
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class _F0R<bits<10> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{15-11} = opc{9-5};
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let Inst{10-5} = 0b111111;
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let Inst{4-0} = opc{4-0};
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class _FL4R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc{5-1};
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let Inst{26-21} = 0b111111;
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let Inst{20} = opc{0};
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let Inst{15-11} = 0b11111;
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// L4R with 4th operand as both a source and a destination.
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class _FL4RSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,
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: _FL4R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeL4RSrcDstInstruction";
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// L4R with 1st and 4th operand as both a source and a destination.
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class _FL4RSrcDstSrcDst<bits<6> opc, dag outs, dag ins, string asmstr,
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: _FL4R<opc, outs, ins, asmstr, pattern> {
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let DecoderMethod = "DecodeL4RSrcDstSrcDstInstruction";
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class _FL5R<bits<6> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc{5-1};
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let Inst{20} = opc{0};
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let Inst{15-11} = 0b11111;
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let DecoderMethod = "DecodeL5RInstruction";
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class _FL6R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-27} = opc;
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let Inst{15-11} = 0b11111;
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let DecoderMethod = "DecodeL6RInstruction";