1
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
3
; CHECK-LABEL: test_256_1
6
define <8 x i32> @test_256_1(i8 * %addr) {
7
%vaddr = bitcast i8* %addr to <8 x i32>*
8
%res = load <8 x i32>, <8 x i32>* %vaddr, align 1
12
; CHECK-LABEL: test_256_2
15
define <8 x i32> @test_256_2(i8 * %addr) {
16
%vaddr = bitcast i8* %addr to <8 x i32>*
17
%res = load <8 x i32>, <8 x i32>* %vaddr, align 32
21
; CHECK-LABEL: test_256_3
24
define void @test_256_3(i8 * %addr, <4 x i64> %data) {
25
%vaddr = bitcast i8* %addr to <4 x i64>*
26
store <4 x i64>%data, <4 x i64>* %vaddr, align 32
30
; CHECK-LABEL: test_256_4
33
define void @test_256_4(i8 * %addr, <8 x i32> %data) {
34
%vaddr = bitcast i8* %addr to <8 x i32>*
35
store <8 x i32>%data, <8 x i32>* %vaddr, align 1
39
; CHECK-LABEL: test_256_5
42
define void @test_256_5(i8 * %addr, <8 x i32> %data) {
43
%vaddr = bitcast i8* %addr to <8 x i32>*
44
store <8 x i32>%data, <8 x i32>* %vaddr, align 32
48
; CHECK-LABEL: test_256_6
51
define <4 x i64> @test_256_6(i8 * %addr) {
52
%vaddr = bitcast i8* %addr to <4 x i64>*
53
%res = load <4 x i64>, <4 x i64>* %vaddr, align 32
57
; CHECK-LABEL: test_256_7
60
define void @test_256_7(i8 * %addr, <4 x i64> %data) {
61
%vaddr = bitcast i8* %addr to <4 x i64>*
62
store <4 x i64>%data, <4 x i64>* %vaddr, align 1
66
; CHECK-LABEL: test_256_8
69
define <4 x i64> @test_256_8(i8 * %addr) {
70
%vaddr = bitcast i8* %addr to <4 x i64>*
71
%res = load <4 x i64>, <4 x i64>* %vaddr, align 1
75
; CHECK-LABEL: test_256_9
76
; CHECK: vmovapd {{.*}} ## encoding: [0x62
78
define void @test_256_9(i8 * %addr, <4 x double> %data) {
79
%vaddr = bitcast i8* %addr to <4 x double>*
80
store <4 x double>%data, <4 x double>* %vaddr, align 32
84
; CHECK-LABEL: test_256_10
85
; CHECK: vmovapd {{.*}} ## encoding: [0x62
87
define <4 x double> @test_256_10(i8 * %addr) {
88
%vaddr = bitcast i8* %addr to <4 x double>*
89
%res = load <4 x double>, <4 x double>* %vaddr, align 32
93
; CHECK-LABEL: test_256_11
94
; CHECK: vmovaps {{.*}} ## encoding: [0x62
96
define void @test_256_11(i8 * %addr, <8 x float> %data) {
97
%vaddr = bitcast i8* %addr to <8 x float>*
98
store <8 x float>%data, <8 x float>* %vaddr, align 32
102
; CHECK-LABEL: test_256_12
103
; CHECK: vmovaps {{.*}} ## encoding: [0x62
105
define <8 x float> @test_256_12(i8 * %addr) {
106
%vaddr = bitcast i8* %addr to <8 x float>*
107
%res = load <8 x float>, <8 x float>* %vaddr, align 32
111
; CHECK-LABEL: test_256_13
112
; CHECK: vmovupd {{.*}} ## encoding: [0x62
114
define void @test_256_13(i8 * %addr, <4 x double> %data) {
115
%vaddr = bitcast i8* %addr to <4 x double>*
116
store <4 x double>%data, <4 x double>* %vaddr, align 1
120
; CHECK-LABEL: test_256_14
121
; CHECK: vmovupd {{.*}} ## encoding: [0x62
123
define <4 x double> @test_256_14(i8 * %addr) {
124
%vaddr = bitcast i8* %addr to <4 x double>*
125
%res = load <4 x double>, <4 x double>* %vaddr, align 1
129
; CHECK-LABEL: test_256_15
130
; CHECK: vmovups {{.*}} ## encoding: [0x62
132
define void @test_256_15(i8 * %addr, <8 x float> %data) {
133
%vaddr = bitcast i8* %addr to <8 x float>*
134
store <8 x float>%data, <8 x float>* %vaddr, align 1
138
; CHECK-LABEL: test_256_16
139
; CHECK: vmovups {{.*}} ## encoding: [0x62
141
define <8 x float> @test_256_16(i8 * %addr) {
142
%vaddr = bitcast i8* %addr to <8 x float>*
143
%res = load <8 x float>, <8 x float>* %vaddr, align 1
147
; CHECK-LABEL: test_256_17
148
; CHECK: vmovdqa32{{.*{%k[1-7]} }}
150
define <8 x i32> @test_256_17(i8 * %addr, <8 x i32> %old, <8 x i32> %mask1) {
151
%mask = icmp ne <8 x i32> %mask1, zeroinitializer
152
%vaddr = bitcast i8* %addr to <8 x i32>*
153
%r = load <8 x i32>, <8 x i32>* %vaddr, align 32
154
%res = select <8 x i1> %mask, <8 x i32> %r, <8 x i32> %old
158
; CHECK-LABEL: test_256_18
159
; CHECK: vmovdqu32{{.*{%k[1-7]} }}
161
define <8 x i32> @test_256_18(i8 * %addr, <8 x i32> %old, <8 x i32> %mask1) {
162
%mask = icmp ne <8 x i32> %mask1, zeroinitializer
163
%vaddr = bitcast i8* %addr to <8 x i32>*
164
%r = load <8 x i32>, <8 x i32>* %vaddr, align 1
165
%res = select <8 x i1> %mask, <8 x i32> %r, <8 x i32> %old
169
; CHECK-LABEL: test_256_19
170
; CHECK: vmovdqa32{{.*{%k[1-7]} {z} }}
172
define <8 x i32> @test_256_19(i8 * %addr, <8 x i32> %mask1) {
173
%mask = icmp ne <8 x i32> %mask1, zeroinitializer
174
%vaddr = bitcast i8* %addr to <8 x i32>*
175
%r = load <8 x i32>, <8 x i32>* %vaddr, align 32
176
%res = select <8 x i1> %mask, <8 x i32> %r, <8 x i32> zeroinitializer
180
; CHECK-LABEL: test_256_20
181
; CHECK: vmovdqu32{{.*{%k[1-7]} {z} }}
183
define <8 x i32> @test_256_20(i8 * %addr, <8 x i32> %mask1) {
184
%mask = icmp ne <8 x i32> %mask1, zeroinitializer
185
%vaddr = bitcast i8* %addr to <8 x i32>*
186
%r = load <8 x i32>, <8 x i32>* %vaddr, align 1
187
%res = select <8 x i1> %mask, <8 x i32> %r, <8 x i32> zeroinitializer
191
; CHECK-LABEL: test_256_21
192
; CHECK: vmovdqa64{{.*{%k[1-7]} }}
194
define <4 x i64> @test_256_21(i8 * %addr, <4 x i64> %old, <4 x i64> %mask1) {
195
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
196
%vaddr = bitcast i8* %addr to <4 x i64>*
197
%r = load <4 x i64>, <4 x i64>* %vaddr, align 32
198
%res = select <4 x i1> %mask, <4 x i64> %r, <4 x i64> %old
202
; CHECK-LABEL: test_256_22
203
; CHECK: vmovdqu64{{.*{%k[1-7]} }}
205
define <4 x i64> @test_256_22(i8 * %addr, <4 x i64> %old, <4 x i64> %mask1) {
206
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
207
%vaddr = bitcast i8* %addr to <4 x i64>*
208
%r = load <4 x i64>, <4 x i64>* %vaddr, align 1
209
%res = select <4 x i1> %mask, <4 x i64> %r, <4 x i64> %old
213
; CHECK-LABEL: test_256_23
214
; CHECK: vmovdqa64{{.*{%k[1-7]} {z} }}
216
define <4 x i64> @test_256_23(i8 * %addr, <4 x i64> %mask1) {
217
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
218
%vaddr = bitcast i8* %addr to <4 x i64>*
219
%r = load <4 x i64>, <4 x i64>* %vaddr, align 32
220
%res = select <4 x i1> %mask, <4 x i64> %r, <4 x i64> zeroinitializer
224
; CHECK-LABEL: test_256_24
225
; CHECK: vmovdqu64{{.*{%k[1-7]} {z} }}
227
define <4 x i64> @test_256_24(i8 * %addr, <4 x i64> %mask1) {
228
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
229
%vaddr = bitcast i8* %addr to <4 x i64>*
230
%r = load <4 x i64>, <4 x i64>* %vaddr, align 1
231
%res = select <4 x i1> %mask, <4 x i64> %r, <4 x i64> zeroinitializer
235
; CHECK-LABEL: test_256_25
236
; CHECK: vmovaps{{.*{%k[1-7]} }}
238
define <8 x float> @test_256_25(i8 * %addr, <8 x float> %old, <8 x float> %mask1) {
239
%mask = fcmp one <8 x float> %mask1, zeroinitializer
240
%vaddr = bitcast i8* %addr to <8 x float>*
241
%r = load <8 x float>, <8 x float>* %vaddr, align 32
242
%res = select <8 x i1> %mask, <8 x float> %r, <8 x float> %old
246
; CHECK-LABEL: test_256_26
247
; CHECK: vmovups{{.*{%k[1-7]} }}
249
define <8 x float> @test_256_26(i8 * %addr, <8 x float> %old, <8 x float> %mask1) {
250
%mask = fcmp one <8 x float> %mask1, zeroinitializer
251
%vaddr = bitcast i8* %addr to <8 x float>*
252
%r = load <8 x float>, <8 x float>* %vaddr, align 1
253
%res = select <8 x i1> %mask, <8 x float> %r, <8 x float> %old
257
; CHECK-LABEL: test_256_27
258
; CHECK: vmovaps{{.*{%k[1-7]} {z} }}
260
define <8 x float> @test_256_27(i8 * %addr, <8 x float> %mask1) {
261
%mask = fcmp one <8 x float> %mask1, zeroinitializer
262
%vaddr = bitcast i8* %addr to <8 x float>*
263
%r = load <8 x float>, <8 x float>* %vaddr, align 32
264
%res = select <8 x i1> %mask, <8 x float> %r, <8 x float> zeroinitializer
268
; CHECK-LABEL: test_256_28
269
; CHECK: vmovups{{.*{%k[1-7]} {z} }}
271
define <8 x float> @test_256_28(i8 * %addr, <8 x float> %mask1) {
272
%mask = fcmp one <8 x float> %mask1, zeroinitializer
273
%vaddr = bitcast i8* %addr to <8 x float>*
274
%r = load <8 x float>, <8 x float>* %vaddr, align 1
275
%res = select <8 x i1> %mask, <8 x float> %r, <8 x float> zeroinitializer
279
; CHECK-LABEL: test_256_29
280
; CHECK: vmovapd{{.*{%k[1-7]} }}
282
define <4 x double> @test_256_29(i8 * %addr, <4 x double> %old, <4 x i64> %mask1) {
283
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
284
%vaddr = bitcast i8* %addr to <4 x double>*
285
%r = load <4 x double>, <4 x double>* %vaddr, align 32
286
%res = select <4 x i1> %mask, <4 x double> %r, <4 x double> %old
290
; CHECK-LABEL: test_256_30
291
; CHECK: vmovupd{{.*{%k[1-7]} }}
293
define <4 x double> @test_256_30(i8 * %addr, <4 x double> %old, <4 x i64> %mask1) {
294
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
295
%vaddr = bitcast i8* %addr to <4 x double>*
296
%r = load <4 x double>, <4 x double>* %vaddr, align 1
297
%res = select <4 x i1> %mask, <4 x double> %r, <4 x double> %old
301
; CHECK-LABEL: test_256_31
302
; CHECK: vmovapd{{.*{%k[1-7]} {z} }}
304
define <4 x double> @test_256_31(i8 * %addr, <4 x i64> %mask1) {
305
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
306
%vaddr = bitcast i8* %addr to <4 x double>*
307
%r = load <4 x double>, <4 x double>* %vaddr, align 32
308
%res = select <4 x i1> %mask, <4 x double> %r, <4 x double> zeroinitializer
312
; CHECK-LABEL: test_256_32
313
; CHECK: vmovupd{{.*{%k[1-7]} {z} }}
315
define <4 x double> @test_256_32(i8 * %addr, <4 x i64> %mask1) {
316
%mask = icmp ne <4 x i64> %mask1, zeroinitializer
317
%vaddr = bitcast i8* %addr to <4 x double>*
318
%r = load <4 x double>, <4 x double>* %vaddr, align 1
319
%res = select <4 x i1> %mask, <4 x double> %r, <4 x double> zeroinitializer
323
; CHECK-LABEL: test_128_1
326
define <4 x i32> @test_128_1(i8 * %addr) {
327
%vaddr = bitcast i8* %addr to <4 x i32>*
328
%res = load <4 x i32>, <4 x i32>* %vaddr, align 1
332
; CHECK-LABEL: test_128_2
335
define <4 x i32> @test_128_2(i8 * %addr) {
336
%vaddr = bitcast i8* %addr to <4 x i32>*
337
%res = load <4 x i32>, <4 x i32>* %vaddr, align 16
341
; CHECK-LABEL: test_128_3
344
define void @test_128_3(i8 * %addr, <2 x i64> %data) {
345
%vaddr = bitcast i8* %addr to <2 x i64>*
346
store <2 x i64>%data, <2 x i64>* %vaddr, align 16
350
; CHECK-LABEL: test_128_4
353
define void @test_128_4(i8 * %addr, <4 x i32> %data) {
354
%vaddr = bitcast i8* %addr to <4 x i32>*
355
store <4 x i32>%data, <4 x i32>* %vaddr, align 1
359
; CHECK-LABEL: test_128_5
362
define void @test_128_5(i8 * %addr, <4 x i32> %data) {
363
%vaddr = bitcast i8* %addr to <4 x i32>*
364
store <4 x i32>%data, <4 x i32>* %vaddr, align 16
368
; CHECK-LABEL: test_128_6
371
define <2 x i64> @test_128_6(i8 * %addr) {
372
%vaddr = bitcast i8* %addr to <2 x i64>*
373
%res = load <2 x i64>, <2 x i64>* %vaddr, align 16
377
; CHECK-LABEL: test_128_7
380
define void @test_128_7(i8 * %addr, <2 x i64> %data) {
381
%vaddr = bitcast i8* %addr to <2 x i64>*
382
store <2 x i64>%data, <2 x i64>* %vaddr, align 1
386
; CHECK-LABEL: test_128_8
389
define <2 x i64> @test_128_8(i8 * %addr) {
390
%vaddr = bitcast i8* %addr to <2 x i64>*
391
%res = load <2 x i64>, <2 x i64>* %vaddr, align 1
395
; CHECK-LABEL: test_128_9
396
; CHECK: vmovapd {{.*}} ## encoding: [0x62
398
define void @test_128_9(i8 * %addr, <2 x double> %data) {
399
%vaddr = bitcast i8* %addr to <2 x double>*
400
store <2 x double>%data, <2 x double>* %vaddr, align 16
404
; CHECK-LABEL: test_128_10
405
; CHECK: vmovapd {{.*}} ## encoding: [0x62
407
define <2 x double> @test_128_10(i8 * %addr) {
408
%vaddr = bitcast i8* %addr to <2 x double>*
409
%res = load <2 x double>, <2 x double>* %vaddr, align 16
413
; CHECK-LABEL: test_128_11
414
; CHECK: vmovaps {{.*}} ## encoding: [0x62
416
define void @test_128_11(i8 * %addr, <4 x float> %data) {
417
%vaddr = bitcast i8* %addr to <4 x float>*
418
store <4 x float>%data, <4 x float>* %vaddr, align 16
422
; CHECK-LABEL: test_128_12
423
; CHECK: vmovaps {{.*}} ## encoding: [0x62
425
define <4 x float> @test_128_12(i8 * %addr) {
426
%vaddr = bitcast i8* %addr to <4 x float>*
427
%res = load <4 x float>, <4 x float>* %vaddr, align 16
431
; CHECK-LABEL: test_128_13
432
; CHECK: vmovupd {{.*}} ## encoding: [0x62
434
define void @test_128_13(i8 * %addr, <2 x double> %data) {
435
%vaddr = bitcast i8* %addr to <2 x double>*
436
store <2 x double>%data, <2 x double>* %vaddr, align 1
440
; CHECK-LABEL: test_128_14
441
; CHECK: vmovupd {{.*}} ## encoding: [0x62
443
define <2 x double> @test_128_14(i8 * %addr) {
444
%vaddr = bitcast i8* %addr to <2 x double>*
445
%res = load <2 x double>, <2 x double>* %vaddr, align 1
449
; CHECK-LABEL: test_128_15
450
; CHECK: vmovups {{.*}} ## encoding: [0x62
452
define void @test_128_15(i8 * %addr, <4 x float> %data) {
453
%vaddr = bitcast i8* %addr to <4 x float>*
454
store <4 x float>%data, <4 x float>* %vaddr, align 1
458
; CHECK-LABEL: test_128_16
459
; CHECK: vmovups {{.*}} ## encoding: [0x62
461
define <4 x float> @test_128_16(i8 * %addr) {
462
%vaddr = bitcast i8* %addr to <4 x float>*
463
%res = load <4 x float>, <4 x float>* %vaddr, align 1
467
; CHECK-LABEL: test_128_17
468
; CHECK: vmovdqa32{{.*{%k[1-7]} }}
470
define <4 x i32> @test_128_17(i8 * %addr, <4 x i32> %old, <4 x i32> %mask1) {
471
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
472
%vaddr = bitcast i8* %addr to <4 x i32>*
473
%r = load <4 x i32>, <4 x i32>* %vaddr, align 16
474
%res = select <4 x i1> %mask, <4 x i32> %r, <4 x i32> %old
478
; CHECK-LABEL: test_128_18
479
; CHECK: vmovdqu32{{.*{%k[1-7]} }}
481
define <4 x i32> @test_128_18(i8 * %addr, <4 x i32> %old, <4 x i32> %mask1) {
482
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
483
%vaddr = bitcast i8* %addr to <4 x i32>*
484
%r = load <4 x i32>, <4 x i32>* %vaddr, align 1
485
%res = select <4 x i1> %mask, <4 x i32> %r, <4 x i32> %old
489
; CHECK-LABEL: test_128_19
490
; CHECK: vmovdqa32{{.*{%k[1-7]} {z} }}
492
define <4 x i32> @test_128_19(i8 * %addr, <4 x i32> %mask1) {
493
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
494
%vaddr = bitcast i8* %addr to <4 x i32>*
495
%r = load <4 x i32>, <4 x i32>* %vaddr, align 16
496
%res = select <4 x i1> %mask, <4 x i32> %r, <4 x i32> zeroinitializer
500
; CHECK-LABEL: test_128_20
501
; CHECK: vmovdqu32{{.*{%k[1-7]} {z} }}
503
define <4 x i32> @test_128_20(i8 * %addr, <4 x i32> %mask1) {
504
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
505
%vaddr = bitcast i8* %addr to <4 x i32>*
506
%r = load <4 x i32>, <4 x i32>* %vaddr, align 1
507
%res = select <4 x i1> %mask, <4 x i32> %r, <4 x i32> zeroinitializer
511
; CHECK-LABEL: test_128_21
512
; CHECK: vmovdqa64{{.*{%k[1-7]} }}
514
define <2 x i64> @test_128_21(i8 * %addr, <2 x i64> %old, <2 x i64> %mask1) {
515
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
516
%vaddr = bitcast i8* %addr to <2 x i64>*
517
%r = load <2 x i64>, <2 x i64>* %vaddr, align 16
518
%res = select <2 x i1> %mask, <2 x i64> %r, <2 x i64> %old
522
; CHECK-LABEL: test_128_22
523
; CHECK: vmovdqu64{{.*{%k[1-7]} }}
525
define <2 x i64> @test_128_22(i8 * %addr, <2 x i64> %old, <2 x i64> %mask1) {
526
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
527
%vaddr = bitcast i8* %addr to <2 x i64>*
528
%r = load <2 x i64>, <2 x i64>* %vaddr, align 1
529
%res = select <2 x i1> %mask, <2 x i64> %r, <2 x i64> %old
533
; CHECK-LABEL: test_128_23
534
; CHECK: vmovdqa64{{.*{%k[1-7]} {z} }}
536
define <2 x i64> @test_128_23(i8 * %addr, <2 x i64> %mask1) {
537
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
538
%vaddr = bitcast i8* %addr to <2 x i64>*
539
%r = load <2 x i64>, <2 x i64>* %vaddr, align 16
540
%res = select <2 x i1> %mask, <2 x i64> %r, <2 x i64> zeroinitializer
544
; CHECK-LABEL: test_128_24
545
; CHECK: vmovdqu64{{.*{%k[1-7]} {z} }}
547
define <2 x i64> @test_128_24(i8 * %addr, <2 x i64> %mask1) {
548
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
549
%vaddr = bitcast i8* %addr to <2 x i64>*
550
%r = load <2 x i64>, <2 x i64>* %vaddr, align 1
551
%res = select <2 x i1> %mask, <2 x i64> %r, <2 x i64> zeroinitializer
555
; CHECK-LABEL: test_128_25
556
; CHECK: vmovaps{{.*{%k[1-7]} }}
558
define <4 x float> @test_128_25(i8 * %addr, <4 x float> %old, <4 x i32> %mask1) {
559
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
560
%vaddr = bitcast i8* %addr to <4 x float>*
561
%r = load <4 x float>, <4 x float>* %vaddr, align 16
562
%res = select <4 x i1> %mask, <4 x float> %r, <4 x float> %old
566
; CHECK-LABEL: test_128_26
567
; CHECK: vmovups{{.*{%k[1-7]} }}
569
define <4 x float> @test_128_26(i8 * %addr, <4 x float> %old, <4 x i32> %mask1) {
570
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
571
%vaddr = bitcast i8* %addr to <4 x float>*
572
%r = load <4 x float>, <4 x float>* %vaddr, align 1
573
%res = select <4 x i1> %mask, <4 x float> %r, <4 x float> %old
577
; CHECK-LABEL: test_128_27
578
; CHECK: vmovaps{{.*{%k[1-7]} {z} }}
580
define <4 x float> @test_128_27(i8 * %addr, <4 x i32> %mask1) {
581
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
582
%vaddr = bitcast i8* %addr to <4 x float>*
583
%r = load <4 x float>, <4 x float>* %vaddr, align 16
584
%res = select <4 x i1> %mask, <4 x float> %r, <4 x float> zeroinitializer
588
; CHECK-LABEL: test_128_28
589
; CHECK: vmovups{{.*{%k[1-7]} {z} }}
591
define <4 x float> @test_128_28(i8 * %addr, <4 x i32> %mask1) {
592
%mask = icmp ne <4 x i32> %mask1, zeroinitializer
593
%vaddr = bitcast i8* %addr to <4 x float>*
594
%r = load <4 x float>, <4 x float>* %vaddr, align 1
595
%res = select <4 x i1> %mask, <4 x float> %r, <4 x float> zeroinitializer
599
; CHECK-LABEL: test_128_29
600
; CHECK: vmovapd{{.*{%k[1-7]} }}
602
define <2 x double> @test_128_29(i8 * %addr, <2 x double> %old, <2 x i64> %mask1) {
603
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
604
%vaddr = bitcast i8* %addr to <2 x double>*
605
%r = load <2 x double>, <2 x double>* %vaddr, align 16
606
%res = select <2 x i1> %mask, <2 x double> %r, <2 x double> %old
610
; CHECK-LABEL: test_128_30
611
; CHECK: vmovupd{{.*{%k[1-7]} }}
613
define <2 x double> @test_128_30(i8 * %addr, <2 x double> %old, <2 x i64> %mask1) {
614
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
615
%vaddr = bitcast i8* %addr to <2 x double>*
616
%r = load <2 x double>, <2 x double>* %vaddr, align 1
617
%res = select <2 x i1> %mask, <2 x double> %r, <2 x double> %old
621
; CHECK-LABEL: test_128_31
622
; CHECK: vmovapd{{.*{%k[1-7]} {z} }}
624
define <2 x double> @test_128_31(i8 * %addr, <2 x i64> %mask1) {
625
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
626
%vaddr = bitcast i8* %addr to <2 x double>*
627
%r = load <2 x double>, <2 x double>* %vaddr, align 16
628
%res = select <2 x i1> %mask, <2 x double> %r, <2 x double> zeroinitializer
632
; CHECK-LABEL: test_128_32
633
; CHECK: vmovupd{{.*{%k[1-7]} {z} }}
635
define <2 x double> @test_128_32(i8 * %addr, <2 x i64> %mask1) {
636
%mask = icmp ne <2 x i64> %mask1, zeroinitializer
637
%vaddr = bitcast i8* %addr to <2 x double>*
638
%r = load <2 x double>, <2 x double>* %vaddr, align 1
639
%res = select <2 x i1> %mask, <2 x double> %r, <2 x double> zeroinitializer