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  • Committer: Package Import Robot
  • Author(s): Sylvestre Ledru
  • Date: 2015-07-15 17:51:08 UTC
  • Revision ID: package-import@ubuntu.com-20150715175108-l8mynwovkx4zx697
Tags: upstream-3.7~+rc2
Import upstream version 3.7~+rc2

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lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
 
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//===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===//
 
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//
 
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//                     The LLVM Compiler Infrastructure
 
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//
 
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// This file is distributed under the University of Illinois Open Source
 
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// License. See LICENSE.TXT for details.
 
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//
 
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//===----------------------------------------------------------------------===//
 
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//
 
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// This file provides Hexagon specific target descriptions.
 
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//
 
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//===----------------------------------------------------------------------===//
 
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#include "HexagonMCTargetDesc.h"
 
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#include "Hexagon.h"
 
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#include "HexagonMCAsmInfo.h"
 
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#include "HexagonMCELFStreamer.h"
 
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#include "MCTargetDesc/HexagonInstPrinter.h"
 
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#include "llvm/MC/MCCodeGenInfo.h"
 
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#include "llvm/MC/MCContext.h"
 
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#include "llvm/MC/MCELFStreamer.h"
 
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#include "llvm/MC/MCInstrInfo.h"
 
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#include "llvm/MC/MCObjectStreamer.h"
 
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#include "llvm/MC/MCRegisterInfo.h"
 
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#include "llvm/MC/MCStreamer.h"
 
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#include "llvm/MC/MCSubtargetInfo.h"
 
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#include "llvm/MC/MachineLocation.h"
 
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#include "llvm/Support/ELF.h"
 
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#include "llvm/Support/ErrorHandling.h"
 
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#include "llvm/Support/TargetRegistry.h"
 
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using namespace llvm;
 
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#define GET_INSTRINFO_MC_DESC
 
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#include "HexagonGenInstrInfo.inc"
 
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#define GET_SUBTARGETINFO_MC_DESC
 
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#include "HexagonGenSubtargetInfo.inc"
 
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#define GET_REGINFO_MC_DESC
 
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#include "HexagonGenRegisterInfo.inc"
 
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MCInstrInfo *llvm::createHexagonMCInstrInfo() {
 
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  MCInstrInfo *X = new MCInstrInfo();
 
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  InitHexagonMCInstrInfo(X);
 
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  return X;
 
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}
 
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static MCRegisterInfo *createHexagonMCRegisterInfo(const Triple &TT) {
 
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  MCRegisterInfo *X = new MCRegisterInfo();
 
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  InitHexagonMCRegisterInfo(X, Hexagon::R0);
 
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  return X;
 
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}
 
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static MCSubtargetInfo *
 
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createHexagonMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
 
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  return createHexagonMCSubtargetInfoImpl(TT, CPU, FS);
 
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}
 
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namespace {
 
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class HexagonTargetAsmStreamer : public HexagonTargetStreamer {
 
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public:
 
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  HexagonTargetAsmStreamer(MCStreamer &S,
 
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                           formatted_raw_ostream &, bool,
 
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                           MCInstPrinter &)
 
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      : HexagonTargetStreamer(S) {}
 
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  void prettyPrintAsm(MCInstPrinter &InstPrinter, raw_ostream &OS,
 
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                      const MCInst &Inst, const MCSubtargetInfo &STI) override {
 
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    assert(HexagonMCInstrInfo::isBundle(Inst));
 
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    assert(HexagonMCInstrInfo::bundleSize(Inst) <= HEXAGON_PACKET_SIZE);
 
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    std::string Buffer;
 
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    {
 
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      raw_string_ostream TempStream(Buffer);
 
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      InstPrinter.printInst(&Inst, TempStream, "", STI);
 
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    }
 
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    StringRef Contents(Buffer);
 
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    auto PacketBundle = Contents.rsplit('\n');
 
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    auto HeadTail = PacketBundle.first.split('\n');
 
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    auto Preamble = "\t{\n\t\t";
 
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    auto Separator = "";
 
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    while(!HeadTail.first.empty()) {
 
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      OS << Separator;
 
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      StringRef Inst;
 
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      auto Duplex = HeadTail.first.split('\v');
 
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      if(!Duplex.second.empty()){
 
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        OS << Duplex.first << "\n";
 
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        Inst = Duplex.second;
 
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      }
 
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      else {
 
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        if(!HeadTail.first.startswith("immext"))
 
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          Inst = Duplex.first;
 
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      }
 
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      OS << Preamble;
 
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      OS << Inst;
 
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      HeadTail = HeadTail.second.split('\n');
 
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      Preamble = "";
 
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      Separator = "\n\t\t";
 
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    }
 
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    if(HexagonMCInstrInfo::bundleSize(Inst) != 0)
 
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      OS << "\n\t}" << PacketBundle.second;
 
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  }
 
102
};
 
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}
 
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namespace {
 
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class HexagonTargetELFStreamer : public HexagonTargetStreamer {
 
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public:
 
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  MCELFStreamer &getStreamer() {
 
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    return static_cast<MCELFStreamer &>(Streamer);
 
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  }
 
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  HexagonTargetELFStreamer(MCStreamer &S, MCSubtargetInfo const &STI)
 
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      : HexagonTargetStreamer(S) {
 
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    auto Bits = STI.getFeatureBits();
 
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    unsigned Flags;
 
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    if (Bits.to_ullong() & llvm::Hexagon::ArchV5)
 
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      Flags = ELF::EF_HEXAGON_MACH_V5;
 
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    else
 
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      Flags = ELF::EF_HEXAGON_MACH_V4;
 
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    getStreamer().getAssembler().setELFHeaderEFlags(Flags);
 
120
  }
 
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  void EmitCommonSymbolSorted(MCSymbol *Symbol, uint64_t Size,
 
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                              unsigned ByteAlignment,
 
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                              unsigned AccessSize) override {
 
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    HexagonMCELFStreamer &HexagonELFStreamer =
 
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        static_cast<HexagonMCELFStreamer &>(getStreamer());
 
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    HexagonELFStreamer.HexagonMCEmitCommonSymbol(Symbol, Size, ByteAlignment,
 
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                                                 AccessSize);
 
128
  }
 
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  void EmitLocalCommonSymbolSorted(MCSymbol *Symbol, uint64_t Size,
 
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                                   unsigned ByteAlignment,
 
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                                   unsigned AccessSize) override {
 
132
    HexagonMCELFStreamer &HexagonELFStreamer =
 
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        static_cast<HexagonMCELFStreamer &>(getStreamer());
 
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    HexagonELFStreamer.HexagonMCEmitLocalCommonSymbol(
 
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        Symbol, Size, ByteAlignment, AccessSize);
 
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  }
 
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};
 
138
}
 
139
 
 
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static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
 
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                                         const Triple &TT) {
 
142
  MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
 
143
 
 
144
  // VirtualFP = (R30 + #0).
 
145
  MCCFIInstruction Inst =
 
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      MCCFIInstruction::createDefCfa(nullptr, Hexagon::R30, 0);
 
147
  MAI->addInitialFrameState(Inst);
 
148
 
 
149
  return MAI;
 
150
}
 
151
 
 
152
static MCCodeGenInfo *createHexagonMCCodeGenInfo(const Triple &TT,
 
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                                                 Reloc::Model RM,
 
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                                                 CodeModel::Model CM,
 
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                                                 CodeGenOpt::Level OL) {
 
156
  MCCodeGenInfo *X = new MCCodeGenInfo();
 
157
  // For the time being, use static relocations, since there's really no
 
158
  // support for PIC yet.
 
159
  X->initMCCodeGenInfo(Reloc::Static, CM, OL);
 
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  return X;
 
161
}
 
162
 
 
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static MCInstPrinter *createHexagonMCInstPrinter(const Triple &T,
 
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                                                 unsigned SyntaxVariant,
 
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                                                 const MCAsmInfo &MAI,
 
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                                                 const MCInstrInfo &MII,
 
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                                                 const MCRegisterInfo &MRI) {
 
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  if (SyntaxVariant == 0)
 
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    return (new HexagonInstPrinter(MAI, MII, MRI));
 
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  else
 
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    return nullptr;
 
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}
 
173
 
 
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static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
 
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                                                   formatted_raw_ostream &OS,
 
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                                                   MCInstPrinter *InstPrint,
 
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                                                   bool IsVerboseAsm) {
 
178
  return new HexagonTargetAsmStreamer(S,  OS, IsVerboseAsm, *InstPrint);
 
179
}
 
180
 
 
181
static MCStreamer *createMCStreamer(Triple const &T, MCContext &Context,
 
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                                    MCAsmBackend &MAB, raw_pwrite_stream &OS,
 
183
                                    MCCodeEmitter *Emitter, bool RelaxAll) {
 
184
  return createHexagonELFStreamer(Context, MAB, OS, Emitter);
 
185
}
 
186
 
 
187
static MCTargetStreamer *
 
188
createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI) {
 
189
  return new HexagonTargetELFStreamer(S, STI);
 
190
}
 
191
 
 
192
// Force static initialization.
 
193
extern "C" void LLVMInitializeHexagonTargetMC() {
 
194
  // Register the MC asm info.
 
195
  RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
 
196
 
 
197
  // Register the MC codegen info.
 
198
  TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
 
199
                                        createHexagonMCCodeGenInfo);
 
200
 
 
201
  // Register the MC instruction info.
 
202
  TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
 
203
                                      createHexagonMCInstrInfo);
 
204
 
 
205
  // Register the MC register info.
 
206
  TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
 
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                                    createHexagonMCRegisterInfo);
 
208
 
 
209
  // Register the MC subtarget info.
 
210
  TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
 
211
                                          createHexagonMCSubtargetInfo);
 
212
 
 
213
  // Register the MC Code Emitter
 
214
  TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
 
215
                                        createHexagonMCCodeEmitter);
 
216
 
 
217
  // Register the asm backend
 
218
  TargetRegistry::RegisterMCAsmBackend(TheHexagonTarget,
 
219
                                       createHexagonAsmBackend);
 
220
 
 
221
  // Register the obj streamer
 
222
  TargetRegistry::RegisterELFStreamer(TheHexagonTarget, createMCStreamer);
 
223
 
 
224
  // Register the asm streamer
 
225
  TargetRegistry::RegisterAsmTargetStreamer(TheHexagonTarget,
 
226
                                            createMCAsmTargetStreamer);
 
227
 
 
228
  // Register the MC Inst Printer
 
229
  TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
 
230
                                        createHexagonMCInstPrinter);
 
231
 
 
232
  TargetRegistry::RegisterObjectTargetStreamer(
 
233
      TheHexagonTarget, createHexagonObjectTargetStreamer);
 
234
}