1
; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
3
define void @st1lane_16b(<16 x i8> %A, i8* %D) {
4
; CHECK-LABEL: st1lane_16b
6
%tmp = extractelement <16 x i8> %A, i32 1
11
define void @st1lane_ro_16b(<16 x i8> %A, i8* %D, i64 %offset) {
12
; CHECK-LABEL: st1lane_ro_16b
13
; CHECK: add x[[XREG:[0-9]+]], x0, x1
14
; CHECK: st1.b { v0 }[1], [x[[XREG]]]
15
%ptr = getelementptr i8, i8* %D, i64 %offset
16
%tmp = extractelement <16 x i8> %A, i32 1
17
store i8 %tmp, i8* %ptr
21
define void @st1lane0_ro_16b(<16 x i8> %A, i8* %D, i64 %offset) {
22
; CHECK-LABEL: st1lane0_ro_16b
23
; CHECK: add x[[XREG:[0-9]+]], x0, x1
24
; CHECK: st1.b { v0 }[0], [x[[XREG]]]
25
%ptr = getelementptr i8, i8* %D, i64 %offset
26
%tmp = extractelement <16 x i8> %A, i32 0
27
store i8 %tmp, i8* %ptr
31
define void @st1lane_8h(<8 x i16> %A, i16* %D) {
32
; CHECK-LABEL: st1lane_8h
34
%tmp = extractelement <8 x i16> %A, i32 1
35
store i16 %tmp, i16* %D
39
define void @st1lane_ro_8h(<8 x i16> %A, i16* %D, i64 %offset) {
40
; CHECK-LABEL: st1lane_ro_8h
41
; CHECK: add x[[XREG:[0-9]+]], x0, x1
42
; CHECK: st1.h { v0 }[1], [x[[XREG]]]
43
%ptr = getelementptr i16, i16* %D, i64 %offset
44
%tmp = extractelement <8 x i16> %A, i32 1
45
store i16 %tmp, i16* %ptr
49
define void @st1lane0_ro_8h(<8 x i16> %A, i16* %D, i64 %offset) {
50
; CHECK-LABEL: st1lane0_ro_8h
51
; CHECK: str h0, [x0, x1, lsl #1]
52
%ptr = getelementptr i16, i16* %D, i64 %offset
53
%tmp = extractelement <8 x i16> %A, i32 0
54
store i16 %tmp, i16* %ptr
58
define void @st1lane_4s(<4 x i32> %A, i32* %D) {
59
; CHECK-LABEL: st1lane_4s
61
%tmp = extractelement <4 x i32> %A, i32 1
62
store i32 %tmp, i32* %D
66
define void @st1lane_ro_4s(<4 x i32> %A, i32* %D, i64 %offset) {
67
; CHECK-LABEL: st1lane_ro_4s
68
; CHECK: add x[[XREG:[0-9]+]], x0, x1
69
; CHECK: st1.s { v0 }[1], [x[[XREG]]]
70
%ptr = getelementptr i32, i32* %D, i64 %offset
71
%tmp = extractelement <4 x i32> %A, i32 1
72
store i32 %tmp, i32* %ptr
76
define void @st1lane0_ro_4s(<4 x i32> %A, i32* %D, i64 %offset) {
77
; CHECK-LABEL: st1lane0_ro_4s
78
; CHECK: str s0, [x0, x1, lsl #2]
79
%ptr = getelementptr i32, i32* %D, i64 %offset
80
%tmp = extractelement <4 x i32> %A, i32 0
81
store i32 %tmp, i32* %ptr
85
define void @st1lane_4s_float(<4 x float> %A, float* %D) {
86
; CHECK-LABEL: st1lane_4s_float
88
%tmp = extractelement <4 x float> %A, i32 1
89
store float %tmp, float* %D
93
define void @st1lane_ro_4s_float(<4 x float> %A, float* %D, i64 %offset) {
94
; CHECK-LABEL: st1lane_ro_4s_float
95
; CHECK: add x[[XREG:[0-9]+]], x0, x1
96
; CHECK: st1.s { v0 }[1], [x[[XREG]]]
97
%ptr = getelementptr float, float* %D, i64 %offset
98
%tmp = extractelement <4 x float> %A, i32 1
99
store float %tmp, float* %ptr
103
define void @st1lane0_ro_4s_float(<4 x float> %A, float* %D, i64 %offset) {
104
; CHECK-LABEL: st1lane0_ro_4s_float
105
; CHECK: str s0, [x0, x1, lsl #2]
106
%ptr = getelementptr float, float* %D, i64 %offset
107
%tmp = extractelement <4 x float> %A, i32 0
108
store float %tmp, float* %ptr
112
define void @st1lane_2d(<2 x i64> %A, i64* %D) {
113
; CHECK-LABEL: st1lane_2d
115
%tmp = extractelement <2 x i64> %A, i32 1
116
store i64 %tmp, i64* %D
120
define void @st1lane_ro_2d(<2 x i64> %A, i64* %D, i64 %offset) {
121
; CHECK-LABEL: st1lane_ro_2d
122
; CHECK: add x[[XREG:[0-9]+]], x0, x1
123
; CHECK: st1.d { v0 }[1], [x[[XREG]]]
124
%ptr = getelementptr i64, i64* %D, i64 %offset
125
%tmp = extractelement <2 x i64> %A, i32 1
126
store i64 %tmp, i64* %ptr
130
define void @st1lane0_ro_2d(<2 x i64> %A, i64* %D, i64 %offset) {
131
; CHECK-LABEL: st1lane0_ro_2d
132
; CHECK: str d0, [x0, x1, lsl #3]
133
%ptr = getelementptr i64, i64* %D, i64 %offset
134
%tmp = extractelement <2 x i64> %A, i32 0
135
store i64 %tmp, i64* %ptr
139
define void @st1lane_2d_double(<2 x double> %A, double* %D) {
140
; CHECK-LABEL: st1lane_2d_double
142
%tmp = extractelement <2 x double> %A, i32 1
143
store double %tmp, double* %D
147
define void @st1lane_ro_2d_double(<2 x double> %A, double* %D, i64 %offset) {
148
; CHECK-LABEL: st1lane_ro_2d_double
149
; CHECK: add x[[XREG:[0-9]+]], x0, x1
150
; CHECK: st1.d { v0 }[1], [x[[XREG]]]
151
%ptr = getelementptr double, double* %D, i64 %offset
152
%tmp = extractelement <2 x double> %A, i32 1
153
store double %tmp, double* %ptr
157
define void @st1lane0_ro_2d_double(<2 x double> %A, double* %D, i64 %offset) {
158
; CHECK-LABEL: st1lane0_ro_2d_double
159
; CHECK: str d0, [x0, x1, lsl #3]
160
%ptr = getelementptr double, double* %D, i64 %offset
161
%tmp = extractelement <2 x double> %A, i32 0
162
store double %tmp, double* %ptr
166
define void @st1lane_8b(<8 x i8> %A, i8* %D) {
167
; CHECK-LABEL: st1lane_8b
169
%tmp = extractelement <8 x i8> %A, i32 1
170
store i8 %tmp, i8* %D
174
define void @st1lane_ro_8b(<8 x i8> %A, i8* %D, i64 %offset) {
175
; CHECK-LABEL: st1lane_ro_8b
176
; CHECK: add x[[XREG:[0-9]+]], x0, x1
177
; CHECK: st1.b { v0 }[1], [x[[XREG]]]
178
%ptr = getelementptr i8, i8* %D, i64 %offset
179
%tmp = extractelement <8 x i8> %A, i32 1
180
store i8 %tmp, i8* %ptr
184
define void @st1lane0_ro_8b(<8 x i8> %A, i8* %D, i64 %offset) {
185
; CHECK-LABEL: st1lane0_ro_8b
186
; CHECK: add x[[XREG:[0-9]+]], x0, x1
187
; CHECK: st1.b { v0 }[0], [x[[XREG]]]
188
%ptr = getelementptr i8, i8* %D, i64 %offset
189
%tmp = extractelement <8 x i8> %A, i32 0
190
store i8 %tmp, i8* %ptr
194
define void @st1lane_4h(<4 x i16> %A, i16* %D) {
195
; CHECK-LABEL: st1lane_4h
197
%tmp = extractelement <4 x i16> %A, i32 1
198
store i16 %tmp, i16* %D
202
define void @st1lane_ro_4h(<4 x i16> %A, i16* %D, i64 %offset) {
203
; CHECK-LABEL: st1lane_ro_4h
204
; CHECK: add x[[XREG:[0-9]+]], x0, x1
205
; CHECK: st1.h { v0 }[1], [x[[XREG]]]
206
%ptr = getelementptr i16, i16* %D, i64 %offset
207
%tmp = extractelement <4 x i16> %A, i32 1
208
store i16 %tmp, i16* %ptr
212
define void @st1lane0_ro_4h(<4 x i16> %A, i16* %D, i64 %offset) {
213
; CHECK-LABEL: st1lane0_ro_4h
214
; CHECK: str h0, [x0, x1, lsl #1]
215
%ptr = getelementptr i16, i16* %D, i64 %offset
216
%tmp = extractelement <4 x i16> %A, i32 0
217
store i16 %tmp, i16* %ptr
221
define void @st1lane_2s(<2 x i32> %A, i32* %D) {
222
; CHECK-LABEL: st1lane_2s
224
%tmp = extractelement <2 x i32> %A, i32 1
225
store i32 %tmp, i32* %D
229
define void @st1lane_ro_2s(<2 x i32> %A, i32* %D, i64 %offset) {
230
; CHECK-LABEL: st1lane_ro_2s
231
; CHECK: add x[[XREG:[0-9]+]], x0, x1
232
; CHECK: st1.s { v0 }[1], [x[[XREG]]]
233
%ptr = getelementptr i32, i32* %D, i64 %offset
234
%tmp = extractelement <2 x i32> %A, i32 1
235
store i32 %tmp, i32* %ptr
239
define void @st1lane0_ro_2s(<2 x i32> %A, i32* %D, i64 %offset) {
240
; CHECK-LABEL: st1lane0_ro_2s
241
; CHECK: str s0, [x0, x1, lsl #2]
242
%ptr = getelementptr i32, i32* %D, i64 %offset
243
%tmp = extractelement <2 x i32> %A, i32 0
244
store i32 %tmp, i32* %ptr
248
define void @st1lane_2s_float(<2 x float> %A, float* %D) {
249
; CHECK-LABEL: st1lane_2s_float
251
%tmp = extractelement <2 x float> %A, i32 1
252
store float %tmp, float* %D
256
define void @st1lane_ro_2s_float(<2 x float> %A, float* %D, i64 %offset) {
257
; CHECK-LABEL: st1lane_ro_2s_float
258
; CHECK: add x[[XREG:[0-9]+]], x0, x1
259
; CHECK: st1.s { v0 }[1], [x[[XREG]]]
260
%ptr = getelementptr float, float* %D, i64 %offset
261
%tmp = extractelement <2 x float> %A, i32 1
262
store float %tmp, float* %ptr
266
define void @st1lane0_ro_2s_float(<2 x float> %A, float* %D, i64 %offset) {
267
; CHECK-LABEL: st1lane0_ro_2s_float
268
; CHECK: str s0, [x0, x1, lsl #2]
269
%ptr = getelementptr float, float* %D, i64 %offset
270
%tmp = extractelement <2 x float> %A, i32 0
271
store float %tmp, float* %ptr
275
define void @st2lane_16b(<16 x i8> %A, <16 x i8> %B, i8* %D) {
276
; CHECK-LABEL: st2lane_16b
278
call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i64 1, i8* %D)
282
define void @st2lane_8h(<8 x i16> %A, <8 x i16> %B, i16* %D) {
283
; CHECK-LABEL: st2lane_8h
285
call void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i64 1, i16* %D)
289
define void @st2lane_4s(<4 x i32> %A, <4 x i32> %B, i32* %D) {
290
; CHECK-LABEL: st2lane_4s
292
call void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i64 1, i32* %D)
296
define void @st2lane_2d(<2 x i64> %A, <2 x i64> %B, i64* %D) {
297
; CHECK-LABEL: st2lane_2d
299
call void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64 1, i64* %D)
303
declare void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
304
declare void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
305
declare void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
306
declare void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
308
define void @st3lane_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %D) {
309
; CHECK-LABEL: st3lane_16b
311
call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i64 1, i8* %D)
315
define void @st3lane_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %D) {
316
; CHECK-LABEL: st3lane_8h
318
call void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i64 1, i16* %D)
322
define void @st3lane_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %D) {
323
; CHECK-LABEL: st3lane_4s
325
call void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i64 1, i32* %D)
329
define void @st3lane_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %D) {
330
; CHECK-LABEL: st3lane_2d
332
call void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64 1, i64* %D)
336
declare void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
337
declare void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
338
declare void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
339
declare void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
341
define void @st4lane_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %E) {
342
; CHECK-LABEL: st4lane_16b
344
call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 1, i8* %E)
348
define void @st4lane_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %E) {
349
; CHECK-LABEL: st4lane_8h
351
call void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 1, i16* %E)
355
define void @st4lane_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %E) {
356
; CHECK-LABEL: st4lane_4s
358
call void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 1, i32* %E)
362
define void @st4lane_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %E) {
363
; CHECK-LABEL: st4lane_2d
365
call void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 1, i64* %E)
369
declare void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
370
declare void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
371
declare void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
372
declare void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
375
define void @st2_8b(<8 x i8> %A, <8 x i8> %B, i8* %P) nounwind {
376
; CHECK-LABEL: st2_8b
378
call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, i8* %P)
382
define void @st3_8b(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %P) nounwind {
383
; CHECK-LABEL: st3_8b
385
call void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %P)
389
define void @st4_8b(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P) nounwind {
390
; CHECK-LABEL: st4_8b
392
call void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P)
396
declare void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8>, <8 x i8>, i8*) nounwind readonly
397
declare void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
398
declare void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
400
define void @st2_16b(<16 x i8> %A, <16 x i8> %B, i8* %P) nounwind {
401
; CHECK-LABEL: st2_16b
403
call void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i8* %P)
407
define void @st3_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %P) nounwind {
408
; CHECK-LABEL: st3_16b
410
call void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %P)
414
define void @st4_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P) nounwind {
415
; CHECK-LABEL: st4_16b
417
call void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P)
421
declare void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8>, <16 x i8>, i8*) nounwind readonly
422
declare void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
423
declare void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
425
define void @st2_4h(<4 x i16> %A, <4 x i16> %B, i16* %P) nounwind {
426
; CHECK-LABEL: st2_4h
428
call void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, i16* %P)
432
define void @st3_4h(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %P) nounwind {
433
; CHECK-LABEL: st3_4h
435
call void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %P)
439
define void @st4_4h(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P) nounwind {
440
; CHECK-LABEL: st4_4h
442
call void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P)
446
declare void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16>, <4 x i16>, i16*) nounwind readonly
447
declare void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
448
declare void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
450
define void @st2_8h(<8 x i16> %A, <8 x i16> %B, i16* %P) nounwind {
451
; CHECK-LABEL: st2_8h
453
call void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i16* %P)
457
define void @st3_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %P) nounwind {
458
; CHECK-LABEL: st3_8h
460
call void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %P)
464
define void @st4_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P) nounwind {
465
; CHECK-LABEL: st4_8h
467
call void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P)
471
declare void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16>, <8 x i16>, i16*) nounwind readonly
472
declare void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
473
declare void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
475
define void @st2_2s(<2 x i32> %A, <2 x i32> %B, i32* %P) nounwind {
476
; CHECK-LABEL: st2_2s
478
call void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, i32* %P)
482
define void @st3_2s(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %P) nounwind {
483
; CHECK-LABEL: st3_2s
485
call void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %P)
489
define void @st4_2s(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P) nounwind {
490
; CHECK-LABEL: st4_2s
492
call void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P)
496
declare void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32>, <2 x i32>, i32*) nounwind readonly
497
declare void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
498
declare void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
500
define void @st2_4s(<4 x i32> %A, <4 x i32> %B, i32* %P) nounwind {
501
; CHECK-LABEL: st2_4s
503
call void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i32* %P)
507
define void @st3_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %P) nounwind {
508
; CHECK-LABEL: st3_4s
510
call void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %P)
514
define void @st4_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P) nounwind {
515
; CHECK-LABEL: st4_4s
517
call void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P)
521
declare void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32>, <4 x i32>, i32*) nounwind readonly
522
declare void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
523
declare void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
525
; If there's only one element, st2/3/4 don't make much sense, stick to st1.
526
define void @st2_1d(<1 x i64> %A, <1 x i64> %B, i64* %P) nounwind {
527
; CHECK-LABEL: st2_1d
529
call void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, i64* %P)
533
define void @st3_1d(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %P) nounwind {
534
; CHECK-LABEL: st3_1d
536
call void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %P)
540
define void @st4_1d(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %P) nounwind {
541
; CHECK-LABEL: st4_1d
543
call void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %P)
547
declare void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64>, <1 x i64>, i64*) nounwind readonly
548
declare void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
549
declare void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
551
define void @st2_2d(<2 x i64> %A, <2 x i64> %B, i64* %P) nounwind {
552
; CHECK-LABEL: st2_2d
554
call void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64* %P)
558
define void @st3_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %P) nounwind {
559
; CHECK-LABEL: st3_2d
561
call void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %P)
565
define void @st4_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P) nounwind {
566
; CHECK-LABEL: st4_2d
568
call void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P)
572
declare void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64>, <2 x i64>, i64*) nounwind readonly
573
declare void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
574
declare void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
576
declare void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8>, <8 x i8>, i8*) nounwind readonly
577
declare void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16>, <4 x i16>, i16*) nounwind readonly
578
declare void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32>, <2 x i32>, i32*) nounwind readonly
579
declare void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float>, <2 x float>, float*) nounwind readonly
580
declare void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64>, <1 x i64>, i64*) nounwind readonly
581
declare void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double>, <1 x double>, double*) nounwind readonly
583
define void @st1_x2_v8i8(<8 x i8> %A, <8 x i8> %B, i8* %addr) {
584
; CHECK-LABEL: st1_x2_v8i8:
585
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
586
call void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, i8* %addr)
590
define void @st1_x2_v4i16(<4 x i16> %A, <4 x i16> %B, i16* %addr) {
591
; CHECK-LABEL: st1_x2_v4i16:
592
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
593
call void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, i16* %addr)
597
define void @st1_x2_v2i32(<2 x i32> %A, <2 x i32> %B, i32* %addr) {
598
; CHECK-LABEL: st1_x2_v2i32:
599
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
600
call void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, i32* %addr)
604
define void @st1_x2_v2f32(<2 x float> %A, <2 x float> %B, float* %addr) {
605
; CHECK-LABEL: st1_x2_v2f32:
606
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
607
call void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float> %A, <2 x float> %B, float* %addr)
611
define void @st1_x2_v1i64(<1 x i64> %A, <1 x i64> %B, i64* %addr) {
612
; CHECK-LABEL: st1_x2_v1i64:
613
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
614
call void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, i64* %addr)
618
define void @st1_x2_v1f64(<1 x double> %A, <1 x double> %B, double* %addr) {
619
; CHECK-LABEL: st1_x2_v1f64:
620
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
621
call void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double> %A, <1 x double> %B, double* %addr)
625
declare void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8>, <16 x i8>, i8*) nounwind readonly
626
declare void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16>, <8 x i16>, i16*) nounwind readonly
627
declare void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32>, <4 x i32>, i32*) nounwind readonly
628
declare void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float>, <4 x float>, float*) nounwind readonly
629
declare void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64>, <2 x i64>, i64*) nounwind readonly
630
declare void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double>, <2 x double>, double*) nounwind readonly
632
define void @st1_x2_v16i8(<16 x i8> %A, <16 x i8> %B, i8* %addr) {
633
; CHECK-LABEL: st1_x2_v16i8:
634
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
635
call void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i8* %addr)
639
define void @st1_x2_v8i16(<8 x i16> %A, <8 x i16> %B, i16* %addr) {
640
; CHECK-LABEL: st1_x2_v8i16:
641
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
642
call void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i16* %addr)
646
define void @st1_x2_v4i32(<4 x i32> %A, <4 x i32> %B, i32* %addr) {
647
; CHECK-LABEL: st1_x2_v4i32:
648
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
649
call void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i32* %addr)
653
define void @st1_x2_v4f32(<4 x float> %A, <4 x float> %B, float* %addr) {
654
; CHECK-LABEL: st1_x2_v4f32:
655
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
656
call void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float> %A, <4 x float> %B, float* %addr)
660
define void @st1_x2_v2i64(<2 x i64> %A, <2 x i64> %B, i64* %addr) {
661
; CHECK-LABEL: st1_x2_v2i64:
662
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
663
call void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64* %addr)
667
define void @st1_x2_v2f64(<2 x double> %A, <2 x double> %B, double* %addr) {
668
; CHECK-LABEL: st1_x2_v2f64:
669
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
670
call void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double> %A, <2 x double> %B, double* %addr)
674
declare void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
675
declare void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
676
declare void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
677
declare void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float>, <2 x float>, <2 x float>, float*) nounwind readonly
678
declare void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
679
declare void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double>, <1 x double>, <1 x double>, double*) nounwind readonly
681
define void @st1_x3_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %addr) {
682
; CHECK-LABEL: st1_x3_v8i8:
683
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
684
call void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %addr)
688
define void @st1_x3_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %addr) {
689
; CHECK-LABEL: st1_x3_v4i16:
690
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
691
call void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %addr)
695
define void @st1_x3_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %addr) {
696
; CHECK-LABEL: st1_x3_v2i32:
697
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
698
call void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %addr)
702
define void @st1_x3_v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, float* %addr) {
703
; CHECK-LABEL: st1_x3_v2f32:
704
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
705
call void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, float* %addr)
709
define void @st1_x3_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %addr) {
710
; CHECK-LABEL: st1_x3_v1i64:
711
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
712
call void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %addr)
716
define void @st1_x3_v1f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, double* %addr) {
717
; CHECK-LABEL: st1_x3_v1f64:
718
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
719
call void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, double* %addr)
723
declare void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
724
declare void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
725
declare void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
726
declare void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float>, <4 x float>, <4 x float>, float*) nounwind readonly
727
declare void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
728
declare void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double>, <2 x double>, <2 x double>, double*) nounwind readonly
730
define void @st1_x3_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %addr) {
731
; CHECK-LABEL: st1_x3_v16i8:
732
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
733
call void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %addr)
737
define void @st1_x3_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %addr) {
738
; CHECK-LABEL: st1_x3_v8i16:
739
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
740
call void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %addr)
744
define void @st1_x3_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %addr) {
745
; CHECK-LABEL: st1_x3_v4i32:
746
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
747
call void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %addr)
751
define void @st1_x3_v4f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, float* %addr) {
752
; CHECK-LABEL: st1_x3_v4f32:
753
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
754
call void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, float* %addr)
758
define void @st1_x3_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %addr) {
759
; CHECK-LABEL: st1_x3_v2i64:
760
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
761
call void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %addr)
765
define void @st1_x3_v2f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, double* %addr) {
766
; CHECK-LABEL: st1_x3_v2f64:
767
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
768
call void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, double* %addr)
773
declare void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
774
declare void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
775
declare void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
776
declare void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float>, <2 x float>, <2 x float>, <2 x float>, float*) nounwind readonly
777
declare void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
778
declare void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double>, <1 x double>, <1 x double>, <1 x double>, double*) nounwind readonly
780
define void @st1_x4_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %addr) {
781
; CHECK-LABEL: st1_x4_v8i8:
782
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
783
call void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %addr)
787
define void @st1_x4_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %addr) {
788
; CHECK-LABEL: st1_x4_v4i16:
789
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
790
call void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %addr)
794
define void @st1_x4_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %addr) {
795
; CHECK-LABEL: st1_x4_v2i32:
796
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
797
call void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %addr)
801
define void @st1_x4_v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, <2 x float> %D, float* %addr) {
802
; CHECK-LABEL: st1_x4_v2f32:
803
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
804
call void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, <2 x float> %D, float* %addr)
808
define void @st1_x4_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %addr) {
809
; CHECK-LABEL: st1_x4_v1i64:
810
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
811
call void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %addr)
815
define void @st1_x4_v1f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, <1 x double> %D, double* %addr) {
816
; CHECK-LABEL: st1_x4_v1f64:
817
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
818
call void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, <1 x double> %D, double* %addr)
822
declare void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
823
declare void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
824
declare void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
825
declare void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float>, <4 x float>, <4 x float>, <4 x float>, float*) nounwind readonly
826
declare void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
827
declare void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double>, <2 x double>, <2 x double>, <2 x double>, double*) nounwind readonly
829
define void @st1_x4_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %addr) {
830
; CHECK-LABEL: st1_x4_v16i8:
831
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
832
call void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %addr)
836
define void @st1_x4_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %addr) {
837
; CHECK-LABEL: st1_x4_v8i16:
838
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
839
call void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %addr)
843
define void @st1_x4_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %addr) {
844
; CHECK-LABEL: st1_x4_v4i32:
845
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
846
call void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %addr)
850
define void @st1_x4_v4f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, <4 x float> %D, float* %addr) {
851
; CHECK-LABEL: st1_x4_v4f32:
852
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
853
call void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, <4 x float> %D, float* %addr)
857
define void @st1_x4_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %addr) {
858
; CHECK-LABEL: st1_x4_v2i64:
859
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
860
call void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %addr)
864
define void @st1_x4_v2f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, <2 x double> %D, double* %addr) {
865
; CHECK-LABEL: st1_x4_v2f64:
866
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
867
call void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, <2 x double> %D, double* %addr)