2
* P3041 Silicon Device Tree Source
4
* Copyright 2010-2011 Freescale Semiconductor Inc.
6
* Redistribution and use in source and binary forms, with or without
7
* modification, are permitted provided that the following conditions are met:
8
* * Redistributions of source code must retain the above copyright
9
* notice, this list of conditions and the following disclaimer.
10
* * Redistributions in binary form must reproduce the above copyright
11
* notice, this list of conditions and the following disclaimer in the
12
* documentation and/or other materials provided with the distribution.
13
* * Neither the name of Freescale Semiconductor nor the
14
* names of its contributors may be used to endorse or promote products
15
* derived from this software without specific prior written permission.
18
* ALTERNATIVELY, this software may be distributed under the terms of the
19
* GNU General Public License ("GPL") as published by the Free Software
20
* Foundation, either version 2 of that License or (at your option) any
23
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38
compatible = "fsl,P3041";
41
interrupt-parent = <&mpic>;
84
cpu0: PowerPC,e500mc@0 {
87
next-level-cache = <&L2_0>;
89
next-level-cache = <&cpc>;
92
cpu1: PowerPC,e500mc@1 {
95
next-level-cache = <&L2_1>;
97
next-level-cache = <&cpc>;
100
cpu2: PowerPC,e500mc@2 {
103
next-level-cache = <&L2_2>;
105
next-level-cache = <&cpc>;
108
cpu3: PowerPC,e500mc@3 {
111
next-level-cache = <&L2_3>;
113
next-level-cache = <&cpc>;
118
dcsr: dcsr@f00000000 {
119
#address-cells = <1>;
121
compatible = "fsl,dcsr", "simple-bus";
124
compatible = "fsl,dcsr-epu";
125
interrupts = <52 2 0 0
128
interrupt-parent = <&mpic>;
132
compatible = "fsl,dcsr-npc";
133
reg = <0x1000 0x1000 0x1000000 0x8000>;
136
compatible = "fsl,dcsr-nxc";
137
reg = <0x2000 0x1000>;
140
compatible = "fsl,dcsr-corenet";
141
reg = <0x8000 0x1000 0xB0000 0x1000>;
144
compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa";
145
reg = <0x9000 0x1000>;
148
compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn";
149
reg = <0x11000 0x1000>;
152
compatible = "fsl,dcsr-ddr";
154
reg = <0x12000 0x1000>;
157
compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal";
158
reg = <0x18000 0x1000>;
161
compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm";
162
reg = <0x22000 0x1000>;
164
dcsr-cpu-sb-proxy@40000 {
165
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
166
cpu-handle = <&cpu0>;
167
reg = <0x40000 0x1000>;
169
dcsr-cpu-sb-proxy@41000 {
170
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
171
cpu-handle = <&cpu1>;
172
reg = <0x41000 0x1000>;
174
dcsr-cpu-sb-proxy@42000 {
175
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
176
cpu-handle = <&cpu2>;
177
reg = <0x42000 0x1000>;
179
dcsr-cpu-sb-proxy@43000 {
180
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
181
cpu-handle = <&cpu3>;
182
reg = <0x43000 0x1000>;
187
#address-cells = <1>;
190
compatible = "simple-bus";
191
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
192
reg = <0xf 0xfe000000 0 0x00001000>;
195
compatible = "fsl,soc-sram-error";
196
interrupts = <16 2 1 29>;
200
compatible = "fsl,corenet-law";
205
ddr: memory-controller@8000 {
206
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
207
reg = <0x8000 0x1000>;
208
interrupts = <16 2 1 23>;
211
cpc: l3-cache-controller@10000 {
212
compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
213
reg = <0x10000 0x1000>;
214
interrupts = <16 2 1 27>;
218
compatible = "fsl,corenet-cf";
219
reg = <0x18000 0x1000>;
220
interrupts = <16 2 1 31>;
221
fsl,ccf-num-csdids = <32>;
222
fsl,ccf-num-snoopids = <32>;
226
compatible = "fsl,pamu-v1.0", "fsl,pamu";
227
reg = <0x20000 0x4000>;
234
clock-frequency = <0>;
235
interrupt-controller;
236
#address-cells = <0>;
237
#interrupt-cells = <4>;
238
reg = <0x40000 0x40000>;
239
compatible = "fsl,mpic", "chrp,open-pic";
240
device_type = "open-pic";
244
compatible = "fsl,mpic-msi";
245
reg = <0x41600 0x200>;
246
msi-available-ranges = <0 0x100>;
259
compatible = "fsl,mpic-msi";
260
reg = <0x41800 0x200>;
261
msi-available-ranges = <0 0x100>;
274
compatible = "fsl,mpic-msi";
275
reg = <0x41a00 0x200>;
276
msi-available-ranges = <0 0x100>;
288
guts: global-utilities@e0000 {
289
compatible = "fsl,qoriq-device-config-1.0";
290
reg = <0xe0000 0xe00>;
293
fsl,liodn-bits = <12>;
296
pins: global-utilities@e0e00 {
297
compatible = "fsl,qoriq-pin-control-1.0";
298
reg = <0xe0e00 0x200>;
302
clockgen: global-utilities@e1000 {
303
compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
304
reg = <0xe1000 0x1000>;
305
clock-frequency = <0>;
308
rcpm: global-utilities@e2000 {
309
compatible = "fsl,qoriq-rcpm-1.0";
310
reg = <0xe2000 0x1000>;
315
compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
316
reg = <0xe8000 0x1000>;
319
serdes: serdes@ea000 {
320
compatible = "fsl,p3041-serdes";
321
reg = <0xea000 0x1000>;
325
#address-cells = <1>;
327
compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
328
reg = <0x100300 0x4>;
329
ranges = <0x0 0x100100 0x200>;
332
compatible = "fsl,p3041-dma-channel",
333
"fsl,eloplus-dma-channel";
336
interrupts = <28 2 0 0>;
339
compatible = "fsl,p3041-dma-channel",
340
"fsl,eloplus-dma-channel";
343
interrupts = <29 2 0 0>;
346
compatible = "fsl,p3041-dma-channel",
347
"fsl,eloplus-dma-channel";
350
interrupts = <30 2 0 0>;
353
compatible = "fsl,p3041-dma-channel",
354
"fsl,eloplus-dma-channel";
357
interrupts = <31 2 0 0>;
362
#address-cells = <1>;
364
compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
365
reg = <0x101300 0x4>;
366
ranges = <0x0 0x101100 0x200>;
369
compatible = "fsl,p3041-dma-channel",
370
"fsl,eloplus-dma-channel";
373
interrupts = <32 2 0 0>;
376
compatible = "fsl,p3041-dma-channel",
377
"fsl,eloplus-dma-channel";
380
interrupts = <33 2 0 0>;
383
compatible = "fsl,p3041-dma-channel",
384
"fsl,eloplus-dma-channel";
387
interrupts = <34 2 0 0>;
390
compatible = "fsl,p3041-dma-channel",
391
"fsl,eloplus-dma-channel";
394
interrupts = <35 2 0 0>;
399
#address-cells = <1>;
401
compatible = "fsl,p3041-espi", "fsl,mpc8536-espi";
402
reg = <0x110000 0x1000>;
403
interrupts = <53 0x2 0 0>;
404
fsl,espi-num-chipselects = <4>;
408
compatible = "fsl,p3041-esdhc", "fsl,esdhc";
409
reg = <0x114000 0x1000>;
410
interrupts = <48 2 0 0>;
412
clock-frequency = <0>;
416
#address-cells = <1>;
419
compatible = "fsl-i2c";
420
reg = <0x118000 0x100>;
421
interrupts = <38 2 0 0>;
426
#address-cells = <1>;
429
compatible = "fsl-i2c";
430
reg = <0x118100 0x100>;
431
interrupts = <38 2 0 0>;
436
#address-cells = <1>;
439
compatible = "fsl-i2c";
440
reg = <0x119000 0x100>;
441
interrupts = <39 2 0 0>;
446
#address-cells = <1>;
449
compatible = "fsl-i2c";
450
reg = <0x119100 0x100>;
451
interrupts = <39 2 0 0>;
455
serial0: serial@11c500 {
457
device_type = "serial";
458
compatible = "ns16550";
459
reg = <0x11c500 0x100>;
460
clock-frequency = <0>;
461
interrupts = <36 2 0 0>;
464
serial1: serial@11c600 {
466
device_type = "serial";
467
compatible = "ns16550";
468
reg = <0x11c600 0x100>;
469
clock-frequency = <0>;
470
interrupts = <36 2 0 0>;
473
serial2: serial@11d500 {
475
device_type = "serial";
476
compatible = "ns16550";
477
reg = <0x11d500 0x100>;
478
clock-frequency = <0>;
479
interrupts = <37 2 0 0>;
482
serial3: serial@11d600 {
484
device_type = "serial";
485
compatible = "ns16550";
486
reg = <0x11d600 0x100>;
487
clock-frequency = <0>;
488
interrupts = <37 2 0 0>;
492
compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio";
493
reg = <0x130000 0x1000>;
494
interrupts = <55 2 0 0>;
500
compatible = "fsl,p3041-usb2-mph",
501
"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
502
reg = <0x210000 0x1000>;
503
#address-cells = <1>;
505
interrupts = <44 0x2 0 0>;
511
compatible = "fsl,p3041-usb2-dr",
512
"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
513
reg = <0x211000 0x1000>;
514
#address-cells = <1>;
516
interrupts = <45 0x2 0 0>;
522
compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
523
reg = <0x220000 0x1000>;
524
interrupts = <68 0x2 0 0>;
528
compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
529
reg = <0x221000 0x1000>;
530
interrupts = <69 0x2 0 0>;
533
crypto: crypto@300000 {
534
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
535
#address-cells = <1>;
537
reg = <0x300000 0x10000>;
538
ranges = <0 0x300000 0x10000>;
539
interrupts = <92 2 0 0>;
542
compatible = "fsl,sec-v4.2-job-ring",
543
"fsl,sec-v4.0-job-ring";
544
reg = <0x1000 0x1000>;
545
interrupts = <88 2 0 0>;
549
compatible = "fsl,sec-v4.2-job-ring",
550
"fsl,sec-v4.0-job-ring";
551
reg = <0x2000 0x1000>;
552
interrupts = <89 2 0 0>;
556
compatible = "fsl,sec-v4.2-job-ring",
557
"fsl,sec-v4.0-job-ring";
558
reg = <0x3000 0x1000>;
559
interrupts = <90 2 0 0>;
563
compatible = "fsl,sec-v4.2-job-ring",
564
"fsl,sec-v4.0-job-ring";
565
reg = <0x4000 0x1000>;
566
interrupts = <91 2 0 0>;
570
compatible = "fsl,sec-v4.2-rtic",
572
#address-cells = <1>;
574
reg = <0x6000 0x100>;
575
ranges = <0x0 0x6100 0xe00>;
578
compatible = "fsl,sec-v4.2-rtic-memory",
579
"fsl,sec-v4.0-rtic-memory";
580
reg = <0x00 0x20 0x100 0x80>;
584
compatible = "fsl,sec-v4.2-rtic-memory",
585
"fsl,sec-v4.0-rtic-memory";
586
reg = <0x20 0x20 0x200 0x80>;
590
compatible = "fsl,sec-v4.2-rtic-memory",
591
"fsl,sec-v4.0-rtic-memory";
592
reg = <0x40 0x20 0x300 0x80>;
596
compatible = "fsl,sec-v4.2-rtic-memory",
597
"fsl,sec-v4.0-rtic-memory";
598
reg = <0x60 0x20 0x500 0x80>;
603
sec_mon: sec_mon@314000 {
604
compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
605
reg = <0x314000 0x1000>;
606
interrupts = <93 2 0 0>;
611
rapidio0: rapidio@ffe0c0000
615
compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
616
interrupts = <25 2 0 0>;
617
#address-cells = <2>;
621
pci0: pcie@ffe200000 {
622
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
625
#address-cells = <3>;
626
bus-range = <0x0 0xff>;
627
clock-frequency = <0x1fca055>;
629
interrupts = <16 2 1 15>;
633
#interrupt-cells = <1>;
635
#address-cells = <3>;
637
interrupts = <16 2 1 15>;
638
interrupt-map-mask = <0xf800 0 0 7>;
641
0000 0 0 1 &mpic 40 1 0 0
642
0000 0 0 2 &mpic 1 1 0 0
643
0000 0 0 3 &mpic 2 1 0 0
644
0000 0 0 4 &mpic 3 1 0 0
649
pci1: pcie@ffe201000 {
650
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
653
#address-cells = <3>;
654
bus-range = <0 0xff>;
655
clock-frequency = <0x1fca055>;
657
interrupts = <16 2 1 14>;
660
#interrupt-cells = <1>;
662
#address-cells = <3>;
664
interrupts = <16 2 1 14>;
665
interrupt-map-mask = <0xf800 0 0 7>;
668
0000 0 0 1 &mpic 41 1 0 0
669
0000 0 0 2 &mpic 5 1 0 0
670
0000 0 0 3 &mpic 6 1 0 0
671
0000 0 0 4 &mpic 7 1 0 0
676
pci2: pcie@ffe202000 {
677
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
680
#address-cells = <3>;
681
bus-range = <0x0 0xff>;
682
clock-frequency = <0x1fca055>;
684
interrupts = <16 2 1 13>;
687
#interrupt-cells = <1>;
689
#address-cells = <3>;
691
interrupts = <16 2 1 13>;
692
interrupt-map-mask = <0xf800 0 0 7>;
695
0000 0 0 1 &mpic 42 1 0 0
696
0000 0 0 2 &mpic 9 1 0 0
697
0000 0 0 3 &mpic 10 1 0 0
698
0000 0 0 4 &mpic 11 1 0 0
703
pci3: pcie@ffe203000 {
704
compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
707
#address-cells = <3>;
708
bus-range = <0x0 0xff>;
709
clock-frequency = <0x1fca055>;
711
interrupts = <16 2 1 12>;
714
#interrupt-cells = <1>;
716
#address-cells = <3>;
718
interrupts = <16 2 1 12>;
719
interrupt-map-mask = <0xf800 0 0 7>;
722
0000 0 0 1 &mpic 43 1 0 0
723
0000 0 0 2 &mpic 0 1 0 0
724
0000 0 0 3 &mpic 4 1 0 0
725
0000 0 0 4 &mpic 8 1 0 0