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/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2006 Fen Systems Ltd.
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* Copyright 2006-2010 Solarflare Communications Inc.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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#include <linux/bitops.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/rtnetlink.h>
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#include "net_driver.h"
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#include "mcdi_pcol.h"
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#define EFX_SPI_VERIFY_BUF_LEN 16
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struct efx_mtd_partition {
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const char *type_name;
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char name[IFNAMSIZ + 20];
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int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
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size_t *retlen, u8 *buffer);
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int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
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int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
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size_t *retlen, const u8 *buffer);
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int (*sync)(struct mtd_info *mtd);
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struct list_head node;
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const struct efx_spi_device *spi;
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const struct efx_mtd_ops *ops;
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struct efx_mtd_partition part[0];
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#define efx_for_each_partition(part, efx_mtd) \
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for ((part) = &(efx_mtd)->part[0]; \
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(part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
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#define to_efx_mtd_partition(mtd) \
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container_of(mtd, struct efx_mtd_partition, mtd)
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static int falcon_mtd_probe(struct efx_nic *efx);
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static int siena_mtd_probe(struct efx_nic *efx);
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efx_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
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struct efx_mtd *efx_mtd = part->mtd.priv;
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const struct efx_spi_device *spi = efx_mtd->spi;
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struct efx_nic *efx = efx_mtd->efx;
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/* Wait up to 4s for flash/EEPROM to finish a slow operation. */
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for (i = 0; i < 40; i++) {
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__set_current_state(uninterruptible ?
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TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
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schedule_timeout(HZ / 10);
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rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
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&status, sizeof(status));
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if (!(status & SPI_STATUS_NRDY))
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if (signal_pending(current))
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pr_err("%s: timed out waiting for %s\n", part->name, efx_mtd->name);
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efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
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const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
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rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
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&status, sizeof(status));
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if (!(status & unlock_mask))
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return 0; /* already unlocked */
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rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
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rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
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status &= ~unlock_mask;
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rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
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NULL, sizeof(status));
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rc = falcon_spi_wait_write(efx, spi);
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efx_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
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struct efx_mtd *efx_mtd = part->mtd.priv;
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const struct efx_spi_device *spi = efx_mtd->spi;
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struct efx_nic *efx = efx_mtd->efx;
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unsigned pos, block_len;
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u8 empty[EFX_SPI_VERIFY_BUF_LEN];
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u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
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if (len != spi->erase_size)
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if (spi->erase_command == 0)
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rc = efx_spi_unlock(efx, spi);
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rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
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rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
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rc = efx_spi_slow_wait(part, false);
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/* Verify the entire region has been wiped */
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memset(empty, 0xff, sizeof(empty));
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for (pos = 0; pos < len; pos += block_len) {
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block_len = min(len - pos, sizeof(buffer));
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rc = falcon_spi_read(efx, spi, start + pos, block_len,
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if (memcmp(empty, buffer, block_len))
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/* Avoid locking up the system */
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if (signal_pending(current))
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static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
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struct efx_mtd *efx_mtd = mtd->priv;
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rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
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erase->state = MTD_ERASE_DONE;
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erase->state = MTD_ERASE_FAILED;
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erase->fail_addr = 0xffffffff;
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mtd_erase_callback(erase);
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static void efx_mtd_sync(struct mtd_info *mtd)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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rc = efx_mtd->ops->sync(mtd);
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pr_err("%s: %s sync failed (%d)\n",
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part->name, efx_mtd->name, rc);
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static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
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rc = mtd_device_unregister(&part->mtd);
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static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
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struct efx_mtd_partition *part;
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efx_for_each_partition(part, efx_mtd)
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efx_mtd_remove_partition(part);
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list_del(&efx_mtd->node);
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static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
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struct efx_mtd_partition *part;
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efx_for_each_partition(part, efx_mtd)
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if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
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snprintf(part->name, sizeof(part->name),
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"%s %s:%02x", efx_mtd->efx->name,
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part->type_name, part->mcdi.fw_subtype);
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snprintf(part->name, sizeof(part->name),
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"%s %s", efx_mtd->efx->name,
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static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
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struct efx_mtd_partition *part;
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efx_mtd_rename_device(efx_mtd);
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efx_for_each_partition(part, efx_mtd) {
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part->mtd.writesize = 1;
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part->mtd.owner = THIS_MODULE;
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part->mtd.priv = efx_mtd;
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part->mtd.name = part->name;
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part->mtd.erase = efx_mtd_erase;
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part->mtd.read = efx_mtd->ops->read;
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part->mtd.write = efx_mtd->ops->write;
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part->mtd.sync = efx_mtd_sync;
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if (mtd_device_register(&part->mtd, NULL, 0))
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list_add(&efx_mtd->node, &efx->mtd_list);
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while (part != &efx_mtd->part[0]) {
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efx_mtd_remove_partition(part);
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/* mtd_device_register() returns 1 if the MTD table is full */
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void efx_mtd_remove(struct efx_nic *efx)
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struct efx_mtd *efx_mtd, *next;
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WARN_ON(efx_dev_registered(efx));
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list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
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efx_mtd_remove_device(efx_mtd);
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void efx_mtd_rename(struct efx_nic *efx)
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struct efx_mtd *efx_mtd;
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list_for_each_entry(efx_mtd, &efx->mtd_list, node)
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efx_mtd_rename_device(efx_mtd);
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int efx_mtd_probe(struct efx_nic *efx)
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if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
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return siena_mtd_probe(efx);
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return falcon_mtd_probe(efx);
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/* Implementation of MTD operations for Falcon */
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static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
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size_t len, size_t *retlen, u8 *buffer)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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const struct efx_spi_device *spi = efx_mtd->spi;
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struct efx_nic *efx = efx_mtd->efx;
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struct falcon_nic_data *nic_data = efx->nic_data;
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rc = mutex_lock_interruptible(&nic_data->spi_lock);
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rc = falcon_spi_read(efx, spi, part->offset + start, len,
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mutex_unlock(&nic_data->spi_lock);
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static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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struct falcon_nic_data *nic_data = efx->nic_data;
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rc = mutex_lock_interruptible(&nic_data->spi_lock);
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rc = efx_spi_erase(part, part->offset + start, len);
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mutex_unlock(&nic_data->spi_lock);
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static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
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size_t len, size_t *retlen, const u8 *buffer)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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const struct efx_spi_device *spi = efx_mtd->spi;
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struct efx_nic *efx = efx_mtd->efx;
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struct falcon_nic_data *nic_data = efx->nic_data;
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rc = mutex_lock_interruptible(&nic_data->spi_lock);
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rc = falcon_spi_write(efx, spi, part->offset + start, len,
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mutex_unlock(&nic_data->spi_lock);
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static int falcon_mtd_sync(struct mtd_info *mtd)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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struct falcon_nic_data *nic_data = efx->nic_data;
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mutex_lock(&nic_data->spi_lock);
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rc = efx_spi_slow_wait(part, true);
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mutex_unlock(&nic_data->spi_lock);
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static struct efx_mtd_ops falcon_mtd_ops = {
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.read = falcon_mtd_read,
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.erase = falcon_mtd_erase,
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.write = falcon_mtd_write,
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.sync = falcon_mtd_sync,
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static int falcon_mtd_probe(struct efx_nic *efx)
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struct falcon_nic_data *nic_data = efx->nic_data;
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struct efx_spi_device *spi;
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struct efx_mtd *efx_mtd;
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spi = &nic_data->spi_flash;
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if (efx_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
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efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
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efx_mtd->name = "flash";
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efx_mtd->ops = &falcon_mtd_ops;
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efx_mtd->n_parts = 1;
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efx_mtd->part[0].mtd.type = MTD_NORFLASH;
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efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
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efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
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efx_mtd->part[0].mtd.erasesize = spi->erase_size;
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efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
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efx_mtd->part[0].type_name = "sfc_flash_bootrom";
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rc = efx_mtd_probe_device(efx, efx_mtd);
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spi = &nic_data->spi_eeprom;
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if (efx_spi_present(spi) && spi->size > EFX_EEPROM_BOOTCONFIG_START) {
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efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
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efx_mtd->name = "EEPROM";
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efx_mtd->ops = &falcon_mtd_ops;
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efx_mtd->n_parts = 1;
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efx_mtd->part[0].mtd.type = MTD_RAM;
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efx_mtd->part[0].mtd.flags = MTD_CAP_RAM;
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efx_mtd->part[0].mtd.size =
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min(spi->size, EFX_EEPROM_BOOTCONFIG_END) -
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EFX_EEPROM_BOOTCONFIG_START;
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efx_mtd->part[0].mtd.erasesize = spi->erase_size;
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efx_mtd->part[0].offset = EFX_EEPROM_BOOTCONFIG_START;
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efx_mtd->part[0].type_name = "sfc_bootconfig";
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rc = efx_mtd_probe_device(efx, efx_mtd);
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/* Implementation of MTD operations for Siena */
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static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
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size_t len, size_t *retlen, u8 *buffer)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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loff_t offset = start;
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loff_t end = min_t(loff_t, start + len, mtd->size);
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while (offset < end) {
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chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
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rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
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*retlen = offset - start;
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static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
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loff_t end = min_t(loff_t, start + len, mtd->size);
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size_t chunk = part->mtd.erasesize;
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if (!part->mcdi.updating) {
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rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
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part->mcdi.updating = 1;
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/* The MCDI interface can in fact do multiple erase blocks at once;
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* but erasing may be slow, so we make multiple calls here to avoid
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* tripping the MCDI RPC timeout. */
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while (offset < end) {
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rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
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static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
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size_t len, size_t *retlen, const u8 *buffer)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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loff_t offset = start;
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loff_t end = min_t(loff_t, start + len, mtd->size);
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if (!part->mcdi.updating) {
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rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
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part->mcdi.updating = 1;
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while (offset < end) {
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chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
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rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
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*retlen = offset - start;
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static int siena_mtd_sync(struct mtd_info *mtd)
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struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
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struct efx_mtd *efx_mtd = mtd->priv;
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struct efx_nic *efx = efx_mtd->efx;
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if (part->mcdi.updating) {
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part->mcdi.updating = 0;
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rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
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static struct efx_mtd_ops siena_mtd_ops = {
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.read = siena_mtd_read,
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.erase = siena_mtd_erase,
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.write = siena_mtd_write,
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.sync = siena_mtd_sync,
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struct siena_nvram_type_info {
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static struct siena_nvram_type_info siena_nvram_types[] = {
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[MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
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[MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
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[MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
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[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
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[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
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[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
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[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
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[MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
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[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
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[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
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[MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
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[MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
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static int siena_mtd_probe_partition(struct efx_nic *efx,
591
struct efx_mtd *efx_mtd,
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unsigned int part_id,
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struct efx_mtd_partition *part = &efx_mtd->part[part_id];
596
struct siena_nvram_type_info *info;
597
size_t size, erase_size;
601
if (type >= ARRAY_SIZE(siena_nvram_types))
604
info = &siena_nvram_types[type];
606
if (info->port != efx_port_num(efx))
609
rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
613
return -ENODEV; /* hide it */
615
part->mcdi.nvram_type = type;
616
part->type_name = info->name;
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part->mtd.type = MTD_NORFLASH;
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part->mtd.flags = MTD_CAP_NORFLASH;
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part->mtd.size = size;
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part->mtd.erasesize = erase_size;
626
static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
627
struct efx_mtd *efx_mtd)
629
struct efx_mtd_partition *part;
630
uint16_t fw_subtype_list[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN /
634
rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list);
638
efx_for_each_partition(part, efx_mtd)
639
part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
644
static int siena_mtd_probe(struct efx_nic *efx)
646
struct efx_mtd *efx_mtd;
653
rc = efx_mcdi_nvram_types(efx, &nvram_types);
657
efx_mtd = kzalloc(sizeof(*efx_mtd) +
658
hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
663
efx_mtd->name = "Siena NVRAM manager";
665
efx_mtd->ops = &siena_mtd_ops;
668
efx_mtd->n_parts = 0;
670
while (nvram_types != 0) {
671
if (nvram_types & 1) {
672
rc = siena_mtd_probe_partition(efx, efx_mtd,
673
efx_mtd->n_parts, type);
676
else if (rc != -ENODEV)
683
rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
687
rc = efx_mtd_probe_device(efx, efx_mtd);