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* AMD CS5535/CS5536 GPIO driver.
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* Allows a user space process to play with the GPIO pins.
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* Copyright (c) 2005 Ben Gardner <bgardner@wabtec.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the smems of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/cdev.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <asm/uaccess.h>
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#define NAME "cs5535_gpio"
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MODULE_AUTHOR("Ben Gardner <bgardner@wabtec.com>");
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MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO Pin Driver");
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MODULE_LICENSE("GPL");
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module_param(major, int, 0);
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MODULE_PARM_DESC(major, "Major device number");
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module_param(mask, ulong, 0);
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MODULE_PARM_DESC(mask, "GPIO channel mask");
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#define MSR_LBAR_GPIO 0x5140000C
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static struct pci_device_id divil_pci[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
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MODULE_DEVICE_TABLE(pci, divil_pci);
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static struct cdev cs5535_gpio_cdev;
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/* reserve 32 entries even though some aren't usable */
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#define CS5535_GPIO_COUNT 32
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#define CS5535_GPIO_SIZE 256
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static struct gpio_regmap rm[] =
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{ 0x30, 0x00, '1', '0' }, /* GPIOx_READ_BACK / GPIOx_OUT_VAL */
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{ 0x20, 0x20, 'I', 'i' }, /* GPIOx_IN_EN */
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{ 0x04, 0x04, 'O', 'o' }, /* GPIOx_OUT_EN */
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{ 0x08, 0x08, 't', 'T' }, /* GPIOx_OUT_OD_EN */
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{ 0x18, 0x18, 'P', 'p' }, /* GPIOx_OUT_PU_EN */
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{ 0x1c, 0x1c, 'D', 'd' }, /* GPIOx_OUT_PD_EN */
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* Gets the register offset for the GPIO bank.
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* Low (0-15) starts at 0x00, high (16-31) starts at 0x80
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static inline u32 cs5535_lowhigh_base(int reg)
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return (reg & 0x10) << 3;
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static ssize_t cs5535_gpio_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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u32 m = iminor(file->f_path.dentry->d_inode);
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u32 base = gpio_base + cs5535_lowhigh_base(m);
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* Creates the mask for atomic bit programming.
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* The high 16 bits and the low 16 bits are used to set the mask.
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* For example, GPIO 15 maps to 31,15: 0,1 => On; 1,0=> Off
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for (i = 0; i < len; ++i) {
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if (get_user(c, data+i))
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for (j = 0; j < ARRAY_SIZE(rm); j++) {
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outl(m1, base + rm[j].wr_offset);
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/* If enabling output, turn off AUX 1 and AUX 2 */
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outl(m0, base + 0x10);
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outl(m0, base + 0x14);
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} else if (c == rm[j].off) {
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outl(m0, base + rm[j].wr_offset);
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static ssize_t cs5535_gpio_read(struct file *file, char __user *buf,
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size_t len, loff_t *ppos)
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u32 m = iminor(file->f_path.dentry->d_inode);
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u32 base = gpio_base + cs5535_lowhigh_base(m);
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int rd_bit = 1 << (m & 0x0f);
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if (*ppos >= ARRAY_SIZE(rm))
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for (i = *ppos; (i < (*ppos + len)) && (i < ARRAY_SIZE(rm)); i++) {
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ch = (inl(base + rm[i].rd_offset) & rd_bit) ?
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rm[i].on : rm[i].off;
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if (put_user(ch, buf+count))
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/* add a line-feed if there is room */
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if ((i == ARRAY_SIZE(rm)) && (count < len)) {
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if (put_user('\n', buf + count))
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static int cs5535_gpio_open(struct inode *inode, struct file *file)
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u32 m = iminor(inode);
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/* the mask says which pins are usable by this driver */
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if ((mask & (1 << m)) == 0)
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return nonseekable_open(inode, file);
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static const struct file_operations cs5535_gpio_fops = {
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.owner = THIS_MODULE,
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.write = cs5535_gpio_write,
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.read = cs5535_gpio_read,
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.open = cs5535_gpio_open,
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static int __init cs5535_gpio_init(void)
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if (pci_dev_present(divil_pci) == 0) {
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printk(KERN_WARNING NAME ": DIVIL not found\n");
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/* Grab the GPIO I/O range */
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rdmsr(MSR_LBAR_GPIO, low, hi);
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/* Check the mask and whether GPIO is enabled (sanity check) */
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if (hi != 0x0000f001) {
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printk(KERN_WARNING NAME ": GPIO not enabled\n");
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/* Mask off the IO base address */
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gpio_base = low & 0x0000ff00;
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* 31-29,23 : reserved (always mask out)
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* If a mask was not specified, be conservative and only allow:
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* 1,2,5,6,10-13,24,25,27
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if (!request_region(gpio_base, CS5535_GPIO_SIZE, NAME)) {
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printk(KERN_ERR NAME ": can't allocate I/O for GPIO\n");
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dev_id = MKDEV(major, 0);
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retval = register_chrdev_region(dev_id, CS5535_GPIO_COUNT,
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retval = alloc_chrdev_region(&dev_id, 0, CS5535_GPIO_COUNT,
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major = MAJOR(dev_id);
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release_region(gpio_base, CS5535_GPIO_SIZE);
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printk(KERN_DEBUG NAME ": base=%#x mask=%#lx major=%d\n",
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gpio_base, mask, major);
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cdev_init(&cs5535_gpio_cdev, &cs5535_gpio_fops);
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cdev_add(&cs5535_gpio_cdev, dev_id, CS5535_GPIO_COUNT);
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static void __exit cs5535_gpio_cleanup(void)
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dev_t dev_id = MKDEV(major, 0);
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cdev_del(&cs5535_gpio_cdev);
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unregister_chrdev_region(dev_id, CS5535_GPIO_COUNT);
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release_region(gpio_base, CS5535_GPIO_SIZE);
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module_init(cs5535_gpio_init);
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module_exit(cs5535_gpio_cleanup);