2
* acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3
* and other Tigon based cards.
5
* Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7
* Thanks to Alteon and 3Com for providing hardware and documentation
8
* enabling me to write this driver.
10
* A mailing list for discussing the use of this driver has been
11
* setup, please subscribe to the lists if you have any questions
12
* about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13
* see how to subscribe.
15
* This program is free software; you can redistribute it and/or modify
16
* it under the terms of the GNU General Public License as published by
17
* the Free Software Foundation; either version 2 of the License, or
18
* (at your option) any later version.
21
* Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22
* dump support. The trace dump support has not been
23
* integrated yet however.
24
* Troy Benjegerdes: Big Endian (PPC) patches.
25
* Nate Stahl: Better out of memory handling and stats support.
26
* Aman Singla: Nasty race between interrupt handler and tx code dealing
27
* with 'testing the tx_ret_csm and setting tx_full'
28
* David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29
* infrastructure and Sparc support
30
* Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31
* driver under Linux/Sparc64
32
* Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33
* ETHTOOL_GDRVINFO support
34
* Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35
* handler and close() cleanup.
36
* Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37
* memory mapped IO is enabled to
38
* make the driver work on RS/6000.
39
* Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40
* where the driver would disable
41
* bus master mode if it had to disable
42
* write and invalidate.
43
* Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45
* Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46
* rx producer index when
47
* flushing the Jumbo ring.
48
* Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50
* Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53
#include <linux/module.h>
54
#include <linux/moduleparam.h>
55
#include <linux/types.h>
56
#include <linux/errno.h>
57
#include <linux/ioport.h>
58
#include <linux/pci.h>
59
#include <linux/dma-mapping.h>
60
#include <linux/kernel.h>
61
#include <linux/netdevice.h>
62
#include <linux/etherdevice.h>
63
#include <linux/skbuff.h>
64
#include <linux/init.h>
65
#include <linux/delay.h>
67
#include <linux/highmem.h>
68
#include <linux/sockios.h>
69
#include <linux/firmware.h>
70
#include <linux/slab.h>
71
#include <linux/prefetch.h>
72
#include <linux/if_vlan.h>
75
#include <linux/ethtool.h>
81
#include <asm/system.h>
84
#include <asm/byteorder.h>
85
#include <asm/uaccess.h>
88
#define DRV_NAME "acenic"
92
#ifdef CONFIG_ACENIC_OMIT_TIGON_I
93
#define ACE_IS_TIGON_I(ap) 0
94
#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96
#define ACE_IS_TIGON_I(ap) (ap->version == 1)
97
#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
100
#ifndef PCI_VENDOR_ID_ALTEON
101
#define PCI_VENDOR_ID_ALTEON 0x12ae
103
#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
104
#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
105
#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107
#ifndef PCI_DEVICE_ID_3COM_3C985
108
#define PCI_DEVICE_ID_3COM_3C985 0x0001
110
#ifndef PCI_VENDOR_ID_NETGEAR
111
#define PCI_VENDOR_ID_NETGEAR 0x1385
112
#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114
#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
115
#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
120
* Farallon used the DEC vendor ID by mistake and they seem not
123
#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
124
#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126
#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
127
#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129
#ifndef PCI_VENDOR_ID_SGI
130
#define PCI_VENDOR_ID_SGI 0x10a9
132
#ifndef PCI_DEVICE_ID_SGI_ACENIC
133
#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
136
static DEFINE_PCI_DEVICE_TABLE(acenic_pci_tbl) = {
137
{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
138
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139
{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
140
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141
{ PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
142
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
143
{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
144
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
145
{ PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
146
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
148
* Farallon used the DEC vendor ID on their cards incorrectly,
149
* then later Alteon's ID.
151
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
152
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
153
{ PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
154
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
155
{ PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
156
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
159
MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
161
#define ace_sync_irq(irq) synchronize_irq(irq)
163
#ifndef offset_in_page
164
#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
167
#define ACE_MAX_MOD_PARMS 8
168
#define BOARD_IDX_STATIC 0
169
#define BOARD_IDX_OVERFLOW -1
174
* These must be defined before the firmware is included.
176
#define MAX_TEXT_LEN 96*1024
177
#define MAX_RODATA_LEN 8*1024
178
#define MAX_DATA_LEN 2*1024
180
#ifndef tigon2FwReleaseLocal
181
#define tigon2FwReleaseLocal 0
185
* This driver currently supports Tigon I and Tigon II based cards
186
* including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
187
* GA620. The driver should also work on the SGI, DEC and Farallon
188
* versions of the card, however I have not been able to test that
191
* This card is really neat, it supports receive hardware checksumming
192
* and jumbo frames (up to 9000 bytes) and does a lot of work in the
193
* firmware. Also the programming interface is quite neat, except for
194
* the parts dealing with the i2c eeprom on the card ;-)
196
* Using jumbo frames:
198
* To enable jumbo frames, simply specify an mtu between 1500 and 9000
199
* bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
200
* by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
201
* interface number and <MTU> being the MTU value.
205
* When compiled as a loadable module, the driver allows for a number
206
* of module parameters to be specified. The driver supports the
207
* following module parameters:
209
* trace=<val> - Firmware trace level. This requires special traced
210
* firmware to replace the firmware supplied with
211
* the driver - for debugging purposes only.
213
* link=<val> - Link state. Normally you want to use the default link
214
* parameters set by the driver. This can be used to
215
* override these in case your switch doesn't negotiate
216
* the link properly. Valid values are:
217
* 0x0001 - Force half duplex link.
218
* 0x0002 - Do not negotiate line speed with the other end.
219
* 0x0010 - 10Mbit/sec link.
220
* 0x0020 - 100Mbit/sec link.
221
* 0x0040 - 1000Mbit/sec link.
222
* 0x0100 - Do not negotiate flow control.
223
* 0x0200 - Enable RX flow control Y
224
* 0x0400 - Enable TX flow control Y (Tigon II NICs only).
225
* Default value is 0x0270, ie. enable link+flow
226
* control negotiation. Negotiating the highest
227
* possible link speed with RX flow control enabled.
229
* When disabling link speed negotiation, only one link
230
* speed is allowed to be specified!
232
* tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
233
* to wait for more packets to arive before
234
* interrupting the host, from the time the first
237
* rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
238
* to wait for more packets to arive in the transmit ring,
239
* before interrupting the host, after transmitting the
240
* first packet in the ring.
242
* max_tx_desc=<val> - maximum number of transmit descriptors
243
* (packets) transmitted before interrupting the host.
245
* max_rx_desc=<val> - maximum number of receive descriptors
246
* (packets) received before interrupting the host.
248
* tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
249
* increments of the NIC's on board memory to be used for
250
* transmit and receive buffers. For the 1MB NIC app. 800KB
251
* is available, on the 1/2MB NIC app. 300KB is available.
252
* 68KB will always be available as a minimum for both
253
* directions. The default value is a 50/50 split.
254
* dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
255
* operations, default (1) is to always disable this as
256
* that is what Alteon does on NT. I have not been able
257
* to measure any real performance differences with
258
* this on my systems. Set <val>=0 if you want to
259
* enable these operations.
261
* If you use more than one NIC, specify the parameters for the
262
* individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
263
* run tracing on NIC #2 but not on NIC #1 and #3.
267
* - Proper multicast support.
268
* - NIC dump support.
269
* - More tuning parameters.
271
* The mini ring is not used under Linux and I am not sure it makes sense
272
* to actually use it.
274
* New interrupt handler strategy:
276
* The old interrupt handler worked using the traditional method of
277
* replacing an skbuff with a new one when a packet arrives. However
278
* the rx rings do not need to contain a static number of buffer
279
* descriptors, thus it makes sense to move the memory allocation out
280
* of the main interrupt handler and do it in a bottom half handler
281
* and only allocate new buffers when the number of buffers in the
282
* ring is below a certain threshold. In order to avoid starving the
283
* NIC under heavy load it is however necessary to force allocation
284
* when hitting a minimum threshold. The strategy for alloction is as
287
* RX_LOW_BUF_THRES - allocate buffers in the bottom half
288
* RX_PANIC_LOW_THRES - we are very low on buffers, allocate
289
* the buffers in the interrupt handler
290
* RX_RING_THRES - maximum number of buffers in the rx ring
291
* RX_MINI_THRES - maximum number of buffers in the mini ring
292
* RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
294
* One advantagous side effect of this allocation approach is that the
295
* entire rx processing can be done without holding any spin lock
296
* since the rx rings and registers are totally independent of the tx
297
* ring and its registers. This of course includes the kmalloc's of
298
* new skb's. Thus start_xmit can run in parallel with rx processing
299
* and the memory allocation on SMP systems.
301
* Note that running the skb reallocation in a bottom half opens up
302
* another can of races which needs to be handled properly. In
303
* particular it can happen that the interrupt handler tries to run
304
* the reallocation while the bottom half is either running on another
305
* CPU or was interrupted on the same CPU. To get around this the
306
* driver uses bitops to prevent the reallocation routines from being
309
* TX handling can also be done without holding any spin lock, wheee
310
* this is fun! since tx_ret_csm is only written to by the interrupt
311
* handler. The case to be aware of is when shutting down the device
312
* and cleaning up where it is necessary to make sure that
313
* start_xmit() is not running while this is happening. Well DaveM
314
* informs me that this case is already protected against ... bye bye
315
* Mr. Spin Lock, it was nice to know you.
317
* TX interrupts are now partly disabled so the NIC will only generate
318
* TX interrupts for the number of coal ticks, not for the number of
319
* TX packets in the queue. This should reduce the number of TX only,
320
* ie. when no RX processing is done, interrupts seen.
324
* Threshold values for RX buffer allocation - the low water marks for
325
* when to start refilling the rings are set to 75% of the ring
326
* sizes. It seems to make sense to refill the rings entirely from the
327
* intrrupt handler once it gets below the panic threshold, that way
328
* we don't risk that the refilling is moved to another CPU when the
329
* one running the interrupt handler just got the slab code hot in its
332
#define RX_RING_SIZE 72
333
#define RX_MINI_SIZE 64
334
#define RX_JUMBO_SIZE 48
336
#define RX_PANIC_STD_THRES 16
337
#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
338
#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
339
#define RX_PANIC_MINI_THRES 12
340
#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
341
#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
342
#define RX_PANIC_JUMBO_THRES 6
343
#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
344
#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
348
* Size of the mini ring entries, basically these just should be big
349
* enough to take TCP ACKs
351
#define ACE_MINI_SIZE 100
353
#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
354
#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
355
#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
358
* There seems to be a magic difference in the effect between 995 and 996
359
* but little difference between 900 and 995 ... no idea why.
361
* There is now a default set of tuning parameters which is set, depending
362
* on whether or not the user enables Jumbo frames. It's assumed that if
363
* Jumbo frames are enabled, the user wants optimal tuning for that case.
365
#define DEF_TX_COAL 400 /* 996 */
366
#define DEF_TX_MAX_DESC 60 /* was 40 */
367
#define DEF_RX_COAL 120 /* 1000 */
368
#define DEF_RX_MAX_DESC 25
369
#define DEF_TX_RATIO 21 /* 24 */
371
#define DEF_JUMBO_TX_COAL 20
372
#define DEF_JUMBO_TX_MAX_DESC 60
373
#define DEF_JUMBO_RX_COAL 30
374
#define DEF_JUMBO_RX_MAX_DESC 6
375
#define DEF_JUMBO_TX_RATIO 21
377
#if tigon2FwReleaseLocal < 20001118
379
* Standard firmware and early modifications duplicate
380
* IRQ load without this flag (coal timer is never reset).
381
* Note that with this flag tx_coal should be less than
382
* time to xmit full tx ring.
383
* 400usec is not so bad for tx ring size of 128.
385
#define TX_COAL_INTS_ONLY 1 /* worth it */
388
* With modified firmware, this is not necessary, but still useful.
390
#define TX_COAL_INTS_ONLY 1
394
#define DEF_STAT (2 * TICKS_PER_SEC)
397
static int link_state[ACE_MAX_MOD_PARMS];
398
static int trace[ACE_MAX_MOD_PARMS];
399
static int tx_coal_tick[ACE_MAX_MOD_PARMS];
400
static int rx_coal_tick[ACE_MAX_MOD_PARMS];
401
static int max_tx_desc[ACE_MAX_MOD_PARMS];
402
static int max_rx_desc[ACE_MAX_MOD_PARMS];
403
static int tx_ratio[ACE_MAX_MOD_PARMS];
404
static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
406
MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
407
MODULE_LICENSE("GPL");
408
MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
409
#ifndef CONFIG_ACENIC_OMIT_TIGON_I
410
MODULE_FIRMWARE("acenic/tg1.bin");
412
MODULE_FIRMWARE("acenic/tg2.bin");
414
module_param_array_named(link, link_state, int, NULL, 0);
415
module_param_array(trace, int, NULL, 0);
416
module_param_array(tx_coal_tick, int, NULL, 0);
417
module_param_array(max_tx_desc, int, NULL, 0);
418
module_param_array(rx_coal_tick, int, NULL, 0);
419
module_param_array(max_rx_desc, int, NULL, 0);
420
module_param_array(tx_ratio, int, NULL, 0);
421
MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
422
MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
423
MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
424
MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
425
MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
426
MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
427
MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
430
static const char version[] __devinitconst =
431
"acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
432
" http://home.cern.ch/~jes/gige/acenic.html\n";
434
static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
435
static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
436
static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
438
static const struct ethtool_ops ace_ethtool_ops = {
439
.get_settings = ace_get_settings,
440
.set_settings = ace_set_settings,
441
.get_drvinfo = ace_get_drvinfo,
444
static void ace_watchdog(struct net_device *dev);
446
static const struct net_device_ops ace_netdev_ops = {
447
.ndo_open = ace_open,
448
.ndo_stop = ace_close,
449
.ndo_tx_timeout = ace_watchdog,
450
.ndo_get_stats = ace_get_stats,
451
.ndo_start_xmit = ace_start_xmit,
452
.ndo_set_rx_mode = ace_set_multicast_list,
453
.ndo_validate_addr = eth_validate_addr,
454
.ndo_set_mac_address = ace_set_mac_addr,
455
.ndo_change_mtu = ace_change_mtu,
458
static int __devinit acenic_probe_one(struct pci_dev *pdev,
459
const struct pci_device_id *id)
461
struct net_device *dev;
462
struct ace_private *ap;
463
static int boards_found;
465
dev = alloc_etherdev(sizeof(struct ace_private));
467
printk(KERN_ERR "acenic: Unable to allocate "
468
"net_device structure!\n");
472
SET_NETDEV_DEV(dev, &pdev->dev);
474
ap = netdev_priv(dev);
476
ap->name = pci_name(pdev);
478
dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
479
dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
481
dev->watchdog_timeo = 5*HZ;
483
dev->netdev_ops = &ace_netdev_ops;
484
SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
486
/* we only display this string ONCE */
490
if (pci_enable_device(pdev))
491
goto fail_free_netdev;
494
* Enable master mode before we start playing with the
495
* pci_command word since pci_set_master() will modify
498
pci_set_master(pdev);
500
pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
502
/* OpenFirmware on Mac's does not set this - DOH.. */
503
if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
504
printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
505
"access - was not enabled by BIOS/Firmware\n",
507
ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
508
pci_write_config_word(ap->pdev, PCI_COMMAND,
513
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
514
if (ap->pci_latency <= 0x40) {
515
ap->pci_latency = 0x40;
516
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
520
* Remap the regs into kernel space - this is abuse of
521
* dev->base_addr since it was means for I/O port
522
* addresses but who gives a damn.
524
dev->base_addr = pci_resource_start(pdev, 0);
525
ap->regs = ioremap(dev->base_addr, 0x4000);
527
printk(KERN_ERR "%s: Unable to map I/O register, "
528
"AceNIC %i will be disabled.\n",
529
ap->name, boards_found);
530
goto fail_free_netdev;
533
switch(pdev->vendor) {
534
case PCI_VENDOR_ID_ALTEON:
535
if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
536
printk(KERN_INFO "%s: Farallon PN9100-T ",
539
printk(KERN_INFO "%s: Alteon AceNIC ",
543
case PCI_VENDOR_ID_3COM:
544
printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
546
case PCI_VENDOR_ID_NETGEAR:
547
printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
549
case PCI_VENDOR_ID_DEC:
550
if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
551
printk(KERN_INFO "%s: Farallon PN9000-SX ",
555
case PCI_VENDOR_ID_SGI:
556
printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
559
printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
563
printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
564
printk("irq %d\n", pdev->irq);
566
#ifdef CONFIG_ACENIC_OMIT_TIGON_I
567
if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
568
printk(KERN_ERR "%s: Driver compiled without Tigon I"
569
" support - NIC disabled\n", dev->name);
574
if (ace_allocate_descriptors(dev))
575
goto fail_free_netdev;
578
if (boards_found >= ACE_MAX_MOD_PARMS)
579
ap->board_idx = BOARD_IDX_OVERFLOW;
581
ap->board_idx = boards_found;
583
ap->board_idx = BOARD_IDX_STATIC;
587
goto fail_free_netdev;
589
if (register_netdev(dev)) {
590
printk(KERN_ERR "acenic: device registration failed\n");
593
ap->name = dev->name;
595
if (ap->pci_using_dac)
596
dev->features |= NETIF_F_HIGHDMA;
598
pci_set_drvdata(pdev, dev);
604
ace_init_cleanup(dev);
610
static void __devexit acenic_remove_one(struct pci_dev *pdev)
612
struct net_device *dev = pci_get_drvdata(pdev);
613
struct ace_private *ap = netdev_priv(dev);
614
struct ace_regs __iomem *regs = ap->regs;
617
unregister_netdev(dev);
619
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
620
if (ap->version >= 2)
621
writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
624
* This clears any pending interrupts
626
writel(1, ®s->Mb0Lo);
627
readl(®s->CpuCtrl); /* flush */
630
* Make sure no other CPUs are processing interrupts
631
* on the card before the buffers are being released.
632
* Otherwise one might experience some `interesting'
635
* Then release the RX buffers - jumbo buffers were
636
* already released in ace_close().
638
ace_sync_irq(dev->irq);
640
for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
641
struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
644
struct ring_info *ringp;
647
ringp = &ap->skb->rx_std_skbuff[i];
648
mapping = dma_unmap_addr(ringp, mapping);
649
pci_unmap_page(ap->pdev, mapping,
653
ap->rx_std_ring[i].size = 0;
654
ap->skb->rx_std_skbuff[i].skb = NULL;
659
if (ap->version >= 2) {
660
for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
661
struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
664
struct ring_info *ringp;
667
ringp = &ap->skb->rx_mini_skbuff[i];
668
mapping = dma_unmap_addr(ringp,mapping);
669
pci_unmap_page(ap->pdev, mapping,
673
ap->rx_mini_ring[i].size = 0;
674
ap->skb->rx_mini_skbuff[i].skb = NULL;
680
for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
681
struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
683
struct ring_info *ringp;
686
ringp = &ap->skb->rx_jumbo_skbuff[i];
687
mapping = dma_unmap_addr(ringp, mapping);
688
pci_unmap_page(ap->pdev, mapping,
692
ap->rx_jumbo_ring[i].size = 0;
693
ap->skb->rx_jumbo_skbuff[i].skb = NULL;
698
ace_init_cleanup(dev);
702
static struct pci_driver acenic_pci_driver = {
704
.id_table = acenic_pci_tbl,
705
.probe = acenic_probe_one,
706
.remove = __devexit_p(acenic_remove_one),
709
static int __init acenic_init(void)
711
return pci_register_driver(&acenic_pci_driver);
714
static void __exit acenic_exit(void)
716
pci_unregister_driver(&acenic_pci_driver);
719
module_init(acenic_init);
720
module_exit(acenic_exit);
722
static void ace_free_descriptors(struct net_device *dev)
724
struct ace_private *ap = netdev_priv(dev);
727
if (ap->rx_std_ring != NULL) {
728
size = (sizeof(struct rx_desc) *
729
(RX_STD_RING_ENTRIES +
730
RX_JUMBO_RING_ENTRIES +
731
RX_MINI_RING_ENTRIES +
732
RX_RETURN_RING_ENTRIES));
733
pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
734
ap->rx_ring_base_dma);
735
ap->rx_std_ring = NULL;
736
ap->rx_jumbo_ring = NULL;
737
ap->rx_mini_ring = NULL;
738
ap->rx_return_ring = NULL;
740
if (ap->evt_ring != NULL) {
741
size = (sizeof(struct event) * EVT_RING_ENTRIES);
742
pci_free_consistent(ap->pdev, size, ap->evt_ring,
746
if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
747
size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
748
pci_free_consistent(ap->pdev, size, ap->tx_ring,
753
if (ap->evt_prd != NULL) {
754
pci_free_consistent(ap->pdev, sizeof(u32),
755
(void *)ap->evt_prd, ap->evt_prd_dma);
758
if (ap->rx_ret_prd != NULL) {
759
pci_free_consistent(ap->pdev, sizeof(u32),
760
(void *)ap->rx_ret_prd,
762
ap->rx_ret_prd = NULL;
764
if (ap->tx_csm != NULL) {
765
pci_free_consistent(ap->pdev, sizeof(u32),
766
(void *)ap->tx_csm, ap->tx_csm_dma);
772
static int ace_allocate_descriptors(struct net_device *dev)
774
struct ace_private *ap = netdev_priv(dev);
777
size = (sizeof(struct rx_desc) *
778
(RX_STD_RING_ENTRIES +
779
RX_JUMBO_RING_ENTRIES +
780
RX_MINI_RING_ENTRIES +
781
RX_RETURN_RING_ENTRIES));
783
ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
784
&ap->rx_ring_base_dma);
785
if (ap->rx_std_ring == NULL)
788
ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
789
ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
790
ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
792
size = (sizeof(struct event) * EVT_RING_ENTRIES);
794
ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
796
if (ap->evt_ring == NULL)
800
* Only allocate a host TX ring for the Tigon II, the Tigon I
801
* has to use PCI registers for this ;-(
803
if (!ACE_IS_TIGON_I(ap)) {
804
size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
806
ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
809
if (ap->tx_ring == NULL)
813
ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
815
if (ap->evt_prd == NULL)
818
ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
819
&ap->rx_ret_prd_dma);
820
if (ap->rx_ret_prd == NULL)
823
ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
825
if (ap->tx_csm == NULL)
832
ace_init_cleanup(dev);
838
* Generic cleanup handling data allocated during init. Used when the
839
* module is unloaded or if an error occurs during initialization
841
static void ace_init_cleanup(struct net_device *dev)
843
struct ace_private *ap;
845
ap = netdev_priv(dev);
847
ace_free_descriptors(dev);
850
pci_free_consistent(ap->pdev, sizeof(struct ace_info),
851
ap->info, ap->info_dma);
853
kfree(ap->trace_buf);
856
free_irq(dev->irq, dev);
863
* Commands are considered to be slow.
865
static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
869
idx = readl(®s->CmdPrd);
871
writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
872
idx = (idx + 1) % CMD_RING_ENTRIES;
874
writel(idx, ®s->CmdPrd);
878
static int __devinit ace_init(struct net_device *dev)
880
struct ace_private *ap;
881
struct ace_regs __iomem *regs;
882
struct ace_info *info = NULL;
883
struct pci_dev *pdev;
886
u32 tig_ver, mac1, mac2, tmp, pci_state;
887
int board_idx, ecode = 0;
889
unsigned char cache_size;
891
ap = netdev_priv(dev);
894
board_idx = ap->board_idx;
897
* aman@sgi.com - its useful to do a NIC reset here to
898
* address the `Firmware not running' problem subsequent
899
* to any crashes involving the NIC
901
writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
902
readl(®s->HostCtrl); /* PCI write posting */
906
* Don't access any other registers before this point!
910
* This will most likely need BYTE_SWAP once we switch
911
* to using __raw_writel()
913
writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
916
writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
919
readl(®s->HostCtrl); /* PCI write posting */
922
* Stop the NIC CPU and clear pending interrupts
924
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
925
readl(®s->CpuCtrl); /* PCI write posting */
926
writel(0, ®s->Mb0Lo);
928
tig_ver = readl(®s->HostCtrl) >> 28;
931
#ifndef CONFIG_ACENIC_OMIT_TIGON_I
934
printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
935
tig_ver, ap->firmware_major, ap->firmware_minor,
937
writel(0, ®s->LocalCtrl);
939
ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
943
printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
944
tig_ver, ap->firmware_major, ap->firmware_minor,
946
writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
947
readl(®s->CpuBCtrl); /* PCI write posting */
949
* The SRAM bank size does _not_ indicate the amount
950
* of memory on the card, it controls the _bank_ size!
951
* Ie. a 1MB AceNIC will have two banks of 512KB.
953
writel(SRAM_BANK_512K, ®s->LocalCtrl);
954
writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
956
ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
959
printk(KERN_WARNING " Unsupported Tigon version detected "
966
* ModeStat _must_ be set after the SRAM settings as this change
967
* seems to corrupt the ModeStat and possible other registers.
968
* The SRAM settings survive resets and setting it to the same
969
* value a second time works as well. This is what caused the
970
* `Firmware not running' problem on the Tigon II.
973
writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
974
ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
976
writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
977
ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
979
readl(®s->ModeStat); /* PCI write posting */
982
for(i = 0; i < 4; i++) {
986
t = read_eeprom_byte(dev, 0x8c+i);
994
for(i = 4; i < 8; i++) {
998
t = read_eeprom_byte(dev, 0x8c+i);
1006
writel(mac1, ®s->MacAddrHi);
1007
writel(mac2, ®s->MacAddrLo);
1009
dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1010
dev->dev_addr[1] = mac1 & 0xff;
1011
dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1012
dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1013
dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1014
dev->dev_addr[5] = mac2 & 0xff;
1016
printk("MAC: %pM\n", dev->dev_addr);
1019
* Looks like this is necessary to deal with on all architectures,
1020
* even this %$#%$# N440BX Intel based thing doesn't get it right.
1021
* Ie. having two NICs in the machine, one will have the cache
1022
* line set at boot time, the other will not.
1025
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1027
if (cache_size != SMP_CACHE_BYTES) {
1028
printk(KERN_INFO " PCI cache line size set incorrectly "
1029
"(%i bytes) by BIOS/FW, ", cache_size);
1030
if (cache_size > SMP_CACHE_BYTES)
1031
printk("expecting %i\n", SMP_CACHE_BYTES);
1033
printk("correcting to %i\n", SMP_CACHE_BYTES);
1034
pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1035
SMP_CACHE_BYTES >> 2);
1039
pci_state = readl(®s->PciState);
1040
printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1041
"latency: %i clks\n",
1042
(pci_state & PCI_32BIT) ? 32 : 64,
1043
(pci_state & PCI_66MHZ) ? 66 : 33,
1047
* Set the max DMA transfer size. Seems that for most systems
1048
* the performance is better when no MAX parameter is
1049
* set. However for systems enabling PCI write and invalidate,
1050
* DMA writes must be set to the L1 cache line size to get
1051
* optimal performance.
1053
* The default is now to turn the PCI write and invalidate off
1054
* - that is what Alteon does for NT.
1056
tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1057
if (ap->version >= 2) {
1058
tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1060
* Tuning parameters only supported for 8 cards
1062
if (board_idx == BOARD_IDX_OVERFLOW ||
1063
dis_pci_mem_inval[board_idx]) {
1064
if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1065
ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1066
pci_write_config_word(pdev, PCI_COMMAND,
1068
printk(KERN_INFO " Disabling PCI memory "
1069
"write and invalidate\n");
1071
} else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1072
printk(KERN_INFO " PCI memory write & invalidate "
1073
"enabled by BIOS, enabling counter measures\n");
1075
switch(SMP_CACHE_BYTES) {
1077
tmp |= DMA_WRITE_MAX_16;
1080
tmp |= DMA_WRITE_MAX_32;
1083
tmp |= DMA_WRITE_MAX_64;
1086
tmp |= DMA_WRITE_MAX_128;
1089
printk(KERN_INFO " Cache line size %i not "
1090
"supported, PCI write and invalidate "
1091
"disabled\n", SMP_CACHE_BYTES);
1092
ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1093
pci_write_config_word(pdev, PCI_COMMAND,
1101
* On this platform, we know what the best dma settings
1102
* are. We use 64-byte maximum bursts, because if we
1103
* burst larger than the cache line size (or even cross
1104
* a 64byte boundary in a single burst) the UltraSparc
1105
* PCI controller will disconnect at 64-byte multiples.
1107
* Read-multiple will be properly enabled above, and when
1108
* set will give the PCI controller proper hints about
1111
tmp &= ~DMA_READ_WRITE_MASK;
1112
tmp |= DMA_READ_MAX_64;
1113
tmp |= DMA_WRITE_MAX_64;
1116
tmp &= ~DMA_READ_WRITE_MASK;
1117
tmp |= DMA_READ_MAX_128;
1119
* All the docs say MUST NOT. Well, I did.
1120
* Nothing terrible happens, if we load wrong size.
1121
* Bit w&i still works better!
1123
tmp |= DMA_WRITE_MAX_128;
1125
writel(tmp, ®s->PciState);
1129
* The Host PCI bus controller driver has to set FBB.
1130
* If all devices on that PCI bus support FBB, then the controller
1131
* can enable FBB support in the Host PCI Bus controller (or on
1132
* the PCI-PCI bridge if that applies).
1136
* I have received reports from people having problems when this
1139
if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1140
printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1141
ap->pci_command |= PCI_COMMAND_FAST_BACK;
1142
pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1147
* Configure DMA attributes.
1149
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
1150
ap->pci_using_dac = 1;
1151
} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1152
ap->pci_using_dac = 0;
1159
* Initialize the generic info block and the command+event rings
1160
* and the control blocks for the transmit and receive rings
1161
* as they need to be setup once and for all.
1163
if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1171
* Get the memory for the skb rings.
1173
if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1178
ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1181
printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1182
DRV_NAME, pdev->irq);
1185
dev->irq = pdev->irq;
1188
spin_lock_init(&ap->debug_lock);
1189
ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1190
ap->last_std_rx = 0;
1191
ap->last_mini_rx = 0;
1194
memset(ap->info, 0, sizeof(struct ace_info));
1195
memset(ap->skb, 0, sizeof(struct ace_skb));
1197
ecode = ace_load_firmware(dev);
1203
tmp_ptr = ap->info_dma;
1204
writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1205
writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1207
memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1209
set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1210
info->evt_ctrl.flags = 0;
1214
set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1215
writel(0, ®s->EvtCsm);
1217
set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1218
info->cmd_ctrl.flags = 0;
1219
info->cmd_ctrl.max_len = 0;
1221
for (i = 0; i < CMD_RING_ENTRIES; i++)
1222
writel(0, ®s->CmdRng[i]);
1224
writel(0, ®s->CmdPrd);
1225
writel(0, ®s->CmdCsm);
1227
tmp_ptr = ap->info_dma;
1228
tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1229
set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1231
set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1232
info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1233
info->rx_std_ctrl.flags =
1234
RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1236
memset(ap->rx_std_ring, 0,
1237
RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1239
for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1240
ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1242
ap->rx_std_skbprd = 0;
1243
atomic_set(&ap->cur_rx_bufs, 0);
1245
set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1246
(ap->rx_ring_base_dma +
1247
(sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1248
info->rx_jumbo_ctrl.max_len = 0;
1249
info->rx_jumbo_ctrl.flags =
1250
RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1252
memset(ap->rx_jumbo_ring, 0,
1253
RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1255
for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1256
ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1258
ap->rx_jumbo_skbprd = 0;
1259
atomic_set(&ap->cur_jumbo_bufs, 0);
1261
memset(ap->rx_mini_ring, 0,
1262
RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1264
if (ap->version >= 2) {
1265
set_aceaddr(&info->rx_mini_ctrl.rngptr,
1266
(ap->rx_ring_base_dma +
1267
(sizeof(struct rx_desc) *
1268
(RX_STD_RING_ENTRIES +
1269
RX_JUMBO_RING_ENTRIES))));
1270
info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1271
info->rx_mini_ctrl.flags =
1272
RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST;
1274
for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1275
ap->rx_mini_ring[i].flags =
1276
BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1278
set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1279
info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1280
info->rx_mini_ctrl.max_len = 0;
1283
ap->rx_mini_skbprd = 0;
1284
atomic_set(&ap->cur_mini_bufs, 0);
1286
set_aceaddr(&info->rx_return_ctrl.rngptr,
1287
(ap->rx_ring_base_dma +
1288
(sizeof(struct rx_desc) *
1289
(RX_STD_RING_ENTRIES +
1290
RX_JUMBO_RING_ENTRIES +
1291
RX_MINI_RING_ENTRIES))));
1292
info->rx_return_ctrl.flags = 0;
1293
info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1295
memset(ap->rx_return_ring, 0,
1296
RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1298
set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1299
*(ap->rx_ret_prd) = 0;
1301
writel(TX_RING_BASE, ®s->WinBase);
1303
if (ACE_IS_TIGON_I(ap)) {
1304
ap->tx_ring = (__force struct tx_desc *) regs->Window;
1305
for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1306
* sizeof(struct tx_desc)) / sizeof(u32); i++)
1307
writel(0, (__force void __iomem *)ap->tx_ring + i * 4);
1309
set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1311
memset(ap->tx_ring, 0,
1312
MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1314
set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1317
info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1318
tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1321
* The Tigon I does not like having the TX ring in host memory ;-(
1323
if (!ACE_IS_TIGON_I(ap))
1324
tmp |= RCB_FLG_TX_HOST_RING;
1325
#if TX_COAL_INTS_ONLY
1326
tmp |= RCB_FLG_COAL_INT_ONLY;
1328
info->tx_ctrl.flags = tmp;
1330
set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1333
* Potential item for tuning parameter
1336
writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1337
writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1339
writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1340
writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1343
writel(0, ®s->MaskInt);
1344
writel(1, ®s->IfIdx);
1347
* McKinley boxes do not like us fiddling with AssistState
1350
writel(1, ®s->AssistState);
1353
writel(DEF_STAT, ®s->TuneStatTicks);
1354
writel(DEF_TRACE, ®s->TuneTrace);
1356
ace_set_rxtx_parms(dev, 0);
1358
if (board_idx == BOARD_IDX_OVERFLOW) {
1359
printk(KERN_WARNING "%s: more than %i NICs detected, "
1360
"ignoring module parameters!\n",
1361
ap->name, ACE_MAX_MOD_PARMS);
1362
} else if (board_idx >= 0) {
1363
if (tx_coal_tick[board_idx])
1364
writel(tx_coal_tick[board_idx],
1365
®s->TuneTxCoalTicks);
1366
if (max_tx_desc[board_idx])
1367
writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1369
if (rx_coal_tick[board_idx])
1370
writel(rx_coal_tick[board_idx],
1371
®s->TuneRxCoalTicks);
1372
if (max_rx_desc[board_idx])
1373
writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1375
if (trace[board_idx])
1376
writel(trace[board_idx], ®s->TuneTrace);
1378
if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1379
writel(tx_ratio[board_idx], ®s->TxBufRat);
1383
* Default link parameters
1385
tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1386
LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1387
if(ap->version >= 2)
1388
tmp |= LNK_TX_FLOW_CTL_Y;
1391
* Override link default parameters
1393
if ((board_idx >= 0) && link_state[board_idx]) {
1394
int option = link_state[board_idx];
1398
if (option & 0x01) {
1399
printk(KERN_INFO "%s: Setting half duplex link\n",
1401
tmp &= ~LNK_FULL_DUPLEX;
1404
tmp &= ~LNK_NEGOTIATE;
1411
if ((option & 0x70) == 0) {
1412
printk(KERN_WARNING "%s: No media speed specified, "
1413
"forcing auto negotiation\n", ap->name);
1414
tmp |= LNK_NEGOTIATE | LNK_1000MB |
1415
LNK_100MB | LNK_10MB;
1417
if ((option & 0x100) == 0)
1418
tmp |= LNK_NEG_FCTL;
1420
printk(KERN_INFO "%s: Disabling flow control "
1421
"negotiation\n", ap->name);
1423
tmp |= LNK_RX_FLOW_CTL_Y;
1424
if ((option & 0x400) && (ap->version >= 2)) {
1425
printk(KERN_INFO "%s: Enabling TX flow control\n",
1427
tmp |= LNK_TX_FLOW_CTL_Y;
1432
writel(tmp, ®s->TuneLink);
1433
if (ap->version >= 2)
1434
writel(tmp, ®s->TuneFastLink);
1436
writel(ap->firmware_start, ®s->Pc);
1438
writel(0, ®s->Mb0Lo);
1441
* Set tx_csm before we start receiving interrupts, otherwise
1442
* the interrupt handler might think it is supposed to process
1443
* tx ints before we are up and running, which may cause a null
1444
* pointer access in the int handler.
1447
ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1450
ace_set_txprd(regs, ap, 0);
1451
writel(0, ®s->RxRetCsm);
1454
* Enable DMA engine now.
1455
* If we do this sooner, Mckinley box pukes.
1456
* I assume it's because Tigon II DMA engine wants to check
1457
* *something* even before the CPU is started.
1459
writel(1, ®s->AssistState); /* enable DMA */
1464
writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1465
readl(®s->CpuCtrl);
1468
* Wait for the firmware to spin up - max 3 seconds.
1470
myjif = jiffies + 3 * HZ;
1471
while (time_before(jiffies, myjif) && !ap->fw_running)
1474
if (!ap->fw_running) {
1475
printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1478
writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1479
readl(®s->CpuCtrl);
1481
/* aman@sgi.com - account for badly behaving firmware/NIC:
1482
* - have observed that the NIC may continue to generate
1483
* interrupts for some reason; attempt to stop it - halt
1484
* second CPU for Tigon II cards, and also clear Mb0
1485
* - if we're a module, we'll fail to load if this was
1486
* the only GbE card in the system => if the kernel does
1487
* see an interrupt from the NIC, code to handle it is
1488
* gone and OOps! - so free_irq also
1490
if (ap->version >= 2)
1491
writel(readl(®s->CpuBCtrl) | CPU_HALT,
1493
writel(0, ®s->Mb0Lo);
1494
readl(®s->Mb0Lo);
1501
* We load the ring here as there seem to be no way to tell the
1502
* firmware to wipe the ring without re-initializing it.
1504
if (!test_and_set_bit(0, &ap->std_refill_busy))
1505
ace_load_std_rx_ring(dev, RX_RING_SIZE);
1507
printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1509
if (ap->version >= 2) {
1510
if (!test_and_set_bit(0, &ap->mini_refill_busy))
1511
ace_load_mini_rx_ring(dev, RX_MINI_SIZE);
1513
printk(KERN_ERR "%s: Someone is busy refilling "
1514
"the RX mini ring\n", ap->name);
1519
ace_init_cleanup(dev);
1524
static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1526
struct ace_private *ap = netdev_priv(dev);
1527
struct ace_regs __iomem *regs = ap->regs;
1528
int board_idx = ap->board_idx;
1530
if (board_idx >= 0) {
1532
if (!tx_coal_tick[board_idx])
1533
writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1534
if (!max_tx_desc[board_idx])
1535
writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1536
if (!rx_coal_tick[board_idx])
1537
writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1538
if (!max_rx_desc[board_idx])
1539
writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1540
if (!tx_ratio[board_idx])
1541
writel(DEF_TX_RATIO, ®s->TxBufRat);
1543
if (!tx_coal_tick[board_idx])
1544
writel(DEF_JUMBO_TX_COAL,
1545
®s->TuneTxCoalTicks);
1546
if (!max_tx_desc[board_idx])
1547
writel(DEF_JUMBO_TX_MAX_DESC,
1548
®s->TuneMaxTxDesc);
1549
if (!rx_coal_tick[board_idx])
1550
writel(DEF_JUMBO_RX_COAL,
1551
®s->TuneRxCoalTicks);
1552
if (!max_rx_desc[board_idx])
1553
writel(DEF_JUMBO_RX_MAX_DESC,
1554
®s->TuneMaxRxDesc);
1555
if (!tx_ratio[board_idx])
1556
writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1562
static void ace_watchdog(struct net_device *data)
1564
struct net_device *dev = data;
1565
struct ace_private *ap = netdev_priv(dev);
1566
struct ace_regs __iomem *regs = ap->regs;
1569
* We haven't received a stats update event for more than 2.5
1570
* seconds and there is data in the transmit queue, thus we
1571
* assume the card is stuck.
1573
if (*ap->tx_csm != ap->tx_ret_csm) {
1574
printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1575
dev->name, (unsigned int)readl(®s->HostCtrl));
1576
/* This can happen due to ieee flow control. */
1578
printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1581
netif_wake_queue(dev);
1587
static void ace_tasklet(unsigned long arg)
1589
struct net_device *dev = (struct net_device *) arg;
1590
struct ace_private *ap = netdev_priv(dev);
1593
cur_size = atomic_read(&ap->cur_rx_bufs);
1594
if ((cur_size < RX_LOW_STD_THRES) &&
1595
!test_and_set_bit(0, &ap->std_refill_busy)) {
1597
printk("refilling buffers (current %i)\n", cur_size);
1599
ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size);
1602
if (ap->version >= 2) {
1603
cur_size = atomic_read(&ap->cur_mini_bufs);
1604
if ((cur_size < RX_LOW_MINI_THRES) &&
1605
!test_and_set_bit(0, &ap->mini_refill_busy)) {
1607
printk("refilling mini buffers (current %i)\n",
1610
ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size);
1614
cur_size = atomic_read(&ap->cur_jumbo_bufs);
1615
if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1616
!test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1618
printk("refilling jumbo buffers (current %i)\n", cur_size);
1620
ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);
1622
ap->tasklet_pending = 0;
1627
* Copy the contents of the NIC's trace buffer to kernel memory.
1629
static void ace_dump_trace(struct ace_private *ap)
1633
if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1640
* Load the standard rx ring.
1642
* Loading rings is safe without holding the spin lock since this is
1643
* done only before the device is enabled, thus no interrupts are
1644
* generated and by the interrupt handler/tasklet handler.
1646
static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)
1648
struct ace_private *ap = netdev_priv(dev);
1649
struct ace_regs __iomem *regs = ap->regs;
1653
prefetchw(&ap->cur_rx_bufs);
1655
idx = ap->rx_std_skbprd;
1657
for (i = 0; i < nr_bufs; i++) {
1658
struct sk_buff *skb;
1662
skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE);
1666
mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1667
offset_in_page(skb->data),
1669
PCI_DMA_FROMDEVICE);
1670
ap->skb->rx_std_skbuff[idx].skb = skb;
1671
dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1674
rd = &ap->rx_std_ring[idx];
1675
set_aceaddr(&rd->addr, mapping);
1676
rd->size = ACE_STD_BUFSIZE;
1678
idx = (idx + 1) % RX_STD_RING_ENTRIES;
1684
atomic_add(i, &ap->cur_rx_bufs);
1685
ap->rx_std_skbprd = idx;
1687
if (ACE_IS_TIGON_I(ap)) {
1689
cmd.evt = C_SET_RX_PRD_IDX;
1691
cmd.idx = ap->rx_std_skbprd;
1692
ace_issue_cmd(regs, &cmd);
1694
writel(idx, ®s->RxStdPrd);
1699
clear_bit(0, &ap->std_refill_busy);
1703
printk(KERN_INFO "Out of memory when allocating "
1704
"standard receive buffers\n");
1709
static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)
1711
struct ace_private *ap = netdev_priv(dev);
1712
struct ace_regs __iomem *regs = ap->regs;
1715
prefetchw(&ap->cur_mini_bufs);
1717
idx = ap->rx_mini_skbprd;
1718
for (i = 0; i < nr_bufs; i++) {
1719
struct sk_buff *skb;
1723
skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE);
1727
mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1728
offset_in_page(skb->data),
1730
PCI_DMA_FROMDEVICE);
1731
ap->skb->rx_mini_skbuff[idx].skb = skb;
1732
dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1735
rd = &ap->rx_mini_ring[idx];
1736
set_aceaddr(&rd->addr, mapping);
1737
rd->size = ACE_MINI_BUFSIZE;
1739
idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1745
atomic_add(i, &ap->cur_mini_bufs);
1747
ap->rx_mini_skbprd = idx;
1749
writel(idx, ®s->RxMiniPrd);
1753
clear_bit(0, &ap->mini_refill_busy);
1756
printk(KERN_INFO "Out of memory when allocating "
1757
"mini receive buffers\n");
1763
* Load the jumbo rx ring, this may happen at any time if the MTU
1764
* is changed to a value > 1500.
1766
static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)
1768
struct ace_private *ap = netdev_priv(dev);
1769
struct ace_regs __iomem *regs = ap->regs;
1772
idx = ap->rx_jumbo_skbprd;
1774
for (i = 0; i < nr_bufs; i++) {
1775
struct sk_buff *skb;
1779
skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE);
1783
mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1784
offset_in_page(skb->data),
1786
PCI_DMA_FROMDEVICE);
1787
ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1788
dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1791
rd = &ap->rx_jumbo_ring[idx];
1792
set_aceaddr(&rd->addr, mapping);
1793
rd->size = ACE_JUMBO_BUFSIZE;
1795
idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1801
atomic_add(i, &ap->cur_jumbo_bufs);
1802
ap->rx_jumbo_skbprd = idx;
1804
if (ACE_IS_TIGON_I(ap)) {
1806
cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1808
cmd.idx = ap->rx_jumbo_skbprd;
1809
ace_issue_cmd(regs, &cmd);
1811
writel(idx, ®s->RxJumboPrd);
1816
clear_bit(0, &ap->jumbo_refill_busy);
1819
if (net_ratelimit())
1820
printk(KERN_INFO "Out of memory when allocating "
1821
"jumbo receive buffers\n");
1827
* All events are considered to be slow (RX/TX ints do not generate
1828
* events) and are handled here, outside the main interrupt handler,
1829
* to reduce the size of the handler.
1831
static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1833
struct ace_private *ap;
1835
ap = netdev_priv(dev);
1837
while (evtcsm != evtprd) {
1838
switch (ap->evt_ring[evtcsm].evt) {
1840
printk(KERN_INFO "%s: Firmware up and running\n",
1845
case E_STATS_UPDATED:
1849
u16 code = ap->evt_ring[evtcsm].code;
1853
u32 state = readl(&ap->regs->GigLnkState);
1854
printk(KERN_WARNING "%s: Optical link UP "
1855
"(%s Duplex, Flow Control: %s%s)\n",
1857
state & LNK_FULL_DUPLEX ? "Full":"Half",
1858
state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1859
state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1863
printk(KERN_WARNING "%s: Optical link DOWN\n",
1866
case E_C_LINK_10_100:
1867
printk(KERN_WARNING "%s: 10/100BaseT link "
1871
printk(KERN_ERR "%s: Unknown optical link "
1872
"state %02x\n", ap->name, code);
1877
switch(ap->evt_ring[evtcsm].code) {
1878
case E_C_ERR_INVAL_CMD:
1879
printk(KERN_ERR "%s: invalid command error\n",
1882
case E_C_ERR_UNIMP_CMD:
1883
printk(KERN_ERR "%s: unimplemented command "
1884
"error\n", ap->name);
1886
case E_C_ERR_BAD_CFG:
1887
printk(KERN_ERR "%s: bad config error\n",
1891
printk(KERN_ERR "%s: unknown error %02x\n",
1892
ap->name, ap->evt_ring[evtcsm].code);
1895
case E_RESET_JUMBO_RNG:
1898
for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1899
if (ap->skb->rx_jumbo_skbuff[i].skb) {
1900
ap->rx_jumbo_ring[i].size = 0;
1901
set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1902
dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1903
ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1907
if (ACE_IS_TIGON_I(ap)) {
1909
cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1912
ace_issue_cmd(ap->regs, &cmd);
1914
writel(0, &((ap->regs)->RxJumboPrd));
1919
ap->rx_jumbo_skbprd = 0;
1920
printk(KERN_INFO "%s: Jumbo ring flushed\n",
1922
clear_bit(0, &ap->jumbo_refill_busy);
1926
printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1927
ap->name, ap->evt_ring[evtcsm].evt);
1929
evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1936
static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1938
struct ace_private *ap = netdev_priv(dev);
1940
int mini_count = 0, std_count = 0;
1944
prefetchw(&ap->cur_rx_bufs);
1945
prefetchw(&ap->cur_mini_bufs);
1947
while (idx != rxretprd) {
1948
struct ring_info *rip;
1949
struct sk_buff *skb;
1950
struct rx_desc *rxdesc, *retdesc;
1952
int bd_flags, desc_type, mapsize;
1956
/* make sure the rx descriptor isn't read before rxretprd */
1957
if (idx == rxretcsm)
1960
retdesc = &ap->rx_return_ring[idx];
1961
skbidx = retdesc->idx;
1962
bd_flags = retdesc->flags;
1963
desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1967
* Normal frames do not have any flags set
1969
* Mini and normal frames arrive frequently,
1970
* so use a local counter to avoid doing
1971
* atomic operations for each packet arriving.
1974
rip = &ap->skb->rx_std_skbuff[skbidx];
1975
mapsize = ACE_STD_BUFSIZE;
1976
rxdesc = &ap->rx_std_ring[skbidx];
1980
rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1981
mapsize = ACE_JUMBO_BUFSIZE;
1982
rxdesc = &ap->rx_jumbo_ring[skbidx];
1983
atomic_dec(&ap->cur_jumbo_bufs);
1986
rip = &ap->skb->rx_mini_skbuff[skbidx];
1987
mapsize = ACE_MINI_BUFSIZE;
1988
rxdesc = &ap->rx_mini_ring[skbidx];
1992
printk(KERN_INFO "%s: unknown frame type (0x%02x) "
1993
"returned by NIC\n", dev->name,
2000
pci_unmap_page(ap->pdev,
2001
dma_unmap_addr(rip, mapping),
2003
PCI_DMA_FROMDEVICE);
2004
skb_put(skb, retdesc->size);
2009
csum = retdesc->tcp_udp_csum;
2011
skb->protocol = eth_type_trans(skb, dev);
2014
* Instead of forcing the poor tigon mips cpu to calculate
2015
* pseudo hdr checksum, we do this ourselves.
2017
if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2018
skb->csum = htons(csum);
2019
skb->ip_summed = CHECKSUM_COMPLETE;
2021
skb_checksum_none_assert(skb);
2025
if ((bd_flags & BD_FLG_VLAN_TAG))
2026
__vlan_hwaccel_put_tag(skb, retdesc->vlan);
2029
dev->stats.rx_packets++;
2030
dev->stats.rx_bytes += retdesc->size;
2032
idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2035
atomic_sub(std_count, &ap->cur_rx_bufs);
2036
if (!ACE_IS_TIGON_I(ap))
2037
atomic_sub(mini_count, &ap->cur_mini_bufs);
2041
* According to the documentation RxRetCsm is obsolete with
2042
* the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2044
if (ACE_IS_TIGON_I(ap)) {
2045
writel(idx, &ap->regs->RxRetCsm);
2056
static inline void ace_tx_int(struct net_device *dev,
2059
struct ace_private *ap = netdev_priv(dev);
2062
struct sk_buff *skb;
2063
struct tx_ring_info *info;
2065
info = ap->skb->tx_skbuff + idx;
2068
if (dma_unmap_len(info, maplen)) {
2069
pci_unmap_page(ap->pdev, dma_unmap_addr(info, mapping),
2070
dma_unmap_len(info, maplen),
2072
dma_unmap_len_set(info, maplen, 0);
2076
dev->stats.tx_packets++;
2077
dev->stats.tx_bytes += skb->len;
2078
dev_kfree_skb_irq(skb);
2082
idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2083
} while (idx != txcsm);
2085
if (netif_queue_stopped(dev))
2086
netif_wake_queue(dev);
2089
ap->tx_ret_csm = txcsm;
2091
/* So... tx_ret_csm is advanced _after_ check for device wakeup.
2093
* We could try to make it before. In this case we would get
2094
* the following race condition: hard_start_xmit on other cpu
2095
* enters after we advanced tx_ret_csm and fills space,
2096
* which we have just freed, so that we make illegal device wakeup.
2097
* There is no good way to workaround this (at entry
2098
* to ace_start_xmit detects this condition and prevents
2099
* ring corruption, but it is not a good workaround.)
2101
* When tx_ret_csm is advanced after, we wake up device _only_
2102
* if we really have some space in ring (though the core doing
2103
* hard_start_xmit can see full ring for some period and has to
2104
* synchronize.) Superb.
2105
* BUT! We get another subtle race condition. hard_start_xmit
2106
* may think that ring is full between wakeup and advancing
2107
* tx_ret_csm and will stop device instantly! It is not so bad.
2108
* We are guaranteed that there is something in ring, so that
2109
* the next irq will resume transmission. To speedup this we could
2110
* mark descriptor, which closes ring with BD_FLG_COAL_NOW
2111
* (see ace_start_xmit).
2113
* Well, this dilemma exists in all lock-free devices.
2114
* We, following scheme used in drivers by Donald Becker,
2115
* select the least dangerous.
2121
static irqreturn_t ace_interrupt(int irq, void *dev_id)
2123
struct net_device *dev = (struct net_device *)dev_id;
2124
struct ace_private *ap = netdev_priv(dev);
2125
struct ace_regs __iomem *regs = ap->regs;
2127
u32 txcsm, rxretcsm, rxretprd;
2131
* In case of PCI shared interrupts or spurious interrupts,
2132
* we want to make sure it is actually our interrupt before
2133
* spending any time in here.
2135
if (!(readl(®s->HostCtrl) & IN_INT))
2139
* ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2140
* which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2141
* writel(0, ®s->Mb0Lo).
2143
* "IRQ avoidance" recommended in docs applies to IRQs served
2144
* threads and it is wrong even for that case.
2146
writel(0, ®s->Mb0Lo);
2147
readl(®s->Mb0Lo);
2150
* There is no conflict between transmit handling in
2151
* start_xmit and receive processing, thus there is no reason
2152
* to take a spin lock for RX handling. Wait until we start
2153
* working on the other stuff - hey we don't need a spin lock
2156
rxretprd = *ap->rx_ret_prd;
2157
rxretcsm = ap->cur_rx;
2159
if (rxretprd != rxretcsm)
2160
ace_rx_int(dev, rxretprd, rxretcsm);
2162
txcsm = *ap->tx_csm;
2163
idx = ap->tx_ret_csm;
2167
* If each skb takes only one descriptor this check degenerates
2168
* to identity, because new space has just been opened.
2169
* But if skbs are fragmented we must check that this index
2170
* update releases enough of space, otherwise we just
2171
* wait for device to make more work.
2173
if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2174
ace_tx_int(dev, txcsm, idx);
2177
evtcsm = readl(®s->EvtCsm);
2178
evtprd = *ap->evt_prd;
2180
if (evtcsm != evtprd) {
2181
evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2182
writel(evtcsm, ®s->EvtCsm);
2186
* This has to go last in the interrupt handler and run with
2187
* the spin lock released ... what lock?
2189
if (netif_running(dev)) {
2191
int run_tasklet = 0;
2193
cur_size = atomic_read(&ap->cur_rx_bufs);
2194
if (cur_size < RX_LOW_STD_THRES) {
2195
if ((cur_size < RX_PANIC_STD_THRES) &&
2196
!test_and_set_bit(0, &ap->std_refill_busy)) {
2198
printk("low on std buffers %i\n", cur_size);
2200
ace_load_std_rx_ring(dev,
2201
RX_RING_SIZE - cur_size);
2206
if (!ACE_IS_TIGON_I(ap)) {
2207
cur_size = atomic_read(&ap->cur_mini_bufs);
2208
if (cur_size < RX_LOW_MINI_THRES) {
2209
if ((cur_size < RX_PANIC_MINI_THRES) &&
2210
!test_and_set_bit(0,
2211
&ap->mini_refill_busy)) {
2213
printk("low on mini buffers %i\n",
2216
ace_load_mini_rx_ring(dev,
2217
RX_MINI_SIZE - cur_size);
2224
cur_size = atomic_read(&ap->cur_jumbo_bufs);
2225
if (cur_size < RX_LOW_JUMBO_THRES) {
2226
if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2227
!test_and_set_bit(0,
2228
&ap->jumbo_refill_busy)){
2230
printk("low on jumbo buffers %i\n",
2233
ace_load_jumbo_rx_ring(dev,
2234
RX_JUMBO_SIZE - cur_size);
2239
if (run_tasklet && !ap->tasklet_pending) {
2240
ap->tasklet_pending = 1;
2241
tasklet_schedule(&ap->ace_tasklet);
2248
static int ace_open(struct net_device *dev)
2250
struct ace_private *ap = netdev_priv(dev);
2251
struct ace_regs __iomem *regs = ap->regs;
2254
if (!(ap->fw_running)) {
2255
printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2259
writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2261
cmd.evt = C_CLEAR_STATS;
2264
ace_issue_cmd(regs, &cmd);
2266
cmd.evt = C_HOST_STATE;
2267
cmd.code = C_C_STACK_UP;
2269
ace_issue_cmd(regs, &cmd);
2272
!test_and_set_bit(0, &ap->jumbo_refill_busy))
2273
ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2275
if (dev->flags & IFF_PROMISC) {
2276
cmd.evt = C_SET_PROMISC_MODE;
2277
cmd.code = C_C_PROMISC_ENABLE;
2279
ace_issue_cmd(regs, &cmd);
2287
cmd.evt = C_LNK_NEGOTIATION;
2290
ace_issue_cmd(regs, &cmd);
2293
netif_start_queue(dev);
2296
* Setup the bottom half rx ring refill handler
2298
tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2303
static int ace_close(struct net_device *dev)
2305
struct ace_private *ap = netdev_priv(dev);
2306
struct ace_regs __iomem *regs = ap->regs;
2308
unsigned long flags;
2312
* Without (or before) releasing irq and stopping hardware, this
2313
* is an absolute non-sense, by the way. It will be reset instantly
2316
netif_stop_queue(dev);
2320
cmd.evt = C_SET_PROMISC_MODE;
2321
cmd.code = C_C_PROMISC_DISABLE;
2323
ace_issue_cmd(regs, &cmd);
2327
cmd.evt = C_HOST_STATE;
2328
cmd.code = C_C_STACK_DOWN;
2330
ace_issue_cmd(regs, &cmd);
2332
tasklet_kill(&ap->ace_tasklet);
2335
* Make sure one CPU is not processing packets while
2336
* buffers are being released by another.
2339
local_irq_save(flags);
2342
for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2343
struct sk_buff *skb;
2344
struct tx_ring_info *info;
2346
info = ap->skb->tx_skbuff + i;
2349
if (dma_unmap_len(info, maplen)) {
2350
if (ACE_IS_TIGON_I(ap)) {
2351
/* NB: TIGON_1 is special, tx_ring is in io space */
2352
struct tx_desc __iomem *tx;
2353
tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
2354
writel(0, &tx->addr.addrhi);
2355
writel(0, &tx->addr.addrlo);
2356
writel(0, &tx->flagsize);
2358
memset(ap->tx_ring + i, 0,
2359
sizeof(struct tx_desc));
2360
pci_unmap_page(ap->pdev, dma_unmap_addr(info, mapping),
2361
dma_unmap_len(info, maplen),
2363
dma_unmap_len_set(info, maplen, 0);
2372
cmd.evt = C_RESET_JUMBO_RNG;
2375
ace_issue_cmd(regs, &cmd);
2378
ace_unmask_irq(dev);
2379
local_irq_restore(flags);
2385
static inline dma_addr_t
2386
ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2387
struct sk_buff *tail, u32 idx)
2390
struct tx_ring_info *info;
2392
mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2393
offset_in_page(skb->data),
2394
skb->len, PCI_DMA_TODEVICE);
2396
info = ap->skb->tx_skbuff + idx;
2398
dma_unmap_addr_set(info, mapping, mapping);
2399
dma_unmap_len_set(info, maplen, skb->len);
2405
ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2406
u32 flagsize, u32 vlan_tag)
2408
#if !USE_TX_COAL_NOW
2409
flagsize &= ~BD_FLG_COAL_NOW;
2412
if (ACE_IS_TIGON_I(ap)) {
2413
struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
2414
writel(addr >> 32, &io->addr.addrhi);
2415
writel(addr & 0xffffffff, &io->addr.addrlo);
2416
writel(flagsize, &io->flagsize);
2417
writel(vlan_tag, &io->vlanres);
2419
desc->addr.addrhi = addr >> 32;
2420
desc->addr.addrlo = addr;
2421
desc->flagsize = flagsize;
2422
desc->vlanres = vlan_tag;
2427
static netdev_tx_t ace_start_xmit(struct sk_buff *skb,
2428
struct net_device *dev)
2430
struct ace_private *ap = netdev_priv(dev);
2431
struct ace_regs __iomem *regs = ap->regs;
2432
struct tx_desc *desc;
2434
unsigned long maxjiff = jiffies + 3*HZ;
2439
if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2442
if (!skb_shinfo(skb)->nr_frags) {
2446
mapping = ace_map_tx_skb(ap, skb, skb, idx);
2447
flagsize = (skb->len << 16) | (BD_FLG_END);
2448
if (skb->ip_summed == CHECKSUM_PARTIAL)
2449
flagsize |= BD_FLG_TCP_UDP_SUM;
2450
if (vlan_tx_tag_present(skb)) {
2451
flagsize |= BD_FLG_VLAN_TAG;
2452
vlan_tag = vlan_tx_tag_get(skb);
2454
desc = ap->tx_ring + idx;
2455
idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2457
/* Look at ace_tx_int for explanations. */
2458
if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2459
flagsize |= BD_FLG_COAL_NOW;
2461
ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2467
mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2468
flagsize = (skb_headlen(skb) << 16);
2469
if (skb->ip_summed == CHECKSUM_PARTIAL)
2470
flagsize |= BD_FLG_TCP_UDP_SUM;
2471
if (vlan_tx_tag_present(skb)) {
2472
flagsize |= BD_FLG_VLAN_TAG;
2473
vlan_tag = vlan_tx_tag_get(skb);
2476
ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2478
idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2480
for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2481
const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2482
struct tx_ring_info *info;
2484
len += skb_frag_size(frag);
2485
info = ap->skb->tx_skbuff + idx;
2486
desc = ap->tx_ring + idx;
2488
mapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0,
2489
skb_frag_size(frag),
2492
flagsize = skb_frag_size(frag) << 16;
2493
if (skb->ip_summed == CHECKSUM_PARTIAL)
2494
flagsize |= BD_FLG_TCP_UDP_SUM;
2495
idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2497
if (i == skb_shinfo(skb)->nr_frags - 1) {
2498
flagsize |= BD_FLG_END;
2499
if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2500
flagsize |= BD_FLG_COAL_NOW;
2503
* Only the last fragment frees
2510
dma_unmap_addr_set(info, mapping, mapping);
2511
dma_unmap_len_set(info, maplen, skb_frag_size(frag));
2512
ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2518
ace_set_txprd(regs, ap, idx);
2520
if (flagsize & BD_FLG_COAL_NOW) {
2521
netif_stop_queue(dev);
2524
* A TX-descriptor producer (an IRQ) might have gotten
2525
* between, making the ring free again. Since xmit is
2526
* serialized, this is the only situation we have to
2529
if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2530
netif_wake_queue(dev);
2533
return NETDEV_TX_OK;
2537
* This race condition is unavoidable with lock-free drivers.
2538
* We wake up the queue _before_ tx_prd is advanced, so that we can
2539
* enter hard_start_xmit too early, while tx ring still looks closed.
2540
* This happens ~1-4 times per 100000 packets, so that we can allow
2541
* to loop syncing to other CPU. Probably, we need an additional
2542
* wmb() in ace_tx_intr as well.
2544
* Note that this race is relieved by reserving one more entry
2545
* in tx ring than it is necessary (see original non-SG driver).
2546
* However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2547
* is already overkill.
2549
* Alternative is to return with 1 not throttling queue. In this
2550
* case loop becomes longer, no more useful effects.
2552
if (time_before(jiffies, maxjiff)) {
2558
/* The ring is stuck full. */
2559
printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2560
return NETDEV_TX_BUSY;
2564
static int ace_change_mtu(struct net_device *dev, int new_mtu)
2566
struct ace_private *ap = netdev_priv(dev);
2567
struct ace_regs __iomem *regs = ap->regs;
2569
if (new_mtu > ACE_JUMBO_MTU)
2572
writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2575
if (new_mtu > ACE_STD_MTU) {
2577
printk(KERN_INFO "%s: Enabling Jumbo frame "
2578
"support\n", dev->name);
2580
if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2581
ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2582
ace_set_rxtx_parms(dev, 1);
2585
while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2586
ace_sync_irq(dev->irq);
2587
ace_set_rxtx_parms(dev, 0);
2591
cmd.evt = C_RESET_JUMBO_RNG;
2594
ace_issue_cmd(regs, &cmd);
2601
static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2603
struct ace_private *ap = netdev_priv(dev);
2604
struct ace_regs __iomem *regs = ap->regs;
2607
memset(ecmd, 0, sizeof(struct ethtool_cmd));
2609
(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2610
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2611
SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2612
SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2614
ecmd->port = PORT_FIBRE;
2615
ecmd->transceiver = XCVR_INTERNAL;
2617
link = readl(®s->GigLnkState);
2618
if (link & LNK_1000MB)
2619
ethtool_cmd_speed_set(ecmd, SPEED_1000);
2621
link = readl(®s->FastLnkState);
2622
if (link & LNK_100MB)
2623
ethtool_cmd_speed_set(ecmd, SPEED_100);
2624
else if (link & LNK_10MB)
2625
ethtool_cmd_speed_set(ecmd, SPEED_10);
2627
ethtool_cmd_speed_set(ecmd, 0);
2629
if (link & LNK_FULL_DUPLEX)
2630
ecmd->duplex = DUPLEX_FULL;
2632
ecmd->duplex = DUPLEX_HALF;
2634
if (link & LNK_NEGOTIATE)
2635
ecmd->autoneg = AUTONEG_ENABLE;
2637
ecmd->autoneg = AUTONEG_DISABLE;
2641
* Current struct ethtool_cmd is insufficient
2643
ecmd->trace = readl(®s->TuneTrace);
2645
ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2646
ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2648
ecmd->maxtxpkt = readl(®s->TuneMaxTxDesc);
2649
ecmd->maxrxpkt = readl(®s->TuneMaxRxDesc);
2654
static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2656
struct ace_private *ap = netdev_priv(dev);
2657
struct ace_regs __iomem *regs = ap->regs;
2660
link = readl(®s->GigLnkState);
2661
if (link & LNK_1000MB)
2664
link = readl(®s->FastLnkState);
2665
if (link & LNK_100MB)
2667
else if (link & LNK_10MB)
2673
link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2674
LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2675
if (!ACE_IS_TIGON_I(ap))
2676
link |= LNK_TX_FLOW_CTL_Y;
2677
if (ecmd->autoneg == AUTONEG_ENABLE)
2678
link |= LNK_NEGOTIATE;
2679
if (ethtool_cmd_speed(ecmd) != speed) {
2680
link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2681
switch (ethtool_cmd_speed(ecmd)) {
2694
if (ecmd->duplex == DUPLEX_FULL)
2695
link |= LNK_FULL_DUPLEX;
2697
if (link != ap->link) {
2699
printk(KERN_INFO "%s: Renegotiating link state\n",
2703
writel(link, ®s->TuneLink);
2704
if (!ACE_IS_TIGON_I(ap))
2705
writel(link, ®s->TuneFastLink);
2708
cmd.evt = C_LNK_NEGOTIATION;
2711
ace_issue_cmd(regs, &cmd);
2716
static void ace_get_drvinfo(struct net_device *dev,
2717
struct ethtool_drvinfo *info)
2719
struct ace_private *ap = netdev_priv(dev);
2721
strlcpy(info->driver, "acenic", sizeof(info->driver));
2722
snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2723
ap->firmware_major, ap->firmware_minor,
2727
strlcpy(info->bus_info, pci_name(ap->pdev),
2728
sizeof(info->bus_info));
2733
* Set the hardware MAC address.
2735
static int ace_set_mac_addr(struct net_device *dev, void *p)
2737
struct ace_private *ap = netdev_priv(dev);
2738
struct ace_regs __iomem *regs = ap->regs;
2739
struct sockaddr *addr=p;
2743
if(netif_running(dev))
2746
memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2748
da = (u8 *)dev->dev_addr;
2750
writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2751
writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2754
cmd.evt = C_SET_MAC_ADDR;
2757
ace_issue_cmd(regs, &cmd);
2763
static void ace_set_multicast_list(struct net_device *dev)
2765
struct ace_private *ap = netdev_priv(dev);
2766
struct ace_regs __iomem *regs = ap->regs;
2769
if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2770
cmd.evt = C_SET_MULTICAST_MODE;
2771
cmd.code = C_C_MCAST_ENABLE;
2773
ace_issue_cmd(regs, &cmd);
2775
} else if (ap->mcast_all) {
2776
cmd.evt = C_SET_MULTICAST_MODE;
2777
cmd.code = C_C_MCAST_DISABLE;
2779
ace_issue_cmd(regs, &cmd);
2783
if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2784
cmd.evt = C_SET_PROMISC_MODE;
2785
cmd.code = C_C_PROMISC_ENABLE;
2787
ace_issue_cmd(regs, &cmd);
2789
}else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2790
cmd.evt = C_SET_PROMISC_MODE;
2791
cmd.code = C_C_PROMISC_DISABLE;
2793
ace_issue_cmd(regs, &cmd);
2798
* For the time being multicast relies on the upper layers
2799
* filtering it properly. The Firmware does not allow one to
2800
* set the entire multicast list at a time and keeping track of
2801
* it here is going to be messy.
2803
if (!netdev_mc_empty(dev) && !ap->mcast_all) {
2804
cmd.evt = C_SET_MULTICAST_MODE;
2805
cmd.code = C_C_MCAST_ENABLE;
2807
ace_issue_cmd(regs, &cmd);
2808
}else if (!ap->mcast_all) {
2809
cmd.evt = C_SET_MULTICAST_MODE;
2810
cmd.code = C_C_MCAST_DISABLE;
2812
ace_issue_cmd(regs, &cmd);
2817
static struct net_device_stats *ace_get_stats(struct net_device *dev)
2819
struct ace_private *ap = netdev_priv(dev);
2820
struct ace_mac_stats __iomem *mac_stats =
2821
(struct ace_mac_stats __iomem *)ap->regs->Stats;
2823
dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2824
dev->stats.multicast = readl(&mac_stats->kept_mc);
2825
dev->stats.collisions = readl(&mac_stats->coll);
2831
static void __devinit ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2834
void __iomem *tdest;
2841
tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2842
min_t(u32, size, ACE_WINDOW_SIZE));
2843
tdest = (void __iomem *) ®s->Window +
2844
(dest & (ACE_WINDOW_SIZE - 1));
2845
writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2846
for (i = 0; i < (tsize / 4); i++) {
2847
/* Firmware is big-endian */
2848
writel(be32_to_cpup(src), tdest);
2858
static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2860
void __iomem *tdest;
2867
tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2868
min_t(u32, size, ACE_WINDOW_SIZE));
2869
tdest = (void __iomem *) ®s->Window +
2870
(dest & (ACE_WINDOW_SIZE - 1));
2871
writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2873
for (i = 0; i < (tsize / 4); i++) {
2874
writel(0, tdest + i*4);
2884
* Download the firmware into the SRAM on the NIC
2886
* This operation requires the NIC to be halted and is performed with
2887
* interrupts disabled and with the spinlock hold.
2889
static int __devinit ace_load_firmware(struct net_device *dev)
2891
const struct firmware *fw;
2892
const char *fw_name = "acenic/tg2.bin";
2893
struct ace_private *ap = netdev_priv(dev);
2894
struct ace_regs __iomem *regs = ap->regs;
2895
const __be32 *fw_data;
2899
if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2900
printk(KERN_ERR "%s: trying to download firmware while the "
2901
"CPU is running!\n", ap->name);
2905
if (ACE_IS_TIGON_I(ap))
2906
fw_name = "acenic/tg1.bin";
2908
ret = request_firmware(&fw, fw_name, &ap->pdev->dev);
2910
printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
2915
fw_data = (void *)fw->data;
2917
/* Firmware blob starts with version numbers, followed by
2918
load and start address. Remainder is the blob to be loaded
2919
contiguously from load address. We don't bother to represent
2920
the BSS/SBSS sections any more, since we were clearing the
2921
whole thing anyway. */
2922
ap->firmware_major = fw->data[0];
2923
ap->firmware_minor = fw->data[1];
2924
ap->firmware_fix = fw->data[2];
2926
ap->firmware_start = be32_to_cpu(fw_data[1]);
2927
if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
2928
printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2929
ap->name, ap->firmware_start, fw_name);
2934
load_addr = be32_to_cpu(fw_data[2]);
2935
if (load_addr < 0x4000 || load_addr >= 0x80000) {
2936
printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2937
ap->name, load_addr, fw_name);
2943
* Do not try to clear more than 512KiB or we end up seeing
2944
* funny things on NICs with only 512KiB SRAM
2946
ace_clear(regs, 0x2000, 0x80000-0x2000);
2947
ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2949
release_firmware(fw);
2955
* The eeprom on the AceNIC is an Atmel i2c EEPROM.
2957
* Accessing the EEPROM is `interesting' to say the least - don't read
2958
* this code right after dinner.
2960
* This is all about black magic and bit-banging the device .... I
2961
* wonder in what hospital they have put the guy who designed the i2c
2964
* Oh yes, this is only the beginning!
2966
* Thanks to Stevarino Webinski for helping tracking down the bugs in the
2967
* code i2c readout code by beta testing all my hacks.
2969
static void __devinit eeprom_start(struct ace_regs __iomem *regs)
2973
readl(®s->LocalCtrl);
2974
udelay(ACE_SHORT_DELAY);
2975
local = readl(®s->LocalCtrl);
2976
local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2977
writel(local, ®s->LocalCtrl);
2978
readl(®s->LocalCtrl);
2980
udelay(ACE_SHORT_DELAY);
2981
local |= EEPROM_CLK_OUT;
2982
writel(local, ®s->LocalCtrl);
2983
readl(®s->LocalCtrl);
2985
udelay(ACE_SHORT_DELAY);
2986
local &= ~EEPROM_DATA_OUT;
2987
writel(local, ®s->LocalCtrl);
2988
readl(®s->LocalCtrl);
2990
udelay(ACE_SHORT_DELAY);
2991
local &= ~EEPROM_CLK_OUT;
2992
writel(local, ®s->LocalCtrl);
2993
readl(®s->LocalCtrl);
2998
static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3003
udelay(ACE_SHORT_DELAY);
3004
local = readl(®s->LocalCtrl);
3005
local &= ~EEPROM_DATA_OUT;
3006
local |= EEPROM_WRITE_ENABLE;
3007
writel(local, ®s->LocalCtrl);
3008
readl(®s->LocalCtrl);
3011
for (i = 0; i < 8; i++, magic <<= 1) {
3012
udelay(ACE_SHORT_DELAY);
3014
local |= EEPROM_DATA_OUT;
3016
local &= ~EEPROM_DATA_OUT;
3017
writel(local, ®s->LocalCtrl);
3018
readl(®s->LocalCtrl);
3021
udelay(ACE_SHORT_DELAY);
3022
local |= EEPROM_CLK_OUT;
3023
writel(local, ®s->LocalCtrl);
3024
readl(®s->LocalCtrl);
3026
udelay(ACE_SHORT_DELAY);
3027
local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3028
writel(local, ®s->LocalCtrl);
3029
readl(®s->LocalCtrl);
3035
static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3040
local = readl(®s->LocalCtrl);
3041
local &= ~EEPROM_WRITE_ENABLE;
3042
writel(local, ®s->LocalCtrl);
3043
readl(®s->LocalCtrl);
3045
udelay(ACE_LONG_DELAY);
3046
local |= EEPROM_CLK_OUT;
3047
writel(local, ®s->LocalCtrl);
3048
readl(®s->LocalCtrl);
3050
udelay(ACE_SHORT_DELAY);
3051
/* sample data in middle of high clk */
3052
state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3053
udelay(ACE_SHORT_DELAY);
3055
writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3056
readl(®s->LocalCtrl);
3063
static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3067
udelay(ACE_SHORT_DELAY);
3068
local = readl(®s->LocalCtrl);
3069
local |= EEPROM_WRITE_ENABLE;
3070
writel(local, ®s->LocalCtrl);
3071
readl(®s->LocalCtrl);
3073
udelay(ACE_SHORT_DELAY);
3074
local &= ~EEPROM_DATA_OUT;
3075
writel(local, ®s->LocalCtrl);
3076
readl(®s->LocalCtrl);
3078
udelay(ACE_SHORT_DELAY);
3079
local |= EEPROM_CLK_OUT;
3080
writel(local, ®s->LocalCtrl);
3081
readl(®s->LocalCtrl);
3083
udelay(ACE_SHORT_DELAY);
3084
local |= EEPROM_DATA_OUT;
3085
writel(local, ®s->LocalCtrl);
3086
readl(®s->LocalCtrl);
3088
udelay(ACE_LONG_DELAY);
3089
local &= ~EEPROM_CLK_OUT;
3090
writel(local, ®s->LocalCtrl);
3096
* Read a whole byte from the EEPROM.
3098
static int __devinit read_eeprom_byte(struct net_device *dev,
3099
unsigned long offset)
3101
struct ace_private *ap = netdev_priv(dev);
3102
struct ace_regs __iomem *regs = ap->regs;
3103
unsigned long flags;
3109
* Don't take interrupts on this CPU will bit banging
3110
* the %#%#@$ I2C device
3112
local_irq_save(flags);
3116
eeprom_prep(regs, EEPROM_WRITE_SELECT);
3117
if (eeprom_check_ack(regs)) {
3118
local_irq_restore(flags);
3119
printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3121
goto eeprom_read_error;
3124
eeprom_prep(regs, (offset >> 8) & 0xff);
3125
if (eeprom_check_ack(regs)) {
3126
local_irq_restore(flags);
3127
printk(KERN_ERR "%s: Unable to set address byte 0\n",
3130
goto eeprom_read_error;
3133
eeprom_prep(regs, offset & 0xff);
3134
if (eeprom_check_ack(regs)) {
3135
local_irq_restore(flags);
3136
printk(KERN_ERR "%s: Unable to set address byte 1\n",
3139
goto eeprom_read_error;
3143
eeprom_prep(regs, EEPROM_READ_SELECT);
3144
if (eeprom_check_ack(regs)) {
3145
local_irq_restore(flags);
3146
printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3149
goto eeprom_read_error;
3152
for (i = 0; i < 8; i++) {
3153
local = readl(®s->LocalCtrl);
3154
local &= ~EEPROM_WRITE_ENABLE;
3155
writel(local, ®s->LocalCtrl);
3156
readl(®s->LocalCtrl);
3157
udelay(ACE_LONG_DELAY);
3159
local |= EEPROM_CLK_OUT;
3160
writel(local, ®s->LocalCtrl);
3161
readl(®s->LocalCtrl);
3163
udelay(ACE_SHORT_DELAY);
3164
/* sample data mid high clk */
3165
result = (result << 1) |
3166
((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3167
udelay(ACE_SHORT_DELAY);
3169
local = readl(®s->LocalCtrl);
3170
local &= ~EEPROM_CLK_OUT;
3171
writel(local, ®s->LocalCtrl);
3172
readl(®s->LocalCtrl);
3173
udelay(ACE_SHORT_DELAY);
3176
local |= EEPROM_WRITE_ENABLE;
3177
writel(local, ®s->LocalCtrl);
3178
readl(®s->LocalCtrl);
3180
udelay(ACE_SHORT_DELAY);
3184
local |= EEPROM_DATA_OUT;
3185
writel(local, ®s->LocalCtrl);
3186
readl(®s->LocalCtrl);
3188
udelay(ACE_SHORT_DELAY);
3189
writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3190
readl(®s->LocalCtrl);
3191
udelay(ACE_LONG_DELAY);
3192
writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3193
readl(®s->LocalCtrl);
3195
udelay(ACE_SHORT_DELAY);
3198
local_irq_restore(flags);
3203
printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
added
removed
drivers/net/ethernet/alteon/acenic.c
