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Viewing changes to arch/arm/mach-stmp378x/include/mach/regs-spdif.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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arch/arm/mach-stmp378x/include/mach/regs-spdif.h
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/*
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 * stmp378x: SPDIF register definitions
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 *
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 * Copyright (c) 2008 Freescale Semiconductor
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 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
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 */
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#define REGS_SPDIF_BASE (STMP3XXX_REGS_BASE + 0x54000)
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#define REGS_SPDIF_PHYS 0x80054000
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#define REGS_SPDIF_SIZE 0x2000
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#define HW_SPDIF_CTRL           0x0
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#define BM_SPDIF_CTRL_RUN       0x00000001
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#define BP_SPDIF_CTRL_RUN       0
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#define BM_SPDIF_CTRL_FIFO_ERROR_IRQ_EN 0x00000002
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#define BM_SPDIF_CTRL_FIFO_OVERFLOW_IRQ 0x00000004
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#define BM_SPDIF_CTRL_FIFO_UNDERFLOW_IRQ        0x00000008
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#define BM_SPDIF_CTRL_WORD_LENGTH       0x00000010
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#define BM_SPDIF_CTRL_CLKGATE   0x40000000
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#define BM_SPDIF_CTRL_SFTRST    0x80000000
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#define HW_SPDIF_STAT           0x10
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#define HW_SPDIF_FRAMECTRL      0x20
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#define HW_SPDIF_SRR            0x30
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#define BM_SPDIF_SRR_RATE       0x000FFFFF
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#define BP_SPDIF_SRR_RATE       0
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#define BM_SPDIF_SRR_BASEMULT   0x70000000
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#define BP_SPDIF_SRR_BASEMULT   28
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#define HW_SPDIF_DEBUG          0x40
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#define HW_SPDIF_DATA           0x50
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#define HW_SPDIF_VERSION        0x60