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// ------------------------------------------------------------------
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// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice appear in all copies.
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// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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// ------------------------------------------------------------------
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//===================================================================
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// Author(s): ="Atheros"
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//===================================================================
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#ifndef _RDMA_REG_REG_H_
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#define _RDMA_REG_REG_H_
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#define DMA_CONFIG_ADDRESS 0x00000000
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#define DMA_CONFIG_OFFSET 0x00000000
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#define DMA_CONFIG_WLBB_PWD_EN_MSB 4
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#define DMA_CONFIG_WLBB_PWD_EN_LSB 4
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#define DMA_CONFIG_WLBB_PWD_EN_MASK 0x00000010
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#define DMA_CONFIG_WLBB_PWD_EN_GET(x) (((x) & DMA_CONFIG_WLBB_PWD_EN_MASK) >> DMA_CONFIG_WLBB_PWD_EN_LSB)
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#define DMA_CONFIG_WLBB_PWD_EN_SET(x) (((x) << DMA_CONFIG_WLBB_PWD_EN_LSB) & DMA_CONFIG_WLBB_PWD_EN_MASK)
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#define DMA_CONFIG_WLMAC_PWD_EN_MSB 3
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#define DMA_CONFIG_WLMAC_PWD_EN_LSB 3
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#define DMA_CONFIG_WLMAC_PWD_EN_MASK 0x00000008
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#define DMA_CONFIG_WLMAC_PWD_EN_GET(x) (((x) & DMA_CONFIG_WLMAC_PWD_EN_MASK) >> DMA_CONFIG_WLMAC_PWD_EN_LSB)
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#define DMA_CONFIG_WLMAC_PWD_EN_SET(x) (((x) << DMA_CONFIG_WLMAC_PWD_EN_LSB) & DMA_CONFIG_WLMAC_PWD_EN_MASK)
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#define DMA_CONFIG_ENABLE_RETENTION_MSB 2
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#define DMA_CONFIG_ENABLE_RETENTION_LSB 2
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#define DMA_CONFIG_ENABLE_RETENTION_MASK 0x00000004
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#define DMA_CONFIG_ENABLE_RETENTION_GET(x) (((x) & DMA_CONFIG_ENABLE_RETENTION_MASK) >> DMA_CONFIG_ENABLE_RETENTION_LSB)
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#define DMA_CONFIG_ENABLE_RETENTION_SET(x) (((x) << DMA_CONFIG_ENABLE_RETENTION_LSB) & DMA_CONFIG_ENABLE_RETENTION_MASK)
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#define DMA_CONFIG_RTC_PRIORITY_MSB 1
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#define DMA_CONFIG_RTC_PRIORITY_LSB 1
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#define DMA_CONFIG_RTC_PRIORITY_MASK 0x00000002
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#define DMA_CONFIG_RTC_PRIORITY_GET(x) (((x) & DMA_CONFIG_RTC_PRIORITY_MASK) >> DMA_CONFIG_RTC_PRIORITY_LSB)
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#define DMA_CONFIG_RTC_PRIORITY_SET(x) (((x) << DMA_CONFIG_RTC_PRIORITY_LSB) & DMA_CONFIG_RTC_PRIORITY_MASK)
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#define DMA_CONFIG_DMA_TYPE_MSB 0
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#define DMA_CONFIG_DMA_TYPE_LSB 0
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#define DMA_CONFIG_DMA_TYPE_MASK 0x00000001
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#define DMA_CONFIG_DMA_TYPE_GET(x) (((x) & DMA_CONFIG_DMA_TYPE_MASK) >> DMA_CONFIG_DMA_TYPE_LSB)
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#define DMA_CONFIG_DMA_TYPE_SET(x) (((x) << DMA_CONFIG_DMA_TYPE_LSB) & DMA_CONFIG_DMA_TYPE_MASK)
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#define DMA_CONTROL_ADDRESS 0x00000004
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#define DMA_CONTROL_OFFSET 0x00000004
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#define DMA_CONTROL_START_MSB 1
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#define DMA_CONTROL_START_LSB 1
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#define DMA_CONTROL_START_MASK 0x00000002
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#define DMA_CONTROL_START_GET(x) (((x) & DMA_CONTROL_START_MASK) >> DMA_CONTROL_START_LSB)
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#define DMA_CONTROL_START_SET(x) (((x) << DMA_CONTROL_START_LSB) & DMA_CONTROL_START_MASK)
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#define DMA_CONTROL_STOP_MSB 0
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#define DMA_CONTROL_STOP_LSB 0
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#define DMA_CONTROL_STOP_MASK 0x00000001
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#define DMA_CONTROL_STOP_GET(x) (((x) & DMA_CONTROL_STOP_MASK) >> DMA_CONTROL_STOP_LSB)
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#define DMA_CONTROL_STOP_SET(x) (((x) << DMA_CONTROL_STOP_LSB) & DMA_CONTROL_STOP_MASK)
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#define DMA_SRC_ADDRESS 0x00000008
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#define DMA_SRC_OFFSET 0x00000008
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#define DMA_SRC_ADDR_MSB 31
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#define DMA_SRC_ADDR_LSB 2
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#define DMA_SRC_ADDR_MASK 0xfffffffc
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#define DMA_SRC_ADDR_GET(x) (((x) & DMA_SRC_ADDR_MASK) >> DMA_SRC_ADDR_LSB)
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#define DMA_SRC_ADDR_SET(x) (((x) << DMA_SRC_ADDR_LSB) & DMA_SRC_ADDR_MASK)
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#define DMA_DEST_ADDRESS 0x0000000c
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#define DMA_DEST_OFFSET 0x0000000c
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#define DMA_DEST_ADDR_MSB 31
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#define DMA_DEST_ADDR_LSB 2
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#define DMA_DEST_ADDR_MASK 0xfffffffc
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#define DMA_DEST_ADDR_GET(x) (((x) & DMA_DEST_ADDR_MASK) >> DMA_DEST_ADDR_LSB)
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#define DMA_DEST_ADDR_SET(x) (((x) << DMA_DEST_ADDR_LSB) & DMA_DEST_ADDR_MASK)
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#define DMA_LENGTH_ADDRESS 0x00000010
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#define DMA_LENGTH_OFFSET 0x00000010
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#define DMA_LENGTH_WORDS_MSB 11
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#define DMA_LENGTH_WORDS_LSB 0
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#define DMA_LENGTH_WORDS_MASK 0x00000fff
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#define DMA_LENGTH_WORDS_GET(x) (((x) & DMA_LENGTH_WORDS_MASK) >> DMA_LENGTH_WORDS_LSB)
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#define DMA_LENGTH_WORDS_SET(x) (((x) << DMA_LENGTH_WORDS_LSB) & DMA_LENGTH_WORDS_MASK)
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#define VMC_BASE_ADDRESS 0x00000014
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#define VMC_BASE_OFFSET 0x00000014
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#define VMC_BASE_ADDR_MSB 31
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#define VMC_BASE_ADDR_LSB 2
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#define VMC_BASE_ADDR_MASK 0xfffffffc
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#define VMC_BASE_ADDR_GET(x) (((x) & VMC_BASE_ADDR_MASK) >> VMC_BASE_ADDR_LSB)
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#define VMC_BASE_ADDR_SET(x) (((x) << VMC_BASE_ADDR_LSB) & VMC_BASE_ADDR_MASK)
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#define INDIRECT_REG_ADDRESS 0x00000018
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#define INDIRECT_REG_OFFSET 0x00000018
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#define INDIRECT_REG_ID_MSB 31
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#define INDIRECT_REG_ID_LSB 2
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#define INDIRECT_REG_ID_MASK 0xfffffffc
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#define INDIRECT_REG_ID_GET(x) (((x) & INDIRECT_REG_ID_MASK) >> INDIRECT_REG_ID_LSB)
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#define INDIRECT_REG_ID_SET(x) (((x) << INDIRECT_REG_ID_LSB) & INDIRECT_REG_ID_MASK)
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#define INDIRECT_RETURN_ADDRESS 0x0000001c
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#define INDIRECT_RETURN_OFFSET 0x0000001c
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#define INDIRECT_RETURN_ADDR_MSB 31
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#define INDIRECT_RETURN_ADDR_LSB 2
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#define INDIRECT_RETURN_ADDR_MASK 0xfffffffc
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#define INDIRECT_RETURN_ADDR_GET(x) (((x) & INDIRECT_RETURN_ADDR_MASK) >> INDIRECT_RETURN_ADDR_LSB)
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#define INDIRECT_RETURN_ADDR_SET(x) (((x) << INDIRECT_RETURN_ADDR_LSB) & INDIRECT_RETURN_ADDR_MASK)
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#define RDMA_REGION_0__ADDRESS 0x00000020
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#define RDMA_REGION_0__OFFSET 0x00000020
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#define RDMA_REGION_0__ADDR_MSB 31
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#define RDMA_REGION_0__ADDR_LSB 13
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#define RDMA_REGION_0__ADDR_MASK 0xffffe000
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#define RDMA_REGION_0__ADDR_GET(x) (((x) & RDMA_REGION_0__ADDR_MASK) >> RDMA_REGION_0__ADDR_LSB)
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#define RDMA_REGION_0__ADDR_SET(x) (((x) << RDMA_REGION_0__ADDR_LSB) & RDMA_REGION_0__ADDR_MASK)
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#define RDMA_REGION_0__LENGTH_MSB 12
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#define RDMA_REGION_0__LENGTH_LSB 2
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#define RDMA_REGION_0__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_0__LENGTH_GET(x) (((x) & RDMA_REGION_0__LENGTH_MASK) >> RDMA_REGION_0__LENGTH_LSB)
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#define RDMA_REGION_0__LENGTH_SET(x) (((x) << RDMA_REGION_0__LENGTH_LSB) & RDMA_REGION_0__LENGTH_MASK)
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#define RDMA_REGION_0__INDI_MSB 1
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#define RDMA_REGION_0__INDI_LSB 1
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#define RDMA_REGION_0__INDI_MASK 0x00000002
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#define RDMA_REGION_0__INDI_GET(x) (((x) & RDMA_REGION_0__INDI_MASK) >> RDMA_REGION_0__INDI_LSB)
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#define RDMA_REGION_0__INDI_SET(x) (((x) << RDMA_REGION_0__INDI_LSB) & RDMA_REGION_0__INDI_MASK)
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#define RDMA_REGION_0__NEXT_MSB 0
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#define RDMA_REGION_0__NEXT_LSB 0
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#define RDMA_REGION_0__NEXT_MASK 0x00000001
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#define RDMA_REGION_0__NEXT_GET(x) (((x) & RDMA_REGION_0__NEXT_MASK) >> RDMA_REGION_0__NEXT_LSB)
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#define RDMA_REGION_0__NEXT_SET(x) (((x) << RDMA_REGION_0__NEXT_LSB) & RDMA_REGION_0__NEXT_MASK)
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#define RDMA_REGION_1__ADDRESS 0x00000024
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#define RDMA_REGION_1__OFFSET 0x00000024
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#define RDMA_REGION_1__ADDR_MSB 31
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#define RDMA_REGION_1__ADDR_LSB 13
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#define RDMA_REGION_1__ADDR_MASK 0xffffe000
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#define RDMA_REGION_1__ADDR_GET(x) (((x) & RDMA_REGION_1__ADDR_MASK) >> RDMA_REGION_1__ADDR_LSB)
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#define RDMA_REGION_1__ADDR_SET(x) (((x) << RDMA_REGION_1__ADDR_LSB) & RDMA_REGION_1__ADDR_MASK)
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#define RDMA_REGION_1__LENGTH_MSB 12
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#define RDMA_REGION_1__LENGTH_LSB 2
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#define RDMA_REGION_1__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_1__LENGTH_GET(x) (((x) & RDMA_REGION_1__LENGTH_MASK) >> RDMA_REGION_1__LENGTH_LSB)
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#define RDMA_REGION_1__LENGTH_SET(x) (((x) << RDMA_REGION_1__LENGTH_LSB) & RDMA_REGION_1__LENGTH_MASK)
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#define RDMA_REGION_1__INDI_MSB 1
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#define RDMA_REGION_1__INDI_LSB 1
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#define RDMA_REGION_1__INDI_MASK 0x00000002
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#define RDMA_REGION_1__INDI_GET(x) (((x) & RDMA_REGION_1__INDI_MASK) >> RDMA_REGION_1__INDI_LSB)
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#define RDMA_REGION_1__INDI_SET(x) (((x) << RDMA_REGION_1__INDI_LSB) & RDMA_REGION_1__INDI_MASK)
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#define RDMA_REGION_1__NEXT_MSB 0
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#define RDMA_REGION_1__NEXT_LSB 0
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#define RDMA_REGION_1__NEXT_MASK 0x00000001
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#define RDMA_REGION_1__NEXT_GET(x) (((x) & RDMA_REGION_1__NEXT_MASK) >> RDMA_REGION_1__NEXT_LSB)
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#define RDMA_REGION_1__NEXT_SET(x) (((x) << RDMA_REGION_1__NEXT_LSB) & RDMA_REGION_1__NEXT_MASK)
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#define RDMA_REGION_2__ADDRESS 0x00000028
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#define RDMA_REGION_2__OFFSET 0x00000028
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#define RDMA_REGION_2__ADDR_MSB 31
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#define RDMA_REGION_2__ADDR_LSB 13
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#define RDMA_REGION_2__ADDR_MASK 0xffffe000
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#define RDMA_REGION_2__ADDR_GET(x) (((x) & RDMA_REGION_2__ADDR_MASK) >> RDMA_REGION_2__ADDR_LSB)
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#define RDMA_REGION_2__ADDR_SET(x) (((x) << RDMA_REGION_2__ADDR_LSB) & RDMA_REGION_2__ADDR_MASK)
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#define RDMA_REGION_2__LENGTH_MSB 12
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#define RDMA_REGION_2__LENGTH_LSB 2
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#define RDMA_REGION_2__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_2__LENGTH_GET(x) (((x) & RDMA_REGION_2__LENGTH_MASK) >> RDMA_REGION_2__LENGTH_LSB)
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#define RDMA_REGION_2__LENGTH_SET(x) (((x) << RDMA_REGION_2__LENGTH_LSB) & RDMA_REGION_2__LENGTH_MASK)
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#define RDMA_REGION_2__INDI_MSB 1
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#define RDMA_REGION_2__INDI_LSB 1
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#define RDMA_REGION_2__INDI_MASK 0x00000002
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#define RDMA_REGION_2__INDI_GET(x) (((x) & RDMA_REGION_2__INDI_MASK) >> RDMA_REGION_2__INDI_LSB)
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#define RDMA_REGION_2__INDI_SET(x) (((x) << RDMA_REGION_2__INDI_LSB) & RDMA_REGION_2__INDI_MASK)
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#define RDMA_REGION_2__NEXT_MSB 0
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#define RDMA_REGION_2__NEXT_LSB 0
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#define RDMA_REGION_2__NEXT_MASK 0x00000001
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#define RDMA_REGION_2__NEXT_GET(x) (((x) & RDMA_REGION_2__NEXT_MASK) >> RDMA_REGION_2__NEXT_LSB)
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#define RDMA_REGION_2__NEXT_SET(x) (((x) << RDMA_REGION_2__NEXT_LSB) & RDMA_REGION_2__NEXT_MASK)
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#define RDMA_REGION_3__ADDRESS 0x0000002c
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#define RDMA_REGION_3__OFFSET 0x0000002c
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#define RDMA_REGION_3__ADDR_MSB 31
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#define RDMA_REGION_3__ADDR_LSB 13
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#define RDMA_REGION_3__ADDR_MASK 0xffffe000
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#define RDMA_REGION_3__ADDR_GET(x) (((x) & RDMA_REGION_3__ADDR_MASK) >> RDMA_REGION_3__ADDR_LSB)
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#define RDMA_REGION_3__ADDR_SET(x) (((x) << RDMA_REGION_3__ADDR_LSB) & RDMA_REGION_3__ADDR_MASK)
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#define RDMA_REGION_3__LENGTH_MSB 12
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#define RDMA_REGION_3__LENGTH_LSB 2
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#define RDMA_REGION_3__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_3__LENGTH_GET(x) (((x) & RDMA_REGION_3__LENGTH_MASK) >> RDMA_REGION_3__LENGTH_LSB)
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#define RDMA_REGION_3__LENGTH_SET(x) (((x) << RDMA_REGION_3__LENGTH_LSB) & RDMA_REGION_3__LENGTH_MASK)
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#define RDMA_REGION_3__INDI_MSB 1
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#define RDMA_REGION_3__INDI_LSB 1
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#define RDMA_REGION_3__INDI_MASK 0x00000002
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#define RDMA_REGION_3__INDI_GET(x) (((x) & RDMA_REGION_3__INDI_MASK) >> RDMA_REGION_3__INDI_LSB)
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#define RDMA_REGION_3__INDI_SET(x) (((x) << RDMA_REGION_3__INDI_LSB) & RDMA_REGION_3__INDI_MASK)
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#define RDMA_REGION_3__NEXT_MSB 0
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#define RDMA_REGION_3__NEXT_LSB 0
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#define RDMA_REGION_3__NEXT_MASK 0x00000001
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#define RDMA_REGION_3__NEXT_GET(x) (((x) & RDMA_REGION_3__NEXT_MASK) >> RDMA_REGION_3__NEXT_LSB)
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#define RDMA_REGION_3__NEXT_SET(x) (((x) << RDMA_REGION_3__NEXT_LSB) & RDMA_REGION_3__NEXT_MASK)
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#define RDMA_REGION_4__ADDRESS 0x00000030
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#define RDMA_REGION_4__OFFSET 0x00000030
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#define RDMA_REGION_4__ADDR_MSB 31
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#define RDMA_REGION_4__ADDR_LSB 13
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#define RDMA_REGION_4__ADDR_MASK 0xffffe000
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#define RDMA_REGION_4__ADDR_GET(x) (((x) & RDMA_REGION_4__ADDR_MASK) >> RDMA_REGION_4__ADDR_LSB)
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#define RDMA_REGION_4__ADDR_SET(x) (((x) << RDMA_REGION_4__ADDR_LSB) & RDMA_REGION_4__ADDR_MASK)
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#define RDMA_REGION_4__LENGTH_MSB 12
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#define RDMA_REGION_4__LENGTH_LSB 2
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#define RDMA_REGION_4__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_4__LENGTH_GET(x) (((x) & RDMA_REGION_4__LENGTH_MASK) >> RDMA_REGION_4__LENGTH_LSB)
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#define RDMA_REGION_4__LENGTH_SET(x) (((x) << RDMA_REGION_4__LENGTH_LSB) & RDMA_REGION_4__LENGTH_MASK)
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#define RDMA_REGION_4__INDI_MSB 1
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#define RDMA_REGION_4__INDI_LSB 1
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#define RDMA_REGION_4__INDI_MASK 0x00000002
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#define RDMA_REGION_4__INDI_GET(x) (((x) & RDMA_REGION_4__INDI_MASK) >> RDMA_REGION_4__INDI_LSB)
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#define RDMA_REGION_4__INDI_SET(x) (((x) << RDMA_REGION_4__INDI_LSB) & RDMA_REGION_4__INDI_MASK)
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#define RDMA_REGION_4__NEXT_MSB 0
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#define RDMA_REGION_4__NEXT_LSB 0
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#define RDMA_REGION_4__NEXT_MASK 0x00000001
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#define RDMA_REGION_4__NEXT_GET(x) (((x) & RDMA_REGION_4__NEXT_MASK) >> RDMA_REGION_4__NEXT_LSB)
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#define RDMA_REGION_4__NEXT_SET(x) (((x) << RDMA_REGION_4__NEXT_LSB) & RDMA_REGION_4__NEXT_MASK)
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#define RDMA_REGION_5__ADDRESS 0x00000034
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#define RDMA_REGION_5__OFFSET 0x00000034
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#define RDMA_REGION_5__ADDR_MSB 31
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#define RDMA_REGION_5__ADDR_LSB 13
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#define RDMA_REGION_5__ADDR_MASK 0xffffe000
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#define RDMA_REGION_5__ADDR_GET(x) (((x) & RDMA_REGION_5__ADDR_MASK) >> RDMA_REGION_5__ADDR_LSB)
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#define RDMA_REGION_5__ADDR_SET(x) (((x) << RDMA_REGION_5__ADDR_LSB) & RDMA_REGION_5__ADDR_MASK)
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#define RDMA_REGION_5__LENGTH_MSB 12
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#define RDMA_REGION_5__LENGTH_LSB 2
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#define RDMA_REGION_5__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_5__LENGTH_GET(x) (((x) & RDMA_REGION_5__LENGTH_MASK) >> RDMA_REGION_5__LENGTH_LSB)
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#define RDMA_REGION_5__LENGTH_SET(x) (((x) << RDMA_REGION_5__LENGTH_LSB) & RDMA_REGION_5__LENGTH_MASK)
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#define RDMA_REGION_5__INDI_MSB 1
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#define RDMA_REGION_5__INDI_LSB 1
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#define RDMA_REGION_5__INDI_MASK 0x00000002
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#define RDMA_REGION_5__INDI_GET(x) (((x) & RDMA_REGION_5__INDI_MASK) >> RDMA_REGION_5__INDI_LSB)
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#define RDMA_REGION_5__INDI_SET(x) (((x) << RDMA_REGION_5__INDI_LSB) & RDMA_REGION_5__INDI_MASK)
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#define RDMA_REGION_5__NEXT_MSB 0
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#define RDMA_REGION_5__NEXT_LSB 0
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#define RDMA_REGION_5__NEXT_MASK 0x00000001
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#define RDMA_REGION_5__NEXT_GET(x) (((x) & RDMA_REGION_5__NEXT_MASK) >> RDMA_REGION_5__NEXT_LSB)
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#define RDMA_REGION_5__NEXT_SET(x) (((x) << RDMA_REGION_5__NEXT_LSB) & RDMA_REGION_5__NEXT_MASK)
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#define RDMA_REGION_6__ADDRESS 0x00000038
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#define RDMA_REGION_6__OFFSET 0x00000038
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#define RDMA_REGION_6__ADDR_MSB 31
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#define RDMA_REGION_6__ADDR_LSB 13
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#define RDMA_REGION_6__ADDR_MASK 0xffffe000
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#define RDMA_REGION_6__ADDR_GET(x) (((x) & RDMA_REGION_6__ADDR_MASK) >> RDMA_REGION_6__ADDR_LSB)
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#define RDMA_REGION_6__ADDR_SET(x) (((x) << RDMA_REGION_6__ADDR_LSB) & RDMA_REGION_6__ADDR_MASK)
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#define RDMA_REGION_6__LENGTH_MSB 12
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#define RDMA_REGION_6__LENGTH_LSB 2
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#define RDMA_REGION_6__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_6__LENGTH_GET(x) (((x) & RDMA_REGION_6__LENGTH_MASK) >> RDMA_REGION_6__LENGTH_LSB)
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#define RDMA_REGION_6__LENGTH_SET(x) (((x) << RDMA_REGION_6__LENGTH_LSB) & RDMA_REGION_6__LENGTH_MASK)
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#define RDMA_REGION_6__INDI_MSB 1
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#define RDMA_REGION_6__INDI_LSB 1
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#define RDMA_REGION_6__INDI_MASK 0x00000002
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#define RDMA_REGION_6__INDI_GET(x) (((x) & RDMA_REGION_6__INDI_MASK) >> RDMA_REGION_6__INDI_LSB)
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#define RDMA_REGION_6__INDI_SET(x) (((x) << RDMA_REGION_6__INDI_LSB) & RDMA_REGION_6__INDI_MASK)
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#define RDMA_REGION_6__NEXT_MSB 0
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#define RDMA_REGION_6__NEXT_LSB 0
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#define RDMA_REGION_6__NEXT_MASK 0x00000001
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#define RDMA_REGION_6__NEXT_GET(x) (((x) & RDMA_REGION_6__NEXT_MASK) >> RDMA_REGION_6__NEXT_LSB)
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#define RDMA_REGION_6__NEXT_SET(x) (((x) << RDMA_REGION_6__NEXT_LSB) & RDMA_REGION_6__NEXT_MASK)
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#define RDMA_REGION_7__ADDRESS 0x0000003c
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#define RDMA_REGION_7__OFFSET 0x0000003c
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#define RDMA_REGION_7__ADDR_MSB 31
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#define RDMA_REGION_7__ADDR_LSB 13
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#define RDMA_REGION_7__ADDR_MASK 0xffffe000
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#define RDMA_REGION_7__ADDR_GET(x) (((x) & RDMA_REGION_7__ADDR_MASK) >> RDMA_REGION_7__ADDR_LSB)
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#define RDMA_REGION_7__ADDR_SET(x) (((x) << RDMA_REGION_7__ADDR_LSB) & RDMA_REGION_7__ADDR_MASK)
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#define RDMA_REGION_7__LENGTH_MSB 12
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#define RDMA_REGION_7__LENGTH_LSB 2
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#define RDMA_REGION_7__LENGTH_MASK 0x00001ffc
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#define RDMA_REGION_7__LENGTH_GET(x) (((x) & RDMA_REGION_7__LENGTH_MASK) >> RDMA_REGION_7__LENGTH_LSB)
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#define RDMA_REGION_7__LENGTH_SET(x) (((x) << RDMA_REGION_7__LENGTH_LSB) & RDMA_REGION_7__LENGTH_MASK)
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#define RDMA_REGION_7__INDI_MSB 1
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#define RDMA_REGION_7__INDI_LSB 1
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#define RDMA_REGION_7__INDI_MASK 0x00000002
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#define RDMA_REGION_7__INDI_GET(x) (((x) & RDMA_REGION_7__INDI_MASK) >> RDMA_REGION_7__INDI_LSB)
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#define RDMA_REGION_7__INDI_SET(x) (((x) << RDMA_REGION_7__INDI_LSB) & RDMA_REGION_7__INDI_MASK)
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#define RDMA_REGION_7__NEXT_MSB 0
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#define RDMA_REGION_7__NEXT_LSB 0
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#define RDMA_REGION_7__NEXT_MASK 0x00000001
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#define RDMA_REGION_7__NEXT_GET(x) (((x) & RDMA_REGION_7__NEXT_MASK) >> RDMA_REGION_7__NEXT_LSB)
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#define RDMA_REGION_7__NEXT_SET(x) (((x) << RDMA_REGION_7__NEXT_LSB) & RDMA_REGION_7__NEXT_MASK)
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#define RDMA_REGION_8__ADDRESS 0x00000040
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#define RDMA_REGION_8__OFFSET 0x00000040
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#define RDMA_REGION_8__ADDR_MSB 31
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#define RDMA_REGION_8__ADDR_LSB 13
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#define RDMA_REGION_8__ADDR_MASK 0xffffe000
305
#define RDMA_REGION_8__ADDR_GET(x) (((x) & RDMA_REGION_8__ADDR_MASK) >> RDMA_REGION_8__ADDR_LSB)
306
#define RDMA_REGION_8__ADDR_SET(x) (((x) << RDMA_REGION_8__ADDR_LSB) & RDMA_REGION_8__ADDR_MASK)
307
#define RDMA_REGION_8__LENGTH_MSB 12
308
#define RDMA_REGION_8__LENGTH_LSB 2
309
#define RDMA_REGION_8__LENGTH_MASK 0x00001ffc
310
#define RDMA_REGION_8__LENGTH_GET(x) (((x) & RDMA_REGION_8__LENGTH_MASK) >> RDMA_REGION_8__LENGTH_LSB)
311
#define RDMA_REGION_8__LENGTH_SET(x) (((x) << RDMA_REGION_8__LENGTH_LSB) & RDMA_REGION_8__LENGTH_MASK)
312
#define RDMA_REGION_8__INDI_MSB 1
313
#define RDMA_REGION_8__INDI_LSB 1
314
#define RDMA_REGION_8__INDI_MASK 0x00000002
315
#define RDMA_REGION_8__INDI_GET(x) (((x) & RDMA_REGION_8__INDI_MASK) >> RDMA_REGION_8__INDI_LSB)
316
#define RDMA_REGION_8__INDI_SET(x) (((x) << RDMA_REGION_8__INDI_LSB) & RDMA_REGION_8__INDI_MASK)
317
#define RDMA_REGION_8__NEXT_MSB 0
318
#define RDMA_REGION_8__NEXT_LSB 0
319
#define RDMA_REGION_8__NEXT_MASK 0x00000001
320
#define RDMA_REGION_8__NEXT_GET(x) (((x) & RDMA_REGION_8__NEXT_MASK) >> RDMA_REGION_8__NEXT_LSB)
321
#define RDMA_REGION_8__NEXT_SET(x) (((x) << RDMA_REGION_8__NEXT_LSB) & RDMA_REGION_8__NEXT_MASK)
323
#define RDMA_REGION_9__ADDRESS 0x00000044
324
#define RDMA_REGION_9__OFFSET 0x00000044
325
#define RDMA_REGION_9__ADDR_MSB 31
326
#define RDMA_REGION_9__ADDR_LSB 13
327
#define RDMA_REGION_9__ADDR_MASK 0xffffe000
328
#define RDMA_REGION_9__ADDR_GET(x) (((x) & RDMA_REGION_9__ADDR_MASK) >> RDMA_REGION_9__ADDR_LSB)
329
#define RDMA_REGION_9__ADDR_SET(x) (((x) << RDMA_REGION_9__ADDR_LSB) & RDMA_REGION_9__ADDR_MASK)
330
#define RDMA_REGION_9__LENGTH_MSB 12
331
#define RDMA_REGION_9__LENGTH_LSB 2
332
#define RDMA_REGION_9__LENGTH_MASK 0x00001ffc
333
#define RDMA_REGION_9__LENGTH_GET(x) (((x) & RDMA_REGION_9__LENGTH_MASK) >> RDMA_REGION_9__LENGTH_LSB)
334
#define RDMA_REGION_9__LENGTH_SET(x) (((x) << RDMA_REGION_9__LENGTH_LSB) & RDMA_REGION_9__LENGTH_MASK)
335
#define RDMA_REGION_9__INDI_MSB 1
336
#define RDMA_REGION_9__INDI_LSB 1
337
#define RDMA_REGION_9__INDI_MASK 0x00000002
338
#define RDMA_REGION_9__INDI_GET(x) (((x) & RDMA_REGION_9__INDI_MASK) >> RDMA_REGION_9__INDI_LSB)
339
#define RDMA_REGION_9__INDI_SET(x) (((x) << RDMA_REGION_9__INDI_LSB) & RDMA_REGION_9__INDI_MASK)
340
#define RDMA_REGION_9__NEXT_MSB 0
341
#define RDMA_REGION_9__NEXT_LSB 0
342
#define RDMA_REGION_9__NEXT_MASK 0x00000001
343
#define RDMA_REGION_9__NEXT_GET(x) (((x) & RDMA_REGION_9__NEXT_MASK) >> RDMA_REGION_9__NEXT_LSB)
344
#define RDMA_REGION_9__NEXT_SET(x) (((x) << RDMA_REGION_9__NEXT_LSB) & RDMA_REGION_9__NEXT_MASK)
346
#define RDMA_REGION_10__ADDRESS 0x00000048
347
#define RDMA_REGION_10__OFFSET 0x00000048
348
#define RDMA_REGION_10__ADDR_MSB 31
349
#define RDMA_REGION_10__ADDR_LSB 13
350
#define RDMA_REGION_10__ADDR_MASK 0xffffe000
351
#define RDMA_REGION_10__ADDR_GET(x) (((x) & RDMA_REGION_10__ADDR_MASK) >> RDMA_REGION_10__ADDR_LSB)
352
#define RDMA_REGION_10__ADDR_SET(x) (((x) << RDMA_REGION_10__ADDR_LSB) & RDMA_REGION_10__ADDR_MASK)
353
#define RDMA_REGION_10__LENGTH_MSB 12
354
#define RDMA_REGION_10__LENGTH_LSB 2
355
#define RDMA_REGION_10__LENGTH_MASK 0x00001ffc
356
#define RDMA_REGION_10__LENGTH_GET(x) (((x) & RDMA_REGION_10__LENGTH_MASK) >> RDMA_REGION_10__LENGTH_LSB)
357
#define RDMA_REGION_10__LENGTH_SET(x) (((x) << RDMA_REGION_10__LENGTH_LSB) & RDMA_REGION_10__LENGTH_MASK)
358
#define RDMA_REGION_10__INDI_MSB 1
359
#define RDMA_REGION_10__INDI_LSB 1
360
#define RDMA_REGION_10__INDI_MASK 0x00000002
361
#define RDMA_REGION_10__INDI_GET(x) (((x) & RDMA_REGION_10__INDI_MASK) >> RDMA_REGION_10__INDI_LSB)
362
#define RDMA_REGION_10__INDI_SET(x) (((x) << RDMA_REGION_10__INDI_LSB) & RDMA_REGION_10__INDI_MASK)
363
#define RDMA_REGION_10__NEXT_MSB 0
364
#define RDMA_REGION_10__NEXT_LSB 0
365
#define RDMA_REGION_10__NEXT_MASK 0x00000001
366
#define RDMA_REGION_10__NEXT_GET(x) (((x) & RDMA_REGION_10__NEXT_MASK) >> RDMA_REGION_10__NEXT_LSB)
367
#define RDMA_REGION_10__NEXT_SET(x) (((x) << RDMA_REGION_10__NEXT_LSB) & RDMA_REGION_10__NEXT_MASK)
369
#define RDMA_REGION_11__ADDRESS 0x0000004c
370
#define RDMA_REGION_11__OFFSET 0x0000004c
371
#define RDMA_REGION_11__ADDR_MSB 31
372
#define RDMA_REGION_11__ADDR_LSB 13
373
#define RDMA_REGION_11__ADDR_MASK 0xffffe000
374
#define RDMA_REGION_11__ADDR_GET(x) (((x) & RDMA_REGION_11__ADDR_MASK) >> RDMA_REGION_11__ADDR_LSB)
375
#define RDMA_REGION_11__ADDR_SET(x) (((x) << RDMA_REGION_11__ADDR_LSB) & RDMA_REGION_11__ADDR_MASK)
376
#define RDMA_REGION_11__LENGTH_MSB 12
377
#define RDMA_REGION_11__LENGTH_LSB 2
378
#define RDMA_REGION_11__LENGTH_MASK 0x00001ffc
379
#define RDMA_REGION_11__LENGTH_GET(x) (((x) & RDMA_REGION_11__LENGTH_MASK) >> RDMA_REGION_11__LENGTH_LSB)
380
#define RDMA_REGION_11__LENGTH_SET(x) (((x) << RDMA_REGION_11__LENGTH_LSB) & RDMA_REGION_11__LENGTH_MASK)
381
#define RDMA_REGION_11__INDI_MSB 1
382
#define RDMA_REGION_11__INDI_LSB 1
383
#define RDMA_REGION_11__INDI_MASK 0x00000002
384
#define RDMA_REGION_11__INDI_GET(x) (((x) & RDMA_REGION_11__INDI_MASK) >> RDMA_REGION_11__INDI_LSB)
385
#define RDMA_REGION_11__INDI_SET(x) (((x) << RDMA_REGION_11__INDI_LSB) & RDMA_REGION_11__INDI_MASK)
386
#define RDMA_REGION_11__NEXT_MSB 0
387
#define RDMA_REGION_11__NEXT_LSB 0
388
#define RDMA_REGION_11__NEXT_MASK 0x00000001
389
#define RDMA_REGION_11__NEXT_GET(x) (((x) & RDMA_REGION_11__NEXT_MASK) >> RDMA_REGION_11__NEXT_LSB)
390
#define RDMA_REGION_11__NEXT_SET(x) (((x) << RDMA_REGION_11__NEXT_LSB) & RDMA_REGION_11__NEXT_MASK)
392
#define RDMA_REGION_12__ADDRESS 0x00000050
393
#define RDMA_REGION_12__OFFSET 0x00000050
394
#define RDMA_REGION_12__ADDR_MSB 31
395
#define RDMA_REGION_12__ADDR_LSB 13
396
#define RDMA_REGION_12__ADDR_MASK 0xffffe000
397
#define RDMA_REGION_12__ADDR_GET(x) (((x) & RDMA_REGION_12__ADDR_MASK) >> RDMA_REGION_12__ADDR_LSB)
398
#define RDMA_REGION_12__ADDR_SET(x) (((x) << RDMA_REGION_12__ADDR_LSB) & RDMA_REGION_12__ADDR_MASK)
399
#define RDMA_REGION_12__LENGTH_MSB 12
400
#define RDMA_REGION_12__LENGTH_LSB 2
401
#define RDMA_REGION_12__LENGTH_MASK 0x00001ffc
402
#define RDMA_REGION_12__LENGTH_GET(x) (((x) & RDMA_REGION_12__LENGTH_MASK) >> RDMA_REGION_12__LENGTH_LSB)
403
#define RDMA_REGION_12__LENGTH_SET(x) (((x) << RDMA_REGION_12__LENGTH_LSB) & RDMA_REGION_12__LENGTH_MASK)
404
#define RDMA_REGION_12__INDI_MSB 1
405
#define RDMA_REGION_12__INDI_LSB 1
406
#define RDMA_REGION_12__INDI_MASK 0x00000002
407
#define RDMA_REGION_12__INDI_GET(x) (((x) & RDMA_REGION_12__INDI_MASK) >> RDMA_REGION_12__INDI_LSB)
408
#define RDMA_REGION_12__INDI_SET(x) (((x) << RDMA_REGION_12__INDI_LSB) & RDMA_REGION_12__INDI_MASK)
409
#define RDMA_REGION_12__NEXT_MSB 0
410
#define RDMA_REGION_12__NEXT_LSB 0
411
#define RDMA_REGION_12__NEXT_MASK 0x00000001
412
#define RDMA_REGION_12__NEXT_GET(x) (((x) & RDMA_REGION_12__NEXT_MASK) >> RDMA_REGION_12__NEXT_LSB)
413
#define RDMA_REGION_12__NEXT_SET(x) (((x) << RDMA_REGION_12__NEXT_LSB) & RDMA_REGION_12__NEXT_MASK)
415
#define RDMA_REGION_13__ADDRESS 0x00000054
416
#define RDMA_REGION_13__OFFSET 0x00000054
417
#define RDMA_REGION_13__ADDR_MSB 31
418
#define RDMA_REGION_13__ADDR_LSB 13
419
#define RDMA_REGION_13__ADDR_MASK 0xffffe000
420
#define RDMA_REGION_13__ADDR_GET(x) (((x) & RDMA_REGION_13__ADDR_MASK) >> RDMA_REGION_13__ADDR_LSB)
421
#define RDMA_REGION_13__ADDR_SET(x) (((x) << RDMA_REGION_13__ADDR_LSB) & RDMA_REGION_13__ADDR_MASK)
422
#define RDMA_REGION_13__LENGTH_MSB 12
423
#define RDMA_REGION_13__LENGTH_LSB 2
424
#define RDMA_REGION_13__LENGTH_MASK 0x00001ffc
425
#define RDMA_REGION_13__LENGTH_GET(x) (((x) & RDMA_REGION_13__LENGTH_MASK) >> RDMA_REGION_13__LENGTH_LSB)
426
#define RDMA_REGION_13__LENGTH_SET(x) (((x) << RDMA_REGION_13__LENGTH_LSB) & RDMA_REGION_13__LENGTH_MASK)
427
#define RDMA_REGION_13__INDI_MSB 1
428
#define RDMA_REGION_13__INDI_LSB 1
429
#define RDMA_REGION_13__INDI_MASK 0x00000002
430
#define RDMA_REGION_13__INDI_GET(x) (((x) & RDMA_REGION_13__INDI_MASK) >> RDMA_REGION_13__INDI_LSB)
431
#define RDMA_REGION_13__INDI_SET(x) (((x) << RDMA_REGION_13__INDI_LSB) & RDMA_REGION_13__INDI_MASK)
432
#define RDMA_REGION_13__NEXT_MSB 0
433
#define RDMA_REGION_13__NEXT_LSB 0
434
#define RDMA_REGION_13__NEXT_MASK 0x00000001
435
#define RDMA_REGION_13__NEXT_GET(x) (((x) & RDMA_REGION_13__NEXT_MASK) >> RDMA_REGION_13__NEXT_LSB)
436
#define RDMA_REGION_13__NEXT_SET(x) (((x) << RDMA_REGION_13__NEXT_LSB) & RDMA_REGION_13__NEXT_MASK)
438
#define RDMA_REGION_14__ADDRESS 0x00000058
439
#define RDMA_REGION_14__OFFSET 0x00000058
440
#define RDMA_REGION_14__ADDR_MSB 31
441
#define RDMA_REGION_14__ADDR_LSB 13
442
#define RDMA_REGION_14__ADDR_MASK 0xffffe000
443
#define RDMA_REGION_14__ADDR_GET(x) (((x) & RDMA_REGION_14__ADDR_MASK) >> RDMA_REGION_14__ADDR_LSB)
444
#define RDMA_REGION_14__ADDR_SET(x) (((x) << RDMA_REGION_14__ADDR_LSB) & RDMA_REGION_14__ADDR_MASK)
445
#define RDMA_REGION_14__LENGTH_MSB 12
446
#define RDMA_REGION_14__LENGTH_LSB 2
447
#define RDMA_REGION_14__LENGTH_MASK 0x00001ffc
448
#define RDMA_REGION_14__LENGTH_GET(x) (((x) & RDMA_REGION_14__LENGTH_MASK) >> RDMA_REGION_14__LENGTH_LSB)
449
#define RDMA_REGION_14__LENGTH_SET(x) (((x) << RDMA_REGION_14__LENGTH_LSB) & RDMA_REGION_14__LENGTH_MASK)
450
#define RDMA_REGION_14__INDI_MSB 1
451
#define RDMA_REGION_14__INDI_LSB 1
452
#define RDMA_REGION_14__INDI_MASK 0x00000002
453
#define RDMA_REGION_14__INDI_GET(x) (((x) & RDMA_REGION_14__INDI_MASK) >> RDMA_REGION_14__INDI_LSB)
454
#define RDMA_REGION_14__INDI_SET(x) (((x) << RDMA_REGION_14__INDI_LSB) & RDMA_REGION_14__INDI_MASK)
455
#define RDMA_REGION_14__NEXT_MSB 0
456
#define RDMA_REGION_14__NEXT_LSB 0
457
#define RDMA_REGION_14__NEXT_MASK 0x00000001
458
#define RDMA_REGION_14__NEXT_GET(x) (((x) & RDMA_REGION_14__NEXT_MASK) >> RDMA_REGION_14__NEXT_LSB)
459
#define RDMA_REGION_14__NEXT_SET(x) (((x) << RDMA_REGION_14__NEXT_LSB) & RDMA_REGION_14__NEXT_MASK)
461
#define RDMA_REGION_15__ADDRESS 0x0000005c
462
#define RDMA_REGION_15__OFFSET 0x0000005c
463
#define RDMA_REGION_15__ADDR_MSB 31
464
#define RDMA_REGION_15__ADDR_LSB 13
465
#define RDMA_REGION_15__ADDR_MASK 0xffffe000
466
#define RDMA_REGION_15__ADDR_GET(x) (((x) & RDMA_REGION_15__ADDR_MASK) >> RDMA_REGION_15__ADDR_LSB)
467
#define RDMA_REGION_15__ADDR_SET(x) (((x) << RDMA_REGION_15__ADDR_LSB) & RDMA_REGION_15__ADDR_MASK)
468
#define RDMA_REGION_15__LENGTH_MSB 12
469
#define RDMA_REGION_15__LENGTH_LSB 2
470
#define RDMA_REGION_15__LENGTH_MASK 0x00001ffc
471
#define RDMA_REGION_15__LENGTH_GET(x) (((x) & RDMA_REGION_15__LENGTH_MASK) >> RDMA_REGION_15__LENGTH_LSB)
472
#define RDMA_REGION_15__LENGTH_SET(x) (((x) << RDMA_REGION_15__LENGTH_LSB) & RDMA_REGION_15__LENGTH_MASK)
473
#define RDMA_REGION_15__INDI_MSB 1
474
#define RDMA_REGION_15__INDI_LSB 1
475
#define RDMA_REGION_15__INDI_MASK 0x00000002
476
#define RDMA_REGION_15__INDI_GET(x) (((x) & RDMA_REGION_15__INDI_MASK) >> RDMA_REGION_15__INDI_LSB)
477
#define RDMA_REGION_15__INDI_SET(x) (((x) << RDMA_REGION_15__INDI_LSB) & RDMA_REGION_15__INDI_MASK)
478
#define RDMA_REGION_15__NEXT_MSB 0
479
#define RDMA_REGION_15__NEXT_LSB 0
480
#define RDMA_REGION_15__NEXT_MASK 0x00000001
481
#define RDMA_REGION_15__NEXT_GET(x) (((x) & RDMA_REGION_15__NEXT_MASK) >> RDMA_REGION_15__NEXT_LSB)
482
#define RDMA_REGION_15__NEXT_SET(x) (((x) << RDMA_REGION_15__NEXT_LSB) & RDMA_REGION_15__NEXT_MASK)
484
#define DMA_STATUS_ADDRESS 0x00000060
485
#define DMA_STATUS_OFFSET 0x00000060
486
#define DMA_STATUS_ERROR_CODE_MSB 14
487
#define DMA_STATUS_ERROR_CODE_LSB 4
488
#define DMA_STATUS_ERROR_CODE_MASK 0x00007ff0
489
#define DMA_STATUS_ERROR_CODE_GET(x) (((x) & DMA_STATUS_ERROR_CODE_MASK) >> DMA_STATUS_ERROR_CODE_LSB)
490
#define DMA_STATUS_ERROR_CODE_SET(x) (((x) << DMA_STATUS_ERROR_CODE_LSB) & DMA_STATUS_ERROR_CODE_MASK)
491
#define DMA_STATUS_ERROR_MSB 3
492
#define DMA_STATUS_ERROR_LSB 3
493
#define DMA_STATUS_ERROR_MASK 0x00000008
494
#define DMA_STATUS_ERROR_GET(x) (((x) & DMA_STATUS_ERROR_MASK) >> DMA_STATUS_ERROR_LSB)
495
#define DMA_STATUS_ERROR_SET(x) (((x) << DMA_STATUS_ERROR_LSB) & DMA_STATUS_ERROR_MASK)
496
#define DMA_STATUS_DONE_MSB 2
497
#define DMA_STATUS_DONE_LSB 2
498
#define DMA_STATUS_DONE_MASK 0x00000004
499
#define DMA_STATUS_DONE_GET(x) (((x) & DMA_STATUS_DONE_MASK) >> DMA_STATUS_DONE_LSB)
500
#define DMA_STATUS_DONE_SET(x) (((x) << DMA_STATUS_DONE_LSB) & DMA_STATUS_DONE_MASK)
501
#define DMA_STATUS_STOPPED_MSB 1
502
#define DMA_STATUS_STOPPED_LSB 1
503
#define DMA_STATUS_STOPPED_MASK 0x00000002
504
#define DMA_STATUS_STOPPED_GET(x) (((x) & DMA_STATUS_STOPPED_MASK) >> DMA_STATUS_STOPPED_LSB)
505
#define DMA_STATUS_STOPPED_SET(x) (((x) << DMA_STATUS_STOPPED_LSB) & DMA_STATUS_STOPPED_MASK)
506
#define DMA_STATUS_RUNNING_MSB 0
507
#define DMA_STATUS_RUNNING_LSB 0
508
#define DMA_STATUS_RUNNING_MASK 0x00000001
509
#define DMA_STATUS_RUNNING_GET(x) (((x) & DMA_STATUS_RUNNING_MASK) >> DMA_STATUS_RUNNING_LSB)
510
#define DMA_STATUS_RUNNING_SET(x) (((x) << DMA_STATUS_RUNNING_LSB) & DMA_STATUS_RUNNING_MASK)
512
#define DMA_INT_EN_ADDRESS 0x00000064
513
#define DMA_INT_EN_OFFSET 0x00000064
514
#define DMA_INT_EN_ERROR_ENA_MSB 3
515
#define DMA_INT_EN_ERROR_ENA_LSB 3
516
#define DMA_INT_EN_ERROR_ENA_MASK 0x00000008
517
#define DMA_INT_EN_ERROR_ENA_GET(x) (((x) & DMA_INT_EN_ERROR_ENA_MASK) >> DMA_INT_EN_ERROR_ENA_LSB)
518
#define DMA_INT_EN_ERROR_ENA_SET(x) (((x) << DMA_INT_EN_ERROR_ENA_LSB) & DMA_INT_EN_ERROR_ENA_MASK)
519
#define DMA_INT_EN_DONE_ENA_MSB 2
520
#define DMA_INT_EN_DONE_ENA_LSB 2
521
#define DMA_INT_EN_DONE_ENA_MASK 0x00000004
522
#define DMA_INT_EN_DONE_ENA_GET(x) (((x) & DMA_INT_EN_DONE_ENA_MASK) >> DMA_INT_EN_DONE_ENA_LSB)
523
#define DMA_INT_EN_DONE_ENA_SET(x) (((x) << DMA_INT_EN_DONE_ENA_LSB) & DMA_INT_EN_DONE_ENA_MASK)
524
#define DMA_INT_EN_STOPPED_ENA_MSB 1
525
#define DMA_INT_EN_STOPPED_ENA_LSB 1
526
#define DMA_INT_EN_STOPPED_ENA_MASK 0x00000002
527
#define DMA_INT_EN_STOPPED_ENA_GET(x) (((x) & DMA_INT_EN_STOPPED_ENA_MASK) >> DMA_INT_EN_STOPPED_ENA_LSB)
528
#define DMA_INT_EN_STOPPED_ENA_SET(x) (((x) << DMA_INT_EN_STOPPED_ENA_LSB) & DMA_INT_EN_STOPPED_ENA_MASK)
531
#ifndef __ASSEMBLER__
533
typedef struct rdma_reg_reg_s {
534
volatile unsigned int dma_config;
535
volatile unsigned int dma_control;
536
volatile unsigned int dma_src;
537
volatile unsigned int dma_dest;
538
volatile unsigned int dma_length;
539
volatile unsigned int vmc_base;
540
volatile unsigned int indirect_reg;
541
volatile unsigned int indirect_return;
542
volatile unsigned int rdma_region_0_;
543
volatile unsigned int rdma_region_1_;
544
volatile unsigned int rdma_region_2_;
545
volatile unsigned int rdma_region_3_;
546
volatile unsigned int rdma_region_4_;
547
volatile unsigned int rdma_region_5_;
548
volatile unsigned int rdma_region_6_;
549
volatile unsigned int rdma_region_7_;
550
volatile unsigned int rdma_region_8_;
551
volatile unsigned int rdma_region_9_;
552
volatile unsigned int rdma_region_10_;
553
volatile unsigned int rdma_region_11_;
554
volatile unsigned int rdma_region_12_;
555
volatile unsigned int rdma_region_13_;
556
volatile unsigned int rdma_region_14_;
557
volatile unsigned int rdma_region_15_;
558
volatile unsigned int dma_status;
559
volatile unsigned int dma_int_en;
562
#endif /* __ASSEMBLER__ */
564
#endif /* _RDMA_REG_H_ */