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Viewing changes to drivers/parport/parport_pc.c

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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Lines of Context:
drivers/parport/parport_pc.c
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        outb(key, io);
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        outb(key, io);     /* Write Magic Sequence to EFER, extended
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                              funtion enable register */
 
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                              function enable register */
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        outb(0x20, io);    /* Write EFIR, extended function index register */
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        devid = inb(io + 1);  /* Read EFDR, extended function data register */
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        outb(0x21, io);
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        x_oldid = inb(io + 2);
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        outb(key, io);     /* Write Magic Byte to EFER, extended
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                              funtion enable register */
 
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                              function enable register */
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        outb(0x20, io + 2);  /* Write EFIR, extended function index register */
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        devid = inb(io + 2);  /* Read EFDR, extended function data register */
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        outb(0x21, io + 1);
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        outb(key, io);
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        outb(key, io);     /* Write Magic Sequence to EFER, extended
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                              funtion enable register */
 
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                              function enable register */
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        outb(0x0d, io);    /* Write EFIR, extended function index register */
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        oldid = inb(io + 1);  /* Read EFDR, extended function data register */
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        outb(0x0e, io);
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        u8 origval, r;
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        if (verbose_probing)
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                printk(KERN_DEBUG "IT8705 Super-IO detection, now testing port 2E ...\n");
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        if (!request_region(0x2e, 2, __func__))
 
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        if (!request_muxed_region(0x2e, 2, __func__))
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                return;
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        origval = inb(0x2e);            /* Save original value */
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        outb(0x87, 0x2e);
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                                         const struct parport_pc_via_data *via)
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{
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        short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 };
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        struct resource *base_res;
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        u32 ite8872set;
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        u32 ite8872_lpt, ite8872_lpthi;
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        u8 ite8872_irq, type;
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        /* make sure which one chip */
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        for (i = 0; i < 5; i++) {
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                base_res = request_region(inta_addr[i], 32, "it887x");
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                if (base_res) {
 
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                if (request_region(inta_addr[i], 32, "it887x")) {
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                        int test;
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                        pci_write_config_dword(pdev, 0x60,
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                                                0xe5000000 | inta_addr[i]);
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                        test = inb(inta_addr[i]);
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                        if (test != 0xff)
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                                break;
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                        release_region(inta_addr[i], 0x8);
 
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                        release_region(inta_addr[i], 32);
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                }
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        }
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        if (i >= 5) {
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        /*
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         * Release the resource so that parport_pc_probe_port can get it.
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         */
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        release_resource(base_res);
 
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        release_region(inta_addr[i], 32);
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        if (parport_pc_probe_port(ite8872_lpt, ite8872_lpthi,
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                                   irq, PARPORT_DMA_NONE, &pdev->dev, 0)) {
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                printk(KERN_INFO