← Back to branch summary

~ubuntu-branches/ubuntu/precise/linux-ti-omap4/precise

« back to all changes in this revision

Viewing changes to drivers/scsi/aacraid/aacraid.h

  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

Show diffs side-by-side

added added

removed removed

Lines of Context:
drivers/scsi/aacraid/aacraid.h
12
12
 *----------------------------------------------------------------------------*/
13
13
 
14
14
#ifndef AAC_DRIVER_BUILD
15
 
# define AAC_DRIVER_BUILD 26400
 
15
# define AAC_DRIVER_BUILD 28000
16
16
# define AAC_DRIVER_BRANCH "-ms"
17
17
#endif
18
18
#define MAXIMUM_NUM_CONTAINERS  32
277
277
 
278
278
#define         FsaNormal       1
279
279
 
 
280
/* transport FIB header (PMC) */
 
281
struct aac_fib_xporthdr {
 
282
        u64     HostAddress;    /* FIB host address w/o xport header */
 
283
        u32     Size;           /* FIB size excluding xport header */
 
284
        u32     Handle;         /* driver handle to reference the FIB */
 
285
        u64     Reserved[2];
 
286
};
 
287
 
 
288
#define         ALIGN32         32
 
289
 
280
290
/*
281
291
 * Define the FIB. The FIB is the where all the requested data and
282
292
 * command information are put to the application on the FSA adapter.
394
404
        AdapterMicroFib                 = (1<<17),
395
405
        BIOSFibPath                     = (1<<18),
396
406
        FastResponseCapable             = (1<<19),
397
 
        ApiFib                          = (1<<20)       // Its an API Fib.
 
407
        ApiFib                          = (1<<20),      /* Its an API Fib */
 
408
        /* PMC NEW COMM: There is no more AIF data pending */
 
409
        NoMoreAifDataAvailable          = (1<<21)
398
410
};
399
411
 
400
412
/*
404
416
 
405
417
#define ADAPTER_INIT_STRUCT_REVISION            3
406
418
#define ADAPTER_INIT_STRUCT_REVISION_4          4 // rocket science
 
419
#define ADAPTER_INIT_STRUCT_REVISION_6          6 /* PMC src */
407
420
 
408
421
struct aac_init
409
422
{
428
441
#define INITFLAGS_NEW_COMM_SUPPORTED    0x00000001
429
442
#define INITFLAGS_DRIVER_USES_UTC_TIME  0x00000010
430
443
#define INITFLAGS_DRIVER_SUPPORTS_PM    0x00000020
 
444
#define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED      0x00000041
431
445
        __le32  MaxIoCommands;  /* max outstanding commands */
432
446
        __le32  MaxIoSize;      /* largest I/O command */
433
447
        __le32  MaxFibSize;     /* largest FIB to adapter */
 
448
        /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */
 
449
        __le32  MaxNumAif;      /* max number of aif */
 
450
        /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */
 
451
        __le32  HostRRQ_AddrLow;
 
452
        __le32  HostRRQ_AddrHigh;       /* Host RRQ (response queue) for SRC */
434
453
};
435
454
 
436
455
enum aac_log_level {
685
704
#define OutboundDoorbellReg     MUnit.ODR
686
705
 
687
706
struct rx_registers {
688
 
        struct rx_mu_registers          MUnit;          /* 1300h - 1344h */
 
707
        struct rx_mu_registers          MUnit;          /* 1300h - 1347h */
689
708
        __le32                          reserved1[2];   /* 1348h - 134ch */
690
709
        struct rx_inbound               IndexRegs;
691
710
};
703
722
#define rkt_inbound rx_inbound
704
723
 
705
724
struct rkt_registers {
706
 
        struct rkt_mu_registers         MUnit;           /* 1300h - 1344h */
 
725
        struct rkt_mu_registers         MUnit;           /* 1300h - 1347h */
707
726
        __le32                          reserved1[1006]; /* 1348h - 22fch */
708
727
        struct rkt_inbound              IndexRegs;       /* 2300h - */
709
728
};
713
732
#define rkt_writeb(AEP, CSR, value)     writeb(value, &((AEP)->regs.rkt->CSR))
714
733
#define rkt_writel(AEP, CSR, value)     writel(value, &((AEP)->regs.rkt->CSR))
715
734
 
 
735
/*
 
736
 * PMC SRC message unit registers
 
737
 */
 
738
 
 
739
#define src_inbound rx_inbound
 
740
 
 
741
struct src_mu_registers {
 
742
                                /*      PCI*| Name */
 
743
        __le32  reserved0[8];   /*      00h | Reserved */
 
744
        __le32  IDR;            /*      20h | Inbound Doorbell Register */
 
745
        __le32  IISR;           /*      24h | Inbound Int. Status Register */
 
746
        __le32  reserved1[3];   /*      28h | Reserved */
 
747
        __le32  OIMR;           /*      34h | Outbound Int. Mask Register */
 
748
        __le32  reserved2[25];  /*      38h | Reserved */
 
749
        __le32  ODR_R;          /*      9ch | Outbound Doorbell Read */
 
750
        __le32  ODR_C;          /*      a0h | Outbound Doorbell Clear */
 
751
        __le32  reserved3[6];   /*      a4h | Reserved */
 
752
        __le32  OMR;            /*      bch | Outbound Message Register */
 
753
        __le32  IQ_L;           /*  c0h | Inbound Queue (Low address) */
 
754
        __le32  IQ_H;           /*  c4h | Inbound Queue (High address) */
 
755
};
 
756
 
 
757
struct src_registers {
 
758
        struct src_mu_registers MUnit;  /* 00h - c7h */
 
759
        __le32 reserved1[130790];       /* c8h - 7fc5fh */
 
760
        struct src_inbound IndexRegs;   /* 7fc60h */
 
761
};
 
762
 
 
763
#define src_readb(AEP, CSR)             readb(&((AEP)->regs.src.bar0->CSR))
 
764
#define src_readl(AEP, CSR)             readl(&((AEP)->regs.src.bar0->CSR))
 
765
#define src_writeb(AEP, CSR, value)     writeb(value, \
 
766
                                                &((AEP)->regs.src.bar0->CSR))
 
767
#define src_writel(AEP, CSR, value)     writel(value, \
 
768
                                                &((AEP)->regs.src.bar0->CSR))
 
769
 
 
770
#define SRC_ODR_SHIFT           12
 
771
#define SRC_IDR_SHIFT           9
 
772
 
716
773
typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
717
774
 
718
775
struct aac_fib_context {
879
936
#define AAC_OPTION_MU_RESET             cpu_to_le32(0x00000001)
880
937
#define AAC_OPTION_IGNORE_RESET         cpu_to_le32(0x00000002)
881
938
#define AAC_OPTION_POWER_MANAGEMENT     cpu_to_le32(0x00000004)
 
939
#define AAC_OPTION_DOORBELL_RESET       cpu_to_le32(0x00004000)
882
940
#define AAC_SIS_VERSION_V3      3
883
941
#define AAC_SIS_SLOT_UNKNOWN    0xFF
884
942
 
940
998
#define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
941
999
#define AAC_OPT_NEW_COMM                cpu_to_le32(1<<17)
942
1000
#define AAC_OPT_NEW_COMM_64             cpu_to_le32(1<<18)
 
1001
#define AAC_OPT_NEW_COMM_TYPE1          cpu_to_le32(1<<28)
943
1002
 
944
1003
struct aac_dev
945
1004
{
952
1011
         */
953
1012
        unsigned                max_fib_size;
954
1013
        unsigned                sg_tablesize;
 
1014
        unsigned                max_num_aif;
955
1015
 
956
1016
        /*
957
1017
         *      Map for 128 fib objects (64k)
980
1040
        struct adapter_ops      a_ops;
981
1041
        unsigned long           fsrev;          /* Main driver's revision number */
982
1042
 
983
 
        unsigned                base_size;      /* Size of mapped in region */
 
1043
        unsigned long           dbg_base;       /* address of UART
 
1044
                                                 * debug buffer */
 
1045
 
 
1046
        unsigned                base_size, dbg_size;    /* Size of
 
1047
                                                         *  mapped in region */
 
1048
 
984
1049
        struct aac_init         *init;          /* Holds initialization info to communicate with adapter */
985
1050
        dma_addr_t              init_pa;        /* Holds physical address of the init struct */
986
1051
 
 
1052
        u32                     *host_rrq;      /* response queue
 
1053
                                                 * if AAC_COMM_MESSAGE_TYPE1 */
 
1054
 
 
1055
        dma_addr_t              host_rrq_pa;    /* phys. address */
 
1056
        u32                     host_rrq_idx;   /* index into rrq buffer */
 
1057
 
987
1058
        struct pci_dev          *pdev;          /* Our PCI interface */
988
1059
        void *                  printfbuf;      /* pointer to buffer used for printf's from the adapter */
989
1060
        void *                  comm_addr;      /* Base address of Comm area */
1003
1074
         */
1004
1075
#ifndef AAC_MIN_FOOTPRINT_SIZE
1005
1076
#       define AAC_MIN_FOOTPRINT_SIZE 8192
 
1077
#       define AAC_MIN_SRC_BAR0_SIZE 0x400000
 
1078
#       define AAC_MIN_SRC_BAR1_SIZE 0x800
1006
1079
#endif
1007
1080
        union
1008
1081
        {
1009
1082
                struct sa_registers __iomem *sa;
1010
1083
                struct rx_registers __iomem *rx;
1011
1084
                struct rkt_registers __iomem *rkt;
 
1085
                struct {
 
1086
                        struct src_registers __iomem *bar0;
 
1087
                        char __iomem *bar1;
 
1088
                } src;
1012
1089
        } regs;
1013
 
        volatile void __iomem *base;
 
1090
        volatile void __iomem *base, *dbg_base_mapped;
1014
1091
        volatile struct rx_inbound __iomem *IndexRegs;
1015
1092
        u32                     OIMR; /* Mask Register Cache */
1016
1093
        /*
1031
1108
        u8                      comm_interface;
1032
1109
#       define AAC_COMM_PRODUCER 0
1033
1110
#       define AAC_COMM_MESSAGE  1
1034
 
        /* macro side-effects BEWARE */
1035
 
#       define                  raw_io_interface \
1036
 
          init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4)
 
1111
#       define AAC_COMM_MESSAGE_TYPE1   3
 
1112
        u8                      raw_io_interface;
1037
1113
        u8                      raw_io_64;
1038
1114
        u8                      printf_enabled;
1039
1115
        u8                      in_reset;
1183
1259
#define CACHE_UNSTABLE          2
1184
1260
 
1185
1261
/*
1186
 
 *      Lets the client know at which level the data was commited on
 
1262
 *      Lets the client know at which level the data was committed on
1187
1263
 *      a write request
1188
1264
 */
1189
1265
 
1789
1865
#define DoorBellAdapterNormCmdNotFull   (1<<3)  /* Adapter -> Host */
1790
1866
#define DoorBellAdapterNormRespNotFull  (1<<4)  /* Adapter -> Host */
1791
1867
#define DoorBellPrintfReady             (1<<5)  /* Adapter -> Host */
 
1868
#define DoorBellAifPending              (1<<6)  /* Adapter -> Host */
 
1869
 
 
1870
/* PMC specific outbound doorbell bits */
 
1871
#define PmDoorBellResponseSent          (1<<1)  /* Adapter -> Host */
1792
1872
 
1793
1873
/*
1794
1874
 *      For FIB communication, we need all of the following things
1831
1911
#define         AifReqAPIJobUpdate      109     /* Update a job report from the API */
1832
1912
#define         AifReqAPIJobFinish      110     /* Finish a job from the API */
1833
1913
 
 
1914
/* PMC NEW COMM: Request the event data */
 
1915
#define         AifReqEvent             200
 
1916
 
1834
1917
/*
1835
1918
 *      Adapter Initiated FIB command structures. Start with the adapter
1836
1919
 *      initiated FIBs that really come from the adapter, and get responded
1886
1969
int aac_rkt_init(struct aac_dev *dev);
1887
1970
int aac_nark_init(struct aac_dev *dev);
1888
1971
int aac_sa_init(struct aac_dev *dev);
 
1972
int aac_src_init(struct aac_dev *dev);
1889
1973
int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
1890
1974
unsigned int aac_response_normal(struct aac_queue * q);
1891
1975
unsigned int aac_command_normal(struct aac_queue * q);
1892
 
unsigned int aac_intr_normal(struct aac_dev * dev, u32 Index);
 
1976
unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
 
1977
                        int isAif, int isFastResponse,
 
1978
                        struct hw_fib *aif_fib);
1893
1979
int aac_reset_adapter(struct aac_dev * dev, int forced);
1894
1980
int aac_check_health(struct aac_dev * dev);
1895
1981
int aac_command_thread(void *data);