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  • Committer: Bazaar Package Importer
  • Author(s): Paolo Pisati
  • Date: 2011-06-29 15:23:51 UTC
  • mfrom: (26.1.1 natty-proposed)
  • Revision ID: james.westby@ubuntu.com-20110629152351-xs96tm303d95rpbk
Tags: 3.0.0-1200.2
* Rebased against 3.0.0-6.7
* BSP from TI based on 3.0.0

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Lines of Context:
38
38
#include "wm8994.h"
39
39
#include "wm_hubs.h"
40
40
 
41
 
struct fll_config {
42
 
        int src;
43
 
        int in;
44
 
        int out;
45
 
};
46
 
 
47
41
#define WM8994_NUM_DRC 3
48
42
#define WM8994_NUM_EQ  3
49
43
 
59
53
        WM8994_AIF2_EQ_GAINS_1,
60
54
};
61
55
 
62
 
struct wm8994_micdet {
63
 
        struct snd_soc_jack *jack;
64
 
        int det;
65
 
        int shrt;
66
 
};
67
 
 
68
 
/* codec private data */
69
 
struct wm8994_priv {
70
 
        struct wm_hubs_data hubs;
71
 
        enum snd_soc_control_type control_type;
72
 
        void *control_data;
73
 
        struct snd_soc_codec *codec;
74
 
        int sysclk[2];
75
 
        int sysclk_rate[2];
76
 
        int mclk[2];
77
 
        int aifclk[2];
78
 
        struct fll_config fll[2], fll_suspend[2];
79
 
 
80
 
        int dac_rates[2];
81
 
        int lrclk_shared[2];
82
 
 
83
 
        int mbc_ena[3];
84
 
 
85
 
        /* Platform dependant DRC configuration */
86
 
        const char **drc_texts;
87
 
        int drc_cfg[WM8994_NUM_DRC];
88
 
        struct soc_enum drc_enum;
89
 
 
90
 
        /* Platform dependant ReTune mobile configuration */
91
 
        int num_retune_mobile_texts;
92
 
        const char **retune_mobile_texts;
93
 
        int retune_mobile_cfg[WM8994_NUM_EQ];
94
 
        struct soc_enum retune_mobile_enum;
95
 
 
96
 
        /* Platform dependant MBC configuration */
97
 
        int mbc_cfg;
98
 
        const char **mbc_texts;
99
 
        struct soc_enum mbc_enum;
100
 
 
101
 
        struct wm8994_micdet micdet[2];
102
 
 
103
 
        wm8958_micdet_cb jack_cb;
104
 
        void *jack_cb_data;
105
 
        bool jack_is_mic;
106
 
        bool jack_is_video;
107
 
 
108
 
        int revision;
109
 
        struct wm8994_pdata *pdata;
110
 
 
111
 
        unsigned int aif1clk_enable:1;
112
 
        unsigned int aif2clk_enable:1;
113
 
 
114
 
        unsigned int aif1clk_disable:1;
115
 
        unsigned int aif2clk_disable:1;
116
 
};
117
 
 
118
 
static int wm8994_readable(unsigned int reg)
 
56
static int wm8994_readable(struct snd_soc_codec *codec, unsigned int reg)
119
57
{
 
58
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
 
59
        struct wm8994 *control = wm8994->control_data;
 
60
 
120
61
        switch (reg) {
121
62
        case WM8994_GPIO_1:
122
63
        case WM8994_GPIO_2:
133
74
        case WM8994_INTERRUPT_STATUS_2:
134
75
        case WM8994_INTERRUPT_RAW_STATUS_2:
135
76
                return 1;
 
77
 
 
78
        case WM8958_DSP2_PROGRAM:
 
79
        case WM8958_DSP2_CONFIG:
 
80
        case WM8958_DSP2_EXECCONTROL:
 
81
                if (control->type == WM8958)
 
82
                        return 1;
 
83
                else
 
84
                        return 0;
 
85
 
136
86
        default:
137
87
                break;
138
88
        }
142
92
        return wm8994_access_masks[reg].readable != 0;
143
93
}
144
94
 
145
 
static int wm8994_volatile(unsigned int reg)
 
95
static int wm8994_volatile(struct snd_soc_codec *codec, unsigned int reg)
146
96
{
147
97
        if (reg >= WM8994_CACHE_SIZE)
148
98
                return 1;
170
120
 
171
121
        BUG_ON(reg > WM8994_MAX_REGISTER);
172
122
 
173
 
        if (!wm8994_volatile(reg)) {
 
123
        if (!wm8994_volatile(codec, reg)) {
174
124
                ret = snd_soc_cache_write(codec, reg, value);
175
125
                if (ret != 0)
176
126
                        dev_err(codec->dev, "Cache write to %x failed: %d\n",
188
138
 
189
139
        BUG_ON(reg > WM8994_MAX_REGISTER);
190
140
 
191
 
        if (!wm8994_volatile(reg) && wm8994_readable(reg) &&
 
141
        if (!wm8994_volatile(codec, reg) && wm8994_readable(codec, reg) &&
192
142
            reg < codec->driver->reg_cache_size) {
193
143
                ret = snd_soc_cache_read(codec, reg, &val);
194
144
                if (ret >= 0)
529
479
                                         struct snd_ctl_elem_value *ucontrol)
530
480
{
531
481
        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
532
 
        struct wm8994_priv *wm8994 =snd_soc_codec_get_drvdata(codec);
 
482
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
533
483
        int block = wm8994_get_retune_mobile_block(kcontrol->id.name);
534
484
 
535
485
        ucontrol->value.enumerated.item[0] = wm8994->retune_mobile_cfg[block];
575
525
static const struct soc_enum adc_osr =
576
526
        SOC_ENUM_SINGLE(WM8994_OVERSAMPLING, 1, 2, osr_text);
577
527
 
578
 
static void wm8958_mbc_apply(struct snd_soc_codec *codec, int mbc, int start)
579
 
{
580
 
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
581
 
        struct wm8994_pdata *pdata = wm8994->pdata;
582
 
        int pwr_reg = snd_soc_read(codec, WM8994_POWER_MANAGEMENT_5);
583
 
        int ena, reg, aif, i;
584
 
 
585
 
        switch (mbc) {
586
 
        case 0:
587
 
                pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA);
588
 
                aif = 0;
589
 
                break;
590
 
        case 1:
591
 
                pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA);
592
 
                aif = 0;
593
 
                break;
594
 
        case 2:
595
 
                pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA);
596
 
                aif = 1;
597
 
                break;
598
 
        default:
599
 
                BUG();
600
 
                return;
601
 
        }
602
 
 
603
 
        /* We can only enable the MBC if the AIF is enabled and we
604
 
         * want it to be enabled. */
605
 
        ena = pwr_reg && wm8994->mbc_ena[mbc];
606
 
 
607
 
        reg = snd_soc_read(codec, WM8958_DSP2_PROGRAM);
608
 
 
609
 
        dev_dbg(codec->dev, "MBC %d startup: %d, power: %x, DSP: %x\n",
610
 
                mbc, start, pwr_reg, reg);
611
 
 
612
 
        if (start && ena) {
613
 
                /* If the DSP is already running then noop */
614
 
                if (reg & WM8958_DSP2_ENA)
615
 
                        return;
616
 
 
617
 
                /* Switch the clock over to the appropriate AIF */
618
 
                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
619
 
                                    WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
620
 
                                    aif << WM8958_DSP2CLK_SRC_SHIFT |
621
 
                                    WM8958_DSP2CLK_ENA);
622
 
 
623
 
                snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
624
 
                                    WM8958_DSP2_ENA, WM8958_DSP2_ENA);
625
 
 
626
 
                /* If we've got user supplied MBC settings use them */
627
 
                if (pdata && pdata->num_mbc_cfgs) {
628
 
                        struct wm8958_mbc_cfg *cfg
629
 
                                = &pdata->mbc_cfgs[wm8994->mbc_cfg];
630
 
 
631
 
                        for (i = 0; i < ARRAY_SIZE(cfg->coeff_regs); i++)
632
 
                                snd_soc_write(codec, i + WM8958_MBC_BAND_1_K_1,
633
 
                                              cfg->coeff_regs[i]);
634
 
 
635
 
                        for (i = 0; i < ARRAY_SIZE(cfg->cutoff_regs); i++)
636
 
                                snd_soc_write(codec,
637
 
                                              i + WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1,
638
 
                                              cfg->cutoff_regs[i]);
639
 
                }
640
 
 
641
 
                /* Run the DSP */
642
 
                snd_soc_write(codec, WM8958_DSP2_EXECCONTROL,
643
 
                              WM8958_DSP2_RUNR);
644
 
 
645
 
                /* And we're off! */
646
 
                snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
647
 
                                    WM8958_MBC_ENA | WM8958_MBC_SEL_MASK,
648
 
                                    mbc << WM8958_MBC_SEL_SHIFT |
649
 
                                    WM8958_MBC_ENA);
650
 
        } else {
651
 
                /* If the DSP is already stopped then noop */
652
 
                if (!(reg & WM8958_DSP2_ENA))
653
 
                        return;
654
 
 
655
 
                snd_soc_update_bits(codec, WM8958_DSP2_CONFIG,
656
 
                                    WM8958_MBC_ENA, 0); 
657
 
                snd_soc_update_bits(codec, WM8958_DSP2_PROGRAM,
658
 
                                    WM8958_DSP2_ENA, 0);
659
 
                snd_soc_update_bits(codec, WM8994_CLOCKING_1,
660
 
                                    WM8958_DSP2CLK_ENA, 0);
661
 
        }
662
 
}
663
 
 
664
 
static int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
665
 
                    struct snd_kcontrol *kcontrol, int event)
666
 
{
667
 
        struct snd_soc_codec *codec = w->codec;
668
 
        int mbc;
669
 
 
670
 
        switch (w->shift) {
671
 
        case 13:
672
 
        case 12:
673
 
                mbc = 2;
674
 
                break;
675
 
        case 11:
676
 
        case 10:
677
 
                mbc = 1;
678
 
                break;
679
 
        case 9:
680
 
        case 8:
681
 
                mbc = 0;
682
 
                break;
683
 
        default:
684
 
                BUG();
685
 
                return -EINVAL;
686
 
        }
687
 
 
688
 
        switch (event) {
689
 
        case SND_SOC_DAPM_POST_PMU:
690
 
                wm8958_mbc_apply(codec, mbc, 1);
691
 
                break;
692
 
        case SND_SOC_DAPM_POST_PMD:
693
 
                wm8958_mbc_apply(codec, mbc, 0);
694
 
                break;
695
 
        }
696
 
 
697
 
        return 0;
698
 
}
699
 
 
700
 
static int wm8958_put_mbc_enum(struct snd_kcontrol *kcontrol,
701
 
                               struct snd_ctl_elem_value *ucontrol)
702
 
{
703
 
        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
704
 
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
705
 
        struct wm8994_pdata *pdata = wm8994->pdata;
706
 
        int value = ucontrol->value.integer.value[0];
707
 
        int reg;
708
 
 
709
 
        /* Don't allow on the fly reconfiguration */
710
 
        reg = snd_soc_read(codec, WM8994_CLOCKING_1);
711
 
        if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
712
 
                return -EBUSY;
713
 
 
714
 
        if (value >= pdata->num_mbc_cfgs)
715
 
                return -EINVAL;
716
 
 
717
 
        wm8994->mbc_cfg = value;
718
 
 
719
 
        return 0;
720
 
}
721
 
 
722
 
static int wm8958_get_mbc_enum(struct snd_kcontrol *kcontrol,
723
 
                               struct snd_ctl_elem_value *ucontrol)
724
 
{
725
 
        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
726
 
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
727
 
 
728
 
        ucontrol->value.enumerated.item[0] = wm8994->mbc_cfg;
729
 
 
730
 
        return 0;
731
 
}
732
 
 
733
 
static int wm8958_mbc_info(struct snd_kcontrol *kcontrol,
734
 
                           struct snd_ctl_elem_info *uinfo)
735
 
{
736
 
        uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
737
 
        uinfo->count = 1;
738
 
        uinfo->value.integer.min = 0;
739
 
        uinfo->value.integer.max = 1;
740
 
        return 0;
741
 
}
742
 
 
743
 
static int wm8958_mbc_get(struct snd_kcontrol *kcontrol,
744
 
                          struct snd_ctl_elem_value *ucontrol)
745
 
{
746
 
        int mbc = kcontrol->private_value;
747
 
        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
748
 
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
749
 
 
750
 
        ucontrol->value.integer.value[0] = wm8994->mbc_ena[mbc];
751
 
 
752
 
        return 0;
753
 
}
754
 
 
755
 
static int wm8958_mbc_put(struct snd_kcontrol *kcontrol,
756
 
                          struct snd_ctl_elem_value *ucontrol)
757
 
{
758
 
        int mbc = kcontrol->private_value;
759
 
        int i;
760
 
        struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
761
 
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
762
 
 
763
 
        if (ucontrol->value.integer.value[0] > 1)
764
 
                return -EINVAL;
765
 
 
766
 
        for (i = 0; i < ARRAY_SIZE(wm8994->mbc_ena); i++) {
767
 
                if (mbc != i && wm8994->mbc_ena[i]) {
768
 
                        dev_dbg(codec->dev, "MBC %d active already\n", mbc);
769
 
                        return -EBUSY;
770
 
                }
771
 
        }
772
 
 
773
 
        wm8994->mbc_ena[mbc] = ucontrol->value.integer.value[0];
774
 
 
775
 
        wm8958_mbc_apply(codec, mbc, wm8994->mbc_ena[mbc]);
776
 
 
777
 
        return 0;
778
 
}
779
 
 
780
 
#define WM8958_MBC_SWITCH(xname, xval) {\
781
 
        .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
782
 
        .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
783
 
        .info = wm8958_mbc_info, \
784
 
        .get = wm8958_mbc_get, .put = wm8958_mbc_put, \
785
 
        .private_value = xval }
786
 
 
787
528
static const struct snd_kcontrol_new wm8994_snd_controls[] = {
788
529
SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8994_AIF1_ADC1_LEFT_VOLUME,
789
530
                 WM8994_AIF1_ADC1_RIGHT_VOLUME,
925
666
 
926
667
static const struct snd_kcontrol_new wm8958_snd_controls[] = {
927
668
SOC_SINGLE_TLV("AIF3 Boost Volume", WM8958_AIF3_CONTROL_2, 10, 3, 0, aif_tlv),
928
 
WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
929
 
WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
930
 
WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
931
669
};
932
670
 
933
671
static int clk_sys_event(struct snd_soc_dapm_widget *w,
1033
771
                break;
1034
772
        }
1035
773
 
 
774
        /* We may also have postponed startup of DSP, handle that. */
 
775
        wm8958_aif_ev(w, kcontrol, event);
 
776
 
1036
777
        return 0;
1037
778
}
1038
779
 
1103
844
        return 0;
1104
845
}
1105
846
 
 
847
static int micbias_ev(struct snd_soc_dapm_widget *w,
 
848
                      struct snd_kcontrol *kcontrol, int event)
 
849
{
 
850
        late_enable_ev(w, kcontrol, event);
 
851
        return 0;
 
852
}
 
853
 
1106
854
static int dac_ev(struct snd_soc_dapm_widget *w,
1107
855
                  struct snd_kcontrol *kcontrol, int event)
1108
856
{
1129
877
static int wm8994_put_hp_enum(struct snd_kcontrol *kcontrol,
1130
878
                              struct snd_ctl_elem_value *ucontrol)
1131
879
{
1132
 
        struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
 
880
        struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
 
881
        struct snd_soc_dapm_widget *w = wlist->widgets[0];
1133
882
        struct snd_soc_codec *codec = w->codec;
1134
883
        int ret;
1135
884
 
1256
1005
static int wm8994_put_class_w(struct snd_kcontrol *kcontrol,
1257
1006
                              struct snd_ctl_elem_value *ucontrol)
1258
1007
{
1259
 
        struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
 
1008
        struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
 
1009
        struct snd_soc_dapm_widget *w = wlist->widgets[0];
1260
1010
        struct snd_soc_codec *codec = w->codec;
1261
1011
        int ret;
1262
1012
 
1440
1190
SND_SOC_DAPM_INPUT("DMIC2DAT"),
1441
1191
SND_SOC_DAPM_INPUT("Clock"),
1442
1192
 
 
1193
SND_SOC_DAPM_MICBIAS("MICBIAS", WM8994_MICBIAS, 2, 0),
 
1194
SND_SOC_DAPM_SUPPLY_S("MICBIAS Supply", 1, SND_SOC_NOPM, 0, 0, micbias_ev,
 
1195
                      SND_SOC_DAPM_PRE_PMU),
 
1196
 
1443
1197
SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
1444
1198
                    SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1445
1199
 
1755
1509
        { "AIF2DACDAT", NULL, "AIF1DACDAT" },
1756
1510
        { "AIF1ADCDAT", NULL, "AIF2ADCDAT" },
1757
1511
        { "AIF2ADCDAT", NULL, "AIF1ADCDAT" },
 
1512
        { "MICBIAS", NULL, "CLK_SYS" },
 
1513
        { "MICBIAS", NULL, "MICBIAS Supply" },
1758
1514
};
1759
1515
 
1760
1516
static const struct snd_soc_dapm_route wm8994_intercon[] = {
1957
1713
                snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
1958
1714
                                    WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
1959
1715
                                    reg);
 
1716
 
 
1717
                msleep(5);
1960
1718
        }
1961
1719
 
1962
1720
        wm8994->fll[id].in = freq_in;
2168
1926
                                            WM8994_VMID_BUF_ENA |
2169
1927
                                            WM8994_VMID_RAMP_MASK, 0);
2170
1928
 
 
1929
                        wm8994->cur_fw = NULL;
 
1930
 
2171
1931
                        pm_runtime_put(codec->dev);
2172
1932
                }
2173
1933
                break;
2660
2420
static int wm8994_suspend(struct snd_soc_codec *codec, pm_message_t state)
2661
2421
{
2662
2422
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
 
2423
        struct wm8994 *control = codec->control_data;
2663
2424
        int i, ret;
2664
2425
 
 
2426
        switch (control->type) {
 
2427
        case WM8994:
 
2428
                snd_soc_update_bits(codec, WM8994_MICBIAS, WM8994_MICD_ENA, 0);
 
2429
                break;
 
2430
        case WM8958:
 
2431
                snd_soc_update_bits(codec, WM8958_MIC_DETECT_1,
 
2432
                                    WM8958_MICD_ENA, 0);
 
2433
                break;
 
2434
        }
 
2435
 
2665
2436
        for (i = 0; i < ARRAY_SIZE(wm8994->fll); i++) {
2666
2437
                memcpy(&wm8994->fll_suspend[i], &wm8994->fll[i],
2667
 
                       sizeof(struct fll_config));
 
2438
                       sizeof(struct wm8994_fll_config));
2668
2439
                ret = _wm8994_set_fll(codec, i + 1, 0, 0, 0);
2669
2440
                if (ret < 0)
2670
2441
                        dev_warn(codec->dev, "Failed to stop FLL%d: %d\n",
2679
2450
static int wm8994_resume(struct snd_soc_codec *codec)
2680
2451
{
2681
2452
        struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
 
2453
        struct wm8994 *control = codec->control_data;
2682
2454
        int i, ret;
2683
2455
        unsigned int val, mask;
2684
2456
 
2717
2489
                                 i + 1, ret);
2718
2490
        }
2719
2491
 
 
2492
        switch (control->type) {
 
2493
        case WM8994:
 
2494
                if (wm8994->micdet[0].jack || wm8994->micdet[1].jack)
 
2495
                        snd_soc_update_bits(codec, WM8994_MICBIAS,
 
2496
                                            WM8994_MICD_ENA, WM8994_MICD_ENA);
 
2497
                break;
 
2498
        case WM8958:
 
2499
                if (wm8994->jack_cb)
 
2500
                        snd_soc_update_bits(codec, WM8958_MIC_DETECT_1,
 
2501
                                            WM8958_MICD_ENA, WM8958_MICD_ENA);
 
2502
                break;
 
2503
        }
 
2504
 
2720
2505
        return 0;
2721
2506
}
2722
2507
#else
2850
2635
        dev_dbg(codec->dev, "%d ReTune Mobile configurations\n",
2851
2636
                pdata->num_retune_mobile_cfgs);
2852
2637
 
2853
 
        if (pdata->num_mbc_cfgs) {
2854
 
                struct snd_kcontrol_new control[] = {
2855
 
                        SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum,
2856
 
                                     wm8958_get_mbc_enum, wm8958_put_mbc_enum),
2857
 
                };
2858
 
 
2859
 
                /* We need an array of texts for the enum API */
2860
 
                wm8994->mbc_texts = kmalloc(sizeof(char *)
2861
 
                                            * pdata->num_mbc_cfgs, GFP_KERNEL);
2862
 
                if (!wm8994->mbc_texts) {
2863
 
                        dev_err(wm8994->codec->dev,
2864
 
                                "Failed to allocate %d MBC config texts\n",
2865
 
                                pdata->num_mbc_cfgs);
2866
 
                        return;
2867
 
                }
2868
 
 
2869
 
                for (i = 0; i < pdata->num_mbc_cfgs; i++)
2870
 
                        wm8994->mbc_texts[i] = pdata->mbc_cfgs[i].name;
2871
 
 
2872
 
                wm8994->mbc_enum.max = pdata->num_mbc_cfgs;
2873
 
                wm8994->mbc_enum.texts = wm8994->mbc_texts;
2874
 
 
2875
 
                ret = snd_soc_add_controls(wm8994->codec, control, 1);
2876
 
                if (ret != 0)
2877
 
                        dev_err(wm8994->codec->dev,
2878
 
                                "Failed to add MBC mode controls: %d\n", ret);
2879
 
        }
2880
 
 
2881
2638
        if (pdata->num_retune_mobile_cfgs)
2882
2639
                wm8994_handle_retune_mobile_pdata(wm8994);
2883
2640
        else
2884
2641
                snd_soc_add_controls(wm8994->codec, wm8994_eq_controls,
2885
2642
                                     ARRAY_SIZE(wm8994_eq_controls));
 
2643
 
 
2644
        for (i = 0; i < ARRAY_SIZE(pdata->micbias); i++) {
 
2645
                if (pdata->micbias[i]) {
 
2646
                        snd_soc_write(codec, WM8958_MICBIAS1 + i,
 
2647
                                pdata->micbias[i] & 0xffff);
 
2648
                }
 
2649
        }
2886
2650
}
2887
2651
 
2888
2652
/**
2993
2757
        int report = 0;
2994
2758
 
2995
2759
        /* If nothing present then clear our statuses */
2996
 
        if (!(status & WM8958_MICD_STS)) {
2997
 
                wm8994->jack_is_video = false;
2998
 
                wm8994->jack_is_mic = false;
 
2760
        if (!(status & WM8958_MICD_STS))
2999
2761
                goto done;
3000
 
        }
3001
 
 
3002
 
        /* Assume anything over 475 ohms is a microphone and remember
3003
 
         * that we've seen one (since buttons override it) */
3004
 
        if (status & 0x600)
3005
 
                wm8994->jack_is_mic = true;
3006
 
        if (wm8994->jack_is_mic)
3007
 
                report |= SND_JACK_MICROPHONE;
3008
 
 
3009
 
        /* Video has an impedence of approximately 75 ohms; assume
3010
 
         * this isn't used as a button and remember it since buttons
3011
 
         * override it. */
3012
 
        if (status & 0x40)
3013
 
                wm8994->jack_is_video = true;
3014
 
        if (wm8994->jack_is_video)
3015
 
                report |= SND_JACK_VIDEOOUT;
 
2762
 
 
2763
        report = SND_JACK_MICROPHONE;
3016
2764
 
3017
2765
        /* Everything else is buttons; just assign slots */
3018
 
        if (status & 0x4)
 
2766
        if (status & 0x1c0)
3019
2767
                report |= SND_JACK_BTN_0;
3020
 
        if (status & 0x8)
3021
 
                report |= SND_JACK_BTN_1;
3022
 
        if (status & 0x10)
3023
 
                report |= SND_JACK_BTN_2;
3024
 
        if (status & 0x20)
3025
 
                report |= SND_JACK_BTN_3;
3026
 
        if (status & 0x80)
3027
 
                report |= SND_JACK_BTN_4;
3028
 
        if (status & 0x100)
3029
 
                report |= SND_JACK_BTN_5;
3030
2768
 
3031
2769
done:
3032
2770
        snd_soc_jack_report(wm8994->micdet[0].jack, report,
3033
 
                            SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 |
3034
 
                            SND_JACK_BTN_3 | SND_JACK_BTN_4 | SND_JACK_BTN_5 |
3035
 
                            SND_JACK_MICROPHONE | SND_JACK_VIDEOOUT);
 
2771
                            SND_JACK_BTN_0 | SND_JACK_MICROPHONE);
3036
2772
}
3037
2773
 
3038
2774
/**
3131
2867
        wm8994->pdata = dev_get_platdata(codec->dev->parent);
3132
2868
        wm8994->codec = codec;
3133
2869
 
 
2870
        if (wm8994->pdata && wm8994->pdata->micdet_irq)
 
2871
                wm8994->micdet_irq = wm8994->pdata->micdet_irq;
 
2872
        else if (wm8994->pdata && wm8994->pdata->irq_base)
 
2873
                wm8994->micdet_irq = wm8994->pdata->irq_base +
 
2874
                                     WM8994_IRQ_MIC1_DET;
 
2875
 
3134
2876
        pm_runtime_enable(codec->dev);
3135
2877
        pm_runtime_resume(codec->dev);
3136
2878
 
3137
2879
        /* Read our current status back from the chip - we don't want to
3138
2880
         * reset as this may interfere with the GPIO or LDO operation. */
3139
2881
        for (i = 0; i < WM8994_CACHE_SIZE; i++) {
3140
 
                if (!wm8994_readable(i) || wm8994_volatile(i))
 
2882
                if (!wm8994_readable(codec, i) || wm8994_volatile(codec, i))
3141
2883
                        continue;
3142
2884
 
3143
2885
                ret = wm8994_reg_read(codec->control_data, i);
3179
2921
 
3180
2922
        switch (control->type) {
3181
2923
        case WM8994:
3182
 
                ret = wm8994_request_irq(codec->control_data,
3183
 
                                         WM8994_IRQ_MIC1_DET,
3184
 
                                         wm8994_mic_irq, "Mic 1 detect",
3185
 
                                         wm8994);
3186
 
                if (ret != 0)
3187
 
                        dev_warn(codec->dev,
3188
 
                                 "Failed to request Mic1 detect IRQ: %d\n",
3189
 
                                 ret);
 
2924
                if (wm8994->micdet_irq) {
 
2925
                        ret = request_threaded_irq(wm8994->micdet_irq, NULL,
 
2926
                                                   wm8994_mic_irq,
 
2927
                                                   IRQF_TRIGGER_RISING,
 
2928
                                                   "Mic1 detect",
 
2929
                                                   wm8994);
 
2930
                        if (ret != 0)
 
2931
                                dev_warn(codec->dev,
 
2932
                                         "Failed to request Mic1 detect IRQ: %d\n",
 
2933
                                         ret);
 
2934
                }
3190
2935
 
3191
2936
                ret = wm8994_request_irq(codec->control_data,
3192
2937
                                         WM8994_IRQ_MIC1_SHRT,
3217
2962
                break;
3218
2963
 
3219
2964
        case WM8958:
3220
 
                ret = wm8994_request_irq(codec->control_data,
3221
 
                                         WM8994_IRQ_MIC1_DET,
3222
 
                                         wm8958_mic_irq, "Mic detect",
3223
 
                                         wm8994);
3224
 
                if (ret != 0)
3225
 
                        dev_warn(codec->dev,
3226
 
                                 "Failed to request Mic detect IRQ: %d\n",
3227
 
                                 ret);
3228
 
                break;
 
2965
                if (wm8994->micdet_irq) {
 
2966
                        ret = request_threaded_irq(wm8994->micdet_irq, NULL,
 
2967
                                                   wm8958_mic_irq,
 
2968
                                                   IRQF_TRIGGER_RISING,
 
2969
                                                   "Mic detect",
 
2970
                                                   wm8994);
 
2971
                        if (ret != 0)
 
2972
                                dev_warn(codec->dev,
 
2973
                                         "Failed to request Mic detect IRQ: %d\n",
 
2974
                                         ret);
 
2975
                }
3229
2976
        }
3230
2977
 
3231
2978
        /* Remember if AIFnLRCLK is configured as a GPIO.  This should be
3259
3006
        wm8994_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
3260
3007
 
3261
3008
        /* Latch volume updates (right only; we always do left then right). */
 
3009
        snd_soc_update_bits(codec, WM8994_AIF1_DAC1_LEFT_VOLUME,
 
3010
                            WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU);
3262
3011
        snd_soc_update_bits(codec, WM8994_AIF1_DAC1_RIGHT_VOLUME,
3263
3012
                            WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU);
 
3013
        snd_soc_update_bits(codec, WM8994_AIF1_DAC2_LEFT_VOLUME,
 
3014
                            WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU);
3264
3015
        snd_soc_update_bits(codec, WM8994_AIF1_DAC2_RIGHT_VOLUME,
3265
3016
                            WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU);
 
3017
        snd_soc_update_bits(codec, WM8994_AIF2_DAC_LEFT_VOLUME,
 
3018
                            WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU);
3266
3019
        snd_soc_update_bits(codec, WM8994_AIF2_DAC_RIGHT_VOLUME,
3267
3020
                            WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU);
 
3021
        snd_soc_update_bits(codec, WM8994_AIF1_ADC1_LEFT_VOLUME,
 
3022
                            WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU);
3268
3023
        snd_soc_update_bits(codec, WM8994_AIF1_ADC1_RIGHT_VOLUME,
3269
3024
                            WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU);
 
3025
        snd_soc_update_bits(codec, WM8994_AIF1_ADC2_LEFT_VOLUME,
 
3026
                            WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU);
3270
3027
        snd_soc_update_bits(codec, WM8994_AIF1_ADC2_RIGHT_VOLUME,
3271
3028
                            WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU);
 
3029
        snd_soc_update_bits(codec, WM8994_AIF2_ADC_LEFT_VOLUME,
 
3030
                            WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU);
3272
3031
        snd_soc_update_bits(codec, WM8994_AIF2_ADC_RIGHT_VOLUME,
3273
3032
                            WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU);
 
3033
        snd_soc_update_bits(codec, WM8994_DAC1_LEFT_VOLUME,
 
3034
                            WM8994_DAC1_VU, WM8994_DAC1_VU);
3274
3035
        snd_soc_update_bits(codec, WM8994_DAC1_RIGHT_VOLUME,
3275
3036
                            WM8994_DAC1_VU, WM8994_DAC1_VU);
 
3037
        snd_soc_update_bits(codec, WM8994_DAC2_LEFT_VOLUME,
 
3038
                            WM8994_DAC2_VU, WM8994_DAC2_VU);
3276
3039
        snd_soc_update_bits(codec, WM8994_DAC2_RIGHT_VOLUME,
3277
3040
                            WM8994_DAC2_VU, WM8994_DAC2_VU);
3278
3041
 
3325
3088
        case WM8958:
3326
3089
                snd_soc_add_controls(codec, wm8958_snd_controls,
3327
3090
                                     ARRAY_SIZE(wm8958_snd_controls));
3328
 
                snd_soc_dapm_new_controls(dapm, wm8994_lateclk_widgets,
3329
 
                                          ARRAY_SIZE(wm8994_lateclk_widgets));
3330
 
                snd_soc_dapm_new_controls(dapm, wm8994_adc_widgets,
3331
 
                                          ARRAY_SIZE(wm8994_adc_widgets));
3332
 
                snd_soc_dapm_new_controls(dapm, wm8994_dac_widgets,
3333
 
                                          ARRAY_SIZE(wm8994_dac_widgets));
3334
3091
                snd_soc_dapm_new_controls(dapm, wm8958_dapm_widgets,
3335
3092
                                          ARRAY_SIZE(wm8958_dapm_widgets));
 
3093
                if (wm8994->revision < 1) {
 
3094
                        snd_soc_dapm_new_controls(dapm, wm8994_lateclk_revd_widgets,
 
3095
                                                  ARRAY_SIZE(wm8994_lateclk_revd_widgets));
 
3096
                        snd_soc_dapm_new_controls(dapm, wm8994_adc_revd_widgets,
 
3097
                                                  ARRAY_SIZE(wm8994_adc_revd_widgets));
 
3098
                        snd_soc_dapm_new_controls(dapm, wm8994_dac_revd_widgets,
 
3099
                                                  ARRAY_SIZE(wm8994_dac_revd_widgets));
 
3100
                } else {
 
3101
                        snd_soc_dapm_new_controls(dapm, wm8994_lateclk_widgets,
 
3102
                                                  ARRAY_SIZE(wm8994_lateclk_widgets));
 
3103
                        snd_soc_dapm_new_controls(dapm, wm8994_adc_widgets,
 
3104
                                                  ARRAY_SIZE(wm8994_adc_widgets));
 
3105
                        snd_soc_dapm_new_controls(dapm, wm8994_dac_widgets,
 
3106
                                                  ARRAY_SIZE(wm8994_dac_widgets));
 
3107
                }
3336
3108
                break;
3337
3109
        }
3338
3110
                
3356
3128
                }
3357
3129
                break;
3358
3130
        case WM8958:
3359
 
                snd_soc_dapm_add_routes(dapm, wm8994_lateclk_intercon,
3360
 
                                        ARRAY_SIZE(wm8994_lateclk_intercon));
3361
 
                snd_soc_dapm_add_routes(dapm, wm8958_intercon,
3362
 
                                        ARRAY_SIZE(wm8958_intercon));
 
3131
                if (wm8994->revision < 1) {
 
3132
                        snd_soc_dapm_add_routes(dapm, wm8994_revd_intercon,
 
3133
                                                ARRAY_SIZE(wm8994_revd_intercon));
 
3134
                        snd_soc_dapm_add_routes(dapm, wm8994_lateclk_revd_intercon,
 
3135
                                                ARRAY_SIZE(wm8994_lateclk_revd_intercon));
 
3136
                } else {
 
3137
                        snd_soc_dapm_add_routes(dapm, wm8994_lateclk_intercon,
 
3138
                                                ARRAY_SIZE(wm8994_lateclk_intercon));
 
3139
                        snd_soc_dapm_add_routes(dapm, wm8958_intercon,
 
3140
                                                ARRAY_SIZE(wm8958_intercon));
 
3141
                }
 
3142
 
 
3143
                wm8958_dsp2_init(codec);
3363
3144
                break;
3364
3145
        }
3365
3146
 
3369
3150
        wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_SHRT, wm8994);
3370
3151
        wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_DET, wm8994);
3371
3152
        wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_SHRT, wm8994);
3372
 
        wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_DET, wm8994);
 
3153
        if (wm8994->micdet_irq)
 
3154
                free_irq(wm8994->micdet_irq, wm8994);
3373
3155
err:
3374
3156
        kfree(wm8994);
3375
3157
        return ret;
3386
3168
 
3387
3169
        switch (control->type) {
3388
3170
        case WM8994:
3389
 
                wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_SHRT,
3390
 
                                wm8994);
 
3171
                if (wm8994->micdet_irq)
 
3172
                        free_irq(wm8994->micdet_irq, wm8994);
3391
3173
                wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC2_DET,
3392
3174
                                wm8994);
3393
3175
                wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_SHRT,
3397
3179
                break;
3398
3180
 
3399
3181
        case WM8958:
3400
 
                wm8994_free_irq(codec->control_data, WM8994_IRQ_MIC1_DET,
3401
 
                                wm8994);
 
3182
                if (wm8994->micdet_irq)
 
3183
                        free_irq(wm8994->micdet_irq, wm8994);
3402
3184
                break;
3403
3185
        }
 
3186
        if (wm8994->mbc)
 
3187
                release_firmware(wm8994->mbc);
 
3188
        if (wm8994->mbc_vss)
 
3189
                release_firmware(wm8994->mbc_vss);
 
3190
        if (wm8994->enh_eq)
 
3191
                release_firmware(wm8994->enh_eq);
3404
3192
        kfree(wm8994->retune_mobile_texts);
3405
3193
        kfree(wm8994->drc_texts);
3406
3194
        kfree(wm8994);