3
* (Compatible with Algo System ., LTD. - AP-320A)
5
* Copyright (C) 2008 Renesas Solutions Corp.
6
* Author : Yusuke Goda <goda.yuske@renesas.com>
8
* This file is subject to the terms and conditions of the GNU General Public
9
* License. See the file "COPYING" in the main directory of this archive
13
#include <linux/init.h>
14
#include <linux/device.h>
15
#include <linux/interrupt.h>
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#include <linux/platform_device.h>
17
#include <linux/mfd/sh_mobile_sdhi.h>
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#include <linux/mmc/host.h>
19
#include <linux/mtd/physmap.h>
20
#include <linux/mtd/sh_flctl.h>
21
#include <linux/delay.h>
22
#include <linux/i2c.h>
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#include <linux/smsc911x.h>
24
#include <linux/gpio.h>
25
#include <media/ov772x.h>
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#include <media/soc_camera.h>
27
#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
29
#include <video/sh_mobile_lcdc.h>
31
#include <asm/clock.h>
32
#include <asm/suspend.h>
33
#include <cpu/sh7723.h>
35
static struct smsc911x_platform_config smsc911x_config = {
36
.phy_interface = PHY_INTERFACE_MODE_MII,
37
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
38
.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
39
.flags = SMSC911X_USE_32BIT,
42
static struct resource smsc9118_resources[] = {
46
.flags = IORESOURCE_MEM,
51
.flags = IORESOURCE_IRQ,
55
static struct platform_device smsc9118_device = {
58
.num_resources = ARRAY_SIZE(smsc9118_resources),
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.resource = smsc9118_resources,
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.platform_data = &smsc911x_config,
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* AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
67
* If this area erased, this board can not boot.
69
static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
73
.size = (1 * 1024 * 1024),
74
.mask_flags = MTD_WRITEABLE, /* Read-only */
77
.offset = MTDPART_OFS_APPEND,
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.size = (2 * 1024 * 1024),
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.offset = MTDPART_OFS_APPEND,
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.size = ((7 * 1024 * 1024) + (512 * 1024)),
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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.size = (1024 * 128 * 2),
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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static struct physmap_flash_data ap325rxa_nor_flash_data = {
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.parts = ap325rxa_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
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static struct resource ap325rxa_nor_flash_resources[] = {
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.flags = IORESOURCE_MEM,
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static struct platform_device ap325rxa_nor_flash_device = {
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.name = "physmap-flash",
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.resource = ap325rxa_nor_flash_resources,
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.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
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.platform_data = &ap325rxa_nor_flash_data,
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static struct mtd_partition nand_partition_info[] = {
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.size = MTDPART_SIZ_FULL,
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static struct resource nand_flash_resources[] = {
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.flags = IORESOURCE_MEM,
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static struct sh_flctl_platform_data nand_flash_data = {
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.parts = nand_partition_info,
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.nr_parts = ARRAY_SIZE(nand_partition_info),
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.flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
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static struct platform_device nand_flash_device = {
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.resource = nand_flash_resources,
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.num_resources = ARRAY_SIZE(nand_flash_resources),
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.platform_data = &nand_flash_data,
151
#define FPGA_LCDREG 0xB4100180
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#define FPGA_BKLREG 0xB4100212
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#define FPGA_LCDREG_VAL 0x0018
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#define PORT_MSELCRB 0xA4050182
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#define PORT_HIZCRC 0xA405015C
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#define PORT_DRVCRA 0xA405018A
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#define PORT_DRVCRB 0xA405018C
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static void ap320_wvga_power_on(void *board_data, struct fb_info *info)
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/* ASD AP-320/325 LCD ON */
164
__raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
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gpio_set_value(GPIO_PTS3, 0);
168
__raw_writew(0x100, FPGA_BKLREG);
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static void ap320_wvga_power_off(void *board_data)
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__raw_writew(0, FPGA_BKLREG);
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gpio_set_value(GPIO_PTS3, 1);
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/* ASD AP-320/325 LCD OFF */
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__raw_writew(0, FPGA_LCDREG);
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const static struct fb_videomode ap325rxa_lcdc_modes[] = {
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.sync = 0, /* hsync and vsync are active low */
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static struct sh_mobile_lcdc_info lcdc_info = {
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.clock_source = LCDC_CLK_EXTERNAL,
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.chan = LCDC_CHAN_MAINLCD,
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.interface_type = RGB18,
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.lcd_cfg = ap325rxa_lcdc_modes,
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.num_cfg = ARRAY_SIZE(ap325rxa_lcdc_modes),
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.lcd_size_cfg = { /* 7.0 inch */
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.display_on = ap320_wvga_power_on,
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.display_off = ap320_wvga_power_off,
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static struct resource lcdc_resources[] = {
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.start = 0xfe940000, /* P4-only space */
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_IRQ,
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static struct platform_device lcdc_device = {
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.name = "sh_mobile_lcdc_fb",
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.num_resources = ARRAY_SIZE(lcdc_resources),
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.resource = lcdc_resources,
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.platform_data = &lcdc_info,
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.hwblk_id = HWBLK_LCDC,
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static void camera_power(int val)
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gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
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/* support for the old ncm03j camera */
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static unsigned char camera_ncm03j_magic[] =
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0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
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0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
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0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
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0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
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0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
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0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
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0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
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0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
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0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
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0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
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0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
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0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
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0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
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0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
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0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
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0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
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static int camera_probe(void)
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struct i2c_adapter *a = i2c_get_adapter(0);
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msg.buf = camera_ncm03j_magic;
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ret = i2c_transfer(a, &msg, 1);
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static int camera_set_capture(struct soc_camera_platform_info *info,
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struct i2c_adapter *a = i2c_get_adapter(0);
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return 0; /* no disable for now */
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for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
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buf[0] = camera_ncm03j_magic[i];
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buf[1] = camera_ncm03j_magic[i + 1];
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ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
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static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev);
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static void ap325rxa_camera_del(struct soc_camera_link *icl);
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static struct soc_camera_platform_info camera_info = {
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.format_name = "UYVY",
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.code = V4L2_MBUS_FMT_UYVY8_2X8,
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.colorspace = V4L2_COLORSPACE_SMPTE170M,
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.field = V4L2_FIELD_NONE,
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.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
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SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
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SOCAM_DATA_ACTIVE_HIGH,
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.set_capture = camera_set_capture,
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static struct soc_camera_link camera_link = {
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.add_device = ap325rxa_camera_add,
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.del_device = ap325rxa_camera_del,
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.module_name = "soc_camera_platform",
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.priv = &camera_info,
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static void dummy_release(struct device *dev)
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static struct platform_device camera_device = {
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.name = "soc_camera_platform",
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.platform_data = &camera_info,
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.release = dummy_release,
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static int ap325rxa_camera_add(struct soc_camera_link *icl,
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if (icl != &camera_link || camera_probe() <= 0)
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camera_info.dev = dev;
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return platform_device_register(&camera_device);
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static void ap325rxa_camera_del(struct soc_camera_link *icl)
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if (icl != &camera_link)
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platform_device_unregister(&camera_device);
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memset(&camera_device.dev.kobj, 0,
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sizeof(camera_device.dev.kobj));
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#endif /* CONFIG_I2C */
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static int ov7725_power(struct device *dev, int mode)
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static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
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.flags = SH_CEU_FLAG_USE_8BIT_BUS,
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static struct resource ceu_resources[] = {
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_IRQ,
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/* place holder for contiguous memory */
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static struct platform_device ceu_device = {
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.name = "sh_mobile_ceu",
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.id = 0, /* "ceu0" clock */
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.num_resources = ARRAY_SIZE(ceu_resources),
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.resource = ceu_resources,
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.platform_data = &sh_mobile_ceu_info,
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.hwblk_id = HWBLK_CEU,
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static struct resource sdhi0_cn3_resources[] = {
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_IRQ,
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static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
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.tmio_caps = MMC_CAP_SDIO_IRQ,
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static struct platform_device sdhi0_cn3_device = {
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.name = "sh_mobile_sdhi",
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.id = 0, /* "sdhi0" clock */
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.num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
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.resource = sdhi0_cn3_resources,
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.platform_data = &sdhi0_cn3_data,
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.hwblk_id = HWBLK_SDHI0,
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static struct resource sdhi1_cn7_resources[] = {
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.flags = IORESOURCE_MEM,
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.flags = IORESOURCE_IRQ,
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static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
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.tmio_caps = MMC_CAP_SDIO_IRQ,
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static struct platform_device sdhi1_cn7_device = {
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.name = "sh_mobile_sdhi",
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.id = 1, /* "sdhi1" clock */
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.num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
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.resource = sdhi1_cn7_resources,
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.platform_data = &sdhi1_cn7_data,
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.hwblk_id = HWBLK_SDHI1,
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static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
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I2C_BOARD_INFO("pcf8563", 0x51),
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static struct i2c_board_info ap325rxa_i2c_camera[] = {
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I2C_BOARD_INFO("ov772x", 0x21),
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static struct ov772x_camera_info ov7725_info = {
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.flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
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.edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
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static struct soc_camera_link ov7725_link = {
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.power = ov7725_power,
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.board_info = &ap325rxa_i2c_camera[0],
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.priv = &ov7725_info,
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static struct platform_device ap325rxa_camera[] = {
510
.name = "soc-camera-pdrv",
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.platform_data = &ov7725_link,
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.name = "soc-camera-pdrv",
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.platform_data = &camera_link,
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static struct platform_device *ap325rxa_devices[] __initdata = {
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&ap325rxa_nor_flash_device,
536
extern char ap325rxa_sdram_enter_start;
537
extern char ap325rxa_sdram_enter_end;
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extern char ap325rxa_sdram_leave_start;
539
extern char ap325rxa_sdram_leave_end;
541
static int __init ap325rxa_devices_setup(void)
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/* register board specific self-refresh code */
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sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
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&ap325rxa_sdram_enter_start,
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&ap325rxa_sdram_enter_end,
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&ap325rxa_sdram_leave_start,
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&ap325rxa_sdram_leave_end);
550
/* LD3 and LD4 LEDs */
551
gpio_request(GPIO_PTX5, NULL); /* RUN */
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gpio_direction_output(GPIO_PTX5, 1);
553
gpio_export(GPIO_PTX5, 0);
555
gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
556
gpio_direction_output(GPIO_PTX4, 0);
557
gpio_export(GPIO_PTX4, 0);
560
gpio_request(GPIO_PTF7, NULL); /* MODE */
561
gpio_direction_input(GPIO_PTF7);
562
gpio_export(GPIO_PTF7, 0);
565
gpio_request(GPIO_FN_LCDD15, NULL);
566
gpio_request(GPIO_FN_LCDD14, NULL);
567
gpio_request(GPIO_FN_LCDD13, NULL);
568
gpio_request(GPIO_FN_LCDD12, NULL);
569
gpio_request(GPIO_FN_LCDD11, NULL);
570
gpio_request(GPIO_FN_LCDD10, NULL);
571
gpio_request(GPIO_FN_LCDD9, NULL);
572
gpio_request(GPIO_FN_LCDD8, NULL);
573
gpio_request(GPIO_FN_LCDD7, NULL);
574
gpio_request(GPIO_FN_LCDD6, NULL);
575
gpio_request(GPIO_FN_LCDD5, NULL);
576
gpio_request(GPIO_FN_LCDD4, NULL);
577
gpio_request(GPIO_FN_LCDD3, NULL);
578
gpio_request(GPIO_FN_LCDD2, NULL);
579
gpio_request(GPIO_FN_LCDD1, NULL);
580
gpio_request(GPIO_FN_LCDD0, NULL);
581
gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
582
gpio_request(GPIO_FN_LCDDCK, NULL);
583
gpio_request(GPIO_FN_LCDVEPWC, NULL);
584
gpio_request(GPIO_FN_LCDVCPWC, NULL);
585
gpio_request(GPIO_FN_LCDVSYN, NULL);
586
gpio_request(GPIO_FN_LCDHSYN, NULL);
587
gpio_request(GPIO_FN_LCDDISP, NULL);
588
gpio_request(GPIO_FN_LCDDON, NULL);
591
gpio_request(GPIO_PTS3, NULL);
592
gpio_direction_output(GPIO_PTS3, 1);
595
gpio_request(GPIO_FN_VIO_CLK2, NULL);
596
gpio_request(GPIO_FN_VIO_VD2, NULL);
597
gpio_request(GPIO_FN_VIO_HD2, NULL);
598
gpio_request(GPIO_FN_VIO_FLD, NULL);
599
gpio_request(GPIO_FN_VIO_CKO, NULL);
600
gpio_request(GPIO_FN_VIO_D15, NULL);
601
gpio_request(GPIO_FN_VIO_D14, NULL);
602
gpio_request(GPIO_FN_VIO_D13, NULL);
603
gpio_request(GPIO_FN_VIO_D12, NULL);
604
gpio_request(GPIO_FN_VIO_D11, NULL);
605
gpio_request(GPIO_FN_VIO_D10, NULL);
606
gpio_request(GPIO_FN_VIO_D9, NULL);
607
gpio_request(GPIO_FN_VIO_D8, NULL);
609
gpio_request(GPIO_PTZ7, NULL);
610
gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
611
gpio_request(GPIO_PTZ6, NULL);
612
gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
613
gpio_request(GPIO_PTZ5, NULL);
614
gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
615
gpio_request(GPIO_PTZ4, NULL);
616
gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
618
__raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
621
gpio_request(GPIO_FN_FCE, NULL);
622
gpio_request(GPIO_FN_NAF7, NULL);
623
gpio_request(GPIO_FN_NAF6, NULL);
624
gpio_request(GPIO_FN_NAF5, NULL);
625
gpio_request(GPIO_FN_NAF4, NULL);
626
gpio_request(GPIO_FN_NAF3, NULL);
627
gpio_request(GPIO_FN_NAF2, NULL);
628
gpio_request(GPIO_FN_NAF1, NULL);
629
gpio_request(GPIO_FN_NAF0, NULL);
630
gpio_request(GPIO_FN_FCDE, NULL);
631
gpio_request(GPIO_FN_FOE, NULL);
632
gpio_request(GPIO_FN_FSC, NULL);
633
gpio_request(GPIO_FN_FWE, NULL);
634
gpio_request(GPIO_FN_FRB, NULL);
636
__raw_writew(0, PORT_HIZCRC);
637
__raw_writew(0xFFFF, PORT_DRVCRA);
638
__raw_writew(0xFFFF, PORT_DRVCRB);
640
platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
642
/* SDHI0 - CN3 - SD CARD */
643
gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
644
gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
645
gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
646
gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
647
gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
648
gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
649
gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
650
gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
652
/* SDHI1 - CN7 - MICRO SD CARD */
653
gpio_request(GPIO_FN_SDHI1CD, NULL);
654
gpio_request(GPIO_FN_SDHI1D3, NULL);
655
gpio_request(GPIO_FN_SDHI1D2, NULL);
656
gpio_request(GPIO_FN_SDHI1D1, NULL);
657
gpio_request(GPIO_FN_SDHI1D0, NULL);
658
gpio_request(GPIO_FN_SDHI1CMD, NULL);
659
gpio_request(GPIO_FN_SDHI1CLK, NULL);
661
i2c_register_board_info(0, ap325rxa_i2c_devices,
662
ARRAY_SIZE(ap325rxa_i2c_devices));
664
return platform_add_devices(ap325rxa_devices,
665
ARRAY_SIZE(ap325rxa_devices));
667
arch_initcall(ap325rxa_devices_setup);
669
/* Return the board specific boot mode pin configuration */
670
static int ap325rxa_mode_pins(void)
672
/* MD0=0, MD1=0, MD2=0: Clock Mode 0
673
* MD3=0: 16-bit Area0 Bus Width
674
* MD5=1: Little Endian
675
* TSTMD=1, MD8=1: Test Mode Disabled
677
return MODE_PIN5 | MODE_PIN8;
680
static struct sh_machine_vector mv_ap325rxa __initmv = {
681
.mv_name = "AP-325RXA",
682
.mv_mode_pins = ap325rxa_mode_pins,