28
28
#define MCE_VECTOR 0x12
31
* IDT vectors usable for external interrupt sources start
31
* IDT vectors usable for external interrupt sources start at 0x20.
32
* (0x80 is the syscall vector, 0x30-0x3f are for ISA)
34
34
#define FIRST_EXTERNAL_VECTOR 0x20
36
* We start allocating at 0x21 to spread out vectors evenly between
37
* priority levels. (0x80 is the syscall vector)
39
#define VECTOR_OFFSET_START 1
42
* Reserve the lowest usable vector (and hence lowest priority) 0x20 for
43
* triggering cleanup after irq migration. 0x21-0x2f will still be used
44
* for device interrupts.
46
#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
48
#define IA32_SYSCALL_VECTOR 0x80
36
49
#ifdef CONFIG_X86_32
37
50
# define SYSCALL_VECTOR 0x80
38
# define IA32_SYSCALL_VECTOR 0x80
40
# define IA32_SYSCALL_VECTOR 0x80
44
* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
45
* cleanup after irq migration.
47
#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
50
54
* Vectors 0x30-0x3f are used for ISA interrupts.
55
* round up to the next 16-vector boundary
52
#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
57
#define IRQ0_VECTOR ((FIRST_EXTERNAL_VECTOR + 16) & ~15)
54
59
#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
55
60
#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
107
112
* Generic system vector for platform specific use
109
#define GENERIC_INTERRUPT_VECTOR 0xed
114
#define X86_PLATFORM_IPI_VECTOR 0xed
112
* Performance monitoring pending work vector:
114
#define LOCAL_PENDING_VECTOR 0xec
119
#define IRQ_WORK_VECTOR 0xec
116
#define UV_BAU_MESSAGE 0xec
121
#define UV_BAU_MESSAGE 0xea
119
124
* Self IPI vector for machine checks
121
126
#define MCE_SELF_VECTOR 0xeb
124
* First APIC vector available to drivers: (vectors 0x30-0xee) we
125
* start at 0x31(0x41) to spread out vectors evenly between priority
126
* levels. (0x80 is the syscall vector)
128
#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
128
/* Xen vector callback to receive events in a HVM domain */
129
#define XEN_HVM_EVTCHN_CALLBACK 0xe9
130
131
#define NR_VECTORS 256
155
156
#define NR_IRQS_LEGACY 16
157
#define CPU_VECTOR_LIMIT ( 8 * NR_CPUS )
158
158
#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS )
160
160
#ifdef CONFIG_X86_IO_APIC
161
161
# ifdef CONFIG_SPARSE_IRQ
162
# define CPU_VECTOR_LIMIT (64 * NR_CPUS)
162
163
# define NR_IRQS \
163
164
(CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
164
165
(NR_VECTORS + CPU_VECTOR_LIMIT) : \
165
166
(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
167
# if NR_CPUS < MAX_IO_APICS
168
# define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
170
# define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
168
# define CPU_VECTOR_LIMIT (32 * NR_CPUS)
170
(CPU_VECTOR_LIMIT < IO_APIC_VECTOR_LIMIT ? \
171
(NR_VECTORS + CPU_VECTOR_LIMIT) : \
172
(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
173
174
#else /* !CONFIG_X86_IO_APIC: */
174
175
# define NR_IRQS NR_IRQS_LEGACY