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Viewing changes to drivers/media/video/cx88/cx88-dvb.c

  • Committer: Bazaar Package Importer
  • Author(s): Ben Hutchings, Ben Hutchings, Aurelien Jarno, Martin Michlmayr
  • Date: 2011-04-06 13:53:30 UTC
  • mfrom: (43.1.5 sid)
  • Revision ID: james.westby@ubuntu.com-20110406135330-wjufxhd0tvn3zx4z
Tags: 2.6.38-3
http://bugs.debian.org/620124
http://bugs.debian.org/620284
http://bugs.debian.org/620204
[ Ben Hutchings ]
* [ppc64] Add to linux-tools package architectures (Closes: #620124)
* [amd64] Save cr4 to mmu_cr4_features at boot time (Closes: #620284)
* appletalk: Fix bugs introduced when removing use of BKL
* ALSA: Fix yet another race in disconnection
* cciss: Fix lost command issue
* ath9k: Fix kernel panic in AR2427
* ses: Avoid kernel panic when lun 0 is not mapped
* PCI/ACPI: Report ASPM support to BIOS if not disabled from command line

[ Aurelien Jarno ]
* rtlwifi: fix build when PCI is not enabled.

[ Martin Michlmayr ]
* rtlwifi: Eliminate udelay calls with too large values (Closes: #620204)

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Lines of Context:
drivers/media/video/cx88/cx88-dvb.c
53
53
#include "stv0288.h"
54
54
#include "stb6000.h"
55
55
#include "cx24116.h"
 
56
#include "stv0900.h"
 
57
#include "stb6100.h"
 
58
#include "stb6100_proc.h"
 
59
#include "mb86a16.h"
56
60
 
57
61
MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
58
62
MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
63
67
module_param(debug, int, 0644);
64
68
MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
65
69
 
 
70
static unsigned int dvb_buf_tscnt = 32;
 
71
module_param(dvb_buf_tscnt, int, 0644);
 
72
MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
 
73
 
66
74
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
67
75
 
68
76
#define dprintk(level,fmt, arg...)      if (debug >= level) \
76
84
        struct cx8802_dev *dev = q->priv_data;
77
85
 
78
86
        dev->ts_packet_size  = 188 * 4;
79
 
        dev->ts_packet_count = 32;
 
87
        dev->ts_packet_count = dvb_buf_tscnt;
80
88
 
81
89
        *size  = dev->ts_packet_size * dev->ts_packet_count;
82
 
        *count = 32;
 
90
        *count = dvb_buf_tscnt;
83
91
        return 0;
84
92
}
85
93
 
102
110
        cx88_free_buffer(q, (struct cx88_buffer*)vb);
103
111
}
104
112
 
105
 
static struct videobuf_queue_ops dvb_qops = {
 
113
static const struct videobuf_queue_ops dvb_qops = {
106
114
        .buf_setup    = dvb_buf_setup,
107
115
        .buf_prepare  = dvb_buf_prepare,
108
116
        .buf_queue    = dvb_buf_queue,
164
172
 
165
173
static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
166
174
{
167
 
        static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
168
 
        static u8 reset []         = { RESET,      0x80 };
169
 
        static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
170
 
        static u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
171
 
        static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
172
 
        static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
 
175
        static const u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
 
176
        static const u8 reset []         = { RESET,      0x80 };
 
177
        static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
 
178
        static const u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
 
179
        static const u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
 
180
        static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
173
181
 
174
182
        mt352_write(fe, clock_config,   sizeof(clock_config));
175
183
        udelay(200);
184
192
 
185
193
static int dvico_dual_demod_init(struct dvb_frontend *fe)
186
194
{
187
 
        static u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
188
 
        static u8 reset []         = { RESET,      0x80 };
189
 
        static u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
190
 
        static u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
191
 
        static u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
192
 
        static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
 
195
        static const u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
 
196
        static const u8 reset []         = { RESET,      0x80 };
 
197
        static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
 
198
        static const u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
 
199
        static const u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
 
200
        static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
193
201
 
194
202
        mt352_write(fe, clock_config,   sizeof(clock_config));
195
203
        udelay(200);
205
213
 
206
214
static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
207
215
{
208
 
        static u8 clock_config []  = { 0x89, 0x38, 0x39 };
209
 
        static u8 reset []         = { 0x50, 0x80 };
210
 
        static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
211
 
        static u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
 
216
        static const u8 clock_config []  = { 0x89, 0x38, 0x39 };
 
217
        static const u8 reset []         = { 0x50, 0x80 };
 
218
        static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
 
219
        static const u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
212
220
                                       0x00, 0xFF, 0x00, 0x40, 0x40 };
213
 
        static u8 dntv_extra[]     = { 0xB5, 0x7A };
214
 
        static u8 capt_range_cfg[] = { 0x75, 0x32 };
 
221
        static const u8 dntv_extra[]     = { 0xB5, 0x7A };
 
222
        static const u8 capt_range_cfg[] = { 0x75, 0x32 };
215
223
 
216
224
        mt352_write(fe, clock_config,   sizeof(clock_config));
217
225
        udelay(2000);
226
234
        return 0;
227
235
}
228
236
 
229
 
static struct mt352_config dvico_fusionhdtv = {
 
237
static const struct mt352_config dvico_fusionhdtv = {
230
238
        .demod_address = 0x0f,
231
239
        .demod_init    = dvico_fusionhdtv_demod_init,
232
240
};
233
241
 
234
 
static struct mt352_config dntv_live_dvbt_config = {
 
242
static const struct mt352_config dntv_live_dvbt_config = {
235
243
        .demod_address = 0x0f,
236
244
        .demod_init    = dntv_live_dvbt_demod_init,
237
245
};
238
246
 
239
 
static struct mt352_config dvico_fusionhdtv_dual = {
 
247
static const struct mt352_config dvico_fusionhdtv_dual = {
240
248
        .demod_address = 0x0f,
241
249
        .demod_init    = dvico_dual_demod_init,
242
250
};
243
251
 
244
 
static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
 
252
static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
245
253
        .demod_address = (0x1e >> 1),
246
254
        .no_tuner      = 1,
247
255
        .if2           = 45600,
248
256
};
249
257
 
 
258
static struct mb86a16_config twinhan_vp1027 = {
 
259
        .demod_address  = 0x08,
 
260
};
 
261
 
250
262
#if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
251
263
static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
252
264
{
253
 
        static u8 clock_config []  = { 0x89, 0x38, 0x38 };
254
 
        static u8 reset []         = { 0x50, 0x80 };
255
 
        static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
256
 
        static u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
 
265
        static const u8 clock_config []  = { 0x89, 0x38, 0x38 };
 
266
        static const u8 reset []         = { 0x50, 0x80 };
 
267
        static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
 
268
        static const u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
257
269
                                       0x00, 0xFF, 0x00, 0x40, 0x40 };
258
 
        static u8 dntv_extra[]     = { 0xB5, 0x7A };
259
 
        static u8 capt_range_cfg[] = { 0x75, 0x32 };
 
270
        static const u8 dntv_extra[]     = { 0xB5, 0x7A };
 
271
        static const u8 capt_range_cfg[] = { 0x75, 0x32 };
260
272
 
261
273
        mt352_write(fe, clock_config,   sizeof(clock_config));
262
274
        udelay(2000);
271
283
        return 0;
272
284
}
273
285
 
274
 
static struct mt352_config dntv_live_dvbt_pro_config = {
 
286
static const struct mt352_config dntv_live_dvbt_pro_config = {
275
287
        .demod_address = 0x0f,
276
288
        .no_tuner      = 1,
277
289
        .demod_init    = dntv_live_dvbt_pro_demod_init,
278
290
};
279
291
#endif
280
292
 
281
 
static struct zl10353_config dvico_fusionhdtv_hybrid = {
 
293
static const struct zl10353_config dvico_fusionhdtv_hybrid = {
282
294
        .demod_address = 0x0f,
283
295
        .no_tuner      = 1,
284
296
};
285
297
 
286
 
static struct zl10353_config dvico_fusionhdtv_xc3028 = {
 
298
static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
287
299
        .demod_address = 0x0f,
288
300
        .if2           = 45600,
289
301
        .no_tuner      = 1,
290
302
};
291
303
 
292
 
static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
 
304
static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
293
305
        .demod_address = 0x0f,
294
306
        .if2 = 4560,
295
307
        .no_tuner = 1,
296
308
        .demod_init = dvico_fusionhdtv_demod_init,
297
309
};
298
310
 
299
 
static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
 
311
static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
300
312
        .demod_address = 0x0f,
301
313
};
302
314
 
303
 
static struct cx22702_config connexant_refboard_config = {
 
315
static const struct cx22702_config connexant_refboard_config = {
304
316
        .demod_address = 0x43,
305
317
        .output_mode   = CX22702_SERIAL_OUTPUT,
306
318
};
307
319
 
308
 
static struct cx22702_config hauppauge_hvr_config = {
 
320
static const struct cx22702_config hauppauge_hvr_config = {
309
321
        .demod_address = 0x63,
310
322
        .output_mode   = CX22702_SERIAL_OUTPUT,
311
323
};
317
329
        return 0;
318
330
}
319
331
 
320
 
static struct or51132_config pchdtv_hd3000 = {
 
332
static const struct or51132_config pchdtv_hd3000 = {
321
333
        .demod_address = 0x15,
322
334
        .set_ts_params = or51132_set_ts_param,
323
335
};
352
364
        .set_ts_params = lgdt330x_set_ts_param,
353
365
};
354
366
 
355
 
static struct lgdt330x_config fusionhdtv_5_gold = {
 
367
static const struct lgdt330x_config fusionhdtv_5_gold = {
356
368
        .demod_address = 0x0e,
357
369
        .demod_chip    = LGDT3303,
358
370
        .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
359
371
        .set_ts_params = lgdt330x_set_ts_param,
360
372
};
361
373
 
362
 
static struct lgdt330x_config pchdtv_hd5500 = {
 
374
static const struct lgdt330x_config pchdtv_hd5500 = {
363
375
        .demod_address = 0x59,
364
376
        .demod_chip    = LGDT3303,
365
377
        .serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
373
385
        return 0;
374
386
}
375
387
 
376
 
static struct nxt200x_config ati_hdtvwonder = {
 
388
static const struct nxt200x_config ati_hdtvwonder = {
377
389
        .demod_address = 0x0a,
378
390
        .set_ts_params = nxt200x_set_ts_param,
379
391
};
426
438
 
427
439
        cx_set(MO_GP0_IO, 0x6040);
428
440
        switch (voltage) {
429
 
                case SEC_VOLTAGE_13:
430
 
                        cx_clear(MO_GP0_IO, 0x20);
431
 
                        break;
432
 
                case SEC_VOLTAGE_18:
433
 
                        cx_set(MO_GP0_IO, 0x20);
434
 
                        break;
435
 
                case SEC_VOLTAGE_OFF:
436
 
                        cx_clear(MO_GP0_IO, 0x20);
437
 
                        break;
438
 
        }
439
 
 
440
 
        if (core->prev_set_voltage)
441
 
                return core->prev_set_voltage(fe, voltage);
442
 
        return 0;
443
 
}
444
 
 
445
 
static struct cx24123_config geniatech_dvbs_config = {
446
 
        .demod_address = 0x55,
447
 
        .set_ts_params = cx24123_set_ts_param,
448
 
};
449
 
 
450
 
static struct cx24123_config hauppauge_novas_config = {
451
 
        .demod_address = 0x55,
452
 
        .set_ts_params = cx24123_set_ts_param,
453
 
};
454
 
 
455
 
static struct cx24123_config kworld_dvbs_100_config = {
 
441
        case SEC_VOLTAGE_13:
 
442
                cx_clear(MO_GP0_IO, 0x20);
 
443
                break;
 
444
        case SEC_VOLTAGE_18:
 
445
                cx_set(MO_GP0_IO, 0x20);
 
446
                break;
 
447
        case SEC_VOLTAGE_OFF:
 
448
                cx_clear(MO_GP0_IO, 0x20);
 
449
                break;
 
450
        }
 
451
 
 
452
        if (core->prev_set_voltage)
 
453
                return core->prev_set_voltage(fe, voltage);
 
454
        return 0;
 
455
}
 
456
 
 
457
static int vp1027_set_voltage(struct dvb_frontend *fe,
 
458
                                    fe_sec_voltage_t voltage)
 
459
{
 
460
        struct cx8802_dev *dev = fe->dvb->priv;
 
461
        struct cx88_core *core = dev->core;
 
462
 
 
463
        switch (voltage) {
 
464
        case SEC_VOLTAGE_13:
 
465
                dprintk(1, "LNB SEC Voltage=13\n");
 
466
                cx_write(MO_GP0_IO, 0x00001220);
 
467
                break;
 
468
        case SEC_VOLTAGE_18:
 
469
                dprintk(1, "LNB SEC Voltage=18\n");
 
470
                cx_write(MO_GP0_IO, 0x00001222);
 
471
                break;
 
472
        case SEC_VOLTAGE_OFF:
 
473
                dprintk(1, "LNB Voltage OFF\n");
 
474
                cx_write(MO_GP0_IO, 0x00001230);
 
475
                break;
 
476
        }
 
477
 
 
478
        if (core->prev_set_voltage)
 
479
                return core->prev_set_voltage(fe, voltage);
 
480
        return 0;
 
481
}
 
482
 
 
483
static const struct cx24123_config geniatech_dvbs_config = {
 
484
        .demod_address = 0x55,
 
485
        .set_ts_params = cx24123_set_ts_param,
 
486
};
 
487
 
 
488
static const struct cx24123_config hauppauge_novas_config = {
 
489
        .demod_address = 0x55,
 
490
        .set_ts_params = cx24123_set_ts_param,
 
491
};
 
492
 
 
493
static const struct cx24123_config kworld_dvbs_100_config = {
456
494
        .demod_address = 0x15,
457
495
        .set_ts_params = cx24123_set_ts_param,
458
496
        .lnb_polarity  = 1,
459
497
};
460
498
 
461
 
static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
 
499
static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
462
500
        .demod_address = 0x32 >> 1,
463
501
        .output_mode   = S5H1409_PARALLEL_OUTPUT,
464
502
        .gpio          = S5H1409_GPIO_ON,
468
506
        .mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
469
507
};
470
508
 
471
 
static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
 
509
static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
472
510
        .demod_address = 0x32 >> 1,
473
511
        .output_mode   = S5H1409_SERIAL_OUTPUT,
474
512
        .gpio          = S5H1409_GPIO_OFF,
477
515
        .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
478
516
};
479
517
 
480
 
static struct s5h1409_config kworld_atsc_120_config = {
 
518
static const struct s5h1409_config kworld_atsc_120_config = {
481
519
        .demod_address = 0x32 >> 1,
482
520
        .output_mode   = S5H1409_SERIAL_OUTPUT,
483
521
        .gpio          = S5H1409_GPIO_OFF,
486
524
        .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
487
525
};
488
526
 
489
 
static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
 
527
static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
490
528
        .i2c_address    = 0x64,
491
529
        .if_khz         = 5380,
492
530
};
493
531
 
494
 
static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
 
532
static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
495
533
        .demod_address = (0x1e >> 1),
496
534
        .no_tuner      = 1,
497
535
        .if2           = 45600,
498
536
};
499
537
 
500
 
static struct zl10353_config cx88_geniatech_x8000_mt = {
 
538
static const struct zl10353_config cx88_geniatech_x8000_mt = {
501
539
        .demod_address = (0x1e >> 1),
502
540
        .no_tuner = 1,
503
541
        .disable_i2c_gate_ctrl = 1,
504
542
};
505
543
 
506
 
static struct s5h1411_config dvico_fusionhdtv7_config = {
 
544
static const struct s5h1411_config dvico_fusionhdtv7_config = {
507
545
        .output_mode   = S5H1411_SERIAL_OUTPUT,
508
546
        .gpio          = S5H1411_GPIO_ON,
509
547
        .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
513
551
        .status_mode   = S5H1411_DEMODLOCKING
514
552
};
515
553
 
516
 
static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
 
554
static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
517
555
        .i2c_address    = 0xc2 >> 1,
518
556
        .if_khz         = 5380,
519
557
};
573
611
        return 0;
574
612
}
575
613
 
 
614
static int stv0900_set_ts_param(struct dvb_frontend *fe,
 
615
        int is_punctured)
 
616
{
 
617
        struct cx8802_dev *dev = fe->dvb->priv;
 
618
        dev->ts_gen_cntrl = 0;
 
619
 
 
620
        return 0;
 
621
}
 
622
 
576
623
static int cx24116_reset_device(struct dvb_frontend *fe)
577
624
{
578
625
        struct cx8802_dev *dev = fe->dvb->priv;
589
636
        return 0;
590
637
}
591
638
 
592
 
static struct cx24116_config hauppauge_hvr4000_config = {
 
639
static const struct cx24116_config hauppauge_hvr4000_config = {
593
640
        .demod_address          = 0x05,
594
641
        .set_ts_params          = cx24116_set_ts_param,
595
642
        .reset_device           = cx24116_reset_device,
596
643
};
597
644
 
598
 
static struct cx24116_config tevii_s460_config = {
 
645
static const struct cx24116_config tevii_s460_config = {
599
646
        .demod_address = 0x55,
600
647
        .set_ts_params = cx24116_set_ts_param,
601
648
        .reset_device  = cx24116_reset_device,
602
649
};
603
650
 
604
 
static struct stv0299_config tevii_tuner_sharp_config = {
 
651
static const struct stv0900_config prof_7301_stv0900_config = {
 
652
        .demod_address = 0x6a,
 
653
/*      demod_mode = 0,*/
 
654
        .xtal = 27000000,
 
655
        .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
 
656
        .diseqc_mode = 2,/* 2/3 PWM */
 
657
        .tun1_maddress = 0,/* 0x60 */
 
658
        .tun1_adc = 0,/* 2 Vpp */
 
659
        .path1_mode = 3,
 
660
        .set_ts_params = stv0900_set_ts_param,
 
661
};
 
662
 
 
663
static const struct stb6100_config prof_7301_stb6100_config = {
 
664
        .tuner_address = 0x60,
 
665
        .refclock = 27000000,
 
666
};
 
667
 
 
668
static const struct stv0299_config tevii_tuner_sharp_config = {
605
669
        .demod_address = 0x68,
606
670
        .inittab = sharp_z0194a_inittab,
607
671
        .mclk = 88000000UL,
614
678
        .set_ts_params = cx24116_set_ts_param,
615
679
};
616
680
 
617
 
static struct stv0288_config tevii_tuner_earda_config = {
 
681
static const struct stv0288_config tevii_tuner_earda_config = {
618
682
        .demod_address = 0x68,
619
683
        .min_delay_ms = 100,
620
684
        .set_ts_params = cx24116_set_ts_param,
645
709
        return 0;
646
710
}
647
711
 
 
712
 
 
713
 
 
714
static const u8 samsung_smt_7020_inittab[] = {
 
715
             0x01, 0x15,
 
716
             0x02, 0x00,
 
717
             0x03, 0x00,
 
718
             0x04, 0x7D,
 
719
             0x05, 0x0F,
 
720
             0x06, 0x02,
 
721
             0x07, 0x00,
 
722
             0x08, 0x60,
 
723
 
 
724
             0x0A, 0xC2,
 
725
             0x0B, 0x00,
 
726
             0x0C, 0x01,
 
727
             0x0D, 0x81,
 
728
             0x0E, 0x44,
 
729
             0x0F, 0x09,
 
730
             0x10, 0x3C,
 
731
             0x11, 0x84,
 
732
             0x12, 0xDA,
 
733
             0x13, 0x99,
 
734
             0x14, 0x8D,
 
735
             0x15, 0xCE,
 
736
             0x16, 0xE8,
 
737
             0x17, 0x43,
 
738
             0x18, 0x1C,
 
739
             0x19, 0x1B,
 
740
             0x1A, 0x1D,
 
741
 
 
742
             0x1C, 0x12,
 
743
             0x1D, 0x00,
 
744
             0x1E, 0x00,
 
745
             0x1F, 0x00,
 
746
             0x20, 0x00,
 
747
             0x21, 0x00,
 
748
             0x22, 0x00,
 
749
             0x23, 0x00,
 
750
 
 
751
             0x28, 0x02,
 
752
             0x29, 0x28,
 
753
             0x2A, 0x14,
 
754
             0x2B, 0x0F,
 
755
             0x2C, 0x09,
 
756
             0x2D, 0x05,
 
757
 
 
758
             0x31, 0x1F,
 
759
             0x32, 0x19,
 
760
             0x33, 0xFC,
 
761
             0x34, 0x13,
 
762
             0xff, 0xff,
 
763
};
 
764
 
 
765
 
 
766
static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
 
767
        struct dvb_frontend_parameters *params)
 
768
{
 
769
        struct cx8802_dev *dev = fe->dvb->priv;
 
770
        u8 buf[4];
 
771
        u32 div;
 
772
        struct i2c_msg msg = {
 
773
                .addr = 0x61,
 
774
                .flags = 0,
 
775
                .buf = buf,
 
776
                .len = sizeof(buf) };
 
777
 
 
778
        div = params->frequency / 125;
 
779
 
 
780
        buf[0] = (div >> 8) & 0x7f;
 
781
        buf[1] = div & 0xff;
 
782
        buf[2] = 0x84;  /* 0xC4 */
 
783
        buf[3] = 0x00;
 
784
 
 
785
        if (params->frequency < 1500000)
 
786
                buf[3] |= 0x10;
 
787
 
 
788
        if (fe->ops.i2c_gate_ctrl)
 
789
                fe->ops.i2c_gate_ctrl(fe, 1);
 
790
 
 
791
        if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
 
792
                return -EIO;
 
793
 
 
794
        return 0;
 
795
}
 
796
 
 
797
static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
 
798
        fe_sec_tone_mode_t tone)
 
799
{
 
800
        struct cx8802_dev *dev = fe->dvb->priv;
 
801
        struct cx88_core *core = dev->core;
 
802
 
 
803
        cx_set(MO_GP0_IO, 0x0800);
 
804
 
 
805
        switch (tone) {
 
806
        case SEC_TONE_ON:
 
807
                cx_set(MO_GP0_IO, 0x08);
 
808
                break;
 
809
        case SEC_TONE_OFF:
 
810
                cx_clear(MO_GP0_IO, 0x08);
 
811
                break;
 
812
        default:
 
813
                return -EINVAL;
 
814
        }
 
815
 
 
816
        return 0;
 
817
}
 
818
 
 
819
static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
 
820
        fe_sec_voltage_t voltage)
 
821
{
 
822
        struct cx8802_dev *dev = fe->dvb->priv;
 
823
        struct cx88_core *core = dev->core;
 
824
 
 
825
        u8 data;
 
826
        struct i2c_msg msg = {
 
827
                .addr = 8,
 
828
                .flags = 0,
 
829
                .buf = &data,
 
830
                .len = sizeof(data) };
 
831
 
 
832
        cx_set(MO_GP0_IO, 0x8000);
 
833
 
 
834
        switch (voltage) {
 
835
        case SEC_VOLTAGE_OFF:
 
836
                break;
 
837
        case SEC_VOLTAGE_13:
 
838
                data = ISL6421_EN1 | ISL6421_LLC1;
 
839
                cx_clear(MO_GP0_IO, 0x80);
 
840
                break;
 
841
        case SEC_VOLTAGE_18:
 
842
                data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
 
843
                cx_clear(MO_GP0_IO, 0x80);
 
844
                break;
 
845
        default:
 
846
                return -EINVAL;
 
847
        };
 
848
 
 
849
        return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
 
850
}
 
851
 
 
852
static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
 
853
        u32 srate, u32 ratio)
 
854
{
 
855
        u8 aclk = 0;
 
856
        u8 bclk = 0;
 
857
 
 
858
        if (srate < 1500000) {
 
859
                aclk = 0xb7;
 
860
                bclk = 0x47;
 
861
        } else if (srate < 3000000) {
 
862
                aclk = 0xb7;
 
863
                bclk = 0x4b;
 
864
        } else if (srate < 7000000) {
 
865
                aclk = 0xb7;
 
866
                bclk = 0x4f;
 
867
        } else if (srate < 14000000) {
 
868
                aclk = 0xb7;
 
869
                bclk = 0x53;
 
870
        } else if (srate < 30000000) {
 
871
                aclk = 0xb6;
 
872
                bclk = 0x53;
 
873
        } else if (srate < 45000000) {
 
874
                aclk = 0xb4;
 
875
                bclk = 0x51;
 
876
        }
 
877
 
 
878
        stv0299_writereg(fe, 0x13, aclk);
 
879
        stv0299_writereg(fe, 0x14, bclk);
 
880
        stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
 
881
        stv0299_writereg(fe, 0x20, (ratio >>  8) & 0xff);
 
882
        stv0299_writereg(fe, 0x21, ratio & 0xf0);
 
883
 
 
884
        return 0;
 
885
}
 
886
 
 
887
 
 
888
static const struct stv0299_config samsung_stv0299_config = {
 
889
        .demod_address = 0x68,
 
890
        .inittab = samsung_smt_7020_inittab,
 
891
        .mclk = 88000000UL,
 
892
        .invert = 0,
 
893
        .skip_reinit = 0,
 
894
        .lock_output = STV0299_LOCKOUTPUT_LK,
 
895
        .volt13_op0_op1 = STV0299_VOLT13_OP1,
 
896
        .min_delay_ms = 100,
 
897
        .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
 
898
};
 
899
 
648
900
static int dvb_register(struct cx8802_dev *dev)
649
901
{
650
902
        struct cx88_core *core = dev->core;
1014
1266
                                fe->ops.tuner_ops.set_config(fe, &ctl);
1015
1267
                }
1016
1268
                break;
1017
 
         case CX88_BOARD_PINNACLE_HYBRID_PCTV:
 
1269
        case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1018
1270
        case CX88_BOARD_WINFAST_DTV1800H:
1019
1271
                fe0->dvb.frontend = dvb_attach(zl10353_attach,
1020
1272
                                               &cx88_pinnacle_hybrid_pctv,
1149
1401
                                goto frontend_detach;
1150
1402
                }
1151
1403
                break;
 
1404
        case CX88_BOARD_PROF_7301:{
 
1405
                struct dvb_tuner_ops *tuner_ops = NULL;
 
1406
 
 
1407
                fe0->dvb.frontend = dvb_attach(stv0900_attach,
 
1408
                                                &prof_7301_stv0900_config,
 
1409
                                                &core->i2c_adap, 0);
 
1410
                if (fe0->dvb.frontend != NULL) {
 
1411
                        if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
 
1412
                                        &prof_7301_stb6100_config,
 
1413
                                        &core->i2c_adap))
 
1414
                                goto frontend_detach;
 
1415
 
 
1416
                        tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
 
1417
                        tuner_ops->set_frequency = stb6100_set_freq;
 
1418
                        tuner_ops->get_frequency = stb6100_get_freq;
 
1419
                        tuner_ops->set_bandwidth = stb6100_set_bandw;
 
1420
                        tuner_ops->get_bandwidth = stb6100_get_bandw;
 
1421
 
 
1422
                        core->prev_set_voltage =
 
1423
                                        fe0->dvb.frontend->ops.set_voltage;
 
1424
                        fe0->dvb.frontend->ops.set_voltage =
 
1425
                                        tevii_dvbs_set_voltage;
 
1426
                }
 
1427
                break;
 
1428
                }
 
1429
        case CX88_BOARD_SAMSUNG_SMT_7020:
 
1430
                dev->ts_gen_cntrl = 0x08;
 
1431
 
 
1432
                cx_set(MO_GP0_IO, 0x0101);
 
1433
 
 
1434
                cx_clear(MO_GP0_IO, 0x01);
 
1435
                mdelay(100);
 
1436
                cx_set(MO_GP0_IO, 0x01);
 
1437
                mdelay(200);
 
1438
 
 
1439
                fe0->dvb.frontend = dvb_attach(stv0299_attach,
 
1440
                                        &samsung_stv0299_config,
 
1441
                                        &dev->core->i2c_adap);
 
1442
                if (fe0->dvb.frontend) {
 
1443
                        fe0->dvb.frontend->ops.tuner_ops.set_params =
 
1444
                                samsung_smt_7020_tuner_set_params;
 
1445
                        fe0->dvb.frontend->tuner_priv =
 
1446
                                &dev->core->i2c_adap;
 
1447
                        fe0->dvb.frontend->ops.set_voltage =
 
1448
                                samsung_smt_7020_set_voltage;
 
1449
                        fe0->dvb.frontend->ops.set_tone =
 
1450
                                samsung_smt_7020_set_tone;
 
1451
                }
 
1452
 
 
1453
                break;
 
1454
        case CX88_BOARD_TWINHAN_VP1027_DVBS:
 
1455
                dev->ts_gen_cntrl = 0x00;
 
1456
                fe0->dvb.frontend = dvb_attach(mb86a16_attach,
 
1457
                                                &twinhan_vp1027,
 
1458
                                                &core->i2c_adap);
 
1459
                if (fe0->dvb.frontend) {
 
1460
                        core->prev_set_voltage =
 
1461
                                        fe0->dvb.frontend->ops.set_voltage;
 
1462
                        fe0->dvb.frontend->ops.set_voltage =
 
1463
                                        vp1027_set_voltage;
 
1464
                }
 
1465
                break;
 
1466
 
1152
1467
        default:
1153
1468
                printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1154
1469
                       core->name);
1170
1485
                fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1171
1486
 
1172
1487
        /* Put the analog decoder in standby to keep it quiet */
1173
 
        call_all(core, tuner, s_standby);
 
1488
        call_all(core, core, s_power, 0);
1174
1489
 
1175
1490
        /* register everything */
1176
1491
        return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1177
 
                &dev->pci->dev, adapter_nr, mfe_shared);
 
1492
                                         &dev->pci->dev, adapter_nr, mfe_shared, NULL);
1178
1493
 
1179
1494
frontend_detach:
1180
1495
        core->gate_ctrl = NULL;
1308
1623
                                    V4L2_BUF_TYPE_VIDEO_CAPTURE,
1309
1624
                                    V4L2_FIELD_TOP,
1310
1625
                                    sizeof(struct cx88_buffer),
1311
 
                                    dev);
 
1626
                                    dev, NULL);
1312
1627
                /* init struct videobuf_dvb */
1313
1628
                fe->dvb.name = dev->core->name;
1314
1629
        }