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Viewing changes to drivers/net/ixgbe/ixgbe_fcoe.c

  • Committer: Bazaar Package Importer
  • Author(s): Ben Hutchings, Ben Hutchings, Aurelien Jarno, Martin Michlmayr
  • Date: 2011-04-06 13:53:30 UTC
  • mfrom: (43.1.5 sid)
  • Revision ID: james.westby@ubuntu.com-20110406135330-wjufxhd0tvn3zx4z
Tags: 2.6.38-3
http://bugs.debian.org/620124
http://bugs.debian.org/620284
http://bugs.debian.org/620204
[ Ben Hutchings ]
* [ppc64] Add to linux-tools package architectures (Closes: #620124)
* [amd64] Save cr4 to mmu_cr4_features at boot time (Closes: #620284)
* appletalk: Fix bugs introduced when removing use of BKL
* ALSA: Fix yet another race in disconnection
* cciss: Fix lost command issue
* ath9k: Fix kernel panic in AR2427
* ses: Avoid kernel panic when lun 0 is not mapped
* PCI/ACPI: Report ASPM support to BIOS if not disabled from command line

[ Aurelien Jarno ]
* rtlwifi: fix build when PCI is not enabled.

[ Martin Michlmayr ]
* rtlwifi: Eliminate udelay calls with too large values (Closes: #620204)

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Lines of Context:
drivers/net/ixgbe/ixgbe_fcoe.c
1
1
/*******************************************************************************
2
2
 
3
3
  Intel 10 Gigabit PCI Express Linux driver
4
 
  Copyright(c) 1999 - 2009 Intel Corporation.
 
4
  Copyright(c) 1999 - 2010 Intel Corporation.
5
5
 
6
6
  This program is free software; you can redistribute it and/or modify it
7
7
  under the terms and conditions of the GNU General Public License,
25
25
 
26
26
*******************************************************************************/
27
27
 
28
 
 
29
28
#include "ixgbe.h"
30
29
#ifdef CONFIG_IXGBE_DCB
31
30
#include "ixgbe_dcb_82599.h"
32
31
#endif /* CONFIG_IXGBE_DCB */
33
32
#include <linux/if_ether.h>
 
33
#include <linux/gfp.h>
 
34
#include <linux/if_vlan.h>
34
35
#include <scsi/scsi_cmnd.h>
35
36
#include <scsi/scsi_device.h>
36
37
#include <scsi/fc/fc_fs.h>
67
68
static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
68
69
{
69
70
        ddp->len = 0;
70
 
        ddp->err = 0;
 
71
        ddp->err = 1;
71
72
        ddp->udl = NULL;
72
73
        ddp->udp = 0UL;
73
74
        ddp->sgl = NULL;
91
92
        struct ixgbe_fcoe *fcoe;
92
93
        struct ixgbe_adapter *adapter;
93
94
        struct ixgbe_fcoe_ddp *ddp;
 
95
        u32 fcbuff;
94
96
 
95
97
        if (!netdev)
96
98
                goto out_ddp_put;
114
116
                IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
115
117
                IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
116
118
                                (xid | IXGBE_FCDMARW_WE));
 
119
 
 
120
                /* guaranteed to be invalidated after 100us */
 
121
                IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
 
122
                                (xid | IXGBE_FCDMARW_RE));
 
123
                fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
117
124
                spin_unlock_bh(&fcoe->lock);
 
125
                if (fcbuff & IXGBE_FCBUFF_VALID)
 
126
                        udelay(100);
118
127
        }
119
128
        if (ddp->sgl)
120
129
                pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
150
159
        struct scatterlist *sg;
151
160
        unsigned int i, j, dmacount;
152
161
        unsigned int len;
153
 
        static const unsigned int bufflen = 4096;
 
162
        static const unsigned int bufflen = IXGBE_FCBUFF_MIN;
154
163
        unsigned int firstoff = 0;
155
164
        unsigned int lastsize;
156
165
        unsigned int thisoff = 0;
157
166
        unsigned int thislen = 0;
158
167
        u32 fcbuff, fcdmarw, fcfltrw;
159
 
        dma_addr_t addr;
 
168
        dma_addr_t addr = 0;
160
169
 
161
170
        if (!netdev || !sgl)
162
171
                return 0;
163
172
 
164
173
        adapter = netdev_priv(netdev);
165
174
        if (xid >= IXGBE_FCOE_DDP_MAX) {
166
 
                DPRINTK(DRV, WARNING, "xid=0x%x out-of-range\n", xid);
 
175
                e_warn(drv, "xid=0x%x out-of-range\n", xid);
167
176
                return 0;
168
177
        }
169
178
 
 
179
        /* no DDP if we are already down or resetting */
 
180
        if (test_bit(__IXGBE_DOWN, &adapter->state) ||
 
181
            test_bit(__IXGBE_RESETTING, &adapter->state))
 
182
                return 0;
 
183
 
170
184
        fcoe = &adapter->fcoe;
171
185
        if (!fcoe->pool) {
172
 
                DPRINTK(DRV, WARNING, "xid=0x%x no ddp pool for fcoe\n", xid);
 
186
                e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid);
173
187
                return 0;
174
188
        }
175
189
 
176
190
        ddp = &fcoe->ddp[xid];
177
191
        if (ddp->sgl) {
178
 
                DPRINTK(DRV, ERR, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
179
 
                        xid, ddp->sgl, ddp->sgc);
 
192
                e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
 
193
                      xid, ddp->sgl, ddp->sgc);
180
194
                return 0;
181
195
        }
182
196
        ixgbe_fcoe_clear_ddp(ddp);
184
198
        /* setup dma from scsi command sgl */
185
199
        dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
186
200
        if (dmacount == 0) {
187
 
                DPRINTK(DRV, ERR, "xid 0x%x DMA map error\n", xid);
 
201
                e_err(drv, "xid 0x%x DMA map error\n", xid);
188
202
                return 0;
189
203
        }
190
204
 
191
205
        /* alloc the udl from our ddp pool */
192
 
        ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp);
 
206
        ddp->udl = pci_pool_alloc(fcoe->pool, GFP_ATOMIC, &ddp->udp);
193
207
        if (!ddp->udl) {
194
 
                DPRINTK(DRV, ERR, "failed allocated ddp context\n");
 
208
                e_err(drv, "failed allocated ddp context\n");
195
209
                goto out_noddp_unmap;
196
210
        }
197
211
        ddp->sgl = sgl;
202
216
                addr = sg_dma_address(sg);
203
217
                len = sg_dma_len(sg);
204
218
                while (len) {
 
219
                        /* max number of buffers allowed in one DDP context */
 
220
                        if (j >= IXGBE_BUFFCNT_MAX) {
 
221
                                e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
 
222
                                      "not enough descriptors\n",
 
223
                                      xid, i, j, dmacount, (u64)addr);
 
224
                                goto out_noddp_free;
 
225
                        }
 
226
 
205
227
                        /* get the offset of length of current buffer */
206
228
                        thisoff = addr & ((dma_addr_t)bufflen - 1);
207
229
                        thislen = min((bufflen - thisoff), len);
227
249
                        len -= thislen;
228
250
                        addr += thislen;
229
251
                        j++;
230
 
                        /* max number of buffers allowed in one DDP context */
231
 
                        if (j > IXGBE_BUFFCNT_MAX) {
232
 
                                DPRINTK(DRV, ERR, "xid=%x:%d,%d,%d:addr=%llx "
233
 
                                        "not enough descriptors\n",
234
 
                                        xid, i, j, dmacount, (u64)addr);
235
 
                                goto out_noddp_free;
236
 
                        }
237
252
                }
238
253
        }
239
254
        /* only the last buffer may have non-full bufflen */
240
255
        lastsize = thisoff + thislen;
241
256
 
 
257
        /*
 
258
         * lastsize can not be buffer len.
 
259
         * If it is then adding another buffer with lastsize = 1.
 
260
         */
 
261
        if (lastsize == bufflen) {
 
262
                if (j >= IXGBE_BUFFCNT_MAX) {
 
263
                        e_err(drv, "xid=%x:%d,%d,%d:addr=%llx "
 
264
                                "not enough user buffers. We need an extra "
 
265
                                "buffer because lastsize is bufflen.\n",
 
266
                                xid, i, j, dmacount, (u64)addr);
 
267
                        goto out_noddp_free;
 
268
                }
 
269
 
 
270
                ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma);
 
271
                j++;
 
272
                lastsize = 1;
 
273
        }
 
274
 
242
275
        fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
243
 
        fcbuff |= (j << IXGBE_FCBUFF_BUFFCNT_SHIFT);
 
276
        fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT);
244
277
        fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
245
278
        fcbuff |= (IXGBE_FCBUFF_VALID);
246
279
 
302
335
        if (!ixgbe_rx_is_fcoe(rx_desc))
303
336
                goto ddp_out;
304
337
 
305
 
        skb->ip_summed = CHECKSUM_UNNECESSARY;
306
338
        sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
307
339
        fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
308
340
        fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
309
341
        if (fcerr == IXGBE_FCERR_BADCRC)
310
 
                skb->ip_summed = CHECKSUM_NONE;
 
342
                skb_checksum_none_assert(skb);
 
343
        else
 
344
                skb->ip_summed = CHECKSUM_UNNECESSARY;
311
345
 
312
 
        skb_reset_network_header(skb);
313
 
        skb_set_transport_header(skb, skb_network_offset(skb) +
314
 
                                 sizeof(struct fcoe_hdr));
315
 
        fh = (struct fc_frame_header *)skb_transport_header(skb);
 
346
        if (eth_hdr(skb)->h_proto == htons(ETH_P_8021Q))
 
347
                fh = (struct fc_frame_header *)(skb->data +
 
348
                        sizeof(struct vlan_hdr) + sizeof(struct fcoe_hdr));
 
349
        else
 
350
                fh = (struct fc_frame_header *)(skb->data +
 
351
                        sizeof(struct fcoe_hdr));
316
352
        fctl = ntoh24(fh->fh_f_ctl);
317
353
        if (fctl & FC_FC_EX_CTX)
318
354
                xid =  be16_to_cpu(fh->fh_ox_id);
381
417
        struct fc_frame_header *fh;
382
418
 
383
419
        if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
384
 
                DPRINTK(DRV, ERR, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
385
 
                        skb_shinfo(skb)->gso_type);
 
420
                e_err(drv, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
 
421
                      skb_shinfo(skb)->gso_type);
386
422
                return -EINVAL;
387
423
        }
388
424
 
408
444
                fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
409
445
                break;
410
446
        default:
411
 
                DPRINTK(DRV, WARNING, "unknown sof = 0x%x\n", sof);
 
447
                e_warn(drv, "unknown sof = 0x%x\n", sof);
412
448
                return -EINVAL;
413
449
        }
414
450
 
435
471
                fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
436
472
                break;
437
473
        default:
438
 
                DPRINTK(DRV, WARNING, "unknown eof = 0x%x\n", eof);
 
474
                e_warn(drv, "unknown eof = 0x%x\n", eof);
439
475
                return -EINVAL;
440
476
        }
441
477
 
467
503
 
468
504
        /* write context desc */
469
505
        i = tx_ring->next_to_use;
470
 
        context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
 
506
        context_desc = IXGBE_TX_CTXTDESC_ADV(tx_ring, i);
471
507
        context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
472
508
        context_desc->seqnum_seed       = cpu_to_le32(fcoe_sof_eof);
473
509
        context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
499
535
        struct ixgbe_hw *hw = &adapter->hw;
500
536
        struct ixgbe_fcoe *fcoe = &adapter->fcoe;
501
537
        struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
 
538
#ifdef CONFIG_IXGBE_DCB
 
539
        u8 tc;
 
540
        u32 up2tc;
 
541
#endif
502
542
 
503
543
        /* create the pool for ddp if not created yet */
504
544
        if (!fcoe->pool) {
507
547
                                             adapter->pdev, IXGBE_FCPTR_MAX,
508
548
                                             IXGBE_FCPTR_ALIGN, PAGE_SIZE);
509
549
                if (!fcoe->pool)
510
 
                        DPRINTK(DRV, ERR,
511
 
                                "failed to allocated FCoE DDP pool\n");
 
550
                        e_err(drv, "failed to allocated FCoE DDP pool\n");
512
551
 
513
552
                spin_lock_init(&fcoe->lock);
 
553
 
 
554
                /* Extra buffer to be shared by all DDPs for HW work around */
 
555
                fcoe->extra_ddp_buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_ATOMIC);
 
556
                if (fcoe->extra_ddp_buffer == NULL) {
 
557
                        e_err(drv, "failed to allocated extra DDP buffer\n");
 
558
                        goto out_extra_ddp_buffer_alloc;
 
559
                }
 
560
 
 
561
                fcoe->extra_ddp_buffer_dma =
 
562
                        dma_map_single(&adapter->pdev->dev,
 
563
                                       fcoe->extra_ddp_buffer,
 
564
                                       IXGBE_FCBUFF_MIN,
 
565
                                       DMA_FROM_DEVICE);
 
566
                if (dma_mapping_error(&adapter->pdev->dev,
 
567
                                      fcoe->extra_ddp_buffer_dma)) {
 
568
                        e_err(drv, "failed to map extra DDP buffer\n");
 
569
                        goto out_extra_ddp_buffer_dma;
 
570
                }
514
571
        }
515
572
 
516
573
        /* Enable L2 eth type filter for FCoE */
517
574
        IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
518
575
                        (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
 
576
        /* Enable L2 eth type filter for FIP */
 
577
        IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP),
 
578
                        (ETH_P_FIP | IXGBE_ETQF_FILTER_EN));
519
579
        if (adapter->ring_feature[RING_F_FCOE].indices) {
520
580
                /* Use multiple rx queues for FCoE by redirection table */
521
581
                for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
522
582
                        fcoe_i = f->mask + i % f->indices;
523
583
                        fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
524
 
                        fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
 
584
                        fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
525
585
                        IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
526
586
                }
527
587
                IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
529
589
        } else  {
530
590
                /* Use single rx queue for FCoE */
531
591
                fcoe_i = f->mask;
532
 
                fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
 
592
                fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
533
593
                IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
534
594
                IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
535
595
                                IXGBE_ETQS_QUEUE_EN |
536
596
                                (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
537
597
        }
 
598
        /* send FIP frames to the first FCoE queue */
 
599
        fcoe_i = f->mask;
 
600
        fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
 
601
        IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP),
 
602
                        IXGBE_ETQS_QUEUE_EN |
 
603
                        (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
538
604
 
539
605
        IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
540
606
                        IXGBE_FCRXCTRL_FCOELLI |
541
607
                        IXGBE_FCRXCTRL_FCCRCBO |
542
608
                        (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
 
609
#ifdef CONFIG_IXGBE_DCB
 
610
        up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
 
611
        for (i = 0; i < MAX_USER_PRIORITY; i++) {
 
612
                tc = (u8)(up2tc >> (i * IXGBE_RTTUP2TC_UP_SHIFT));
 
613
                tc &= (MAX_TRAFFIC_CLASS - 1);
 
614
                if (fcoe->tc == tc) {
 
615
                        fcoe->up = i;
 
616
                        break;
 
617
                }
 
618
        }
 
619
#endif
 
620
 
 
621
        return;
 
622
 
 
623
out_extra_ddp_buffer_dma:
 
624
        kfree(fcoe->extra_ddp_buffer);
 
625
out_extra_ddp_buffer_alloc:
 
626
        pci_pool_destroy(fcoe->pool);
 
627
        fcoe->pool = NULL;
543
628
}
544
629
 
545
630
/**
559
644
        if (fcoe->pool) {
560
645
                for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
561
646
                        ixgbe_fcoe_ddp_put(adapter->netdev, i);
 
647
                dma_unmap_single(&adapter->pdev->dev,
 
648
                                 fcoe->extra_ddp_buffer_dma,
 
649
                                 IXGBE_FCBUFF_MIN,
 
650
                                 DMA_FROM_DEVICE);
 
651
                kfree(fcoe->extra_ddp_buffer);
562
652
                pci_pool_destroy(fcoe->pool);
563
653
                fcoe->pool = NULL;
564
654
        }
576
666
{
577
667
        int rc = -EINVAL;
578
668
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
 
669
        struct ixgbe_fcoe *fcoe = &adapter->fcoe;
579
670
 
580
671
 
581
672
        if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
582
673
                goto out_enable;
583
674
 
 
675
        atomic_inc(&fcoe->refcnt);
584
676
        if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
585
677
                goto out_enable;
586
678
 
587
 
        DPRINTK(DRV, INFO, "Enabling FCoE offload features.\n");
 
679
        e_info(drv, "Enabling FCoE offload features.\n");
588
680
        if (netif_running(netdev))
589
681
                netdev->netdev_ops->ndo_stop(netdev);
590
682
 
595
687
        netdev->features |= NETIF_F_FCOE_CRC;
596
688
        netdev->features |= NETIF_F_FSO;
597
689
        netdev->features |= NETIF_F_FCOE_MTU;
598
 
        netdev->vlan_features |= NETIF_F_FCOE_CRC;
599
 
        netdev->vlan_features |= NETIF_F_FSO;
600
 
        netdev->vlan_features |= NETIF_F_FCOE_MTU;
601
690
        netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
 
691
 
 
692
        ixgbe_init_interrupt_scheme(adapter);
602
693
        netdev_features_change(netdev);
603
694
 
604
 
        ixgbe_init_interrupt_scheme(adapter);
605
 
 
606
695
        if (netif_running(netdev))
607
696
                netdev->netdev_ops->ndo_open(netdev);
608
697
        rc = 0;
623
712
{
624
713
        int rc = -EINVAL;
625
714
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
 
715
        struct ixgbe_fcoe *fcoe = &adapter->fcoe;
626
716
 
627
717
        if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE))
628
718
                goto out_disable;
630
720
        if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
631
721
                goto out_disable;
632
722
 
633
 
        DPRINTK(DRV, INFO, "Disabling FCoE offload features.\n");
634
 
        if (netif_running(netdev))
635
 
                netdev->netdev_ops->ndo_stop(netdev);
636
 
 
637
 
        ixgbe_clear_interrupt_scheme(adapter);
638
 
 
639
 
        adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
640
 
        adapter->ring_feature[RING_F_FCOE].indices = 0;
 
723
        if (!atomic_dec_and_test(&fcoe->refcnt))
 
724
                goto out_disable;
 
725
 
 
726
        e_info(drv, "Disabling FCoE offload features.\n");
641
727
        netdev->features &= ~NETIF_F_FCOE_CRC;
642
728
        netdev->features &= ~NETIF_F_FSO;
643
729
        netdev->features &= ~NETIF_F_FCOE_MTU;
644
 
        netdev->vlan_features &= ~NETIF_F_FCOE_CRC;
645
 
        netdev->vlan_features &= ~NETIF_F_FSO;
646
 
        netdev->vlan_features &= ~NETIF_F_FCOE_MTU;
647
730
        netdev->fcoe_ddp_xid = 0;
648
731
        netdev_features_change(netdev);
649
732
 
 
733
        if (netif_running(netdev))
 
734
                netdev->netdev_ops->ndo_stop(netdev);
 
735
 
 
736
        ixgbe_clear_interrupt_scheme(adapter);
 
737
        adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
 
738
        adapter->ring_feature[RING_F_FCOE].indices = 0;
650
739
        ixgbe_cleanup_fcoe(adapter);
651
 
 
652
740
        ixgbe_init_interrupt_scheme(adapter);
 
741
 
653
742
        if (netif_running(netdev))
654
743
                netdev->netdev_ops->ndo_open(netdev);
655
744
        rc = 0;
671
760
 */
672
761
u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter)
673
762
{
674
 
        int i;
675
 
        u8 tc;
676
 
        u32 up2tc;
677
 
 
678
 
        up2tc = IXGBE_READ_REG(&adapter->hw, IXGBE_RTTUP2TC);
679
 
        for (i = 0; i < MAX_USER_PRIORITY; i++) {
680
 
                tc = (u8)(up2tc >> (i * IXGBE_RTTUP2TC_UP_SHIFT));
681
 
                tc &= (MAX_TRAFFIC_CLASS - 1);
682
 
                if (adapter->fcoe.tc == tc)
683
 
                        return 1 << i;
684
 
        }
685
 
 
686
 
        return 0;
 
763
        return 1 << adapter->fcoe.up;
687
764
}
688
765
 
689
766
/**
710
787
                                up2tc >>= (i * IXGBE_RTTUP2TC_UP_SHIFT);
711
788
                                up2tc &= (MAX_TRAFFIC_CLASS - 1);
712
789
                                adapter->fcoe.tc = (u8)up2tc;
 
790
                                adapter->fcoe.up = i;
713
791
                                return 0;
714
792
                        }
715
793
                }
718
796
        return 1;
719
797
}
720
798
#endif /* CONFIG_IXGBE_DCB */
 
799
 
 
800
/**
 
801
 * ixgbe_fcoe_get_wwn - get world wide name for the node or the port
 
802
 * @netdev : ixgbe adapter
 
803
 * @wwn : the world wide name
 
804
 * @type: the type of world wide name
 
805
 *
 
806
 * Returns the node or port world wide name if both the prefix and the san
 
807
 * mac address are valid, then the wwn is formed based on the NAA-2 for
 
808
 * IEEE Extended name identifier (ref. to T10 FC-LS Spec., Sec. 15.3).
 
809
 *
 
810
 * Returns : 0 on success
 
811
 */
 
812
int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
 
813
{
 
814
        int rc = -EINVAL;
 
815
        u16 prefix = 0xffff;
 
816
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
 
817
        struct ixgbe_mac_info *mac = &adapter->hw.mac;
 
818
 
 
819
        switch (type) {
 
820
        case NETDEV_FCOE_WWNN:
 
821
                prefix = mac->wwnn_prefix;
 
822
                break;
 
823
        case NETDEV_FCOE_WWPN:
 
824
                prefix = mac->wwpn_prefix;
 
825
                break;
 
826
        default:
 
827
                break;
 
828
        }
 
829
 
 
830
        if ((prefix != 0xffff) &&
 
831
            is_valid_ether_addr(mac->san_addr)) {
 
832
                *wwn = ((u64) prefix << 48) |
 
833
                       ((u64) mac->san_addr[0] << 40) |
 
834
                       ((u64) mac->san_addr[1] << 32) |
 
835
                       ((u64) mac->san_addr[2] << 24) |
 
836
                       ((u64) mac->san_addr[3] << 16) |
 
837
                       ((u64) mac->san_addr[4] << 8)  |
 
838
                       ((u64) mac->san_addr[5]);
 
839
                rc = 0;
 
840
        }
 
841
        return rc;
 
842
}
 
843
 
 
844