4
* Driver for M32R serial ports
6
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7
* Based on drivers/serial/8250.c.
9
* Copyright (C) 2001 Russell King.
10
* Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12
* This program is free software; you can redistribute it and/or modify
13
* it under the terms of the GNU General Public License as published by
14
* the Free Software Foundation; either version 2 of the License, or
15
* (at your option) any later version.
19
* A note about mapbase / membase
21
* mapbase is the physical address of the IO port. Currently, we don't
22
* support this very well, and it may well be dropped from this driver
23
* in future. As such, mapbase should be NULL.
25
* membase is an 'ioremapped' cookie. This is compatible with the old
26
* serial.c driver, and is currently the preferred form.
29
#if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33
#include <linux/module.h>
34
#include <linux/tty.h>
35
#include <linux/ioport.h>
36
#include <linux/init.h>
37
#include <linux/console.h>
38
#include <linux/sysrq.h>
39
#include <linux/serial.h>
40
#include <linux/serialP.h>
41
#include <linux/delay.h>
47
#define PORT_M32R_BASE PORT_M32R_SIO
48
#define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
49
#define BAUD_RATE 115200
51
#include <linux/serial_core.h>
53
#include "m32r_sio_reg.h"
59
#define DEBUG_AUTOCONF(fmt...) printk(fmt)
61
#define DEBUG_AUTOCONF(fmt...) do { } while (0)
65
#define DEBUG_INTR(fmt...) printk(fmt)
67
#define DEBUG_INTR(fmt...) do { } while (0)
70
#define PASS_LIMIT 256
73
* We default to IRQ0 for the "no irq" hack. Some
74
* machine types want others as well - they're free
75
* to redefine this in their header file.
77
#define is_real_interrupt(irq) ((irq) != 0)
79
#define BASE_BAUD 115200
81
/* Standard COM flags */
82
#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
85
* SERIAL_PORT_DFNS tells us about built-in ports that have no
86
* standard enumeration mechanism. Platforms that can find all
87
* serial ports via mechanisms like ACPI or PCI need not supply it.
89
#if defined(CONFIG_PLAT_USRV)
91
#define SERIAL_PORT_DFNS \
92
/* UART CLK PORT IRQ FLAGS */ \
93
{ 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
94
{ 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
96
#else /* !CONFIG_PLAT_USRV */
98
#if defined(CONFIG_SERIAL_M32R_PLDSIO)
99
#define SERIAL_PORT_DFNS \
100
{ 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
101
STD_COM_FLAGS }, /* ttyS0 */
103
#define SERIAL_PORT_DFNS \
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{ 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
105
STD_COM_FLAGS }, /* ttyS0 */
108
#endif /* !CONFIG_PLAT_USRV */
110
static struct old_serial_port old_serial_port[] = {
114
#define UART_NR ARRAY_SIZE(old_serial_port)
116
struct uart_sio_port {
117
struct uart_port port;
118
struct timer_list timer; /* "no irq" timer */
119
struct list_head list; /* ports on this IRQ */
124
unsigned char mcr_mask; /* mask of user bits */
125
unsigned char mcr_force; /* mask of forced bits */
126
unsigned char lsr_break_flag;
129
* We provide a per-port pm hook.
131
void (*pm)(struct uart_port *port,
132
unsigned int state, unsigned int old);
137
struct list_head *head;
140
static struct irq_info irq_lists[NR_IRQS];
143
* Here we define the default xmit fifo size used for each type of UART.
145
static const struct serial_uart_config uart_config[] = {
148
.dfl_xmit_fifo_size = 1,
151
[PORT_INDEX(PORT_M32R_SIO)] = {
153
.dfl_xmit_fifo_size = 1,
158
#ifdef CONFIG_SERIAL_M32R_PLDSIO
160
#define __sio_in(x) inw((unsigned long)(x))
161
#define __sio_out(v,x) outw((v),(unsigned long)(x))
163
static inline void sio_set_baud_rate(unsigned long baud)
165
unsigned short sbaud;
166
sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
167
__sio_out(sbaud, PLD_ESIO0BAUR);
170
static void sio_reset(void)
174
tmp = __sio_in(PLD_ESIO0RXB);
175
tmp = __sio_in(PLD_ESIO0RXB);
176
tmp = __sio_in(PLD_ESIO0CR);
177
sio_set_baud_rate(BAUD_RATE);
178
__sio_out(0x0300, PLD_ESIO0CR);
179
__sio_out(0x0003, PLD_ESIO0CR);
182
static void sio_init(void)
186
tmp = __sio_in(PLD_ESIO0RXB);
187
tmp = __sio_in(PLD_ESIO0RXB);
188
tmp = __sio_in(PLD_ESIO0CR);
189
__sio_out(0x0300, PLD_ESIO0CR);
190
__sio_out(0x0003, PLD_ESIO0CR);
193
static void sio_error(int *status)
195
printk("SIO0 error[%04x]\n", *status);
198
} while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
201
#else /* not CONFIG_SERIAL_M32R_PLDSIO */
203
#define __sio_in(x) inl(x)
204
#define __sio_out(v,x) outl((v),(x))
206
static inline void sio_set_baud_rate(unsigned long baud)
210
i = boot_cpu_data.bus_clock / (baud * 16);
211
j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
215
__sio_out(i, M32R_SIO0_BAUR_PORTL);
216
__sio_out(j, M32R_SIO0_RBAUR_PORTL);
219
static void sio_reset(void)
221
__sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
222
__sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
223
__sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
224
sio_set_baud_rate(BAUD_RATE);
225
__sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
226
__sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
229
static void sio_init(void)
233
tmp = __sio_in(M32R_SIO0_RXB_PORTL);
234
tmp = __sio_in(M32R_SIO0_RXB_PORTL);
235
tmp = __sio_in(M32R_SIO0_STS_PORTL);
236
__sio_out(0x00000003, M32R_SIO0_CR_PORTL);
239
static void sio_error(int *status)
241
printk("SIO0 error[%04x]\n", *status);
244
} while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
247
#endif /* CONFIG_SERIAL_M32R_PLDSIO */
249
static unsigned int sio_in(struct uart_sio_port *up, int offset)
251
return __sio_in(up->port.iobase + offset);
254
static void sio_out(struct uart_sio_port *up, int offset, int value)
256
__sio_out(value, up->port.iobase + offset);
259
static unsigned int serial_in(struct uart_sio_port *up, int offset)
264
return __sio_in(offset);
267
static void serial_out(struct uart_sio_port *up, int offset, int value)
272
__sio_out(value, offset);
275
static void m32r_sio_stop_tx(struct uart_port *port)
277
struct uart_sio_port *up = (struct uart_sio_port *)port;
279
if (up->ier & UART_IER_THRI) {
280
up->ier &= ~UART_IER_THRI;
281
serial_out(up, UART_IER, up->ier);
285
static void m32r_sio_start_tx(struct uart_port *port)
287
#ifdef CONFIG_SERIAL_M32R_PLDSIO
288
struct uart_sio_port *up = (struct uart_sio_port *)port;
289
struct circ_buf *xmit = &up->port.state->xmit;
291
if (!(up->ier & UART_IER_THRI)) {
292
up->ier |= UART_IER_THRI;
293
serial_out(up, UART_IER, up->ier);
294
serial_out(up, UART_TX, xmit->buf[xmit->tail]);
295
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
296
up->port.icount.tx++;
298
while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
300
struct uart_sio_port *up = (struct uart_sio_port *)port;
302
if (!(up->ier & UART_IER_THRI)) {
303
up->ier |= UART_IER_THRI;
304
serial_out(up, UART_IER, up->ier);
309
static void m32r_sio_stop_rx(struct uart_port *port)
311
struct uart_sio_port *up = (struct uart_sio_port *)port;
313
up->ier &= ~UART_IER_RLSI;
314
up->port.read_status_mask &= ~UART_LSR_DR;
315
serial_out(up, UART_IER, up->ier);
318
static void m32r_sio_enable_ms(struct uart_port *port)
320
struct uart_sio_port *up = (struct uart_sio_port *)port;
322
up->ier |= UART_IER_MSI;
323
serial_out(up, UART_IER, up->ier);
326
static void receive_chars(struct uart_sio_port *up, int *status)
328
struct tty_struct *tty = up->port.state->port.tty;
334
ch = sio_in(up, SIORXB);
336
up->port.icount.rx++;
338
if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
339
UART_LSR_FE | UART_LSR_OE))) {
341
* For statistics only
343
if (*status & UART_LSR_BI) {
344
*status &= ~(UART_LSR_FE | UART_LSR_PE);
345
up->port.icount.brk++;
347
* We do the SysRQ and SAK checking
348
* here because otherwise the break
349
* may get masked by ignore_status_mask
350
* or read_status_mask.
352
if (uart_handle_break(&up->port))
354
} else if (*status & UART_LSR_PE)
355
up->port.icount.parity++;
356
else if (*status & UART_LSR_FE)
357
up->port.icount.frame++;
358
if (*status & UART_LSR_OE)
359
up->port.icount.overrun++;
362
* Mask off conditions which should be ingored.
364
*status &= up->port.read_status_mask;
366
if (up->port.line == up->port.cons->index) {
367
/* Recover the break flag from console xmit */
368
*status |= up->lsr_break_flag;
369
up->lsr_break_flag = 0;
372
if (*status & UART_LSR_BI) {
373
DEBUG_INTR("handling break....");
375
} else if (*status & UART_LSR_PE)
377
else if (*status & UART_LSR_FE)
380
if (uart_handle_sysrq_char(&up->port, ch))
382
if ((*status & up->port.ignore_status_mask) == 0)
383
tty_insert_flip_char(tty, ch, flag);
385
if (*status & UART_LSR_OE) {
387
* Overrun is special, since it's reported
388
* immediately, and doesn't affect the current
391
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
394
*status = serial_in(up, UART_LSR);
395
} while ((*status & UART_LSR_DR) && (max_count-- > 0));
396
tty_flip_buffer_push(tty);
399
static void transmit_chars(struct uart_sio_port *up)
401
struct circ_buf *xmit = &up->port.state->xmit;
404
if (up->port.x_char) {
405
#ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
406
serial_out(up, UART_TX, up->port.x_char);
408
up->port.icount.tx++;
412
if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
413
m32r_sio_stop_tx(&up->port);
417
count = up->port.fifosize;
419
serial_out(up, UART_TX, xmit->buf[xmit->tail]);
420
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
421
up->port.icount.tx++;
422
if (uart_circ_empty(xmit))
424
while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
426
} while (--count > 0);
428
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
429
uart_write_wakeup(&up->port);
431
DEBUG_INTR("THRE...");
433
if (uart_circ_empty(xmit))
434
m32r_sio_stop_tx(&up->port);
438
* This handles the interrupt from one port.
440
static inline void m32r_sio_handle_port(struct uart_sio_port *up,
443
DEBUG_INTR("status = %x...", status);
446
receive_chars(up, &status);
452
* This is the serial driver's interrupt routine.
454
* Arjan thinks the old way was overly complex, so it got simplified.
455
* Alan disagrees, saying that need the complexity to handle the weird
456
* nature of ISA shared interrupts. (This is a special exception.)
458
* In order to handle ISA shared interrupts properly, we need to check
459
* that all ports have been serviced, and therefore the ISA interrupt
460
* line has been de-asserted.
462
* This means we need to loop through all ports. checking that they
463
* don't have an interrupt pending.
465
static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
467
struct irq_info *i = dev_id;
468
struct list_head *l, *end = NULL;
469
int pass_counter = 0;
471
DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
473
#ifdef CONFIG_SERIAL_M32R_PLDSIO
474
// if (irq == PLD_IRQ_SIO0_SND)
475
// irq = PLD_IRQ_SIO0_RCV;
477
if (irq == M32R_IRQ_SIO0_S)
478
irq = M32R_IRQ_SIO0_R;
485
struct uart_sio_port *up;
488
up = list_entry(l, struct uart_sio_port, list);
490
sts = sio_in(up, SIOSTS);
492
spin_lock(&up->port.lock);
493
m32r_sio_handle_port(up, sts);
494
spin_unlock(&up->port.lock);
497
} else if (end == NULL)
502
if (l == i->head && pass_counter++ > PASS_LIMIT) {
509
spin_unlock(&i->lock);
511
DEBUG_INTR("end.\n");
517
* To support ISA shared interrupts, we need to have one interrupt
518
* handler that ensures that the IRQ line has been deasserted
519
* before returning. Failing to do this will result in the IRQ
520
* line being stuck active, and, since ISA irqs are edge triggered,
521
* no more IRQs will be seen.
523
static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
525
spin_lock_irq(&i->lock);
527
if (!list_empty(i->head)) {
528
if (i->head == &up->list)
529
i->head = i->head->next;
532
BUG_ON(i->head != &up->list);
536
spin_unlock_irq(&i->lock);
539
static int serial_link_irq_chain(struct uart_sio_port *up)
541
struct irq_info *i = irq_lists + up->port.irq;
542
int ret, irq_flags = 0;
544
spin_lock_irq(&i->lock);
547
list_add(&up->list, i->head);
548
spin_unlock_irq(&i->lock);
552
INIT_LIST_HEAD(&up->list);
554
spin_unlock_irq(&i->lock);
556
ret = request_irq(up->port.irq, m32r_sio_interrupt,
557
irq_flags, "SIO0-RX", i);
558
ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
559
irq_flags, "SIO0-TX", i);
561
serial_do_unlink(i, up);
567
static void serial_unlink_irq_chain(struct uart_sio_port *up)
569
struct irq_info *i = irq_lists + up->port.irq;
571
BUG_ON(i->head == NULL);
573
if (list_empty(i->head)) {
574
free_irq(up->port.irq, i);
575
free_irq(up->port.irq + 1, i);
578
serial_do_unlink(i, up);
582
* This function is used to handle ports that do not have an interrupt.
584
static void m32r_sio_timeout(unsigned long data)
586
struct uart_sio_port *up = (struct uart_sio_port *)data;
587
unsigned int timeout;
590
sts = sio_in(up, SIOSTS);
592
spin_lock(&up->port.lock);
593
m32r_sio_handle_port(up, sts);
594
spin_unlock(&up->port.lock);
597
timeout = up->port.timeout;
598
timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
599
mod_timer(&up->timer, jiffies + timeout);
602
static unsigned int m32r_sio_tx_empty(struct uart_port *port)
604
struct uart_sio_port *up = (struct uart_sio_port *)port;
608
spin_lock_irqsave(&up->port.lock, flags);
609
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
610
spin_unlock_irqrestore(&up->port.lock, flags);
615
static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
620
static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
625
static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
630
static int m32r_sio_startup(struct uart_port *port)
632
struct uart_sio_port *up = (struct uart_sio_port *)port;
638
* If the "interrupt" for this port doesn't correspond with any
639
* hardware interrupt, we use a timer-based system. The original
640
* driver used to do this with IRQ0.
642
if (!is_real_interrupt(up->port.irq)) {
643
unsigned int timeout = up->port.timeout;
645
timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
647
up->timer.data = (unsigned long)up;
648
mod_timer(&up->timer, jiffies + timeout);
650
retval = serial_link_irq_chain(up);
656
* Finally, enable interrupts. Note: Modem status interrupts
657
* are set via set_termios(), which will be occurring imminently
658
* anyway, so we don't enable them here.
660
* - M32R_PLDSIO: 0x04
662
up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
663
sio_out(up, SIOTRCR, up->ier);
666
* And clear the interrupt registers again for luck.
673
static void m32r_sio_shutdown(struct uart_port *port)
675
struct uart_sio_port *up = (struct uart_sio_port *)port;
678
* Disable interrupts from this port
681
sio_out(up, SIOTRCR, 0);
684
* Disable break condition and FIFOs
689
if (!is_real_interrupt(up->port.irq))
690
del_timer_sync(&up->timer);
692
serial_unlink_irq_chain(up);
695
static unsigned int m32r_sio_get_divisor(struct uart_port *port,
698
return uart_get_divisor(port, baud);
701
static void m32r_sio_set_termios(struct uart_port *port,
702
struct ktermios *termios, struct ktermios *old)
704
struct uart_sio_port *up = (struct uart_sio_port *)port;
705
unsigned char cval = 0;
707
unsigned int baud, quot;
709
switch (termios->c_cflag & CSIZE) {
711
cval = UART_LCR_WLEN5;
714
cval = UART_LCR_WLEN6;
717
cval = UART_LCR_WLEN7;
721
cval = UART_LCR_WLEN8;
725
if (termios->c_cflag & CSTOPB)
726
cval |= UART_LCR_STOP;
727
if (termios->c_cflag & PARENB)
728
cval |= UART_LCR_PARITY;
729
if (!(termios->c_cflag & PARODD))
730
cval |= UART_LCR_EPAR;
732
if (termios->c_cflag & CMSPAR)
733
cval |= UART_LCR_SPAR;
737
* Ask the core to calculate the divisor for us.
739
#ifdef CONFIG_SERIAL_M32R_PLDSIO
740
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
742
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
744
quot = m32r_sio_get_divisor(port, baud);
747
* Ok, we're now changing the port state. Do it with
748
* interrupts disabled.
750
spin_lock_irqsave(&up->port.lock, flags);
752
sio_set_baud_rate(baud);
755
* Update the per-port timeout.
757
uart_update_timeout(port, termios->c_cflag, baud);
759
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
760
if (termios->c_iflag & INPCK)
761
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
762
if (termios->c_iflag & (BRKINT | PARMRK))
763
up->port.read_status_mask |= UART_LSR_BI;
766
* Characteres to ignore
768
up->port.ignore_status_mask = 0;
769
if (termios->c_iflag & IGNPAR)
770
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
771
if (termios->c_iflag & IGNBRK) {
772
up->port.ignore_status_mask |= UART_LSR_BI;
774
* If we're ignoring parity and break indicators,
775
* ignore overruns too (for real raw support).
777
if (termios->c_iflag & IGNPAR)
778
up->port.ignore_status_mask |= UART_LSR_OE;
782
* ignore all characters if CREAD is not set
784
if ((termios->c_cflag & CREAD) == 0)
785
up->port.ignore_status_mask |= UART_LSR_DR;
788
* CTS flow control flag and modem status interrupts
790
up->ier &= ~UART_IER_MSI;
791
if (UART_ENABLE_MS(&up->port, termios->c_cflag))
792
up->ier |= UART_IER_MSI;
794
serial_out(up, UART_IER, up->ier);
796
up->lcr = cval; /* Save LCR */
797
spin_unlock_irqrestore(&up->port.lock, flags);
800
static void m32r_sio_pm(struct uart_port *port, unsigned int state,
801
unsigned int oldstate)
803
struct uart_sio_port *up = (struct uart_sio_port *)port;
806
up->pm(port, state, oldstate);
810
* Resource handling. This is complicated by the fact that resources
811
* depend on the port type. Maybe we should be claiming the standard
812
* 8250 ports, and then trying to get other resources as necessary?
815
m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
817
unsigned int size = 8 << up->port.regshift;
818
#ifndef CONFIG_SERIAL_M32R_PLDSIO
823
switch (up->port.iotype) {
825
if (up->port.mapbase) {
826
#ifdef CONFIG_SERIAL_M32R_PLDSIO
827
*res = request_mem_region(up->port.mapbase, size, "serial");
829
start = up->port.mapbase;
830
*res = request_mem_region(start, size, "serial");
838
*res = request_region(up->port.iobase, size, "serial");
846
static void m32r_sio_release_port(struct uart_port *port)
848
struct uart_sio_port *up = (struct uart_sio_port *)port;
849
unsigned long start, offset = 0, size = 0;
851
size <<= up->port.regshift;
853
switch (up->port.iotype) {
855
if (up->port.mapbase) {
859
iounmap(up->port.membase);
860
up->port.membase = NULL;
862
start = up->port.mapbase;
865
release_mem_region(start + offset, size);
866
release_mem_region(start, 8 << up->port.regshift);
871
start = up->port.iobase;
874
release_region(start + offset, size);
875
release_region(start + offset, 8 << up->port.regshift);
883
static int m32r_sio_request_port(struct uart_port *port)
885
struct uart_sio_port *up = (struct uart_sio_port *)port;
886
struct resource *res = NULL;
889
ret = m32r_sio_request_std_resource(up, &res);
892
* If we have a mapbase, then request that as well.
894
if (ret == 0 && up->port.flags & UPF_IOREMAP) {
895
int size = res->end - res->start + 1;
897
up->port.membase = ioremap(up->port.mapbase, size);
898
if (!up->port.membase)
904
release_resource(res);
910
static void m32r_sio_config_port(struct uart_port *port, int flags)
912
struct uart_sio_port *up = (struct uart_sio_port *)port;
914
spin_lock_irqsave(&up->port.lock, flags);
916
up->port.type = (PORT_M32R_SIO - PORT_M32R_BASE + 1);
917
up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
919
spin_unlock_irqrestore(&up->port.lock, flags);
923
m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
925
if (ser->irq >= nr_irqs || ser->irq < 0 ||
926
ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
927
ser->type >= ARRAY_SIZE(uart_config))
933
m32r_sio_type(struct uart_port *port)
935
int type = port->type;
937
if (type >= ARRAY_SIZE(uart_config))
939
return uart_config[type].name;
942
static struct uart_ops m32r_sio_pops = {
943
.tx_empty = m32r_sio_tx_empty,
944
.set_mctrl = m32r_sio_set_mctrl,
945
.get_mctrl = m32r_sio_get_mctrl,
946
.stop_tx = m32r_sio_stop_tx,
947
.start_tx = m32r_sio_start_tx,
948
.stop_rx = m32r_sio_stop_rx,
949
.enable_ms = m32r_sio_enable_ms,
950
.break_ctl = m32r_sio_break_ctl,
951
.startup = m32r_sio_startup,
952
.shutdown = m32r_sio_shutdown,
953
.set_termios = m32r_sio_set_termios,
955
.type = m32r_sio_type,
956
.release_port = m32r_sio_release_port,
957
.request_port = m32r_sio_request_port,
958
.config_port = m32r_sio_config_port,
959
.verify_port = m32r_sio_verify_port,
962
static struct uart_sio_port m32r_sio_ports[UART_NR];
964
static void __init m32r_sio_init_ports(void)
966
struct uart_sio_port *up;
967
static int first = 1;
974
for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
976
up->port.iobase = old_serial_port[i].port;
977
up->port.irq = irq_canonicalize(old_serial_port[i].irq);
978
up->port.uartclk = old_serial_port[i].baud_base * 16;
979
up->port.flags = old_serial_port[i].flags;
980
up->port.membase = old_serial_port[i].iomem_base;
981
up->port.iotype = old_serial_port[i].io_type;
982
up->port.regshift = old_serial_port[i].iomem_reg_shift;
983
up->port.ops = &m32r_sio_pops;
987
static void __init m32r_sio_register_ports(struct uart_driver *drv)
991
m32r_sio_init_ports();
993
for (i = 0; i < UART_NR; i++) {
994
struct uart_sio_port *up = &m32r_sio_ports[i];
997
up->port.ops = &m32r_sio_pops;
998
init_timer(&up->timer);
999
up->timer.function = m32r_sio_timeout;
1002
* ALPHA_KLUDGE_MCR needs to be killed.
1004
up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1005
up->mcr_force = ALPHA_KLUDGE_MCR;
1007
uart_add_one_port(drv, &up->port);
1011
#ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1014
* Wait for transmitter & holding register to empty
1016
static inline void wait_for_xmitr(struct uart_sio_port *up)
1018
unsigned int status, tmout = 10000;
1020
/* Wait up to 10ms for the character(s) to be sent. */
1022
status = sio_in(up, SIOSTS);
1027
} while ((status & UART_EMPTY) != UART_EMPTY);
1029
/* Wait up to 1s for flow control if necessary */
1030
if (up->port.flags & UPF_CONS_FLOW) {
1037
static void m32r_sio_console_putchar(struct uart_port *port, int ch)
1039
struct uart_sio_port *up = (struct uart_sio_port *)port;
1042
sio_out(up, SIOTXB, ch);
1046
* Print a string to the serial port trying not to disturb
1047
* any possible real use of the port...
1049
* The console_lock must be held when we get here.
1051
static void m32r_sio_console_write(struct console *co, const char *s,
1054
struct uart_sio_port *up = &m32r_sio_ports[co->index];
1058
* First save the UER then disable the interrupts
1060
ier = sio_in(up, SIOTRCR);
1061
sio_out(up, SIOTRCR, 0);
1063
uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1066
* Finally, wait for transmitter to become empty
1067
* and restore the IER
1070
sio_out(up, SIOTRCR, ier);
1073
static int __init m32r_sio_console_setup(struct console *co, char *options)
1075
struct uart_port *port;
1082
* Check whether an invalid uart number has been specified, and
1083
* if so, search for the first available port that does have
1086
if (co->index >= UART_NR)
1088
port = &m32r_sio_ports[co->index].port;
1093
spin_lock_init(&port->lock);
1096
uart_parse_options(options, &baud, &parity, &bits, &flow);
1098
return uart_set_options(port, co, baud, parity, bits, flow);
1101
static struct uart_driver m32r_sio_reg;
1102
static struct console m32r_sio_console = {
1104
.write = m32r_sio_console_write,
1105
.device = uart_console_device,
1106
.setup = m32r_sio_console_setup,
1107
.flags = CON_PRINTBUFFER,
1109
.data = &m32r_sio_reg,
1112
static int __init m32r_sio_console_init(void)
1116
m32r_sio_init_ports();
1117
register_console(&m32r_sio_console);
1120
console_initcall(m32r_sio_console_init);
1122
#define M32R_SIO_CONSOLE &m32r_sio_console
1124
#define M32R_SIO_CONSOLE NULL
1127
static struct uart_driver m32r_sio_reg = {
1128
.owner = THIS_MODULE,
1129
.driver_name = "sio",
1134
.cons = M32R_SIO_CONSOLE,
1138
* m32r_sio_suspend_port - suspend one serial port
1139
* @line: serial line number
1141
* Suspend one serial port.
1143
void m32r_sio_suspend_port(int line)
1145
uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1149
* m32r_sio_resume_port - resume one serial port
1150
* @line: serial line number
1152
* Resume one serial port.
1154
void m32r_sio_resume_port(int line)
1156
uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1159
static int __init m32r_sio_init(void)
1163
printk(KERN_INFO "Serial: M32R SIO driver\n");
1165
for (i = 0; i < nr_irqs; i++)
1166
spin_lock_init(&irq_lists[i].lock);
1168
ret = uart_register_driver(&m32r_sio_reg);
1170
m32r_sio_register_ports(&m32r_sio_reg);
1175
static void __exit m32r_sio_exit(void)
1179
for (i = 0; i < UART_NR; i++)
1180
uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1182
uart_unregister_driver(&m32r_sio_reg);
1185
module_init(m32r_sio_init);
1186
module_exit(m32r_sio_exit);
1188
EXPORT_SYMBOL(m32r_sio_suspend_port);
1189
EXPORT_SYMBOL(m32r_sio_resume_port);
1191
MODULE_LICENSE("GPL");
1192
MODULE_DESCRIPTION("Generic M32R SIO serial driver");