2
* linux/drivers/char/8250.c
4
* Driver for 8250/16550-type serial ports
6
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8
* Copyright (C) 2001 Russell King.
10
* This program is free software; you can redistribute it and/or modify
11
* it under the terms of the GNU General Public License as published by
12
* the Free Software Foundation; either version 2 of the License, or
13
* (at your option) any later version.
15
* A note about mapbase / membase
17
* mapbase is the physical address of the IO port.
18
* membase is an 'ioremapped' cookie.
21
#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25
#include <linux/module.h>
26
#include <linux/moduleparam.h>
27
#include <linux/ioport.h>
28
#include <linux/init.h>
29
#include <linux/console.h>
30
#include <linux/sysrq.h>
31
#include <linux/delay.h>
32
#include <linux/platform_device.h>
33
#include <linux/tty.h>
34
#include <linux/tty_flip.h>
35
#include <linux/serial_reg.h>
36
#include <linux/serial_core.h>
37
#include <linux/serial.h>
38
#include <linux/serial_8250.h>
39
#include <linux/nmi.h>
40
#include <linux/mutex.h>
53
* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54
* is unsafe when used on edge-triggered interrupts.
56
static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58
static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60
static struct uart_driver serial8250_reg;
62
static int serial_index(struct uart_port *port)
64
return (serial8250_reg.minor - 64) + port->line;
67
static unsigned int skip_txen_test; /* force skip of txen test at init time */
73
#define DEBUG_AUTOCONF(fmt...) printk(fmt)
75
#define DEBUG_AUTOCONF(fmt...) do { } while (0)
79
#define DEBUG_INTR(fmt...) printk(fmt)
81
#define DEBUG_INTR(fmt...) do { } while (0)
84
#define PASS_LIMIT 256
87
* We default to IRQ0 for the "no irq" hack. Some
88
* machine types want others as well - they're free
89
* to redefine this in their header file.
91
#define is_real_interrupt(irq) ((irq) != 0)
93
#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
94
#define CONFIG_SERIAL_DETECT_IRQ 1
96
#ifdef CONFIG_SERIAL_8250_MANY_PORTS
97
#define CONFIG_SERIAL_MANY_PORTS 1
101
* HUB6 is always on. This will be removed once the header
102
* files have been cleaned.
104
#define CONFIG_HUB6 1
106
#include <asm/serial.h>
108
* SERIAL_PORT_DFNS tells us about built-in ports that have no
109
* standard enumeration mechanism. Platforms that can find all
110
* serial ports via mechanisms like ACPI or PCI need not supply it.
112
#ifndef SERIAL_PORT_DFNS
113
#define SERIAL_PORT_DFNS
116
static const struct old_serial_port old_serial_port[] = {
117
SERIAL_PORT_DFNS /* defined in asm/serial.h */
120
#define UART_NR CONFIG_SERIAL_8250_NR_UARTS
122
#ifdef CONFIG_SERIAL_8250_RSA
124
#define PORT_RSA_MAX 4
125
static unsigned long probe_rsa[PORT_RSA_MAX];
126
static unsigned int probe_rsa_count;
127
#endif /* CONFIG_SERIAL_8250_RSA */
129
struct uart_8250_port {
130
struct uart_port port;
131
struct timer_list timer; /* "no irq" timer */
132
struct list_head list; /* ports on this IRQ */
133
unsigned short capabilities; /* port capabilities */
134
unsigned short bugs; /* port bugs */
135
unsigned int tx_loadsz; /* transmit fifo load size */
140
unsigned char mcr_mask; /* mask of user bits */
141
unsigned char mcr_force; /* mask of forced bits */
142
unsigned char cur_iotype; /* Running I/O type */
145
* Some bits in registers are cleared on a read, so they must
146
* be saved whenever the register is read but the bits will not
147
* be immediately processed.
149
#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
150
unsigned char lsr_saved_flags;
151
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
152
unsigned char msr_saved_flags;
155
* We provide a per-port pm hook.
157
void (*pm)(struct uart_port *port,
158
unsigned int state, unsigned int old);
162
struct hlist_node node;
164
spinlock_t lock; /* Protects list not the hash */
165
struct list_head *head;
168
#define NR_IRQ_HASH 32 /* Can be adjusted later */
169
static struct hlist_head irq_lists[NR_IRQ_HASH];
170
static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
173
* Here we define the default xmit fifo size used for each type of UART.
175
static const struct serial8250_config uart_config[] = {
200
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
201
.flags = UART_CAP_FIFO,
212
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
218
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
220
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
226
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
228
.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
236
.name = "16C950/954",
239
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
240
.flags = UART_CAP_FIFO,
246
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
248
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
254
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
255
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
261
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
262
.flags = UART_CAP_FIFO,
268
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
269
.flags = UART_CAP_FIFO | UART_NATSEMI,
275
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
276
.flags = UART_CAP_FIFO | UART_CAP_UUE,
282
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
283
.flags = UART_CAP_FIFO,
289
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
290
.flags = UART_CAP_FIFO,
296
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
297
.flags = UART_CAP_FIFO | UART_CAP_AFE,
301
#if defined (CONFIG_SERIAL_8250_AU1X00)
303
/* Au1x00 UART hardware has a weird register layout */
304
static const u8 au_io_in_map[] = {
314
static const u8 au_io_out_map[] = {
322
/* sane hardware needs no mapping */
323
static inline int map_8250_in_reg(struct uart_port *p, int offset)
325
if (p->iotype != UPIO_AU)
327
return au_io_in_map[offset];
330
static inline int map_8250_out_reg(struct uart_port *p, int offset)
332
if (p->iotype != UPIO_AU)
334
return au_io_out_map[offset];
337
#elif defined(CONFIG_SERIAL_8250_RM9K)
361
static inline int map_8250_in_reg(struct uart_port *p, int offset)
363
if (p->iotype != UPIO_RM9000)
365
return regmap_in[offset];
368
static inline int map_8250_out_reg(struct uart_port *p, int offset)
370
if (p->iotype != UPIO_RM9000)
372
return regmap_out[offset];
377
/* sane hardware needs no mapping */
378
#define map_8250_in_reg(up, offset) (offset)
379
#define map_8250_out_reg(up, offset) (offset)
383
static unsigned int hub6_serial_in(struct uart_port *p, int offset)
385
offset = map_8250_in_reg(p, offset) << p->regshift;
386
outb(p->hub6 - 1 + offset, p->iobase);
387
return inb(p->iobase + 1);
390
static void hub6_serial_out(struct uart_port *p, int offset, int value)
392
offset = map_8250_out_reg(p, offset) << p->regshift;
393
outb(p->hub6 - 1 + offset, p->iobase);
394
outb(value, p->iobase + 1);
397
static unsigned int mem_serial_in(struct uart_port *p, int offset)
399
offset = map_8250_in_reg(p, offset) << p->regshift;
400
return readb(p->membase + offset);
403
static void mem_serial_out(struct uart_port *p, int offset, int value)
405
offset = map_8250_out_reg(p, offset) << p->regshift;
406
writeb(value, p->membase + offset);
409
static void mem32_serial_out(struct uart_port *p, int offset, int value)
411
offset = map_8250_out_reg(p, offset) << p->regshift;
412
writel(value, p->membase + offset);
415
static unsigned int mem32_serial_in(struct uart_port *p, int offset)
417
offset = map_8250_in_reg(p, offset) << p->regshift;
418
return readl(p->membase + offset);
421
#ifdef CONFIG_SERIAL_8250_AU1X00
422
static unsigned int au_serial_in(struct uart_port *p, int offset)
424
offset = map_8250_in_reg(p, offset) << p->regshift;
425
return __raw_readl(p->membase + offset);
428
static void au_serial_out(struct uart_port *p, int offset, int value)
430
offset = map_8250_out_reg(p, offset) << p->regshift;
431
__raw_writel(value, p->membase + offset);
435
static unsigned int tsi_serial_in(struct uart_port *p, int offset)
438
offset = map_8250_in_reg(p, offset) << p->regshift;
439
if (offset == UART_IIR) {
440
tmp = readl(p->membase + (UART_IIR & ~3));
441
return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
443
return readb(p->membase + offset);
446
static void tsi_serial_out(struct uart_port *p, int offset, int value)
448
offset = map_8250_out_reg(p, offset) << p->regshift;
449
if (!((offset == UART_IER) && (value & UART_IER_UUE)))
450
writeb(value, p->membase + offset);
453
static void dwapb_serial_out(struct uart_port *p, int offset, int value)
455
int save_offset = offset;
456
offset = map_8250_out_reg(p, offset) << p->regshift;
457
/* Save the LCR value so it can be re-written when a
458
* Busy Detect interrupt occurs. */
459
if (save_offset == UART_LCR) {
460
struct uart_8250_port *up = (struct uart_8250_port *)p;
463
writeb(value, p->membase + offset);
464
/* Read the IER to ensure any interrupt is cleared before
465
* returning from ISR. */
466
if (save_offset == UART_TX || save_offset == UART_IER)
467
value = p->serial_in(p, UART_IER);
470
static unsigned int io_serial_in(struct uart_port *p, int offset)
472
offset = map_8250_in_reg(p, offset) << p->regshift;
473
return inb(p->iobase + offset);
476
static void io_serial_out(struct uart_port *p, int offset, int value)
478
offset = map_8250_out_reg(p, offset) << p->regshift;
479
outb(value, p->iobase + offset);
482
static void set_io_from_upio(struct uart_port *p)
484
struct uart_8250_port *up = (struct uart_8250_port *)p;
487
p->serial_in = hub6_serial_in;
488
p->serial_out = hub6_serial_out;
492
p->serial_in = mem_serial_in;
493
p->serial_out = mem_serial_out;
498
p->serial_in = mem32_serial_in;
499
p->serial_out = mem32_serial_out;
502
#ifdef CONFIG_SERIAL_8250_AU1X00
504
p->serial_in = au_serial_in;
505
p->serial_out = au_serial_out;
509
p->serial_in = tsi_serial_in;
510
p->serial_out = tsi_serial_out;
514
p->serial_in = mem_serial_in;
515
p->serial_out = dwapb_serial_out;
519
p->serial_in = io_serial_in;
520
p->serial_out = io_serial_out;
523
/* Remember loaded iotype */
524
up->cur_iotype = p->iotype;
528
serial_out_sync(struct uart_8250_port *up, int offset, int value)
530
struct uart_port *p = &up->port;
534
#ifdef CONFIG_SERIAL_8250_AU1X00
538
p->serial_out(p, offset, value);
539
p->serial_in(p, UART_LCR); /* safe, no side-effects */
542
p->serial_out(p, offset, value);
546
#define serial_in(up, offset) \
547
(up->port.serial_in(&(up)->port, (offset)))
548
#define serial_out(up, offset, value) \
549
(up->port.serial_out(&(up)->port, (offset), (value)))
551
* We used to support using pause I/O for certain machines. We
552
* haven't supported this for a while, but just in case it's badly
553
* needed for certain old 386 machines, I've left these #define's
556
#define serial_inp(up, offset) serial_in(up, offset)
557
#define serial_outp(up, offset, value) serial_out(up, offset, value)
559
/* Uart divisor latch read */
560
static inline int _serial_dl_read(struct uart_8250_port *up)
562
return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
565
/* Uart divisor latch write */
566
static inline void _serial_dl_write(struct uart_8250_port *up, int value)
568
serial_outp(up, UART_DLL, value & 0xff);
569
serial_outp(up, UART_DLM, value >> 8 & 0xff);
572
#if defined(CONFIG_SERIAL_8250_AU1X00)
573
/* Au1x00 haven't got a standard divisor latch */
574
static int serial_dl_read(struct uart_8250_port *up)
576
if (up->port.iotype == UPIO_AU)
577
return __raw_readl(up->port.membase + 0x28);
579
return _serial_dl_read(up);
582
static void serial_dl_write(struct uart_8250_port *up, int value)
584
if (up->port.iotype == UPIO_AU)
585
__raw_writel(value, up->port.membase + 0x28);
587
_serial_dl_write(up, value);
589
#elif defined(CONFIG_SERIAL_8250_RM9K)
590
static int serial_dl_read(struct uart_8250_port *up)
592
return (up->port.iotype == UPIO_RM9000) ?
593
(((__raw_readl(up->port.membase + 0x10) << 8) |
594
(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
598
static void serial_dl_write(struct uart_8250_port *up, int value)
600
if (up->port.iotype == UPIO_RM9000) {
601
__raw_writel(value, up->port.membase + 0x08);
602
__raw_writel(value >> 8, up->port.membase + 0x10);
604
_serial_dl_write(up, value);
608
#define serial_dl_read(up) _serial_dl_read(up)
609
#define serial_dl_write(up, value) _serial_dl_write(up, value)
615
static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
617
serial_out(up, UART_SCR, offset);
618
serial_out(up, UART_ICR, value);
621
static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
625
serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
626
serial_out(up, UART_SCR, offset);
627
value = serial_in(up, UART_ICR);
628
serial_icr_write(up, UART_ACR, up->acr);
636
static void serial8250_clear_fifos(struct uart_8250_port *p)
638
if (p->capabilities & UART_CAP_FIFO) {
639
serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
640
serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
641
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
642
serial_outp(p, UART_FCR, 0);
647
* IER sleep support. UARTs which have EFRs need the "extended
648
* capability" bit enabled. Note that on XR16C850s, we need to
649
* reset LCR to write to IER.
651
static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
653
if (p->capabilities & UART_CAP_SLEEP) {
654
if (p->capabilities & UART_CAP_EFR) {
655
serial_outp(p, UART_LCR, 0xBF);
656
serial_outp(p, UART_EFR, UART_EFR_ECB);
657
serial_outp(p, UART_LCR, 0);
659
serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
660
if (p->capabilities & UART_CAP_EFR) {
661
serial_outp(p, UART_LCR, 0xBF);
662
serial_outp(p, UART_EFR, 0);
663
serial_outp(p, UART_LCR, 0);
668
#ifdef CONFIG_SERIAL_8250_RSA
670
* Attempts to turn on the RSA FIFO. Returns zero on failure.
671
* We set the port uart clock rate if we succeed.
673
static int __enable_rsa(struct uart_8250_port *up)
678
mode = serial_inp(up, UART_RSA_MSR);
679
result = mode & UART_RSA_MSR_FIFO;
682
serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
683
mode = serial_inp(up, UART_RSA_MSR);
684
result = mode & UART_RSA_MSR_FIFO;
688
up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
693
static void enable_rsa(struct uart_8250_port *up)
695
if (up->port.type == PORT_RSA) {
696
if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
697
spin_lock_irq(&up->port.lock);
699
spin_unlock_irq(&up->port.lock);
701
if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
702
serial_outp(up, UART_RSA_FRR, 0);
707
* Attempts to turn off the RSA FIFO. Returns zero on failure.
708
* It is unknown why interrupts were disabled in here. However,
709
* the caller is expected to preserve this behaviour by grabbing
710
* the spinlock before calling this function.
712
static void disable_rsa(struct uart_8250_port *up)
717
if (up->port.type == PORT_RSA &&
718
up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
719
spin_lock_irq(&up->port.lock);
721
mode = serial_inp(up, UART_RSA_MSR);
722
result = !(mode & UART_RSA_MSR_FIFO);
725
serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
726
mode = serial_inp(up, UART_RSA_MSR);
727
result = !(mode & UART_RSA_MSR_FIFO);
731
up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
732
spin_unlock_irq(&up->port.lock);
735
#endif /* CONFIG_SERIAL_8250_RSA */
738
* This is a quickie test to see how big the FIFO is.
739
* It doesn't work at all the time, more's the pity.
741
static int size_fifo(struct uart_8250_port *up)
743
unsigned char old_fcr, old_mcr, old_lcr;
744
unsigned short old_dl;
747
old_lcr = serial_inp(up, UART_LCR);
748
serial_outp(up, UART_LCR, 0);
749
old_fcr = serial_inp(up, UART_FCR);
750
old_mcr = serial_inp(up, UART_MCR);
751
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
752
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
753
serial_outp(up, UART_MCR, UART_MCR_LOOP);
754
serial_outp(up, UART_LCR, UART_LCR_DLAB);
755
old_dl = serial_dl_read(up);
756
serial_dl_write(up, 0x0001);
757
serial_outp(up, UART_LCR, 0x03);
758
for (count = 0; count < 256; count++)
759
serial_outp(up, UART_TX, count);
760
mdelay(20);/* FIXME - schedule_timeout */
761
for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
762
(count < 256); count++)
763
serial_inp(up, UART_RX);
764
serial_outp(up, UART_FCR, old_fcr);
765
serial_outp(up, UART_MCR, old_mcr);
766
serial_outp(up, UART_LCR, UART_LCR_DLAB);
767
serial_dl_write(up, old_dl);
768
serial_outp(up, UART_LCR, old_lcr);
774
* Read UART ID using the divisor method - set DLL and DLM to zero
775
* and the revision will be in DLL and device type in DLM. We
776
* preserve the device state across this.
778
static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
780
unsigned char old_dll, old_dlm, old_lcr;
783
old_lcr = serial_inp(p, UART_LCR);
784
serial_outp(p, UART_LCR, UART_LCR_DLAB);
786
old_dll = serial_inp(p, UART_DLL);
787
old_dlm = serial_inp(p, UART_DLM);
789
serial_outp(p, UART_DLL, 0);
790
serial_outp(p, UART_DLM, 0);
792
id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
794
serial_outp(p, UART_DLL, old_dll);
795
serial_outp(p, UART_DLM, old_dlm);
796
serial_outp(p, UART_LCR, old_lcr);
802
* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
803
* When this function is called we know it is at least a StarTech
804
* 16650 V2, but it might be one of several StarTech UARTs, or one of
805
* its clones. (We treat the broken original StarTech 16650 V1 as a
806
* 16550, and why not? Startech doesn't seem to even acknowledge its
809
* What evil have men's minds wrought...
811
static void autoconfig_has_efr(struct uart_8250_port *up)
813
unsigned int id1, id2, id3, rev;
816
* Everything with an EFR has SLEEP
818
up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
821
* First we check to see if it's an Oxford Semiconductor UART.
823
* If we have to do this here because some non-National
824
* Semiconductor clone chips lock up if you try writing to the
825
* LSR register (which serial_icr_read does)
829
* Check for Oxford Semiconductor 16C950.
831
* EFR [4] must be set else this test fails.
833
* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
834
* claims that it's needed for 952 dual UART's (which are not
835
* recommended for new designs).
838
serial_out(up, UART_LCR, 0xBF);
839
serial_out(up, UART_EFR, UART_EFR_ECB);
840
serial_out(up, UART_LCR, 0x00);
841
id1 = serial_icr_read(up, UART_ID1);
842
id2 = serial_icr_read(up, UART_ID2);
843
id3 = serial_icr_read(up, UART_ID3);
844
rev = serial_icr_read(up, UART_REV);
846
DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
848
if (id1 == 0x16 && id2 == 0xC9 &&
849
(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
850
up->port.type = PORT_16C950;
853
* Enable work around for the Oxford Semiconductor 952 rev B
854
* chip which causes it to seriously miscalculate baud rates
857
if (id3 == 0x52 && rev == 0x01)
858
up->bugs |= UART_BUG_QUOT;
863
* We check for a XR16C850 by setting DLL and DLM to 0, and then
864
* reading back DLL and DLM. The chip type depends on the DLM
866
* 0x10 - XR16C850 and the DLL contains the chip revision.
870
id1 = autoconfig_read_divisor_id(up);
871
DEBUG_AUTOCONF("850id=%04x ", id1);
874
if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
875
up->port.type = PORT_16850;
880
* It wasn't an XR16C850.
882
* We distinguish between the '654 and the '650 by counting
883
* how many bytes are in the FIFO. I'm using this for now,
884
* since that's the technique that was sent to me in the
885
* serial driver update, but I'm not convinced this works.
886
* I've had problems doing this in the past. -TYT
888
if (size_fifo(up) == 64)
889
up->port.type = PORT_16654;
891
up->port.type = PORT_16650V2;
895
* We detected a chip without a FIFO. Only two fall into
896
* this category - the original 8250 and the 16450. The
897
* 16450 has a scratch register (accessible with LCR=0)
899
static void autoconfig_8250(struct uart_8250_port *up)
901
unsigned char scratch, status1, status2;
903
up->port.type = PORT_8250;
905
scratch = serial_in(up, UART_SCR);
906
serial_outp(up, UART_SCR, 0xa5);
907
status1 = serial_in(up, UART_SCR);
908
serial_outp(up, UART_SCR, 0x5a);
909
status2 = serial_in(up, UART_SCR);
910
serial_outp(up, UART_SCR, scratch);
912
if (status1 == 0xa5 && status2 == 0x5a)
913
up->port.type = PORT_16450;
916
static int broken_efr(struct uart_8250_port *up)
919
* Exar ST16C2550 "A2" devices incorrectly detect as
920
* having an EFR, and report an ID of 0x0201. See
921
* http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
923
if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
930
* We know that the chip has FIFOs. Does it have an EFR? The
931
* EFR is located in the same register position as the IIR and
932
* we know the top two bits of the IIR are currently set. The
933
* EFR should contain zero. Try to read the EFR.
935
static void autoconfig_16550a(struct uart_8250_port *up)
937
unsigned char status1, status2;
938
unsigned int iersave;
940
up->port.type = PORT_16550A;
941
up->capabilities |= UART_CAP_FIFO;
944
* Check for presence of the EFR when DLAB is set.
945
* Only ST16C650V1 UARTs pass this test.
947
serial_outp(up, UART_LCR, UART_LCR_DLAB);
948
if (serial_in(up, UART_EFR) == 0) {
949
serial_outp(up, UART_EFR, 0xA8);
950
if (serial_in(up, UART_EFR) != 0) {
951
DEBUG_AUTOCONF("EFRv1 ");
952
up->port.type = PORT_16650;
953
up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
955
DEBUG_AUTOCONF("Motorola 8xxx DUART ");
957
serial_outp(up, UART_EFR, 0);
962
* Maybe it requires 0xbf to be written to the LCR.
963
* (other ST16C650V2 UARTs, TI16C752A, etc)
965
serial_outp(up, UART_LCR, 0xBF);
966
if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
967
DEBUG_AUTOCONF("EFRv2 ");
968
autoconfig_has_efr(up);
973
* Check for a National Semiconductor SuperIO chip.
974
* Attempt to switch to bank 2, read the value of the LOOP bit
975
* from EXCR1. Switch back to bank 0, change it in MCR. Then
976
* switch back to bank 2, read it from EXCR1 again and check
977
* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
979
serial_outp(up, UART_LCR, 0);
980
status1 = serial_in(up, UART_MCR);
981
serial_outp(up, UART_LCR, 0xE0);
982
status2 = serial_in(up, 0x02); /* EXCR1 */
984
if (!((status2 ^ status1) & UART_MCR_LOOP)) {
985
serial_outp(up, UART_LCR, 0);
986
serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
987
serial_outp(up, UART_LCR, 0xE0);
988
status2 = serial_in(up, 0x02); /* EXCR1 */
989
serial_outp(up, UART_LCR, 0);
990
serial_outp(up, UART_MCR, status1);
992
if ((status2 ^ status1) & UART_MCR_LOOP) {
995
serial_outp(up, UART_LCR, 0xE0);
997
quot = serial_dl_read(up);
1000
status1 = serial_in(up, 0x04); /* EXCR2 */
1001
status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
1002
status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
1003
serial_outp(up, 0x04, status1);
1005
serial_dl_write(up, quot);
1007
serial_outp(up, UART_LCR, 0);
1009
up->port.uartclk = 921600*16;
1010
up->port.type = PORT_NS16550A;
1011
up->capabilities |= UART_NATSEMI;
1017
* No EFR. Try to detect a TI16750, which only sets bit 5 of
1018
* the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1019
* Try setting it with and without DLAB set. Cheap clones
1020
* set bit 5 without DLAB set.
1022
serial_outp(up, UART_LCR, 0);
1023
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1024
status1 = serial_in(up, UART_IIR) >> 5;
1025
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1026
serial_outp(up, UART_LCR, UART_LCR_DLAB);
1027
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1028
status2 = serial_in(up, UART_IIR) >> 5;
1029
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1030
serial_outp(up, UART_LCR, 0);
1032
DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1034
if (status1 == 6 && status2 == 7) {
1035
up->port.type = PORT_16750;
1036
up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1041
* Try writing and reading the UART_IER_UUE bit (b6).
1042
* If it works, this is probably one of the Xscale platform's
1044
* We're going to explicitly set the UUE bit to 0 before
1045
* trying to write and read a 1 just to make sure it's not
1046
* already a 1 and maybe locked there before we even start start.
1048
iersave = serial_in(up, UART_IER);
1049
serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
1050
if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1052
* OK it's in a known zero state, try writing and reading
1053
* without disturbing the current state of the other bits.
1055
serial_outp(up, UART_IER, iersave | UART_IER_UUE);
1056
if (serial_in(up, UART_IER) & UART_IER_UUE) {
1059
* We'll leave the UART_IER_UUE bit set to 1 (enabled).
1061
DEBUG_AUTOCONF("Xscale ");
1062
up->port.type = PORT_XSCALE;
1063
up->capabilities |= UART_CAP_UUE;
1068
* If we got here we couldn't force the IER_UUE bit to 0.
1069
* Log it and continue.
1071
DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1073
serial_outp(up, UART_IER, iersave);
1077
* This routine is called by rs_init() to initialize a specific serial
1078
* port. It determines what type of UART chip this serial port is
1079
* using: 8250, 16450, 16550, 16550A. The important question is
1080
* whether or not this UART is a 16550A or not, since this will
1081
* determine whether or not we can use its FIFO features or not.
1083
static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1085
unsigned char status1, scratch, scratch2, scratch3;
1086
unsigned char save_lcr, save_mcr;
1087
unsigned long flags;
1089
if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1092
DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1093
serial_index(&up->port), up->port.iobase, up->port.membase);
1096
* We really do need global IRQs disabled here - we're going to
1097
* be frobbing the chips IRQ enable register to see if it exists.
1099
spin_lock_irqsave(&up->port.lock, flags);
1101
up->capabilities = 0;
1104
if (!(up->port.flags & UPF_BUGGY_UART)) {
1106
* Do a simple existence test first; if we fail this,
1107
* there's no point trying anything else.
1109
* 0x80 is used as a nonsense port to prevent against
1110
* false positives due to ISA bus float. The
1111
* assumption is that 0x80 is a non-existent port;
1112
* which should be safe since include/asm/io.h also
1113
* makes this assumption.
1115
* Note: this is safe as long as MCR bit 4 is clear
1116
* and the device is in "PC" mode.
1118
scratch = serial_inp(up, UART_IER);
1119
serial_outp(up, UART_IER, 0);
1124
* Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1125
* 16C754B) allow only to modify them if an EFR bit is set.
1127
scratch2 = serial_inp(up, UART_IER) & 0x0f;
1128
serial_outp(up, UART_IER, 0x0F);
1132
scratch3 = serial_inp(up, UART_IER) & 0x0f;
1133
serial_outp(up, UART_IER, scratch);
1134
if (scratch2 != 0 || scratch3 != 0x0F) {
1136
* We failed; there's nothing here
1138
DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1139
scratch2, scratch3);
1144
save_mcr = serial_in(up, UART_MCR);
1145
save_lcr = serial_in(up, UART_LCR);
1148
* Check to see if a UART is really there. Certain broken
1149
* internal modems based on the Rockwell chipset fail this
1150
* test, because they apparently don't implement the loopback
1151
* test mode. So this test is skipped on the COM 1 through
1152
* COM 4 ports. This *should* be safe, since no board
1153
* manufacturer would be stupid enough to design a board
1154
* that conflicts with COM 1-4 --- we hope!
1156
if (!(up->port.flags & UPF_SKIP_TEST)) {
1157
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1158
status1 = serial_inp(up, UART_MSR) & 0xF0;
1159
serial_outp(up, UART_MCR, save_mcr);
1160
if (status1 != 0x90) {
1161
DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1168
* We're pretty sure there's a port here. Lets find out what
1169
* type of port it is. The IIR top two bits allows us to find
1170
* out if it's 8250 or 16450, 16550, 16550A or later. This
1171
* determines what we test for next.
1173
* We also initialise the EFR (if any) to zero for later. The
1174
* EFR occupies the same register location as the FCR and IIR.
1176
serial_outp(up, UART_LCR, 0xBF);
1177
serial_outp(up, UART_EFR, 0);
1178
serial_outp(up, UART_LCR, 0);
1180
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1181
scratch = serial_in(up, UART_IIR) >> 6;
1183
DEBUG_AUTOCONF("iir=%d ", scratch);
1187
autoconfig_8250(up);
1190
up->port.type = PORT_UNKNOWN;
1193
up->port.type = PORT_16550;
1196
autoconfig_16550a(up);
1200
#ifdef CONFIG_SERIAL_8250_RSA
1202
* Only probe for RSA ports if we got the region.
1204
if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1207
for (i = 0 ; i < probe_rsa_count; ++i) {
1208
if (probe_rsa[i] == up->port.iobase &&
1210
up->port.type = PORT_RSA;
1217
#ifdef CONFIG_SERIAL_8250_AU1X00
1218
/* if access method is AU, it is a 16550 with a quirk */
1219
if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
1220
up->bugs |= UART_BUG_NOMSR;
1223
serial_outp(up, UART_LCR, save_lcr);
1225
if (up->capabilities != uart_config[up->port.type].flags) {
1227
"ttyS%d: detected caps %08x should be %08x\n",
1228
serial_index(&up->port), up->capabilities,
1229
uart_config[up->port.type].flags);
1232
up->port.fifosize = uart_config[up->port.type].fifo_size;
1233
up->capabilities = uart_config[up->port.type].flags;
1234
up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1236
if (up->port.type == PORT_UNKNOWN)
1242
#ifdef CONFIG_SERIAL_8250_RSA
1243
if (up->port.type == PORT_RSA)
1244
serial_outp(up, UART_RSA_FRR, 0);
1246
serial_outp(up, UART_MCR, save_mcr);
1247
serial8250_clear_fifos(up);
1248
serial_in(up, UART_RX);
1249
if (up->capabilities & UART_CAP_UUE)
1250
serial_outp(up, UART_IER, UART_IER_UUE);
1252
serial_outp(up, UART_IER, 0);
1255
spin_unlock_irqrestore(&up->port.lock, flags);
1256
DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1259
static void autoconfig_irq(struct uart_8250_port *up)
1261
unsigned char save_mcr, save_ier;
1262
unsigned char save_ICP = 0;
1263
unsigned int ICP = 0;
1267
if (up->port.flags & UPF_FOURPORT) {
1268
ICP = (up->port.iobase & 0xfe0) | 0x1f;
1269
save_ICP = inb_p(ICP);
1274
/* forget possible initially masked and pending IRQ */
1275
probe_irq_off(probe_irq_on());
1276
save_mcr = serial_inp(up, UART_MCR);
1277
save_ier = serial_inp(up, UART_IER);
1278
serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1280
irqs = probe_irq_on();
1281
serial_outp(up, UART_MCR, 0);
1283
if (up->port.flags & UPF_FOURPORT) {
1284
serial_outp(up, UART_MCR,
1285
UART_MCR_DTR | UART_MCR_RTS);
1287
serial_outp(up, UART_MCR,
1288
UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1290
serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1291
(void)serial_inp(up, UART_LSR);
1292
(void)serial_inp(up, UART_RX);
1293
(void)serial_inp(up, UART_IIR);
1294
(void)serial_inp(up, UART_MSR);
1295
serial_outp(up, UART_TX, 0xFF);
1297
irq = probe_irq_off(irqs);
1299
serial_outp(up, UART_MCR, save_mcr);
1300
serial_outp(up, UART_IER, save_ier);
1302
if (up->port.flags & UPF_FOURPORT)
1303
outb_p(save_ICP, ICP);
1305
up->port.irq = (irq > 0) ? irq : 0;
1308
static inline void __stop_tx(struct uart_8250_port *p)
1310
if (p->ier & UART_IER_THRI) {
1311
p->ier &= ~UART_IER_THRI;
1312
serial_out(p, UART_IER, p->ier);
1316
static void serial8250_stop_tx(struct uart_port *port)
1318
struct uart_8250_port *up = (struct uart_8250_port *)port;
1323
* We really want to stop the transmitter from sending.
1325
if (up->port.type == PORT_16C950) {
1326
up->acr |= UART_ACR_TXDIS;
1327
serial_icr_write(up, UART_ACR, up->acr);
1331
static void transmit_chars(struct uart_8250_port *up);
1333
static void serial8250_start_tx(struct uart_port *port)
1335
struct uart_8250_port *up = (struct uart_8250_port *)port;
1337
if (!(up->ier & UART_IER_THRI)) {
1338
up->ier |= UART_IER_THRI;
1339
serial_out(up, UART_IER, up->ier);
1341
if (up->bugs & UART_BUG_TXEN) {
1342
unsigned char lsr, iir;
1343
lsr = serial_in(up, UART_LSR);
1344
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1345
iir = serial_in(up, UART_IIR) & 0x0f;
1346
if ((up->port.type == PORT_RM9000) ?
1347
(lsr & UART_LSR_THRE &&
1348
(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
1349
(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
1355
* Re-enable the transmitter if we disabled it.
1357
if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1358
up->acr &= ~UART_ACR_TXDIS;
1359
serial_icr_write(up, UART_ACR, up->acr);
1363
static void serial8250_stop_rx(struct uart_port *port)
1365
struct uart_8250_port *up = (struct uart_8250_port *)port;
1367
up->ier &= ~UART_IER_RLSI;
1368
up->port.read_status_mask &= ~UART_LSR_DR;
1369
serial_out(up, UART_IER, up->ier);
1372
static void serial8250_enable_ms(struct uart_port *port)
1374
struct uart_8250_port *up = (struct uart_8250_port *)port;
1376
/* no MSR capabilities */
1377
if (up->bugs & UART_BUG_NOMSR)
1380
up->ier |= UART_IER_MSI;
1381
serial_out(up, UART_IER, up->ier);
1385
receive_chars(struct uart_8250_port *up, unsigned int *status)
1387
struct tty_struct *tty = up->port.state->port.tty;
1388
unsigned char ch, lsr = *status;
1389
int max_count = 256;
1393
if (likely(lsr & UART_LSR_DR))
1394
ch = serial_inp(up, UART_RX);
1397
* Intel 82571 has a Serial Over Lan device that will
1398
* set UART_LSR_BI without setting UART_LSR_DR when
1399
* it receives a break. To avoid reading from the
1400
* receive buffer without UART_LSR_DR bit set, we
1401
* just force the read character to be 0
1406
up->port.icount.rx++;
1408
lsr |= up->lsr_saved_flags;
1409
up->lsr_saved_flags = 0;
1411
if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1413
* For statistics only
1415
if (lsr & UART_LSR_BI) {
1416
lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1417
up->port.icount.brk++;
1419
* We do the SysRQ and SAK checking
1420
* here because otherwise the break
1421
* may get masked by ignore_status_mask
1422
* or read_status_mask.
1424
if (uart_handle_break(&up->port))
1426
} else if (lsr & UART_LSR_PE)
1427
up->port.icount.parity++;
1428
else if (lsr & UART_LSR_FE)
1429
up->port.icount.frame++;
1430
if (lsr & UART_LSR_OE)
1431
up->port.icount.overrun++;
1434
* Mask off conditions which should be ignored.
1436
lsr &= up->port.read_status_mask;
1438
if (lsr & UART_LSR_BI) {
1439
DEBUG_INTR("handling break....");
1441
} else if (lsr & UART_LSR_PE)
1443
else if (lsr & UART_LSR_FE)
1446
if (uart_handle_sysrq_char(&up->port, ch))
1449
uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1452
lsr = serial_inp(up, UART_LSR);
1453
} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1454
spin_unlock(&up->port.lock);
1455
tty_flip_buffer_push(tty);
1456
spin_lock(&up->port.lock);
1460
static void transmit_chars(struct uart_8250_port *up)
1462
struct circ_buf *xmit = &up->port.state->xmit;
1465
if (up->port.x_char) {
1466
serial_outp(up, UART_TX, up->port.x_char);
1467
up->port.icount.tx++;
1468
up->port.x_char = 0;
1471
if (uart_tx_stopped(&up->port)) {
1472
serial8250_stop_tx(&up->port);
1475
if (uart_circ_empty(xmit)) {
1480
count = up->tx_loadsz;
1482
serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1483
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1484
up->port.icount.tx++;
1485
if (uart_circ_empty(xmit))
1487
} while (--count > 0);
1489
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1490
uart_write_wakeup(&up->port);
1492
DEBUG_INTR("THRE...");
1494
if (uart_circ_empty(xmit))
1498
static unsigned int check_modem_status(struct uart_8250_port *up)
1500
unsigned int status = serial_in(up, UART_MSR);
1502
status |= up->msr_saved_flags;
1503
up->msr_saved_flags = 0;
1504
if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1505
up->port.state != NULL) {
1506
if (status & UART_MSR_TERI)
1507
up->port.icount.rng++;
1508
if (status & UART_MSR_DDSR)
1509
up->port.icount.dsr++;
1510
if (status & UART_MSR_DDCD)
1511
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1512
if (status & UART_MSR_DCTS)
1513
uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1515
wake_up_interruptible(&up->port.state->port.delta_msr_wait);
1522
* This handles the interrupt from one port.
1524
static void serial8250_handle_port(struct uart_8250_port *up)
1526
unsigned int status;
1527
unsigned long flags;
1529
spin_lock_irqsave(&up->port.lock, flags);
1531
status = serial_inp(up, UART_LSR);
1533
DEBUG_INTR("status = %x...", status);
1535
if (status & (UART_LSR_DR | UART_LSR_BI))
1536
receive_chars(up, &status);
1537
check_modem_status(up);
1538
if (status & UART_LSR_THRE)
1541
spin_unlock_irqrestore(&up->port.lock, flags);
1545
* This is the serial driver's interrupt routine.
1547
* Arjan thinks the old way was overly complex, so it got simplified.
1548
* Alan disagrees, saying that need the complexity to handle the weird
1549
* nature of ISA shared interrupts. (This is a special exception.)
1551
* In order to handle ISA shared interrupts properly, we need to check
1552
* that all ports have been serviced, and therefore the ISA interrupt
1553
* line has been de-asserted.
1555
* This means we need to loop through all ports. checking that they
1556
* don't have an interrupt pending.
1558
static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1560
struct irq_info *i = dev_id;
1561
struct list_head *l, *end = NULL;
1562
int pass_counter = 0, handled = 0;
1564
DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1566
spin_lock(&i->lock);
1570
struct uart_8250_port *up;
1573
up = list_entry(l, struct uart_8250_port, list);
1575
iir = serial_in(up, UART_IIR);
1576
if (!(iir & UART_IIR_NO_INT)) {
1577
serial8250_handle_port(up);
1582
} else if (up->port.iotype == UPIO_DWAPB &&
1583
(iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
1584
/* The DesignWare APB UART has an Busy Detect (0x07)
1585
* interrupt meaning an LCR write attempt occured while the
1586
* UART was busy. The interrupt must be cleared by reading
1587
* the UART status register (USR) and the LCR re-written. */
1588
unsigned int status;
1589
status = *(volatile u32 *)up->port.private_data;
1590
serial_out(up, UART_LCR, up->lcr);
1595
} else if (end == NULL)
1600
if (l == i->head && pass_counter++ > PASS_LIMIT) {
1601
/* If we hit this, we're dead. */
1602
printk(KERN_ERR "serial8250: too much work for "
1608
spin_unlock(&i->lock);
1610
DEBUG_INTR("end.\n");
1612
return IRQ_RETVAL(handled);
1616
* To support ISA shared interrupts, we need to have one interrupt
1617
* handler that ensures that the IRQ line has been deasserted
1618
* before returning. Failing to do this will result in the IRQ
1619
* line being stuck active, and, since ISA irqs are edge triggered,
1620
* no more IRQs will be seen.
1622
static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1624
spin_lock_irq(&i->lock);
1626
if (!list_empty(i->head)) {
1627
if (i->head == &up->list)
1628
i->head = i->head->next;
1629
list_del(&up->list);
1631
BUG_ON(i->head != &up->list);
1634
spin_unlock_irq(&i->lock);
1635
/* List empty so throw away the hash node */
1636
if (i->head == NULL) {
1637
hlist_del(&i->node);
1642
static int serial_link_irq_chain(struct uart_8250_port *up)
1644
struct hlist_head *h;
1645
struct hlist_node *n;
1647
int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1649
mutex_lock(&hash_mutex);
1651
h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1653
hlist_for_each(n, h) {
1654
i = hlist_entry(n, struct irq_info, node);
1655
if (i->irq == up->port.irq)
1660
i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1662
mutex_unlock(&hash_mutex);
1665
spin_lock_init(&i->lock);
1666
i->irq = up->port.irq;
1667
hlist_add_head(&i->node, h);
1669
mutex_unlock(&hash_mutex);
1671
spin_lock_irq(&i->lock);
1674
list_add(&up->list, i->head);
1675
spin_unlock_irq(&i->lock);
1679
INIT_LIST_HEAD(&up->list);
1680
i->head = &up->list;
1681
spin_unlock_irq(&i->lock);
1682
irq_flags |= up->port.irqflags;
1683
ret = request_irq(up->port.irq, serial8250_interrupt,
1684
irq_flags, "serial", i);
1686
serial_do_unlink(i, up);
1692
static void serial_unlink_irq_chain(struct uart_8250_port *up)
1695
struct hlist_node *n;
1696
struct hlist_head *h;
1698
mutex_lock(&hash_mutex);
1700
h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1702
hlist_for_each(n, h) {
1703
i = hlist_entry(n, struct irq_info, node);
1704
if (i->irq == up->port.irq)
1709
BUG_ON(i->head == NULL);
1711
if (list_empty(i->head))
1712
free_irq(up->port.irq, i);
1714
serial_do_unlink(i, up);
1715
mutex_unlock(&hash_mutex);
1718
/* Base timer interval for polling */
1719
static inline int poll_timeout(int timeout)
1721
return timeout > 6 ? (timeout / 2 - 2) : 1;
1725
* This function is used to handle ports that do not have an
1726
* interrupt. This doesn't work very well for 16450's, but gives
1727
* barely passable results for a 16550A. (Although at the expense
1728
* of much CPU overhead).
1730
static void serial8250_timeout(unsigned long data)
1732
struct uart_8250_port *up = (struct uart_8250_port *)data;
1735
iir = serial_in(up, UART_IIR);
1736
if (!(iir & UART_IIR_NO_INT))
1737
serial8250_handle_port(up);
1738
mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
1741
static void serial8250_backup_timeout(unsigned long data)
1743
struct uart_8250_port *up = (struct uart_8250_port *)data;
1744
unsigned int iir, ier = 0, lsr;
1745
unsigned long flags;
1748
* Must disable interrupts or else we risk racing with the interrupt
1751
if (is_real_interrupt(up->port.irq)) {
1752
ier = serial_in(up, UART_IER);
1753
serial_out(up, UART_IER, 0);
1756
iir = serial_in(up, UART_IIR);
1759
* This should be a safe test for anyone who doesn't trust the
1760
* IIR bits on their UART, but it's specifically designed for
1761
* the "Diva" UART used on the management processor on many HP
1762
* ia64 and parisc boxes.
1764
spin_lock_irqsave(&up->port.lock, flags);
1765
lsr = serial_in(up, UART_LSR);
1766
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1767
spin_unlock_irqrestore(&up->port.lock, flags);
1768
if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1769
(!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1770
(lsr & UART_LSR_THRE)) {
1771
iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1772
iir |= UART_IIR_THRI;
1775
if (!(iir & UART_IIR_NO_INT))
1776
serial8250_handle_port(up);
1778
if (is_real_interrupt(up->port.irq))
1779
serial_out(up, UART_IER, ier);
1781
/* Standard timer interval plus 0.2s to keep the port running */
1782
mod_timer(&up->timer,
1783
jiffies + poll_timeout(up->port.timeout) + HZ / 5);
1786
static unsigned int serial8250_tx_empty(struct uart_port *port)
1788
struct uart_8250_port *up = (struct uart_8250_port *)port;
1789
unsigned long flags;
1792
spin_lock_irqsave(&up->port.lock, flags);
1793
lsr = serial_in(up, UART_LSR);
1794
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1795
spin_unlock_irqrestore(&up->port.lock, flags);
1797
return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1800
static unsigned int serial8250_get_mctrl(struct uart_port *port)
1802
struct uart_8250_port *up = (struct uart_8250_port *)port;
1803
unsigned int status;
1806
status = check_modem_status(up);
1809
if (status & UART_MSR_DCD)
1811
if (status & UART_MSR_RI)
1813
if (status & UART_MSR_DSR)
1815
if (status & UART_MSR_CTS)
1820
static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1822
struct uart_8250_port *up = (struct uart_8250_port *)port;
1823
unsigned char mcr = 0;
1825
if (mctrl & TIOCM_RTS)
1826
mcr |= UART_MCR_RTS;
1827
if (mctrl & TIOCM_DTR)
1828
mcr |= UART_MCR_DTR;
1829
if (mctrl & TIOCM_OUT1)
1830
mcr |= UART_MCR_OUT1;
1831
if (mctrl & TIOCM_OUT2)
1832
mcr |= UART_MCR_OUT2;
1833
if (mctrl & TIOCM_LOOP)
1834
mcr |= UART_MCR_LOOP;
1836
mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1838
serial_out(up, UART_MCR, mcr);
1841
static void serial8250_break_ctl(struct uart_port *port, int break_state)
1843
struct uart_8250_port *up = (struct uart_8250_port *)port;
1844
unsigned long flags;
1846
spin_lock_irqsave(&up->port.lock, flags);
1847
if (break_state == -1)
1848
up->lcr |= UART_LCR_SBC;
1850
up->lcr &= ~UART_LCR_SBC;
1851
serial_out(up, UART_LCR, up->lcr);
1852
spin_unlock_irqrestore(&up->port.lock, flags);
1855
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1858
* Wait for transmitter & holding register to empty
1860
static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1862
unsigned int status, tmout = 10000;
1864
/* Wait up to 10ms for the character(s) to be sent. */
1866
status = serial_in(up, UART_LSR);
1868
up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1873
} while ((status & bits) != bits);
1875
/* Wait up to 1s for flow control if necessary */
1876
if (up->port.flags & UPF_CONS_FLOW) {
1878
for (tmout = 1000000; tmout; tmout--) {
1879
unsigned int msr = serial_in(up, UART_MSR);
1880
up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1881
if (msr & UART_MSR_CTS)
1884
touch_nmi_watchdog();
1889
#ifdef CONFIG_CONSOLE_POLL
1891
* Console polling routines for writing and reading from the uart while
1892
* in an interrupt or debug context.
1895
static int serial8250_get_poll_char(struct uart_port *port)
1897
struct uart_8250_port *up = (struct uart_8250_port *)port;
1898
unsigned char lsr = serial_inp(up, UART_LSR);
1900
while (!(lsr & UART_LSR_DR))
1901
lsr = serial_inp(up, UART_LSR);
1903
return serial_inp(up, UART_RX);
1907
static void serial8250_put_poll_char(struct uart_port *port,
1911
struct uart_8250_port *up = (struct uart_8250_port *)port;
1914
* First save the IER then disable the interrupts
1916
ier = serial_in(up, UART_IER);
1917
if (up->capabilities & UART_CAP_UUE)
1918
serial_out(up, UART_IER, UART_IER_UUE);
1920
serial_out(up, UART_IER, 0);
1922
wait_for_xmitr(up, BOTH_EMPTY);
1924
* Send the character out.
1925
* If a LF, also do CR...
1927
serial_out(up, UART_TX, c);
1929
wait_for_xmitr(up, BOTH_EMPTY);
1930
serial_out(up, UART_TX, 13);
1934
* Finally, wait for transmitter to become empty
1935
* and restore the IER
1937
wait_for_xmitr(up, BOTH_EMPTY);
1938
serial_out(up, UART_IER, ier);
1941
#endif /* CONFIG_CONSOLE_POLL */
1943
static int serial8250_startup(struct uart_port *port)
1945
struct uart_8250_port *up = (struct uart_8250_port *)port;
1946
unsigned long flags;
1947
unsigned char lsr, iir;
1950
up->capabilities = uart_config[up->port.type].flags;
1953
if (up->port.iotype != up->cur_iotype)
1954
set_io_from_upio(port);
1956
if (up->port.type == PORT_16C950) {
1957
/* Wake up and initialize UART */
1959
serial_outp(up, UART_LCR, 0xBF);
1960
serial_outp(up, UART_EFR, UART_EFR_ECB);
1961
serial_outp(up, UART_IER, 0);
1962
serial_outp(up, UART_LCR, 0);
1963
serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1964
serial_outp(up, UART_LCR, 0xBF);
1965
serial_outp(up, UART_EFR, UART_EFR_ECB);
1966
serial_outp(up, UART_LCR, 0);
1969
#ifdef CONFIG_SERIAL_8250_RSA
1971
* If this is an RSA port, see if we can kick it up to the
1972
* higher speed clock.
1978
* Clear the FIFO buffers and disable them.
1979
* (they will be reenabled in set_termios())
1981
serial8250_clear_fifos(up);
1984
* Clear the interrupt registers.
1986
(void) serial_inp(up, UART_LSR);
1987
(void) serial_inp(up, UART_RX);
1988
(void) serial_inp(up, UART_IIR);
1989
(void) serial_inp(up, UART_MSR);
1992
* At this point, there's no way the LSR could still be 0xff;
1993
* if it is, then bail out, because there's likely no UART
1996
if (!(up->port.flags & UPF_BUGGY_UART) &&
1997
(serial_inp(up, UART_LSR) == 0xff)) {
1998
printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
1999
serial_index(&up->port));
2004
* For a XR16C850, we need to set the trigger levels
2006
if (up->port.type == PORT_16850) {
2009
serial_outp(up, UART_LCR, 0xbf);
2011
fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2012
serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2013
serial_outp(up, UART_TRG, UART_TRG_96);
2014
serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2015
serial_outp(up, UART_TRG, UART_TRG_96);
2017
serial_outp(up, UART_LCR, 0);
2020
if (is_real_interrupt(up->port.irq)) {
2023
* Test for UARTs that do not reassert THRE when the
2024
* transmitter is idle and the interrupt has already
2025
* been cleared. Real 16550s should always reassert
2026
* this interrupt whenever the transmitter is idle and
2027
* the interrupt is enabled. Delays are necessary to
2028
* allow register changes to become visible.
2030
spin_lock_irqsave(&up->port.lock, flags);
2031
if (up->port.irqflags & IRQF_SHARED)
2032
disable_irq_nosync(up->port.irq);
2034
wait_for_xmitr(up, UART_LSR_THRE);
2035
serial_out_sync(up, UART_IER, UART_IER_THRI);
2036
udelay(1); /* allow THRE to set */
2037
iir1 = serial_in(up, UART_IIR);
2038
serial_out(up, UART_IER, 0);
2039
serial_out_sync(up, UART_IER, UART_IER_THRI);
2040
udelay(1); /* allow a working UART time to re-assert THRE */
2041
iir = serial_in(up, UART_IIR);
2042
serial_out(up, UART_IER, 0);
2044
if (up->port.irqflags & IRQF_SHARED)
2045
enable_irq(up->port.irq);
2046
spin_unlock_irqrestore(&up->port.lock, flags);
2049
* If the interrupt is not reasserted, setup a timer to
2050
* kick the UART on a regular basis.
2052
if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2053
up->bugs |= UART_BUG_THRE;
2054
pr_debug("ttyS%d - using backup timer\n",
2055
serial_index(port));
2060
* The above check will only give an accurate result the first time
2061
* the port is opened so this value needs to be preserved.
2063
if (up->bugs & UART_BUG_THRE) {
2064
up->timer.function = serial8250_backup_timeout;
2065
up->timer.data = (unsigned long)up;
2066
mod_timer(&up->timer, jiffies +
2067
poll_timeout(up->port.timeout) + HZ / 5);
2071
* If the "interrupt" for this port doesn't correspond with any
2072
* hardware interrupt, we use a timer-based system. The original
2073
* driver used to do this with IRQ0.
2075
if (!is_real_interrupt(up->port.irq)) {
2076
up->timer.data = (unsigned long)up;
2077
mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
2079
retval = serial_link_irq_chain(up);
2085
* Now, initialize the UART
2087
serial_outp(up, UART_LCR, UART_LCR_WLEN8);
2089
spin_lock_irqsave(&up->port.lock, flags);
2090
if (up->port.flags & UPF_FOURPORT) {
2091
if (!is_real_interrupt(up->port.irq))
2092
up->port.mctrl |= TIOCM_OUT1;
2095
* Most PC uarts need OUT2 raised to enable interrupts.
2097
if (is_real_interrupt(up->port.irq))
2098
up->port.mctrl |= TIOCM_OUT2;
2100
serial8250_set_mctrl(&up->port, up->port.mctrl);
2102
/* Serial over Lan (SoL) hack:
2103
Intel 8257x Gigabit ethernet chips have a
2104
16550 emulation, to be used for Serial Over Lan.
2105
Those chips take a longer time than a normal
2106
serial device to signalize that a transmission
2107
data was queued. Due to that, the above test generally
2108
fails. One solution would be to delay the reading of
2109
iir. However, this is not reliable, since the timeout
2110
is variable. So, let's just don't test if we receive
2111
TX irq. This way, we'll never enable UART_BUG_TXEN.
2113
if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2114
goto dont_test_tx_en;
2117
* Do a quick test to see if we receive an
2118
* interrupt when we enable the TX irq.
2120
serial_outp(up, UART_IER, UART_IER_THRI);
2121
lsr = serial_in(up, UART_LSR);
2122
iir = serial_in(up, UART_IIR);
2123
serial_outp(up, UART_IER, 0);
2125
if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2126
if (!(up->bugs & UART_BUG_TXEN)) {
2127
up->bugs |= UART_BUG_TXEN;
2128
pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2129
serial_index(port));
2132
up->bugs &= ~UART_BUG_TXEN;
2136
spin_unlock_irqrestore(&up->port.lock, flags);
2139
* Clear the interrupt registers again for luck, and clear the
2140
* saved flags to avoid getting false values from polling
2141
* routines or the previous session.
2143
serial_inp(up, UART_LSR);
2144
serial_inp(up, UART_RX);
2145
serial_inp(up, UART_IIR);
2146
serial_inp(up, UART_MSR);
2147
up->lsr_saved_flags = 0;
2148
up->msr_saved_flags = 0;
2151
* Finally, enable interrupts. Note: Modem status interrupts
2152
* are set via set_termios(), which will be occurring imminently
2153
* anyway, so we don't enable them here.
2155
up->ier = UART_IER_RLSI | UART_IER_RDI;
2156
serial_outp(up, UART_IER, up->ier);
2158
if (up->port.flags & UPF_FOURPORT) {
2161
* Enable interrupts on the AST Fourport board
2163
icp = (up->port.iobase & 0xfe0) | 0x01f;
2171
static void serial8250_shutdown(struct uart_port *port)
2173
struct uart_8250_port *up = (struct uart_8250_port *)port;
2174
unsigned long flags;
2177
* Disable interrupts from this port
2180
serial_outp(up, UART_IER, 0);
2182
spin_lock_irqsave(&up->port.lock, flags);
2183
if (up->port.flags & UPF_FOURPORT) {
2184
/* reset interrupts on the AST Fourport board */
2185
inb((up->port.iobase & 0xfe0) | 0x1f);
2186
up->port.mctrl |= TIOCM_OUT1;
2188
up->port.mctrl &= ~TIOCM_OUT2;
2190
serial8250_set_mctrl(&up->port, up->port.mctrl);
2191
spin_unlock_irqrestore(&up->port.lock, flags);
2194
* Disable break condition and FIFOs
2196
serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2197
serial8250_clear_fifos(up);
2199
#ifdef CONFIG_SERIAL_8250_RSA
2201
* Reset the RSA board back to 115kbps compat mode.
2207
* Read data port to reset things, and then unlink from
2210
(void) serial_in(up, UART_RX);
2212
del_timer_sync(&up->timer);
2213
up->timer.function = serial8250_timeout;
2214
if (is_real_interrupt(up->port.irq))
2215
serial_unlink_irq_chain(up);
2218
static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2223
* Handle magic divisors for baud rates above baud_base on
2224
* SMSC SuperIO chips.
2226
if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2227
baud == (port->uartclk/4))
2229
else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2230
baud == (port->uartclk/8))
2233
quot = uart_get_divisor(port, baud);
2239
serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2240
struct ktermios *old)
2242
struct uart_8250_port *up = (struct uart_8250_port *)port;
2243
unsigned char cval, fcr = 0;
2244
unsigned long flags;
2245
unsigned int baud, quot;
2247
switch (termios->c_cflag & CSIZE) {
2249
cval = UART_LCR_WLEN5;
2252
cval = UART_LCR_WLEN6;
2255
cval = UART_LCR_WLEN7;
2259
cval = UART_LCR_WLEN8;
2263
if (termios->c_cflag & CSTOPB)
2264
cval |= UART_LCR_STOP;
2265
if (termios->c_cflag & PARENB)
2266
cval |= UART_LCR_PARITY;
2267
if (!(termios->c_cflag & PARODD))
2268
cval |= UART_LCR_EPAR;
2270
if (termios->c_cflag & CMSPAR)
2271
cval |= UART_LCR_SPAR;
2275
* Ask the core to calculate the divisor for us.
2277
baud = uart_get_baud_rate(port, termios, old,
2278
port->uartclk / 16 / 0xffff,
2279
port->uartclk / 16);
2280
quot = serial8250_get_divisor(port, baud);
2283
* Oxford Semi 952 rev B workaround
2285
if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2288
if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2290
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2292
fcr = uart_config[up->port.type].fcr;
2296
* MCR-based auto flow control. When AFE is enabled, RTS will be
2297
* deasserted when the receive FIFO contains more characters than
2298
* the trigger, or the MCR RTS bit is cleared. In the case where
2299
* the remote UART is not using CTS auto flow control, we must
2300
* have sufficient FIFO entries for the latency of the remote
2301
* UART to respond. IOW, at least 32 bytes of FIFO.
2303
if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2304
up->mcr &= ~UART_MCR_AFE;
2305
if (termios->c_cflag & CRTSCTS)
2306
up->mcr |= UART_MCR_AFE;
2310
* Ok, we're now changing the port state. Do it with
2311
* interrupts disabled.
2313
spin_lock_irqsave(&up->port.lock, flags);
2316
* Update the per-port timeout.
2318
uart_update_timeout(port, termios->c_cflag, baud);
2320
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2321
if (termios->c_iflag & INPCK)
2322
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2323
if (termios->c_iflag & (BRKINT | PARMRK))
2324
up->port.read_status_mask |= UART_LSR_BI;
2327
* Characteres to ignore
2329
up->port.ignore_status_mask = 0;
2330
if (termios->c_iflag & IGNPAR)
2331
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2332
if (termios->c_iflag & IGNBRK) {
2333
up->port.ignore_status_mask |= UART_LSR_BI;
2335
* If we're ignoring parity and break indicators,
2336
* ignore overruns too (for real raw support).
2338
if (termios->c_iflag & IGNPAR)
2339
up->port.ignore_status_mask |= UART_LSR_OE;
2343
* ignore all characters if CREAD is not set
2345
if ((termios->c_cflag & CREAD) == 0)
2346
up->port.ignore_status_mask |= UART_LSR_DR;
2349
* CTS flow control flag and modem status interrupts
2351
up->ier &= ~UART_IER_MSI;
2352
if (!(up->bugs & UART_BUG_NOMSR) &&
2353
UART_ENABLE_MS(&up->port, termios->c_cflag))
2354
up->ier |= UART_IER_MSI;
2355
if (up->capabilities & UART_CAP_UUE)
2356
up->ier |= UART_IER_UUE | UART_IER_RTOIE;
2358
serial_out(up, UART_IER, up->ier);
2360
if (up->capabilities & UART_CAP_EFR) {
2361
unsigned char efr = 0;
2363
* TI16C752/Startech hardware flow control. FIXME:
2364
* - TI16C752 requires control thresholds to be set.
2365
* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2367
if (termios->c_cflag & CRTSCTS)
2368
efr |= UART_EFR_CTS;
2370
serial_outp(up, UART_LCR, 0xBF);
2371
serial_outp(up, UART_EFR, efr);
2374
#ifdef CONFIG_ARCH_OMAP
2375
/* Workaround to enable 115200 baud on OMAP1510 internal ports */
2376
if (cpu_is_omap1510() && is_omap_port(up)) {
2377
if (baud == 115200) {
2379
serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2381
serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2385
if (up->capabilities & UART_NATSEMI) {
2386
/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2387
serial_outp(up, UART_LCR, 0xe0);
2389
serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2392
serial_dl_write(up, quot);
2395
* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2396
* is written without DLAB set, this mode will be disabled.
2398
if (up->port.type == PORT_16750)
2399
serial_outp(up, UART_FCR, fcr);
2401
serial_outp(up, UART_LCR, cval); /* reset DLAB */
2402
up->lcr = cval; /* Save LCR */
2403
if (up->port.type != PORT_16750) {
2404
if (fcr & UART_FCR_ENABLE_FIFO) {
2405
/* emulated UARTs (Lucent Venus 167x) need two steps */
2406
serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2408
serial_outp(up, UART_FCR, fcr); /* set fcr */
2410
serial8250_set_mctrl(&up->port, up->port.mctrl);
2411
spin_unlock_irqrestore(&up->port.lock, flags);
2412
/* Don't rewrite B0 */
2413
if (tty_termios_baud_rate(termios))
2414
tty_termios_encode_baud_rate(termios, baud, baud);
2418
serial8250_pm(struct uart_port *port, unsigned int state,
2419
unsigned int oldstate)
2421
struct uart_8250_port *p = (struct uart_8250_port *)port;
2423
serial8250_set_sleep(p, state != 0);
2426
p->pm(port, state, oldstate);
2429
static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2431
if (pt->port.iotype == UPIO_AU)
2433
#ifdef CONFIG_ARCH_OMAP
2434
if (is_omap_port(pt))
2435
return 0x16 << pt->port.regshift;
2437
return 8 << pt->port.regshift;
2441
* Resource handling.
2443
static int serial8250_request_std_resource(struct uart_8250_port *up)
2445
unsigned int size = serial8250_port_size(up);
2448
switch (up->port.iotype) {
2454
if (!up->port.mapbase)
2457
if (!request_mem_region(up->port.mapbase, size, "serial")) {
2462
if (up->port.flags & UPF_IOREMAP) {
2463
up->port.membase = ioremap_nocache(up->port.mapbase,
2465
if (!up->port.membase) {
2466
release_mem_region(up->port.mapbase, size);
2474
if (!request_region(up->port.iobase, size, "serial"))
2481
static void serial8250_release_std_resource(struct uart_8250_port *up)
2483
unsigned int size = serial8250_port_size(up);
2485
switch (up->port.iotype) {
2491
if (!up->port.mapbase)
2494
if (up->port.flags & UPF_IOREMAP) {
2495
iounmap(up->port.membase);
2496
up->port.membase = NULL;
2499
release_mem_region(up->port.mapbase, size);
2504
release_region(up->port.iobase, size);
2509
static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2511
unsigned long start = UART_RSA_BASE << up->port.regshift;
2512
unsigned int size = 8 << up->port.regshift;
2515
switch (up->port.iotype) {
2518
start += up->port.iobase;
2519
if (request_region(start, size, "serial-rsa"))
2529
static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2531
unsigned long offset = UART_RSA_BASE << up->port.regshift;
2532
unsigned int size = 8 << up->port.regshift;
2534
switch (up->port.iotype) {
2537
release_region(up->port.iobase + offset, size);
2542
static void serial8250_release_port(struct uart_port *port)
2544
struct uart_8250_port *up = (struct uart_8250_port *)port;
2546
serial8250_release_std_resource(up);
2547
if (up->port.type == PORT_RSA)
2548
serial8250_release_rsa_resource(up);
2551
static int serial8250_request_port(struct uart_port *port)
2553
struct uart_8250_port *up = (struct uart_8250_port *)port;
2556
ret = serial8250_request_std_resource(up);
2557
if (ret == 0 && up->port.type == PORT_RSA) {
2558
ret = serial8250_request_rsa_resource(up);
2560
serial8250_release_std_resource(up);
2566
static void serial8250_config_port(struct uart_port *port, int flags)
2568
struct uart_8250_port *up = (struct uart_8250_port *)port;
2569
int probeflags = PROBE_ANY;
2573
* Find the region that we can probe for. This in turn
2574
* tells us whether we can probe for the type of port.
2576
ret = serial8250_request_std_resource(up);
2580
ret = serial8250_request_rsa_resource(up);
2582
probeflags &= ~PROBE_RSA;
2584
if (up->port.iotype != up->cur_iotype)
2585
set_io_from_upio(port);
2587
if (flags & UART_CONFIG_TYPE)
2588
autoconfig(up, probeflags);
2589
if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2592
if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2593
serial8250_release_rsa_resource(up);
2594
if (up->port.type == PORT_UNKNOWN)
2595
serial8250_release_std_resource(up);
2599
serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2601
if (ser->irq >= nr_irqs || ser->irq < 0 ||
2602
ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2603
ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2604
ser->type == PORT_STARTECH)
2610
serial8250_type(struct uart_port *port)
2612
int type = port->type;
2614
if (type >= ARRAY_SIZE(uart_config))
2616
return uart_config[type].name;
2619
static struct uart_ops serial8250_pops = {
2620
.tx_empty = serial8250_tx_empty,
2621
.set_mctrl = serial8250_set_mctrl,
2622
.get_mctrl = serial8250_get_mctrl,
2623
.stop_tx = serial8250_stop_tx,
2624
.start_tx = serial8250_start_tx,
2625
.stop_rx = serial8250_stop_rx,
2626
.enable_ms = serial8250_enable_ms,
2627
.break_ctl = serial8250_break_ctl,
2628
.startup = serial8250_startup,
2629
.shutdown = serial8250_shutdown,
2630
.set_termios = serial8250_set_termios,
2631
.pm = serial8250_pm,
2632
.type = serial8250_type,
2633
.release_port = serial8250_release_port,
2634
.request_port = serial8250_request_port,
2635
.config_port = serial8250_config_port,
2636
.verify_port = serial8250_verify_port,
2637
#ifdef CONFIG_CONSOLE_POLL
2638
.poll_get_char = serial8250_get_poll_char,
2639
.poll_put_char = serial8250_put_poll_char,
2643
static struct uart_8250_port serial8250_ports[UART_NR];
2645
static void __init serial8250_isa_init_ports(void)
2647
struct uart_8250_port *up;
2648
static int first = 1;
2655
for (i = 0; i < nr_uarts; i++) {
2656
struct uart_8250_port *up = &serial8250_ports[i];
2659
spin_lock_init(&up->port.lock);
2661
init_timer(&up->timer);
2662
up->timer.function = serial8250_timeout;
2665
* ALPHA_KLUDGE_MCR needs to be killed.
2667
up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2668
up->mcr_force = ALPHA_KLUDGE_MCR;
2670
up->port.ops = &serial8250_pops;
2673
for (i = 0, up = serial8250_ports;
2674
i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2676
up->port.iobase = old_serial_port[i].port;
2677
up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2678
up->port.irqflags = old_serial_port[i].irqflags;
2679
up->port.uartclk = old_serial_port[i].baud_base * 16;
2680
up->port.flags = old_serial_port[i].flags;
2681
up->port.hub6 = old_serial_port[i].hub6;
2682
up->port.membase = old_serial_port[i].iomem_base;
2683
up->port.iotype = old_serial_port[i].io_type;
2684
up->port.regshift = old_serial_port[i].iomem_reg_shift;
2685
set_io_from_upio(&up->port);
2687
up->port.irqflags |= IRQF_SHARED;
2692
serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2696
for (i = 0; i < nr_uarts; i++) {
2697
struct uart_8250_port *up = &serial8250_ports[i];
2698
up->cur_iotype = 0xFF;
2701
serial8250_isa_init_ports();
2703
for (i = 0; i < nr_uarts; i++) {
2704
struct uart_8250_port *up = &serial8250_ports[i];
2707
uart_add_one_port(drv, &up->port);
2711
#ifdef CONFIG_SERIAL_8250_CONSOLE
2713
static void serial8250_console_putchar(struct uart_port *port, int ch)
2715
struct uart_8250_port *up = (struct uart_8250_port *)port;
2717
wait_for_xmitr(up, UART_LSR_THRE);
2718
serial_out(up, UART_TX, ch);
2722
* Print a string to the serial port trying not to disturb
2723
* any possible real use of the port...
2725
* The console_lock must be held when we get here.
2728
serial8250_console_write(struct console *co, const char *s, unsigned int count)
2730
struct uart_8250_port *up = &serial8250_ports[co->index];
2731
unsigned long flags;
2735
touch_nmi_watchdog();
2737
local_irq_save(flags);
2738
if (up->port.sysrq) {
2739
/* serial8250_handle_port() already took the lock */
2741
} else if (oops_in_progress) {
2742
locked = spin_trylock(&up->port.lock);
2744
spin_lock(&up->port.lock);
2747
* First save the IER then disable the interrupts
2749
ier = serial_in(up, UART_IER);
2751
if (up->capabilities & UART_CAP_UUE)
2752
serial_out(up, UART_IER, UART_IER_UUE);
2754
serial_out(up, UART_IER, 0);
2756
uart_console_write(&up->port, s, count, serial8250_console_putchar);
2759
* Finally, wait for transmitter to become empty
2760
* and restore the IER
2762
wait_for_xmitr(up, BOTH_EMPTY);
2763
serial_out(up, UART_IER, ier);
2766
* The receive handling will happen properly because the
2767
* receive ready bit will still be set; it is not cleared
2768
* on read. However, modem control will not, we must
2769
* call it if we have saved something in the saved flags
2770
* while processing with interrupts off.
2772
if (up->msr_saved_flags)
2773
check_modem_status(up);
2776
spin_unlock(&up->port.lock);
2777
local_irq_restore(flags);
2780
static int __init serial8250_console_setup(struct console *co, char *options)
2782
struct uart_port *port;
2789
* Check whether an invalid uart number has been specified, and
2790
* if so, search for the first available port that does have
2793
if (co->index >= nr_uarts)
2795
port = &serial8250_ports[co->index].port;
2796
if (!port->iobase && !port->membase)
2800
uart_parse_options(options, &baud, &parity, &bits, &flow);
2802
return uart_set_options(port, co, baud, parity, bits, flow);
2805
static int serial8250_console_early_setup(void)
2807
return serial8250_find_port_for_earlycon();
2810
static struct console serial8250_console = {
2812
.write = serial8250_console_write,
2813
.device = uart_console_device,
2814
.setup = serial8250_console_setup,
2815
.early_setup = serial8250_console_early_setup,
2816
.flags = CON_PRINTBUFFER,
2818
.data = &serial8250_reg,
2821
static int __init serial8250_console_init(void)
2823
if (nr_uarts > UART_NR)
2826
serial8250_isa_init_ports();
2827
register_console(&serial8250_console);
2830
console_initcall(serial8250_console_init);
2832
int serial8250_find_port(struct uart_port *p)
2835
struct uart_port *port;
2837
for (line = 0; line < nr_uarts; line++) {
2838
port = &serial8250_ports[line].port;
2839
if (uart_match_port(p, port))
2845
#define SERIAL8250_CONSOLE &serial8250_console
2847
#define SERIAL8250_CONSOLE NULL
2850
static struct uart_driver serial8250_reg = {
2851
.owner = THIS_MODULE,
2852
.driver_name = "serial",
2856
.cons = SERIAL8250_CONSOLE,
2860
* early_serial_setup - early registration for 8250 ports
2862
* Setup an 8250 port structure prior to console initialisation. Use
2863
* after console initialisation will cause undefined behaviour.
2865
int __init early_serial_setup(struct uart_port *port)
2867
struct uart_port *p;
2869
if (port->line >= ARRAY_SIZE(serial8250_ports))
2872
serial8250_isa_init_ports();
2873
p = &serial8250_ports[port->line].port;
2874
p->iobase = port->iobase;
2875
p->membase = port->membase;
2877
p->irqflags = port->irqflags;
2878
p->uartclk = port->uartclk;
2879
p->fifosize = port->fifosize;
2880
p->regshift = port->regshift;
2881
p->iotype = port->iotype;
2882
p->flags = port->flags;
2883
p->mapbase = port->mapbase;
2884
p->private_data = port->private_data;
2885
p->type = port->type;
2886
p->line = port->line;
2888
set_io_from_upio(p);
2889
if (port->serial_in)
2890
p->serial_in = port->serial_in;
2891
if (port->serial_out)
2892
p->serial_out = port->serial_out;
2898
* serial8250_suspend_port - suspend one serial port
2899
* @line: serial line number
2901
* Suspend one serial port.
2903
void serial8250_suspend_port(int line)
2905
uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2909
* serial8250_resume_port - resume one serial port
2910
* @line: serial line number
2912
* Resume one serial port.
2914
void serial8250_resume_port(int line)
2916
struct uart_8250_port *up = &serial8250_ports[line];
2918
if (up->capabilities & UART_NATSEMI) {
2921
/* Ensure it's still in high speed mode */
2922
serial_outp(up, UART_LCR, 0xE0);
2924
tmp = serial_in(up, 0x04); /* EXCR2 */
2925
tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
2926
tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
2927
serial_outp(up, 0x04, tmp);
2929
serial_outp(up, UART_LCR, 0);
2931
uart_resume_port(&serial8250_reg, &up->port);
2935
* Register a set of serial devices attached to a platform device. The
2936
* list is terminated with a zero flags entry, which means we expect
2937
* all entries to have at least UPF_BOOT_AUTOCONF set.
2939
static int __devinit serial8250_probe(struct platform_device *dev)
2941
struct plat_serial8250_port *p = dev->dev.platform_data;
2942
struct uart_port port;
2945
memset(&port, 0, sizeof(struct uart_port));
2947
for (i = 0; p && p->flags != 0; p++, i++) {
2948
port.iobase = p->iobase;
2949
port.membase = p->membase;
2951
port.irqflags = p->irqflags;
2952
port.uartclk = p->uartclk;
2953
port.regshift = p->regshift;
2954
port.iotype = p->iotype;
2955
port.flags = p->flags;
2956
port.mapbase = p->mapbase;
2957
port.hub6 = p->hub6;
2958
port.private_data = p->private_data;
2959
port.type = p->type;
2960
port.serial_in = p->serial_in;
2961
port.serial_out = p->serial_out;
2962
port.dev = &dev->dev;
2964
port.irqflags |= IRQF_SHARED;
2965
ret = serial8250_register_port(&port);
2967
dev_err(&dev->dev, "unable to register port at index %d "
2968
"(IO%lx MEM%llx IRQ%d): %d\n", i,
2969
p->iobase, (unsigned long long)p->mapbase,
2977
* Remove serial ports registered against a platform device.
2979
static int __devexit serial8250_remove(struct platform_device *dev)
2983
for (i = 0; i < nr_uarts; i++) {
2984
struct uart_8250_port *up = &serial8250_ports[i];
2986
if (up->port.dev == &dev->dev)
2987
serial8250_unregister_port(i);
2992
static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
2996
for (i = 0; i < UART_NR; i++) {
2997
struct uart_8250_port *up = &serial8250_ports[i];
2999
if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3000
uart_suspend_port(&serial8250_reg, &up->port);
3006
static int serial8250_resume(struct platform_device *dev)
3010
for (i = 0; i < UART_NR; i++) {
3011
struct uart_8250_port *up = &serial8250_ports[i];
3013
if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3014
serial8250_resume_port(i);
3020
static struct platform_driver serial8250_isa_driver = {
3021
.probe = serial8250_probe,
3022
.remove = __devexit_p(serial8250_remove),
3023
.suspend = serial8250_suspend,
3024
.resume = serial8250_resume,
3026
.name = "serial8250",
3027
.owner = THIS_MODULE,
3032
* This "device" covers _all_ ISA 8250-compatible serial devices listed
3033
* in the table in include/asm/serial.h
3035
static struct platform_device *serial8250_isa_devs;
3038
* serial8250_register_port and serial8250_unregister_port allows for
3039
* 16x50 serial ports to be configured at run-time, to support PCMCIA
3040
* modems and PCI multiport cards.
3042
static DEFINE_MUTEX(serial_mutex);
3044
static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3049
* First, find a port entry which matches.
3051
for (i = 0; i < nr_uarts; i++)
3052
if (uart_match_port(&serial8250_ports[i].port, port))
3053
return &serial8250_ports[i];
3056
* We didn't find a matching entry, so look for the first
3057
* free entry. We look for one which hasn't been previously
3058
* used (indicated by zero iobase).
3060
for (i = 0; i < nr_uarts; i++)
3061
if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3062
serial8250_ports[i].port.iobase == 0)
3063
return &serial8250_ports[i];
3066
* That also failed. Last resort is to find any entry which
3067
* doesn't have a real port associated with it.
3069
for (i = 0; i < nr_uarts; i++)
3070
if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3071
return &serial8250_ports[i];
3077
* serial8250_register_port - register a serial port
3078
* @port: serial port template
3080
* Configure the serial port specified by the request. If the
3081
* port exists and is in use, it is hung up and unregistered
3084
* The port is then probed and if necessary the IRQ is autodetected
3085
* If this fails an error is returned.
3087
* On success the port is ready to use and the line number is returned.
3089
int serial8250_register_port(struct uart_port *port)
3091
struct uart_8250_port *uart;
3094
if (port->uartclk == 0)
3097
mutex_lock(&serial_mutex);
3099
uart = serial8250_find_match_or_unused(port);
3101
uart_remove_one_port(&serial8250_reg, &uart->port);
3103
uart->port.iobase = port->iobase;
3104
uart->port.membase = port->membase;
3105
uart->port.irq = port->irq;
3106
uart->port.irqflags = port->irqflags;
3107
uart->port.uartclk = port->uartclk;
3108
uart->port.fifosize = port->fifosize;
3109
uart->port.regshift = port->regshift;
3110
uart->port.iotype = port->iotype;
3111
uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
3112
uart->port.mapbase = port->mapbase;
3113
uart->port.private_data = port->private_data;
3115
uart->port.dev = port->dev;
3117
if (port->flags & UPF_FIXED_TYPE) {
3118
uart->port.type = port->type;
3119
uart->port.fifosize = uart_config[port->type].fifo_size;
3120
uart->capabilities = uart_config[port->type].flags;
3121
uart->tx_loadsz = uart_config[port->type].tx_loadsz;
3124
set_io_from_upio(&uart->port);
3125
/* Possibly override default I/O functions. */
3126
if (port->serial_in)
3127
uart->port.serial_in = port->serial_in;
3128
if (port->serial_out)
3129
uart->port.serial_out = port->serial_out;
3131
ret = uart_add_one_port(&serial8250_reg, &uart->port);
3133
ret = uart->port.line;
3135
mutex_unlock(&serial_mutex);
3139
EXPORT_SYMBOL(serial8250_register_port);
3142
* serial8250_unregister_port - remove a 16x50 serial port at runtime
3143
* @line: serial line number
3145
* Remove one serial port. This may not be called from interrupt
3146
* context. We hand the port back to the our control.
3148
void serial8250_unregister_port(int line)
3150
struct uart_8250_port *uart = &serial8250_ports[line];
3152
mutex_lock(&serial_mutex);
3153
uart_remove_one_port(&serial8250_reg, &uart->port);
3154
if (serial8250_isa_devs) {
3155
uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3156
uart->port.type = PORT_UNKNOWN;
3157
uart->port.dev = &serial8250_isa_devs->dev;
3158
uart_add_one_port(&serial8250_reg, &uart->port);
3160
uart->port.dev = NULL;
3162
mutex_unlock(&serial_mutex);
3164
EXPORT_SYMBOL(serial8250_unregister_port);
3166
static int __init serial8250_init(void)
3170
if (nr_uarts > UART_NR)
3173
printk(KERN_INFO "Serial: 8250/16550 driver, "
3174
"%d ports, IRQ sharing %sabled\n", nr_uarts,
3175
share_irqs ? "en" : "dis");
3178
ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3180
serial8250_reg.nr = UART_NR;
3181
ret = uart_register_driver(&serial8250_reg);
3186
serial8250_isa_devs = platform_device_alloc("serial8250",
3187
PLAT8250_DEV_LEGACY);
3188
if (!serial8250_isa_devs) {
3190
goto unreg_uart_drv;
3193
ret = platform_device_add(serial8250_isa_devs);
3197
serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3199
ret = platform_driver_register(&serial8250_isa_driver);
3203
platform_device_del(serial8250_isa_devs);
3205
platform_device_put(serial8250_isa_devs);
3208
sunserial_unregister_minors(&serial8250_reg, UART_NR);
3210
uart_unregister_driver(&serial8250_reg);
3216
static void __exit serial8250_exit(void)
3218
struct platform_device *isa_dev = serial8250_isa_devs;
3221
* This tells serial8250_unregister_port() not to re-register
3222
* the ports (thereby making serial8250_isa_driver permanently
3225
serial8250_isa_devs = NULL;
3227
platform_driver_unregister(&serial8250_isa_driver);
3228
platform_device_unregister(isa_dev);
3231
sunserial_unregister_minors(&serial8250_reg, UART_NR);
3233
uart_unregister_driver(&serial8250_reg);
3237
module_init(serial8250_init);
3238
module_exit(serial8250_exit);
3240
EXPORT_SYMBOL(serial8250_suspend_port);
3241
EXPORT_SYMBOL(serial8250_resume_port);
3243
MODULE_LICENSE("GPL");
3244
MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3246
module_param(share_irqs, uint, 0644);
3247
MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3250
module_param(nr_uarts, uint, 0644);
3251
MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3253
module_param(skip_txen_test, uint, 0644);
3254
MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3256
#ifdef CONFIG_SERIAL_8250_RSA
3257
module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3258
MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3260
MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
added
removed
drivers/serial/8250.c
