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* LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
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* lirc_sir - Device driver for use with SIR (serial infra red)
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* mode of IrDA on many notebooks.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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* 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
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* added timeout and relaxed pulse detection, removed gap bug
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* 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
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* added support for Tekram Irmate 210 (sending does not work yet,
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* kind of disappointing that nobody was able to implement that
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* 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
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* added support for StrongARM SA1100 embedded microprocessor
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* parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
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#include <linux/module.h>
37
#include <linux/sched.h>
38
#include <linux/errno.h>
39
#include <linux/signal.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/serial_reg.h>
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#include <linux/time.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/delay.h>
51
#include <linux/poll.h>
52
#include <asm/system.h>
55
#include <linux/fcntl.h>
57
#include <asm/hardware.h>
58
#ifdef CONFIG_SA1100_COLLIE
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#include <asm/arch/tc35143.h>
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#include <asm/ucb1200.h>
64
#include <linux/timer.h>
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#include <media/lirc.h>
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#include <media/lirc_dev.h>
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/* SECTION: Definitions */
71
/*** Tekram dongle ***/
72
#ifdef LIRC_SIR_TEKRAM
73
/* stolen from kernel source */
74
/* definitions for Tekram dongle */
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#define TEKRAM_115200 0x00
76
#define TEKRAM_57600 0x01
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#define TEKRAM_38400 0x02
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#define TEKRAM_19200 0x03
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#define TEKRAM_9600 0x04
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#define TEKRAM_2400 0x08
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#define TEKRAM_PW 0x10 /* Pulse select bit */
84
/* 10bit * 1s/115200bit in milliseconds = 87ms*/
85
#define TIME_CONST (10000000ul/115200ul)
89
#ifdef LIRC_SIR_ACTISYS_ACT200L
90
static void init_act200(void);
91
#elif defined(LIRC_SIR_ACTISYS_ACT220L)
92
static void init_act220(void);
97
struct sa1100_ser2_registers {
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/* HSSP control register */
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static int irq = IRQ_Ser2ICP;
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#define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
115
/* pulse/space ratio of 50/50 */
116
static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
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/* 1000000/freq-pulse_width */
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static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
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static unsigned int freq = 38000; /* modulation frequency */
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static unsigned int duty_cycle = 50; /* duty cycle of 50% */
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#define RBUF_LEN 1024
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#define WBUF_LEN 1024
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#define LIRC_DRIVER_NAME "lirc_sir"
131
#ifndef LIRC_SIR_TEKRAM
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/* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
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#define TIME_CONST (9000000ul/115200ul)
137
/* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
138
#define SIR_TIMEOUT (HZ*5/100)
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#ifndef LIRC_ON_SA1100
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/* for external dongles, default to com1 */
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#if defined(LIRC_SIR_ACTISYS_ACT200L) || \
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defined(LIRC_SIR_ACTISYS_ACT220L) || \
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defined(LIRC_SIR_TEKRAM)
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#define LIRC_PORT 0x3f8
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/* onboard sir ports are typically com3 */
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#define LIRC_PORT 0x3e8
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static int io = LIRC_PORT;
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static int irq = LIRC_IRQ;
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static int threshold = 3;
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static DEFINE_SPINLOCK(timer_lock);
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static struct timer_list timerlist;
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/* time of last signal change detected */
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static struct timeval last_tv = {0, 0};
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/* time of last UART data ready interrupt */
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static struct timeval last_intr_tv = {0, 0};
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static int last_value;
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static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
171
static DEFINE_SPINLOCK(hardware_lock);
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static int rx_buf[RBUF_LEN];
174
static unsigned int rx_tail, rx_head;
177
#define dprintk(fmt, args...) \
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printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
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/* SECTION: Prototypes */
186
/* Communication with user-space */
187
static unsigned int lirc_poll(struct file *file, poll_table *wait);
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static ssize_t lirc_read(struct file *file, char *buf, size_t count,
190
static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
192
static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
193
static void add_read_queue(int flag, unsigned long val);
194
static int init_chrdev(void);
195
static void drop_chrdev(void);
197
static irqreturn_t sir_interrupt(int irq, void *dev_id);
198
static void send_space(unsigned long len);
199
static void send_pulse(unsigned long len);
200
static int init_hardware(void);
201
static void drop_hardware(void);
203
static int init_port(void);
204
static void drop_port(void);
206
#ifdef LIRC_ON_SA1100
212
static void off(void)
217
static inline unsigned int sinp(int offset)
219
return inb(io + offset);
222
static inline void soutp(int offset, int value)
224
outb(value, io + offset);
228
#ifndef MAX_UDELAY_MS
229
#define MAX_UDELAY_US 5000
231
#define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
234
static void safe_udelay(unsigned long usecs)
236
while (usecs > MAX_UDELAY_US) {
237
udelay(MAX_UDELAY_US);
238
usecs -= MAX_UDELAY_US;
243
/* SECTION: Communication with user-space */
245
static unsigned int lirc_poll(struct file *file, poll_table *wait)
247
poll_wait(file, &lirc_read_queue, wait);
248
if (rx_head != rx_tail)
249
return POLLIN | POLLRDNORM;
253
static ssize_t lirc_read(struct file *file, char *buf, size_t count,
258
DECLARE_WAITQUEUE(wait, current);
260
if (count % sizeof(int))
263
add_wait_queue(&lirc_read_queue, &wait);
264
set_current_state(TASK_INTERRUPTIBLE);
266
if (rx_head != rx_tail) {
267
if (copy_to_user((void *) buf + n,
268
(void *) (rx_buf + rx_head),
273
rx_head = (rx_head + 1) & (RBUF_LEN - 1);
276
if (file->f_flags & O_NONBLOCK) {
280
if (signal_pending(current)) {
281
retval = -ERESTARTSYS;
285
set_current_state(TASK_INTERRUPTIBLE);
288
remove_wait_queue(&lirc_read_queue, &wait);
289
set_current_state(TASK_RUNNING);
290
return n ? n : retval;
292
static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
299
count = n / sizeof(int);
300
if (n % sizeof(int) || count % 2 == 0)
302
tx_buf = memdup_user(buf, n);
304
return PTR_ERR(tx_buf);
306
#ifdef LIRC_ON_SA1100
307
/* disable receiver */
310
local_irq_save(flags);
315
send_pulse(tx_buf[i]);
320
send_space(tx_buf[i]);
323
local_irq_restore(flags);
324
#ifdef LIRC_ON_SA1100
326
udelay(1000); /* wait 1ms for IR diode to recover */
328
/* clear status register to prevent unwanted interrupts */
329
Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
330
/* enable receiver */
331
Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
337
static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
341
#ifdef LIRC_ON_SA1100
343
if (cmd == LIRC_GET_FEATURES)
344
value = LIRC_CAN_SEND_PULSE |
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LIRC_CAN_SET_SEND_DUTY_CYCLE |
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LIRC_CAN_SET_SEND_CARRIER |
348
else if (cmd == LIRC_GET_SEND_MODE)
349
value = LIRC_MODE_PULSE;
350
else if (cmd == LIRC_GET_REC_MODE)
351
value = LIRC_MODE_MODE2;
353
if (cmd == LIRC_GET_FEATURES)
354
value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
355
else if (cmd == LIRC_GET_SEND_MODE)
356
value = LIRC_MODE_PULSE;
357
else if (cmd == LIRC_GET_REC_MODE)
358
value = LIRC_MODE_MODE2;
362
case LIRC_GET_FEATURES:
363
case LIRC_GET_SEND_MODE:
364
case LIRC_GET_REC_MODE:
365
retval = put_user(value, (__u32 *) arg);
368
case LIRC_SET_SEND_MODE:
369
case LIRC_SET_REC_MODE:
370
retval = get_user(value, (__u32 *) arg);
372
#ifdef LIRC_ON_SA1100
373
case LIRC_SET_SEND_DUTY_CYCLE:
374
retval = get_user(value, (__u32 *) arg);
377
if (value <= 0 || value > 100)
379
/* (value/100)*(1000000/freq) */
381
pulse_width = (unsigned long) duty_cycle*10000/freq;
382
space_width = (unsigned long) 1000000L/freq-pulse_width;
383
if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
384
pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
385
if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
386
space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
388
case LIRC_SET_SEND_CARRIER:
389
retval = get_user(value, (__u32 *) arg);
392
if (value > 500000 || value < 20000)
395
pulse_width = (unsigned long) duty_cycle*10000/freq;
396
space_width = (unsigned long) 1000000L/freq-pulse_width;
397
if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
398
pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
399
if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
400
space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
404
retval = -ENOIOCTLCMD;
410
if (cmd == LIRC_SET_REC_MODE) {
411
if (value != LIRC_MODE_MODE2)
413
} else if (cmd == LIRC_SET_SEND_MODE) {
414
if (value != LIRC_MODE_PULSE)
421
static void add_read_queue(int flag, unsigned long val)
423
unsigned int new_rx_tail;
426
dprintk("add flag %d with val %lu\n", flag, val);
428
newval = val & PULSE_MASK;
431
* statistically, pulses are ~TIME_CONST/2 too long. we could
432
* maybe make this more exact, but this is good enough
436
if (newval > TIME_CONST/2)
437
newval -= TIME_CONST/2;
438
else /* should not ever happen */
442
newval += TIME_CONST/2;
444
new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
445
if (new_rx_tail == rx_head) {
446
dprintk("Buffer overrun.\n");
449
rx_buf[rx_tail] = newval;
450
rx_tail = new_rx_tail;
451
wake_up_interruptible(&lirc_read_queue);
454
static const struct file_operations lirc_fops = {
455
.owner = THIS_MODULE,
459
.unlocked_ioctl = lirc_ioctl,
461
.compat_ioctl = lirc_ioctl,
463
.open = lirc_dev_fop_open,
464
.release = lirc_dev_fop_close,
468
static int set_use_inc(void *data)
473
static void set_use_dec(void *data)
477
static struct lirc_driver driver = {
478
.name = LIRC_DRIVER_NAME,
484
.set_use_inc = set_use_inc,
485
.set_use_dec = set_use_dec,
488
.owner = THIS_MODULE,
492
static int init_chrdev(void)
494
driver.minor = lirc_register_driver(&driver);
495
if (driver.minor < 0) {
496
printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
502
static void drop_chrdev(void)
504
lirc_unregister_driver(driver.minor);
507
/* SECTION: Hardware */
508
static long delta(struct timeval *tv1, struct timeval *tv2)
512
deltv = tv2->tv_sec - tv1->tv_sec;
516
deltv = deltv*1000000 +
522
static void sir_timeout(unsigned long data)
525
* if last received signal was a pulse, but receiving stopped
526
* within the 9 bit frame, we need to finish this pulse and
527
* simulate a signal change to from pulse to space. Otherwise
528
* upper layers will receive two sequences next time.
532
unsigned long pulse_end;
534
/* avoid interference with interrupt */
535
spin_lock_irqsave(&timer_lock, flags);
537
#ifndef LIRC_ON_SA1100
538
/* clear unread bits in UART and restart */
539
outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
541
/* determine 'virtual' pulse end: */
542
pulse_end = delta(&last_tv, &last_intr_tv);
543
dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
544
add_read_queue(last_value, pulse_end);
546
last_tv = last_intr_tv;
548
spin_unlock_irqrestore(&timer_lock, flags);
551
static irqreturn_t sir_interrupt(int irq, void *dev_id)
554
struct timeval curr_tv;
555
static unsigned long deltv;
556
#ifdef LIRC_ON_SA1100
562
* Deal with any receive errors first. The bytes in error may be
563
* the only bytes in the receive FIFO, so we do this first.
565
while (status & UTSR0_EIF) {
572
if (bstat & UTSR1_FRE)
573
dprintk("frame error\n");
574
if (bstat & UTSR1_ROR)
575
dprintk("receive fifo overrun\n");
576
if (bstat & UTSR1_PRE)
577
dprintk("parity error\n");
585
if (status & (UTSR0_RFS | UTSR0_RID)) {
586
do_gettimeofday(&curr_tv);
587
deltv = delta(&last_tv, &curr_tv);
590
dprintk("%d data: %u\n", n, (unsigned int) data);
592
} while (status & UTSR0_RID && /* do not empty fifo in order to
593
* get UTSR0_RID in any case */
594
Ser2UTSR1 & UTSR1_RNE); /* data ready */
596
if (status&UTSR0_RID) {
597
add_read_queue(0 , deltv - n * TIME_CONST); /*space*/
598
add_read_queue(1, n * TIME_CONST); /*pulse*/
604
if (status & UTSR0_TFS)
605
printk(KERN_ERR "transmit fifo not full, shouldn't happen\n");
607
/* We must clear certain bits. */
608
status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
612
unsigned long deltintrtv;
616
while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
617
switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
619
(void) inb(io + UART_MSR);
622
(void) inb(io + UART_LSR);
626
if (lsr & UART_LSR_THRE) /* FIFO is empty */
627
outb(data, io + UART_TX)
631
/* avoid interference with timer */
632
spin_lock_irqsave(&timer_lock, flags);
634
del_timer(&timerlist);
635
data = inb(io + UART_RX);
636
do_gettimeofday(&curr_tv);
637
deltv = delta(&last_tv, &curr_tv);
638
deltintrtv = delta(&last_intr_tv, &curr_tv);
639
dprintk("t %lu, d %d\n", deltintrtv, (int)data);
641
* if nothing came in last X cycles,
644
if (deltintrtv > TIME_CONST * threshold) {
647
/* simulate signal change */
648
add_read_queue(last_value,
655
last_intr_tv.tv_usec;
660
if (data ^ last_value) {
662
* deltintrtv > 2*TIME_CONST, remember?
663
* the other case is timeout
665
add_read_queue(last_value,
669
if (last_tv.tv_usec >= TIME_CONST) {
670
last_tv.tv_usec -= TIME_CONST;
673
last_tv.tv_usec += 1000000 -
677
last_intr_tv = curr_tv;
680
* start timer for end of
683
timerlist.expires = jiffies +
685
add_timer(&timerlist);
688
lsr = inb(io + UART_LSR);
689
} while (lsr & UART_LSR_DR); /* data ready */
690
spin_unlock_irqrestore(&timer_lock, flags);
697
return IRQ_RETVAL(IRQ_HANDLED);
700
#ifdef LIRC_ON_SA1100
701
static void send_pulse(unsigned long length)
703
unsigned long k, delay;
709
* this won't give us the carrier frequency we really want
710
* due to integer arithmetic, but we can accept this inaccuracy
713
for (k = flag = 0; k < length; k += delay, flag = !flag) {
726
static void send_space(unsigned long length)
734
static void send_space(unsigned long len)
739
static void send_pulse(unsigned long len)
741
long bytes_out = len / TIME_CONST;
744
time_left = (long)len - (long)bytes_out * (long)TIME_CONST;
745
if (bytes_out == 0) {
749
while (bytes_out--) {
750
outb(PULSE, io + UART_TX);
751
/* FIXME treba seriozne cakanie z char/serial.c */
752
while (!(inb(io + UART_LSR) & UART_LSR_THRE))
757
safe_udelay(time_left);
762
#ifdef CONFIG_SA1100_COLLIE
763
static int sa1100_irda_set_power_collie(int state)
768
* 1 - short range, lowest power
769
* 2 - medium range, medium power
770
* 3 - maximum range, high power
772
ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
773
TC35143_IODIR_OUTPUT);
774
ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW);
778
ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
779
TC35143_IODIR_OUTPUT);
780
ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH);
786
static int init_hardware(void)
790
spin_lock_irqsave(&hardware_lock, flags);
792
#ifdef LIRC_ON_SA1100
793
#ifdef CONFIG_SA1100_BITSY
794
if (machine_is_bitsy()) {
795
printk(KERN_INFO "Power on IR module\n");
796
set_bitsy_egpio(EGPIO_BITSY_IR_ON);
799
#ifdef CONFIG_SA1100_COLLIE
800
sa1100_irda_set_power_collie(3); /* power on */
802
sr.hscr0 = Ser2HSCR0;
804
sr.utcr0 = Ser2UTCR0;
805
sr.utcr1 = Ser2UTCR1;
806
sr.utcr2 = Ser2UTCR2;
807
sr.utcr3 = Ser2UTCR3;
808
sr.utcr4 = Ser2UTCR4;
811
sr.utsr0 = Ser2UTSR0;
812
sr.utsr1 = Ser2UTSR1;
818
/* set output to 0 */
821
/* Enable HP-SIR modulation, and ensure that the port is disabled. */
823
Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP);
825
/* clear status register to prevent unwanted interrupts */
826
Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
829
Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData;
833
/* use HPSIR, 1.6 usec pulses */
834
Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us;
836
/* enable receiver, receive fifo interrupt */
837
Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
839
/* clear status register to prevent unwanted interrupts */
840
Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
842
#elif defined(LIRC_SIR_TEKRAM)
850
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
852
/* First of all, disable all interrupts */
853
soutp(UART_IER, sinp(UART_IER) &
854
(~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
857
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
859
/* Set divisor to 12 => 9600 Baud */
864
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
867
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
868
safe_udelay(50*1000);
870
/* -DTR low -> reset PIC */
871
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
874
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
878
/* -RTS low -> send control byte */
879
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
881
soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
883
/* one byte takes ~1042 usec to transmit at 9600,8N1 */
886
/* back to normal operation */
887
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
892
/* read previous control byte */
893
printk(KERN_INFO LIRC_DRIVER_NAME
894
": 0x%02x\n", sinp(UART_RX));
897
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
899
/* Set divisor to 1 => 115200 Baud */
903
/* Set DLAB 0, 8 Bit */
904
soutp(UART_LCR, UART_LCR_WLEN8);
905
/* enable interrupts */
906
soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
908
outb(0, io + UART_MCR);
909
outb(0, io + UART_IER);
911
/* set DLAB, speed = 115200 */
912
outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
913
outb(1, io + UART_DLL); outb(0, io + UART_DLM);
914
/* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
915
outb(UART_LCR_WLEN7, io + UART_LCR);
917
outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
919
/* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
920
outb(UART_IER_RDI, io + UART_IER);
922
outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
923
#ifdef LIRC_SIR_ACTISYS_ACT200L
925
#elif defined(LIRC_SIR_ACTISYS_ACT220L)
929
spin_unlock_irqrestore(&hardware_lock, flags);
933
static void drop_hardware(void)
937
spin_lock_irqsave(&hardware_lock, flags);
939
#ifdef LIRC_ON_SA1100
942
Ser2UTCR0 = sr.utcr0;
943
Ser2UTCR1 = sr.utcr1;
944
Ser2UTCR2 = sr.utcr2;
945
Ser2UTCR4 = sr.utcr4;
946
Ser2UTCR3 = sr.utcr3;
948
Ser2HSCR0 = sr.hscr0;
949
#ifdef CONFIG_SA1100_BITSY
950
if (machine_is_bitsy())
951
clr_bitsy_egpio(EGPIO_BITSY_IR_ON);
953
#ifdef CONFIG_SA1100_COLLIE
954
sa1100_irda_set_power_collie(0); /* power off */
957
/* turn off interrupts */
958
outb(0, io + UART_IER);
960
spin_unlock_irqrestore(&hardware_lock, flags);
963
/* SECTION: Initialisation */
965
static int init_port(void)
969
/* get I/O port access and IRQ line */
970
#ifndef LIRC_ON_SA1100
971
if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
972
printk(KERN_ERR LIRC_DRIVER_NAME
973
": i/o port 0x%.4x already in use.\n", io);
977
retval = request_irq(irq, sir_interrupt, IRQF_DISABLED,
978
LIRC_DRIVER_NAME, NULL);
980
# ifndef LIRC_ON_SA1100
981
release_region(io, 8);
983
printk(KERN_ERR LIRC_DRIVER_NAME
984
": IRQ %d already in use.\n",
988
#ifndef LIRC_ON_SA1100
989
printk(KERN_INFO LIRC_DRIVER_NAME
990
": I/O port 0x%.4x, IRQ %d.\n",
994
init_timer(&timerlist);
995
timerlist.function = sir_timeout;
996
timerlist.data = 0xabadcafe;
1001
static void drop_port(void)
1003
free_irq(irq, NULL);
1004
del_timer_sync(&timerlist);
1005
#ifndef LIRC_ON_SA1100
1006
release_region(io, 8);
1010
#ifdef LIRC_SIR_ACTISYS_ACT200L
1011
/* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
1012
/* some code borrowed from Linux IRDA driver */
1014
/* Register 0: Control register #1 */
1015
#define ACT200L_REG0 0x00
1016
#define ACT200L_TXEN 0x01 /* Enable transmitter */
1017
#define ACT200L_RXEN 0x02 /* Enable receiver */
1018
#define ACT200L_ECHO 0x08 /* Echo control chars */
1020
/* Register 1: Control register #2 */
1021
#define ACT200L_REG1 0x10
1022
#define ACT200L_LODB 0x01 /* Load new baud rate count value */
1023
#define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
1025
/* Register 3: Transmit mode register #2 */
1026
#define ACT200L_REG3 0x30
1027
#define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1028
#define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1029
#define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
1031
/* Register 4: Output Power register */
1032
#define ACT200L_REG4 0x40
1033
#define ACT200L_OP0 0x01 /* Enable LED1C output */
1034
#define ACT200L_OP1 0x02 /* Enable LED2C output */
1035
#define ACT200L_BLKR 0x04
1037
/* Register 5: Receive Mode register */
1038
#define ACT200L_REG5 0x50
1039
#define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
1040
/*.. other various IRDA bit modes, and TV remote modes..*/
1042
/* Register 6: Receive Sensitivity register #1 */
1043
#define ACT200L_REG6 0x60
1044
#define ACT200L_RS0 0x01 /* receive threshold bit 0 */
1045
#define ACT200L_RS1 0x02 /* receive threshold bit 1 */
1047
/* Register 7: Receive Sensitivity register #2 */
1048
#define ACT200L_REG7 0x70
1049
#define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
1051
/* Register 8,9: Baud Rate Divider register #1,#2 */
1052
#define ACT200L_REG8 0x80
1053
#define ACT200L_REG9 0x90
1055
#define ACT200L_2400 0x5f
1056
#define ACT200L_9600 0x17
1057
#define ACT200L_19200 0x0b
1058
#define ACT200L_38400 0x05
1059
#define ACT200L_57600 0x03
1060
#define ACT200L_115200 0x01
1062
/* Register 13: Control register #3 */
1063
#define ACT200L_REG13 0xd0
1064
#define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
1066
/* Register 15: Status register */
1067
#define ACT200L_REG15 0xf0
1069
/* Register 21: Control register #4 */
1070
#define ACT200L_REG21 0x50
1071
#define ACT200L_EXCK 0x02 /* Disable clock output driver */
1072
#define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
1074
static void init_act200(void)
1079
ACT200L_REG13 | ACT200L_SHDW,
1080
ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
1082
ACT200L_REG7 | ACT200L_ENPOS,
1083
ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1,
1084
ACT200L_REG5 | ACT200L_RWIDL,
1085
ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR,
1086
ACT200L_REG3 | ACT200L_B0,
1087
ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN,
1088
ACT200L_REG8 | (ACT200L_115200 & 0x0f),
1089
ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
1090
ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
1094
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
1096
/* Set divisor to 12 => 9600 Baud */
1098
soutp(UART_DLL, 12);
1101
soutp(UART_LCR, UART_LCR_WLEN8);
1102
/* Set divisor to 12 => 9600 Baud */
1105
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1106
for (i = 0; i < 50; i++)
1109
/* Reset the dongle : set RTS low for 25 ms */
1110
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1111
for (i = 0; i < 25; i++)
1114
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1117
/* Clear DTR and set RTS to enter command mode */
1118
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1121
/* send out the control register settings for 115K 7N1 SIR operation */
1122
for (i = 0; i < sizeof(control); i++) {
1123
soutp(UART_TX, control[i]);
1124
/* one byte takes ~1042 usec to transmit at 9600,8N1 */
1128
/* back to normal operation */
1129
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1133
soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
1136
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1138
/* Set divisor to 1 => 115200 Baud */
1143
soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1145
/* Set DLAB 0, 7 Bit */
1146
soutp(UART_LCR, UART_LCR_WLEN7);
1148
/* enable interrupts */
1149
soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
1153
#ifdef LIRC_SIR_ACTISYS_ACT220L
1155
* Derived from linux IrDA driver (net/irda/actisys.c)
1156
* Drop me a mail for any kind of comment: maxx@spaceboyz.net
1159
void init_act220(void)
1164
soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
1168
soutp(UART_DLL, 12);
1171
soutp(UART_LCR, UART_LCR_WLEN7);
1173
/* reset the dongle, set DTR low for 10us */
1174
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1177
/* back to normal (still 9600) */
1178
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
1181
* send RTS pulses until we reach 115200
1182
* i hope this is really the same for act220l/act220l+
1184
for (i = 0; i < 3; i++) {
1186
/* set RTS low for 10 us */
1187
soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1189
/* set RTS high for 10 us */
1190
soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1193
/* back to normal operation */
1194
udelay(1500); /* better safe than sorry ;) */
1197
soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1199
/* Set divisor to 1 => 115200 Baud */
1203
/* Set DLAB 0, 7 Bit */
1204
/* The dongle doesn't seem to have any problems with operation at 7N1 */
1205
soutp(UART_LCR, UART_LCR_WLEN7);
1207
/* enable interrupts */
1208
soutp(UART_IER, UART_IER_RDI);
1212
static int init_lirc_sir(void)
1216
init_waitqueue_head(&lirc_read_queue);
1217
retval = init_port();
1221
printk(KERN_INFO LIRC_DRIVER_NAME
1227
static int __init lirc_sir_init(void)
1231
retval = init_chrdev();
1234
retval = init_lirc_sir();
1242
static void __exit lirc_sir_exit(void)
1247
printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
1250
module_init(lirc_sir_init);
1251
module_exit(lirc_sir_exit);
1253
#ifdef LIRC_SIR_TEKRAM
1254
MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
1255
MODULE_AUTHOR("Christoph Bartelmus");
1256
#elif defined(LIRC_ON_SA1100)
1257
MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
1258
MODULE_AUTHOR("Christoph Bartelmus");
1259
#elif defined(LIRC_SIR_ACTISYS_ACT200L)
1260
MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
1261
MODULE_AUTHOR("Karl Bongers");
1262
#elif defined(LIRC_SIR_ACTISYS_ACT220L)
1263
MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
1264
MODULE_AUTHOR("Jan Roemisch");
1266
MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
1267
MODULE_AUTHOR("Milan Pikula");
1269
MODULE_LICENSE("GPL");
1271
#ifdef LIRC_ON_SA1100
1272
module_param(irq, int, S_IRUGO);
1273
MODULE_PARM_DESC(irq, "Interrupt (16)");
1275
module_param(io, int, S_IRUGO);
1276
MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1278
module_param(irq, int, S_IRUGO);
1279
MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1281
module_param(threshold, int, S_IRUGO);
1282
MODULE_PARM_DESC(threshold, "space detection threshold (3)");
1285
module_param(debug, bool, S_IRUGO | S_IWUSR);
1286
MODULE_PARM_DESC(debug, "Enable debugging messages");