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Viewing changes to arch/sh/boards/mach-se/7206/irq.c

  • Committer: Bazaar Package Importer
  • Author(s): Ben Hutchings, Ben Hutchings, Aurelien Jarno, Martin Michlmayr
  • Date: 2011-04-06 13:53:30 UTC
  • mfrom: (43.1.5 sid)
  • Revision ID: james.westby@ubuntu.com-20110406135330-wjufxhd0tvn3zx4z
Tags: 2.6.38-3
http://bugs.debian.org/620124
http://bugs.debian.org/620284
http://bugs.debian.org/620204
[ Ben Hutchings ]
* [ppc64] Add to linux-tools package architectures (Closes: #620124)
* [amd64] Save cr4 to mmu_cr4_features at boot time (Closes: #620284)
* appletalk: Fix bugs introduced when removing use of BKL
* ALSA: Fix yet another race in disconnection
* cciss: Fix lost command issue
* ath9k: Fix kernel panic in AR2427
* ses: Avoid kernel panic when lun 0 is not mapped
* PCI/ACPI: Report ASPM support to BIOS if not disabled from command line

[ Aurelien Jarno ]
* rtlwifi: fix build when PCI is not enabled.

[ Martin Michlmayr ]
* rtlwifi: Eliminate udelay calls with too large values (Closes: #620204)

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Lines of Context:
arch/sh/boards/mach-se/7206/irq.c
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#define INTC_IPR01 0xfffe0818
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#define INTC_ICR1  0xfffe0802
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static void disable_se7206_irq(unsigned int irq)
 
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static void disable_se7206_irq(struct irq_data *data)
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{
 
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        unsigned int irq = data->irq;
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        unsigned short val;
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        unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
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        unsigned short msk0,msk1;
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        /* Set the priority in IPR to 0 */
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        val = ctrl_inw(INTC_IPR01);
 
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        val = __raw_readw(INTC_IPR01);
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        val &= mask;
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        ctrl_outw(val, INTC_IPR01);
 
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        __raw_writew(val, INTC_IPR01);
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        /* FPGA mask set */
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        msk0 = ctrl_inw(INTMSK0);
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        msk1 = ctrl_inw(INTMSK1);
 
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        msk0 = __raw_readw(INTMSK0);
 
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        msk1 = __raw_readw(INTMSK1);
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        switch (irq) {
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        case IRQ0_IRQ:
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                msk1 |= 0x00ff;
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                break;
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        }
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        ctrl_outw(msk0, INTMSK0);
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        ctrl_outw(msk1, INTMSK1);
 
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        __raw_writew(msk0, INTMSK0);
 
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        __raw_writew(msk1, INTMSK1);
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}
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static void enable_se7206_irq(unsigned int irq)
 
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static void enable_se7206_irq(struct irq_data *data)
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{
 
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        unsigned int irq = data->irq;
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        unsigned short val;
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        unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
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        unsigned short msk0,msk1;
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        /* Set priority in IPR back to original value */
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        val = ctrl_inw(INTC_IPR01);
 
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        val = __raw_readw(INTC_IPR01);
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        val |= value;
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        ctrl_outw(val, INTC_IPR01);
 
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        __raw_writew(val, INTC_IPR01);
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        /* FPGA mask reset */
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        msk0 = ctrl_inw(INTMSK0);
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        msk1 = ctrl_inw(INTMSK1);
 
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        msk0 = __raw_readw(INTMSK0);
 
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        msk1 = __raw_readw(INTMSK1);
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        switch (irq) {
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        case IRQ0_IRQ:
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                msk1 &= ~0x00ff;
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                break;
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        }
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        ctrl_outw(msk0, INTMSK0);
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        ctrl_outw(msk1, INTMSK1);
 
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        __raw_writew(msk0, INTMSK0);
 
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        __raw_writew(msk1, INTMSK1);
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}
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static void eoi_se7206_irq(unsigned int irq)
 
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static void eoi_se7206_irq(struct irq_data *data)
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{
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        unsigned short sts0,sts1;
 
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        unsigned int irq = data->irq;
 
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        struct irq_desc *desc = irq_to_desc(irq);
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        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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                enable_se7206_irq(irq);
 
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        if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 
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                enable_se7206_irq(data);
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        /* FPGA isr clear */
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        sts0 = ctrl_inw(INTSTS0);
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        sts1 = ctrl_inw(INTSTS1);
 
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        sts0 = __raw_readw(INTSTS0);
 
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        sts1 = __raw_readw(INTSTS1);
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        switch (irq) {
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        case IRQ0_IRQ:
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                sts1 &= ~0x00ff;
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                break;
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        }
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        ctrl_outw(sts0, INTSTS0);
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        ctrl_outw(sts1, INTSTS1);
 
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        __raw_writew(sts0, INTSTS0);
 
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        __raw_writew(sts1, INTSTS1);
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}
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static struct irq_chip se7206_irq_chip __read_mostly = {
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        .name           = "SE7206-FPGA",
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        .mask           = disable_se7206_irq,
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        .unmask         = enable_se7206_irq,
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        .mask_ack       = disable_se7206_irq,
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        .eoi            = eoi_se7206_irq,
 
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        .irq_mask       = disable_se7206_irq,
 
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        .irq_unmask     = enable_se7206_irq,
 
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        .irq_eoi        = eoi_se7206_irq,
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};
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static void make_se7206_irq(unsigned int irq)
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        disable_irq_nosync(irq);
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        set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
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                                      handle_level_irq, "level");
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        disable_se7206_irq(irq);
 
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        disable_se7206_irq(irq_get_irq_data(irq));
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}
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/*
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        make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
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        make_se7206_irq(IRQ1_IRQ); /* ATA */
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        make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
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        ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
 
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        __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */
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        /* FPGA System register setup*/
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        ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */
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        ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */
 
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        __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
 
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        __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
 
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        /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
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        ctrl_outw(0x0001,INTSEL);
 
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        __raw_writew(0x0001,INTSEL);
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}