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* Copyright (C) 2009, 2010 Apple Inc. All rights reserved.
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* Copyright (C) 2010 University of Szeged
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef MacroAssemblerARMv7_h
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#define MacroAssemblerARMv7_h
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#include "ARMv7Assembler.h"
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#include "AbstractMacroAssembler.h"
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class MacroAssemblerARMv7 : public AbstractMacroAssembler<ARMv7Assembler> {
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// FIXME: switch dataTempRegister & addressTempRegister, or possibly use r7?
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// - dTR is likely used more than aTR, and we'll get better instruction
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// encoding if it's in the low 8 registers.
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static const RegisterID dataTempRegister = ARMRegisters::ip;
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static const RegisterID addressTempRegister = ARMRegisters::r3;
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static const ARMRegisters::FPDoubleRegisterID fpTempRegister = ARMRegisters::d7;
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inline ARMRegisters::FPSingleRegisterID fpTempRegisterAsSingle() { return ARMRegisters::asSingle(fpTempRegister); }
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: m_makeJumpPatchable(false)
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typedef ARMv7Assembler::LinkRecord LinkRecord;
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typedef ARMv7Assembler::JumpType JumpType;
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typedef ARMv7Assembler::JumpLinkType JumpLinkType;
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static bool isCompactPtrAlignedAddressOffset(ptrdiff_t value)
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return value >= -255 && value <= 255;
62
Vector<LinkRecord>& jumpsToLink() { return m_assembler.jumpsToLink(); }
63
void* unlinkedCode() { return m_assembler.unlinkedCode(); }
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bool canCompact(JumpType jumpType) { return m_assembler.canCompact(jumpType); }
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JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return m_assembler.computeJumpType(jumpType, from, to); }
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JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return m_assembler.computeJumpType(record, from, to); }
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void recordLinkOffsets(int32_t regionStart, int32_t regionEnd, int32_t offset) {return m_assembler.recordLinkOffsets(regionStart, regionEnd, offset); }
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int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return m_assembler.jumpSizeDelta(jumpType, jumpLinkType); }
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void link(LinkRecord& record, uint8_t* from, uint8_t* to) { return m_assembler.link(record, from, to); }
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explicit ArmAddress(RegisterID base, int32_t offset = 0)
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explicit ArmAddress(RegisterID base, RegisterID index, Scale scale = TimesOne)
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typedef ARMRegisters::FPDoubleRegisterID FPRegisterID;
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static const Scale ScalePtr = TimesFour;
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enum RelationalCondition {
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Equal = ARMv7Assembler::ConditionEQ,
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NotEqual = ARMv7Assembler::ConditionNE,
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Above = ARMv7Assembler::ConditionHI,
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AboveOrEqual = ARMv7Assembler::ConditionHS,
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Below = ARMv7Assembler::ConditionLO,
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BelowOrEqual = ARMv7Assembler::ConditionLS,
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GreaterThan = ARMv7Assembler::ConditionGT,
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GreaterThanOrEqual = ARMv7Assembler::ConditionGE,
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LessThan = ARMv7Assembler::ConditionLT,
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LessThanOrEqual = ARMv7Assembler::ConditionLE
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enum ResultCondition {
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Overflow = ARMv7Assembler::ConditionVS,
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Signed = ARMv7Assembler::ConditionMI,
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Zero = ARMv7Assembler::ConditionEQ,
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NonZero = ARMv7Assembler::ConditionNE
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enum DoubleCondition {
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// These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.
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DoubleEqual = ARMv7Assembler::ConditionEQ,
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DoubleNotEqual = ARMv7Assembler::ConditionVC, // Not the right flag! check for this & handle differently.
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DoubleGreaterThan = ARMv7Assembler::ConditionGT,
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DoubleGreaterThanOrEqual = ARMv7Assembler::ConditionGE,
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DoubleLessThan = ARMv7Assembler::ConditionLO,
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DoubleLessThanOrEqual = ARMv7Assembler::ConditionLS,
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// If either operand is NaN, these conditions always evaluate to true.
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DoubleEqualOrUnordered = ARMv7Assembler::ConditionVS, // Not the right flag! check for this & handle differently.
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DoubleNotEqualOrUnordered = ARMv7Assembler::ConditionNE,
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DoubleGreaterThanOrUnordered = ARMv7Assembler::ConditionHI,
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DoubleGreaterThanOrEqualOrUnordered = ARMv7Assembler::ConditionHS,
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DoubleLessThanOrUnordered = ARMv7Assembler::ConditionLT,
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DoubleLessThanOrEqualOrUnordered = ARMv7Assembler::ConditionLE,
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static const RegisterID stackPointerRegister = ARMRegisters::sp;
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static const RegisterID linkRegister = ARMRegisters::lr;
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// Integer arithmetic operations:
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// Operations are typically two operand - operation(source, srcDst)
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// For many operations the source may be an TrustedImm32, the srcDst operand
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// may often be a memory location (explictly described using an Address
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void add32(RegisterID src, RegisterID dest)
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m_assembler.add(dest, dest, src);
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void add32(TrustedImm32 imm, RegisterID dest)
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add32(imm, dest, dest);
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void add32(AbsoluteAddress src, RegisterID dest)
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load32(src.m_ptr, dataTempRegister);
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add32(dataTempRegister, dest);
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void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)
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ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
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if (armImm.isValid())
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m_assembler.add(dest, src, armImm);
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move(imm, dataTempRegister);
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m_assembler.add(dest, src, dataTempRegister);
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void add32(TrustedImm32 imm, Address address)
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load32(address, dataTempRegister);
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ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
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if (armImm.isValid())
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m_assembler.add(dataTempRegister, dataTempRegister, armImm);
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// Hrrrm, since dataTempRegister holds the data loaded,
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// use addressTempRegister to hold the immediate.
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move(imm, addressTempRegister);
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m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);
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store32(dataTempRegister, address);
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void add32(Address src, RegisterID dest)
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load32(src, dataTempRegister);
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add32(dataTempRegister, dest);
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void add32(TrustedImm32 imm, AbsoluteAddress address)
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load32(address.m_ptr, dataTempRegister);
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ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
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if (armImm.isValid())
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m_assembler.add(dataTempRegister, dataTempRegister, armImm);
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// Hrrrm, since dataTempRegister holds the data loaded,
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// use addressTempRegister to hold the immediate.
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move(imm, addressTempRegister);
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m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);
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store32(dataTempRegister, address.m_ptr);
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void add64(TrustedImm32 imm, AbsoluteAddress address)
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move(TrustedImmPtr(address.m_ptr), addressTempRegister);
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m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
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ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
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if (armImm.isValid())
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m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);
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move(imm, addressTempRegister);
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m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);
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move(TrustedImmPtr(address.m_ptr), addressTempRegister);
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m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));
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m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
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m_assembler.adc(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(imm.m_value >> 31));
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m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));
240
void and32(RegisterID op1, RegisterID op2, RegisterID dest)
242
m_assembler.ARM_and(dest, op1, op2);
245
void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)
247
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
248
if (armImm.isValid())
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m_assembler.ARM_and(dest, src, armImm);
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move(imm, dataTempRegister);
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m_assembler.ARM_and(dest, src, dataTempRegister);
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void and32(RegisterID src, RegisterID dest)
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and32(dest, src, dest);
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void and32(TrustedImm32 imm, RegisterID dest)
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and32(imm, dest, dest);
266
void countLeadingZeros32(RegisterID src, RegisterID dest)
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m_assembler.clz(dest, src);
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void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
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// Clamp the shift to the range 0..31
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ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
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ASSERT(armImm.isValid());
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m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
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m_assembler.lsl(dest, src, dataTempRegister);
281
void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
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m_assembler.lsl(dest, src, imm.m_value & 0x1f);
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void lshift32(RegisterID shiftAmount, RegisterID dest)
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lshift32(dest, shiftAmount, dest);
291
void lshift32(TrustedImm32 imm, RegisterID dest)
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lshift32(dest, imm, dest);
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void mul32(RegisterID src, RegisterID dest)
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m_assembler.smull(dest, dataTempRegister, dest, src);
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void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)
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move(imm, dataTempRegister);
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m_assembler.smull(dest, dataTempRegister, src, dataTempRegister);
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void neg32(RegisterID srcDest)
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m_assembler.neg(srcDest, srcDest);
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void or32(RegisterID src, RegisterID dest)
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m_assembler.orr(dest, dest, src);
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void or32(RegisterID src, AbsoluteAddress dest)
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move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
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load32(addressTempRegister, dataTempRegister);
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or32(src, dataTempRegister);
322
store32(dataTempRegister, addressTempRegister);
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void or32(TrustedImm32 imm, RegisterID dest)
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or32(imm, dest, dest);
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void or32(RegisterID op1, RegisterID op2, RegisterID dest)
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m_assembler.orr(dest, op1, op2);
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void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)
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ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
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if (armImm.isValid())
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m_assembler.orr(dest, src, armImm);
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move(imm, dataTempRegister);
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m_assembler.orr(dest, src, dataTempRegister);
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void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
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// Clamp the shift to the range 0..31
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ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
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ASSERT(armImm.isValid());
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m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
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m_assembler.asr(dest, src, dataTempRegister);
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void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
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m_assembler.asr(dest, src, imm.m_value & 0x1f);
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void rshift32(RegisterID shiftAmount, RegisterID dest)
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rshift32(dest, shiftAmount, dest);
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void rshift32(TrustedImm32 imm, RegisterID dest)
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rshift32(dest, imm, dest);
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void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
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// Clamp the shift to the range 0..31
374
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);
375
ASSERT(armImm.isValid());
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m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);
378
m_assembler.lsr(dest, src, dataTempRegister);
381
void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)
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m_assembler.lsr(dest, src, imm.m_value & 0x1f);
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void urshift32(RegisterID shiftAmount, RegisterID dest)
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urshift32(dest, shiftAmount, dest);
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void urshift32(TrustedImm32 imm, RegisterID dest)
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urshift32(dest, imm, dest);
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void sub32(RegisterID src, RegisterID dest)
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m_assembler.sub(dest, dest, src);
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void sub32(TrustedImm32 imm, RegisterID dest)
403
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
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if (armImm.isValid())
405
m_assembler.sub(dest, dest, armImm);
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move(imm, dataTempRegister);
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m_assembler.sub(dest, dest, dataTempRegister);
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void sub32(TrustedImm32 imm, Address address)
414
load32(address, dataTempRegister);
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ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
417
if (armImm.isValid())
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m_assembler.sub(dataTempRegister, dataTempRegister, armImm);
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// Hrrrm, since dataTempRegister holds the data loaded,
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// use addressTempRegister to hold the immediate.
422
move(imm, addressTempRegister);
423
m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);
426
store32(dataTempRegister, address);
429
void sub32(Address src, RegisterID dest)
431
load32(src, dataTempRegister);
432
sub32(dataTempRegister, dest);
435
void sub32(TrustedImm32 imm, AbsoluteAddress address)
437
load32(address.m_ptr, dataTempRegister);
439
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);
440
if (armImm.isValid())
441
m_assembler.sub(dataTempRegister, dataTempRegister, armImm);
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// Hrrrm, since dataTempRegister holds the data loaded,
444
// use addressTempRegister to hold the immediate.
445
move(imm, addressTempRegister);
446
m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);
449
store32(dataTempRegister, address.m_ptr);
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void xor32(RegisterID op1, RegisterID op2, RegisterID dest)
454
m_assembler.eor(dest, op1, op2);
457
void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)
459
if (imm.m_value == -1) {
460
m_assembler.mvn(dest, src);
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ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
465
if (armImm.isValid())
466
m_assembler.eor(dest, src, armImm);
468
move(imm, dataTempRegister);
469
m_assembler.eor(dest, src, dataTempRegister);
473
void xor32(RegisterID src, RegisterID dest)
475
xor32(dest, src, dest);
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void xor32(TrustedImm32 imm, RegisterID dest)
480
if (imm.m_value == -1)
481
m_assembler.mvn(dest, dest);
483
xor32(imm, dest, dest);
487
// Memory access operations:
489
// Loads are of the form load(address, destination) and stores of the form
490
// store(source, address). The source for a store may be an TrustedImm32. Address
491
// operand objects to loads and store will be implicitly constructed if a
492
// register is passed.
495
void load32(ArmAddress address, RegisterID dest)
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if (address.type == ArmAddress::HasIndex)
498
m_assembler.ldr(dest, address.base, address.u.index, address.u.scale);
499
else if (address.u.offset >= 0) {
500
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
501
ASSERT(armImm.isValid());
502
m_assembler.ldr(dest, address.base, armImm);
504
ASSERT(address.u.offset >= -255);
505
m_assembler.ldr(dest, address.base, address.u.offset, true, false);
509
void load16(ArmAddress address, RegisterID dest)
511
if (address.type == ArmAddress::HasIndex)
512
m_assembler.ldrh(dest, address.base, address.u.index, address.u.scale);
513
else if (address.u.offset >= 0) {
514
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
515
ASSERT(armImm.isValid());
516
m_assembler.ldrh(dest, address.base, armImm);
518
ASSERT(address.u.offset >= -255);
519
m_assembler.ldrh(dest, address.base, address.u.offset, true, false);
523
void load16Signed(ArmAddress address, RegisterID dest)
525
ASSERT(address.type == ArmAddress::HasIndex);
526
m_assembler.ldrsh(dest, address.base, address.u.index, address.u.scale);
529
void load8(ArmAddress address, RegisterID dest)
531
if (address.type == ArmAddress::HasIndex)
532
m_assembler.ldrb(dest, address.base, address.u.index, address.u.scale);
533
else if (address.u.offset >= 0) {
534
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
535
ASSERT(armImm.isValid());
536
m_assembler.ldrb(dest, address.base, armImm);
538
ASSERT(address.u.offset >= -255);
539
m_assembler.ldrb(dest, address.base, address.u.offset, true, false);
543
void load8Signed(ArmAddress address, RegisterID dest)
545
ASSERT(address.type == ArmAddress::HasIndex);
546
m_assembler.ldrsb(dest, address.base, address.u.index, address.u.scale);
550
void store32(RegisterID src, ArmAddress address)
552
if (address.type == ArmAddress::HasIndex)
553
m_assembler.str(src, address.base, address.u.index, address.u.scale);
554
else if (address.u.offset >= 0) {
555
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
556
ASSERT(armImm.isValid());
557
m_assembler.str(src, address.base, armImm);
559
ASSERT(address.u.offset >= -255);
560
m_assembler.str(src, address.base, address.u.offset, true, false);
565
void store8(RegisterID src, ArmAddress address)
567
if (address.type == ArmAddress::HasIndex)
568
m_assembler.strb(src, address.base, address.u.index, address.u.scale);
569
else if (address.u.offset >= 0) {
570
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
571
ASSERT(armImm.isValid());
572
m_assembler.strb(src, address.base, armImm);
574
ASSERT(address.u.offset >= -255);
575
m_assembler.strb(src, address.base, address.u.offset, true, false);
579
void store16(RegisterID src, ArmAddress address)
581
if (address.type == ArmAddress::HasIndex)
582
m_assembler.strh(src, address.base, address.u.index, address.u.scale);
583
else if (address.u.offset >= 0) {
584
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);
585
ASSERT(armImm.isValid());
586
m_assembler.strh(src, address.base, armImm);
588
ASSERT(address.u.offset >= -255);
589
m_assembler.strh(src, address.base, address.u.offset, true, false);
594
void load32(ImplicitAddress address, RegisterID dest)
596
load32(setupArmAddress(address), dest);
599
void load32(BaseIndex address, RegisterID dest)
601
load32(setupArmAddress(address), dest);
604
void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)
606
load32(setupArmAddress(address), dest);
609
void load16Unaligned(BaseIndex address, RegisterID dest)
611
load16(setupArmAddress(address), dest);
614
void load32(const void* address, RegisterID dest)
616
move(TrustedImmPtr(address), addressTempRegister);
617
m_assembler.ldr(dest, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
620
ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest)
622
ConvertibleLoadLabel result(this);
623
ASSERT(address.offset >= 0 && address.offset <= 255);
624
m_assembler.ldrWide8BitImmediate(dest, address.base, address.offset);
628
void load8(ImplicitAddress address, RegisterID dest)
630
load8(setupArmAddress(address), dest);
633
void load8Signed(ImplicitAddress, RegisterID)
635
UNREACHABLE_FOR_PLATFORM();
638
void load8(BaseIndex address, RegisterID dest)
640
load8(setupArmAddress(address), dest);
643
void load8Signed(BaseIndex address, RegisterID dest)
645
load8Signed(setupArmAddress(address), dest);
648
DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)
650
DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);
651
load32(ArmAddress(address.base, dataTempRegister), dest);
655
DataLabelCompact load32WithCompactAddressOffsetPatch(Address address, RegisterID dest)
659
RegisterID base = address.base;
661
DataLabelCompact label(this);
662
ASSERT(isCompactPtrAlignedAddressOffset(address.offset));
664
m_assembler.ldr(dest, base, address.offset, true, false);
668
void load16(BaseIndex address, RegisterID dest)
670
m_assembler.ldrh(dest, makeBaseIndexBase(address), address.index, address.scale);
673
void load16Signed(BaseIndex address, RegisterID dest)
675
load16Signed(setupArmAddress(address), dest);
678
void load16(ImplicitAddress address, RegisterID dest)
680
ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.offset);
681
if (armImm.isValid())
682
m_assembler.ldrh(dest, address.base, armImm);
684
move(TrustedImm32(address.offset), dataTempRegister);
685
m_assembler.ldrh(dest, address.base, dataTempRegister);
689
void load16Signed(ImplicitAddress, RegisterID)
691
UNREACHABLE_FOR_PLATFORM();
694
DataLabel32 store32WithAddressOffsetPatch(RegisterID src, Address address)
696
DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);
697
store32(src, ArmAddress(address.base, dataTempRegister));
701
void store32(RegisterID src, ImplicitAddress address)
703
store32(src, setupArmAddress(address));
706
void store32(RegisterID src, BaseIndex address)
708
store32(src, setupArmAddress(address));
711
void store32(TrustedImm32 imm, ImplicitAddress address)
713
move(imm, dataTempRegister);
714
store32(dataTempRegister, setupArmAddress(address));
717
void store32(TrustedImm32 imm, BaseIndex address)
719
move(imm, dataTempRegister);
720
store32(dataTempRegister, setupArmAddress(address));
723
void store32(RegisterID src, const void* address)
725
move(TrustedImmPtr(address), addressTempRegister);
726
m_assembler.str(src, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
729
void store32(TrustedImm32 imm, const void* address)
731
move(imm, dataTempRegister);
732
store32(dataTempRegister, address);
735
void store8(RegisterID src, BaseIndex address)
737
store8(src, setupArmAddress(address));
740
void store8(RegisterID src, void* address)
742
move(TrustedImmPtr(address), addressTempRegister);
743
store8(src, ArmAddress(addressTempRegister, 0));
746
void store8(TrustedImm32 imm, void* address)
748
move(imm, dataTempRegister);
749
store8(dataTempRegister, address);
752
void store16(RegisterID src, BaseIndex address)
754
store16(src, setupArmAddress(address));
757
// Possibly clobbers src, but not on this architecture.
758
void moveDoubleToInts(FPRegisterID src, RegisterID dest1, RegisterID dest2)
760
m_assembler.vmov(dest1, dest2, src);
763
void moveIntsToDouble(RegisterID src1, RegisterID src2, FPRegisterID dest, FPRegisterID scratch)
765
UNUSED_PARAM(scratch);
766
m_assembler.vmov(dest, src1, src2);
769
#if ENABLE(JIT_CONSTANT_BLINDING)
770
static bool shouldBlindForSpecificArch(uint32_t value)
772
ARMThumbImmediate immediate = ARMThumbImmediate::makeEncodedImm(value);
774
// Couldn't be encoded as an immediate, so assume it's untrusted.
775
if (!immediate.isValid())
778
// If we can encode the immediate, we have less than 16 attacker
780
if (immediate.isEncodedImm())
783
// Don't let any more than 12 bits of an instruction word
784
// be controlled by an attacker.
785
return !immediate.isUInt12();
789
// Floating-point operations:
791
static bool supportsFloatingPoint() { return true; }
792
static bool supportsFloatingPointTruncate() { return true; }
793
static bool supportsFloatingPointSqrt() { return true; }
794
static bool supportsFloatingPointAbs() { return true; }
796
void loadDouble(ImplicitAddress address, FPRegisterID dest)
798
RegisterID base = address.base;
799
int32_t offset = address.offset;
801
// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
802
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
803
add32(TrustedImm32(offset), base, addressTempRegister);
804
base = addressTempRegister;
808
m_assembler.vldr(dest, base, offset);
811
void loadFloat(ImplicitAddress address, FPRegisterID dest)
813
RegisterID base = address.base;
814
int32_t offset = address.offset;
816
// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
817
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
818
add32(TrustedImm32(offset), base, addressTempRegister);
819
base = addressTempRegister;
823
m_assembler.flds(ARMRegisters::asSingle(dest), base, offset);
826
void loadDouble(BaseIndex address, FPRegisterID dest)
828
move(address.index, addressTempRegister);
829
lshift32(TrustedImm32(address.scale), addressTempRegister);
830
add32(address.base, addressTempRegister);
831
loadDouble(Address(addressTempRegister, address.offset), dest);
834
void loadFloat(BaseIndex address, FPRegisterID dest)
836
move(address.index, addressTempRegister);
837
lshift32(TrustedImm32(address.scale), addressTempRegister);
838
add32(address.base, addressTempRegister);
839
loadFloat(Address(addressTempRegister, address.offset), dest);
842
void moveDouble(FPRegisterID src, FPRegisterID dest)
845
m_assembler.vmov(dest, src);
848
void loadDouble(const void* address, FPRegisterID dest)
850
move(TrustedImmPtr(address), addressTempRegister);
851
m_assembler.vldr(dest, addressTempRegister, 0);
854
void storeDouble(FPRegisterID src, ImplicitAddress address)
856
RegisterID base = address.base;
857
int32_t offset = address.offset;
859
// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
860
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
861
add32(TrustedImm32(offset), base, addressTempRegister);
862
base = addressTempRegister;
866
m_assembler.vstr(src, base, offset);
869
void storeFloat(FPRegisterID src, ImplicitAddress address)
871
RegisterID base = address.base;
872
int32_t offset = address.offset;
874
// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.
875
if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {
876
add32(TrustedImm32(offset), base, addressTempRegister);
877
base = addressTempRegister;
881
m_assembler.fsts(ARMRegisters::asSingle(src), base, offset);
884
void storeDouble(FPRegisterID src, const void* address)
886
move(TrustedImmPtr(address), addressTempRegister);
887
storeDouble(src, addressTempRegister);
890
void storeDouble(FPRegisterID src, BaseIndex address)
892
move(address.index, addressTempRegister);
893
lshift32(TrustedImm32(address.scale), addressTempRegister);
894
add32(address.base, addressTempRegister);
895
storeDouble(src, Address(addressTempRegister, address.offset));
898
void storeFloat(FPRegisterID src, BaseIndex address)
900
move(address.index, addressTempRegister);
901
lshift32(TrustedImm32(address.scale), addressTempRegister);
902
add32(address.base, addressTempRegister);
903
storeFloat(src, Address(addressTempRegister, address.offset));
906
void addDouble(FPRegisterID src, FPRegisterID dest)
908
m_assembler.vadd(dest, dest, src);
911
void addDouble(Address src, FPRegisterID dest)
913
loadDouble(src, fpTempRegister);
914
addDouble(fpTempRegister, dest);
917
void addDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
919
m_assembler.vadd(dest, op1, op2);
922
void addDouble(AbsoluteAddress address, FPRegisterID dest)
924
loadDouble(address.m_ptr, fpTempRegister);
925
m_assembler.vadd(dest, dest, fpTempRegister);
928
void divDouble(FPRegisterID src, FPRegisterID dest)
930
m_assembler.vdiv(dest, dest, src);
933
void divDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
935
m_assembler.vdiv(dest, op1, op2);
938
void subDouble(FPRegisterID src, FPRegisterID dest)
940
m_assembler.vsub(dest, dest, src);
943
void subDouble(Address src, FPRegisterID dest)
945
loadDouble(src, fpTempRegister);
946
subDouble(fpTempRegister, dest);
949
void subDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
951
m_assembler.vsub(dest, op1, op2);
954
void mulDouble(FPRegisterID src, FPRegisterID dest)
956
m_assembler.vmul(dest, dest, src);
959
void mulDouble(Address src, FPRegisterID dest)
961
loadDouble(src, fpTempRegister);
962
mulDouble(fpTempRegister, dest);
965
void mulDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
967
m_assembler.vmul(dest, op1, op2);
970
void sqrtDouble(FPRegisterID src, FPRegisterID dest)
972
m_assembler.vsqrt(dest, src);
975
void absDouble(FPRegisterID src, FPRegisterID dest)
977
m_assembler.vabs(dest, src);
980
void negateDouble(FPRegisterID src, FPRegisterID dest)
982
m_assembler.vneg(dest, src);
985
void convertInt32ToDouble(RegisterID src, FPRegisterID dest)
987
m_assembler.vmov(fpTempRegister, src, src);
988
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
991
void convertInt32ToDouble(Address address, FPRegisterID dest)
993
// Fixme: load directly into the fpr!
994
load32(address, dataTempRegister);
995
m_assembler.vmov(fpTempRegister, dataTempRegister, dataTempRegister);
996
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
999
void convertInt32ToDouble(AbsoluteAddress address, FPRegisterID dest)
1001
// Fixme: load directly into the fpr!
1002
load32(address.m_ptr, dataTempRegister);
1003
m_assembler.vmov(fpTempRegister, dataTempRegister, dataTempRegister);
1004
m_assembler.vcvt_signedToFloatingPoint(dest, fpTempRegisterAsSingle());
1007
void convertFloatToDouble(FPRegisterID src, FPRegisterID dst)
1009
m_assembler.vcvtds(dst, ARMRegisters::asSingle(src));
1012
void convertDoubleToFloat(FPRegisterID src, FPRegisterID dst)
1014
m_assembler.vcvtsd(ARMRegisters::asSingle(dst), src);
1017
Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right)
1019
m_assembler.vcmp(left, right);
1022
if (cond == DoubleNotEqual) {
1023
// ConditionNE jumps if NotEqual *or* unordered - force the unordered cases not to jump.
1024
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
1025
Jump result = makeBranch(ARMv7Assembler::ConditionNE);
1026
unordered.link(this);
1029
if (cond == DoubleEqualOrUnordered) {
1030
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
1031
Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
1032
unordered.link(this);
1033
// We get here if either unordered or equal.
1034
Jump result = jump();
1035
notEqual.link(this);
1038
return makeBranch(cond);
1041
enum BranchTruncateType { BranchIfTruncateFailed, BranchIfTruncateSuccessful };
1042
Jump branchTruncateDoubleToInt32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
1044
// Convert into dest.
1045
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
1046
m_assembler.vmov(dest, fpTempRegisterAsSingle());
1048
// Calculate 2x dest. If the value potentially underflowed, it will have
1049
// clamped to 0x80000000, so 2x dest is zero in this case. In the case of
1050
// overflow the result will be equal to -2.
1051
Jump underflow = branchAdd32(Zero, dest, dest, dataTempRegister);
1052
Jump noOverflow = branch32(NotEqual, dataTempRegister, TrustedImm32(-2));
1054
// For BranchIfTruncateSuccessful, we branch if 'noOverflow' jumps.
1055
underflow.link(this);
1056
if (branchType == BranchIfTruncateSuccessful)
1059
// We'll reach the current point in the code on failure, so plant a
1060
// jump here & link the success case.
1061
Jump failure = jump();
1062
noOverflow.link(this);
1066
Jump branchTruncateDoubleToUint32(FPRegisterID src, RegisterID dest, BranchTruncateType branchType = BranchIfTruncateFailed)
1068
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
1069
m_assembler.vmov(dest, fpTempRegisterAsSingle());
1071
Jump overflow = branch32(Equal, dest, TrustedImm32(0x7fffffff));
1072
Jump success = branch32(GreaterThanOrEqual, dest, TrustedImm32(0));
1073
overflow.link(this);
1075
if (branchType == BranchIfTruncateSuccessful)
1078
Jump failure = jump();
1083
// Result is undefined if the value is outside of the integer range.
1084
void truncateDoubleToInt32(FPRegisterID src, RegisterID dest)
1086
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
1087
m_assembler.vmov(dest, fpTempRegisterAsSingle());
1090
void truncateDoubleToUint32(FPRegisterID src, RegisterID dest)
1092
m_assembler.vcvt_floatingPointToUnsigned(fpTempRegisterAsSingle(), src);
1093
m_assembler.vmov(dest, fpTempRegisterAsSingle());
1096
// Convert 'src' to an integer, and places the resulting 'dest'.
1097
// If the result is not representable as a 32 bit value, branch.
1098
// May also branch for some values that are representable in 32 bits
1099
// (specifically, in this case, 0).
1100
void branchConvertDoubleToInt32(FPRegisterID src, RegisterID dest, JumpList& failureCases, FPRegisterID)
1102
m_assembler.vcvt_floatingPointToSigned(fpTempRegisterAsSingle(), src);
1103
m_assembler.vmov(dest, fpTempRegisterAsSingle());
1105
// Convert the integer result back to float & compare to the original value - if not equal or unordered (NaN) then jump.
1106
m_assembler.vcvt_signedToFloatingPoint(fpTempRegister, fpTempRegisterAsSingle());
1107
failureCases.append(branchDouble(DoubleNotEqualOrUnordered, src, fpTempRegister));
1109
// If the result is zero, it might have been -0.0, and the double comparison won't catch this!
1110
failureCases.append(branchTest32(Zero, dest));
1113
Jump branchDoubleNonZero(FPRegisterID reg, FPRegisterID)
1115
m_assembler.vcmpz(reg);
1117
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
1118
Jump result = makeBranch(ARMv7Assembler::ConditionNE);
1119
unordered.link(this);
1123
Jump branchDoubleZeroOrNaN(FPRegisterID reg, FPRegisterID)
1125
m_assembler.vcmpz(reg);
1127
Jump unordered = makeBranch(ARMv7Assembler::ConditionVS);
1128
Jump notEqual = makeBranch(ARMv7Assembler::ConditionNE);
1129
unordered.link(this);
1130
// We get here if either unordered or equal.
1131
Jump result = jump();
1132
notEqual.link(this);
1136
// Stack manipulation operations:
1138
// The ABI is assumed to provide a stack abstraction to memory,
1139
// containing machine word sized units of data. Push and pop
1140
// operations add and remove a single register sized unit of data
1141
// to or from the stack. Peek and poke operations read or write
1142
// values on the stack, without moving the current stack position.
1144
void pop(RegisterID dest)
1146
// store postindexed with writeback
1147
m_assembler.ldr(dest, ARMRegisters::sp, sizeof(void*), false, true);
1150
void push(RegisterID src)
1152
// store preindexed with writeback
1153
m_assembler.str(src, ARMRegisters::sp, -sizeof(void*), true, true);
1156
void push(Address address)
1158
load32(address, dataTempRegister);
1159
push(dataTempRegister);
1162
void push(TrustedImm32 imm)
1164
move(imm, dataTempRegister);
1165
push(dataTempRegister);
1168
// Register move operations:
1170
// Move values in registers.
1172
void move(TrustedImm32 imm, RegisterID dest)
1174
uint32_t value = imm.m_value;
1176
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(value);
1178
if (armImm.isValid())
1179
m_assembler.mov(dest, armImm);
1180
else if ((armImm = ARMThumbImmediate::makeEncodedImm(~value)).isValid())
1181
m_assembler.mvn(dest, armImm);
1183
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(value));
1184
if (value & 0xffff0000)
1185
m_assembler.movt(dest, ARMThumbImmediate::makeUInt16(value >> 16));
1189
void move(RegisterID src, RegisterID dest)
1192
m_assembler.mov(dest, src);
1195
void move(TrustedImmPtr imm, RegisterID dest)
1197
move(TrustedImm32(imm), dest);
1200
void swap(RegisterID reg1, RegisterID reg2)
1202
move(reg1, dataTempRegister);
1204
move(dataTempRegister, reg2);
1207
void signExtend32ToPtr(RegisterID src, RegisterID dest)
1212
void zeroExtend32ToPtr(RegisterID src, RegisterID dest)
1217
// Invert a relational condition, e.g. == becomes !=, < becomes >=, etc.
1218
static RelationalCondition invert(RelationalCondition cond)
1220
return static_cast<RelationalCondition>(cond ^ 1);
1228
static void replaceWithJump(CodeLocationLabel instructionStart, CodeLocationLabel destination)
1230
ARMv7Assembler::replaceWithJump(instructionStart.dataLocation(), destination.dataLocation());
1233
static ptrdiff_t maxJumpReplacementSize()
1235
return ARMv7Assembler::maxJumpReplacementSize();
1238
// Forwards / external control flow operations:
1240
// This set of jump and conditional branch operations return a Jump
1241
// object which may linked at a later point, allow forwards jump,
1242
// or jumps that will require external linkage (after the code has been
1245
// For branches, signed <, >, <= and >= are denoted as l, g, le, and ge
1246
// respecitvely, for unsigned comparisons the names b, a, be, and ae are
1247
// used (representing the names 'below' and 'above').
1249
// Operands to the comparision are provided in the expected order, e.g.
1250
// jle32(reg1, TrustedImm32(5)) will branch if the value held in reg1, when
1251
// treated as a signed 32bit value, is less than or equal to 5.
1253
// jz and jnz test whether the first operand is equal to zero, and take
1254
// an optional second operand of a mask under which to perform the test.
1257
// Should we be using TEQ for equal/not-equal?
1258
void compare32(RegisterID left, TrustedImm32 right)
1260
int32_t imm = right.m_value;
1262
m_assembler.tst(left, left);
1264
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm);
1265
if (armImm.isValid())
1266
m_assembler.cmp(left, armImm);
1267
else if ((armImm = ARMThumbImmediate::makeEncodedImm(-imm)).isValid())
1268
m_assembler.cmn(left, armImm);
1270
move(TrustedImm32(imm), dataTempRegister);
1271
m_assembler.cmp(left, dataTempRegister);
1276
void test32(RegisterID reg, TrustedImm32 mask)
1278
int32_t imm = mask.m_value;
1281
m_assembler.tst(reg, reg);
1283
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm);
1284
if (armImm.isValid())
1285
m_assembler.tst(reg, armImm);
1287
move(mask, dataTempRegister);
1288
m_assembler.tst(reg, dataTempRegister);
1294
Jump branch32(RelationalCondition cond, RegisterID left, RegisterID right)
1296
m_assembler.cmp(left, right);
1297
return Jump(makeBranch(cond));
1300
Jump branch32(RelationalCondition cond, RegisterID left, TrustedImm32 right)
1302
compare32(left, right);
1303
return Jump(makeBranch(cond));
1306
Jump branch32(RelationalCondition cond, RegisterID left, Address right)
1308
load32(right, dataTempRegister);
1309
return branch32(cond, left, dataTempRegister);
1312
Jump branch32(RelationalCondition cond, Address left, RegisterID right)
1314
load32(left, dataTempRegister);
1315
return branch32(cond, dataTempRegister, right);
1318
Jump branch32(RelationalCondition cond, Address left, TrustedImm32 right)
1320
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
1321
load32(left, addressTempRegister);
1322
return branch32(cond, addressTempRegister, right);
1325
Jump branch32(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1327
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
1328
load32(left, addressTempRegister);
1329
return branch32(cond, addressTempRegister, right);
1332
Jump branch32WithUnalignedHalfWords(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1334
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
1335
load32WithUnalignedHalfWords(left, addressTempRegister);
1336
return branch32(cond, addressTempRegister, right);
1339
Jump branch32(RelationalCondition cond, AbsoluteAddress left, RegisterID right)
1341
load32(left.m_ptr, dataTempRegister);
1342
return branch32(cond, dataTempRegister, right);
1345
Jump branch32(RelationalCondition cond, AbsoluteAddress left, TrustedImm32 right)
1347
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
1348
load32(left.m_ptr, addressTempRegister);
1349
return branch32(cond, addressTempRegister, right);
1352
Jump branch8(RelationalCondition cond, RegisterID left, TrustedImm32 right)
1354
compare32(left, right);
1355
return Jump(makeBranch(cond));
1358
Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right)
1360
ASSERT(!(0xffffff00 & right.m_value));
1361
// use addressTempRegister incase the branch8 we call uses dataTempRegister. :-/
1362
load8(left, addressTempRegister);
1363
return branch8(cond, addressTempRegister, right);
1366
Jump branch8(RelationalCondition cond, BaseIndex left, TrustedImm32 right)
1368
ASSERT(!(0xffffff00 & right.m_value));
1369
// use addressTempRegister incase the branch32 we call uses dataTempRegister. :-/
1370
load8(left, addressTempRegister);
1371
return branch32(cond, addressTempRegister, right);
1374
Jump branchTest32(ResultCondition cond, RegisterID reg, RegisterID mask)
1376
m_assembler.tst(reg, mask);
1377
return Jump(makeBranch(cond));
1380
Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
1383
return Jump(makeBranch(cond));
1386
Jump branchTest32(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
1388
// use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
1389
load32(address, addressTempRegister);
1390
return branchTest32(cond, addressTempRegister, mask);
1393
Jump branchTest32(ResultCondition cond, BaseIndex address, TrustedImm32 mask = TrustedImm32(-1))
1395
// use addressTempRegister incase the branchTest32 we call uses dataTempRegister. :-/
1396
load32(address, addressTempRegister);
1397
return branchTest32(cond, addressTempRegister, mask);
1400
Jump branchTest8(ResultCondition cond, Address address, TrustedImm32 mask = TrustedImm32(-1))
1402
// use addressTempRegister incase the branchTest8 we call uses dataTempRegister. :-/
1403
load8(address, addressTempRegister);
1404
return branchTest32(cond, addressTempRegister, mask);
1407
Jump branchTest8(ResultCondition cond, AbsoluteAddress address, TrustedImm32 mask = TrustedImm32(-1))
1409
// use addressTempRegister incase the branchTest8 we call uses dataTempRegister. :-/
1410
move(TrustedImmPtr(address.m_ptr), addressTempRegister);
1411
load8(Address(addressTempRegister), addressTempRegister);
1412
return branchTest32(cond, addressTempRegister, mask);
1415
void jump(RegisterID target)
1417
m_assembler.bx(target);
1420
// Address is a memory location containing the address to jump to
1421
void jump(Address address)
1423
load32(address, dataTempRegister);
1424
m_assembler.bx(dataTempRegister);
1427
void jump(AbsoluteAddress address)
1429
move(TrustedImmPtr(address.m_ptr), dataTempRegister);
1430
load32(Address(dataTempRegister), dataTempRegister);
1431
m_assembler.bx(dataTempRegister);
1435
// Arithmetic control flow operations:
1437
// This set of conditional branch operations branch based
1438
// on the result of an arithmetic operation. The operation
1439
// is performed as normal, storing the result.
1441
// * jz operations branch if the result is zero.
1442
// * jo operations branch if the (signed) arithmetic
1443
// operation caused an overflow to occur.
1445
Jump branchAdd32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
1447
m_assembler.add_S(dest, op1, op2);
1448
return Jump(makeBranch(cond));
1451
Jump branchAdd32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest)
1453
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
1454
if (armImm.isValid())
1455
m_assembler.add_S(dest, op1, armImm);
1457
move(imm, dataTempRegister);
1458
m_assembler.add_S(dest, op1, dataTempRegister);
1460
return Jump(makeBranch(cond));
1463
Jump branchAdd32(ResultCondition cond, RegisterID src, RegisterID dest)
1465
return branchAdd32(cond, dest, src, dest);
1468
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
1470
return branchAdd32(cond, dest, imm, dest);
1473
Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest)
1475
// Move the high bits of the address into addressTempRegister,
1476
// and load the value into dataTempRegister.
1477
move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
1478
m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
1481
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
1482
if (armImm.isValid())
1483
m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);
1485
// If the operand does not fit into an immediate then load it temporarily
1486
// into addressTempRegister; since we're overwriting addressTempRegister
1487
// we'll need to reload it with the high bits of the address afterwards.
1488
move(imm, addressTempRegister);
1489
m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);
1490
move(TrustedImmPtr(dest.m_ptr), addressTempRegister);
1493
// Store the result.
1494
m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt16(0));
1496
return Jump(makeBranch(cond));
1499
Jump branchMul32(ResultCondition cond, RegisterID src1, RegisterID src2, RegisterID dest)
1501
m_assembler.smull(dest, dataTempRegister, src1, src2);
1503
if (cond == Overflow) {
1504
m_assembler.asr(addressTempRegister, dest, 31);
1505
return branch32(NotEqual, addressTempRegister, dataTempRegister);
1508
return branchTest32(cond, dest);
1511
Jump branchMul32(ResultCondition cond, RegisterID src, RegisterID dest)
1513
return branchMul32(cond, src, dest, dest);
1516
Jump branchMul32(ResultCondition cond, TrustedImm32 imm, RegisterID src, RegisterID dest)
1518
move(imm, dataTempRegister);
1519
return branchMul32(cond, dataTempRegister, src, dest);
1522
Jump branchNeg32(ResultCondition cond, RegisterID srcDest)
1524
ARMThumbImmediate zero = ARMThumbImmediate::makeUInt12(0);
1525
m_assembler.sub_S(srcDest, zero, srcDest);
1526
return Jump(makeBranch(cond));
1529
Jump branchOr32(ResultCondition cond, RegisterID src, RegisterID dest)
1531
m_assembler.orr_S(dest, dest, src);
1532
return Jump(makeBranch(cond));
1535
Jump branchSub32(ResultCondition cond, RegisterID op1, RegisterID op2, RegisterID dest)
1537
m_assembler.sub_S(dest, op1, op2);
1538
return Jump(makeBranch(cond));
1541
Jump branchSub32(ResultCondition cond, RegisterID op1, TrustedImm32 imm, RegisterID dest)
1543
ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);
1544
if (armImm.isValid())
1545
m_assembler.sub_S(dest, op1, armImm);
1547
move(imm, dataTempRegister);
1548
m_assembler.sub_S(dest, op1, dataTempRegister);
1550
return Jump(makeBranch(cond));
1553
Jump branchSub32(ResultCondition cond, RegisterID src, RegisterID dest)
1555
return branchSub32(cond, dest, src, dest);
1558
Jump branchSub32(ResultCondition cond, TrustedImm32 imm, RegisterID dest)
1560
return branchSub32(cond, dest, imm, dest);
1563
void relativeTableJump(RegisterID index, int scale)
1565
ASSERT(scale >= 0 && scale <= 31);
1567
// dataTempRegister will point after the jump if index register contains zero
1568
move(ARMRegisters::pc, dataTempRegister);
1569
m_assembler.add(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(9));
1571
ShiftTypeAndAmount shift(SRType_LSL, scale);
1572
m_assembler.add(dataTempRegister, dataTempRegister, index, shift);
1573
jump(dataTempRegister);
1576
// Miscellaneous operations:
1578
void breakpoint(uint8_t imm = 0)
1580
m_assembler.bkpt(imm);
1583
ALWAYS_INLINE Call nearCall()
1585
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
1586
return Call(m_assembler.blx(dataTempRegister), Call::LinkableNear);
1589
ALWAYS_INLINE Call call()
1591
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
1592
return Call(m_assembler.blx(dataTempRegister), Call::Linkable);
1595
ALWAYS_INLINE Call call(RegisterID target)
1597
return Call(m_assembler.blx(target), Call::None);
1600
ALWAYS_INLINE Call call(Address address)
1602
load32(address, dataTempRegister);
1603
return Call(m_assembler.blx(dataTempRegister), Call::None);
1606
ALWAYS_INLINE void ret()
1608
m_assembler.bx(linkRegister);
1611
void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
1613
m_assembler.cmp(left, right);
1614
m_assembler.it(armV7Condition(cond), false);
1615
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
1616
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
1619
void compare32(RelationalCondition cond, Address left, RegisterID right, RegisterID dest)
1621
load32(left, dataTempRegister);
1622
compare32(cond, dataTempRegister, right, dest);
1625
void compare8(RelationalCondition cond, Address left, TrustedImm32 right, RegisterID dest)
1627
load8(left, addressTempRegister);
1628
compare32(cond, addressTempRegister, right, dest);
1631
void compare32(RelationalCondition cond, RegisterID left, TrustedImm32 right, RegisterID dest)
1633
compare32(left, right);
1634
m_assembler.it(armV7Condition(cond), false);
1635
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
1636
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
1640
// The mask should be optional... paerhaps the argument order should be
1641
// dest-src, operations always have a dest? ... possibly not true, considering
1642
// asm ops like test, or pseudo ops like pop().
1643
void test32(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
1645
load32(address, dataTempRegister);
1646
test32(dataTempRegister, mask);
1647
m_assembler.it(armV7Condition(cond), false);
1648
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
1649
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
1652
void test8(ResultCondition cond, Address address, TrustedImm32 mask, RegisterID dest)
1654
load8(address, dataTempRegister);
1655
test32(dataTempRegister, mask);
1656
m_assembler.it(armV7Condition(cond), false);
1657
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(1));
1658
m_assembler.mov(dest, ARMThumbImmediate::makeUInt16(0));
1661
ALWAYS_INLINE DataLabel32 moveWithPatch(TrustedImm32 imm, RegisterID dst)
1664
moveFixedWidthEncoding(imm, dst);
1665
return DataLabel32(this);
1668
ALWAYS_INLINE DataLabelPtr moveWithPatch(TrustedImmPtr imm, RegisterID dst)
1671
moveFixedWidthEncoding(TrustedImm32(imm), dst);
1672
return DataLabelPtr(this);
1675
ALWAYS_INLINE Jump branchPtrWithPatch(RelationalCondition cond, RegisterID left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
1677
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
1678
return branch32(cond, left, dataTempRegister);
1681
ALWAYS_INLINE Jump branchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
1683
load32(left, addressTempRegister);
1684
dataLabel = moveWithPatch(initialRightValue, dataTempRegister);
1685
return branch32(cond, addressTempRegister, dataTempRegister);
1688
PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right = TrustedImmPtr(0))
1690
m_makeJumpPatchable = true;
1691
Jump result = branch32(cond, left, TrustedImm32(right));
1692
m_makeJumpPatchable = false;
1693
return PatchableJump(result);
1696
PatchableJump patchableBranchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1))
1698
m_makeJumpPatchable = true;
1699
Jump result = branchTest32(cond, reg, mask);
1700
m_makeJumpPatchable = false;
1701
return PatchableJump(result);
1704
PatchableJump patchableBranch32(RelationalCondition cond, RegisterID reg, TrustedImm32 imm)
1706
m_makeJumpPatchable = true;
1707
Jump result = branch32(cond, reg, imm);
1708
m_makeJumpPatchable = false;
1709
return PatchableJump(result);
1712
PatchableJump patchableBranchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0))
1714
m_makeJumpPatchable = true;
1715
Jump result = branchPtrWithPatch(cond, left, dataLabel, initialRightValue);
1716
m_makeJumpPatchable = false;
1717
return PatchableJump(result);
1720
PatchableJump patchableJump()
1723
m_makeJumpPatchable = true;
1724
Jump result = jump();
1725
m_makeJumpPatchable = false;
1726
return PatchableJump(result);
1729
ALWAYS_INLINE DataLabelPtr storePtrWithPatch(TrustedImmPtr initialValue, ImplicitAddress address)
1731
DataLabelPtr label = moveWithPatch(initialValue, dataTempRegister);
1732
store32(dataTempRegister, address);
1735
ALWAYS_INLINE DataLabelPtr storePtrWithPatch(ImplicitAddress address) { return storePtrWithPatch(TrustedImmPtr(0), address); }
1738
ALWAYS_INLINE Call tailRecursiveCall()
1740
// Like a normal call, but don't link.
1741
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
1742
return Call(m_assembler.bx(dataTempRegister), Call::Linkable);
1745
ALWAYS_INLINE Call makeTailRecursiveCall(Jump oldJump)
1748
return tailRecursiveCall();
1752
int executableOffsetFor(int location)
1754
return m_assembler.executableOffsetFor(location);
1757
static FunctionPtr readCallTarget(CodeLocationCall call)
1759
return FunctionPtr(reinterpret_cast<void(*)()>(ARMv7Assembler::readCallTarget(call.dataLocation())));
1762
static bool canJumpReplacePatchableBranchPtrWithPatch() { return false; }
1764
static CodeLocationLabel startOfBranchPtrWithPatchOnRegister(CodeLocationDataLabelPtr label)
1766
const unsigned twoWordOpSize = 4;
1767
return label.labelAtOffset(-twoWordOpSize * 2);
1770
static void revertJumpReplacementToBranchPtrWithPatch(CodeLocationLabel instructionStart, RegisterID, void* initialValue)
1772
ARMv7Assembler::revertJumpTo_movT3(instructionStart.dataLocation(), dataTempRegister, ARMThumbImmediate::makeUInt16(reinterpret_cast<uintptr_t>(initialValue) & 0xffff));
1775
static CodeLocationLabel startOfPatchableBranchPtrWithPatchOnAddress(CodeLocationDataLabelPtr)
1777
UNREACHABLE_FOR_PLATFORM();
1778
return CodeLocationLabel();
1781
static void revertJumpReplacementToPatchableBranchPtrWithPatch(CodeLocationLabel, Address, void*)
1783
UNREACHABLE_FOR_PLATFORM();
1787
ALWAYS_INLINE Jump jump()
1789
m_assembler.label(); // Force nop-padding if we're in the middle of a watchpoint.
1790
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
1791
return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpNoConditionFixedSize : ARMv7Assembler::JumpNoCondition);
1794
ALWAYS_INLINE Jump makeBranch(ARMv7Assembler::Condition cond)
1796
m_assembler.label(); // Force nop-padding if we're in the middle of a watchpoint.
1797
m_assembler.it(cond, true, true);
1798
moveFixedWidthEncoding(TrustedImm32(0), dataTempRegister);
1799
return Jump(m_assembler.bx(dataTempRegister), m_makeJumpPatchable ? ARMv7Assembler::JumpConditionFixedSize : ARMv7Assembler::JumpCondition, cond);
1801
ALWAYS_INLINE Jump makeBranch(RelationalCondition cond) { return makeBranch(armV7Condition(cond)); }
1802
ALWAYS_INLINE Jump makeBranch(ResultCondition cond) { return makeBranch(armV7Condition(cond)); }
1803
ALWAYS_INLINE Jump makeBranch(DoubleCondition cond) { return makeBranch(armV7Condition(cond)); }
1805
ArmAddress setupArmAddress(BaseIndex address)
1807
if (address.offset) {
1808
ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset);
1810
m_assembler.add(addressTempRegister, address.base, imm);
1812
move(TrustedImm32(address.offset), addressTempRegister);
1813
m_assembler.add(addressTempRegister, addressTempRegister, address.base);
1816
return ArmAddress(addressTempRegister, address.index, address.scale);
1818
return ArmAddress(address.base, address.index, address.scale);
1821
ArmAddress setupArmAddress(Address address)
1823
if ((address.offset >= -0xff) && (address.offset <= 0xfff))
1824
return ArmAddress(address.base, address.offset);
1826
move(TrustedImm32(address.offset), addressTempRegister);
1827
return ArmAddress(address.base, addressTempRegister);
1830
ArmAddress setupArmAddress(ImplicitAddress address)
1832
if ((address.offset >= -0xff) && (address.offset <= 0xfff))
1833
return ArmAddress(address.base, address.offset);
1835
move(TrustedImm32(address.offset), addressTempRegister);
1836
return ArmAddress(address.base, addressTempRegister);
1839
RegisterID makeBaseIndexBase(BaseIndex address)
1841
if (!address.offset)
1842
return address.base;
1844
ARMThumbImmediate imm = ARMThumbImmediate::makeUInt12OrEncodedImm(address.offset);
1846
m_assembler.add(addressTempRegister, address.base, imm);
1848
move(TrustedImm32(address.offset), addressTempRegister);
1849
m_assembler.add(addressTempRegister, addressTempRegister, address.base);
1852
return addressTempRegister;
1855
void moveFixedWidthEncoding(TrustedImm32 imm, RegisterID dst)
1857
uint32_t value = imm.m_value;
1858
m_assembler.movT3(dst, ARMThumbImmediate::makeUInt16(value & 0xffff));
1859
m_assembler.movt(dst, ARMThumbImmediate::makeUInt16(value >> 16));
1862
ARMv7Assembler::Condition armV7Condition(RelationalCondition cond)
1864
return static_cast<ARMv7Assembler::Condition>(cond);
1867
ARMv7Assembler::Condition armV7Condition(ResultCondition cond)
1869
return static_cast<ARMv7Assembler::Condition>(cond);
1872
ARMv7Assembler::Condition armV7Condition(DoubleCondition cond)
1874
return static_cast<ARMv7Assembler::Condition>(cond);
1878
friend class LinkBuffer;
1879
friend class RepatchBuffer;
1881
static void linkCall(void* code, Call call, FunctionPtr function)
1883
ARMv7Assembler::linkCall(code, call.m_label, function.value());
1886
static void repatchCall(CodeLocationCall call, CodeLocationLabel destination)
1888
ARMv7Assembler::relinkCall(call.dataLocation(), destination.executableAddress());
1891
static void repatchCall(CodeLocationCall call, FunctionPtr destination)
1893
ARMv7Assembler::relinkCall(call.dataLocation(), destination.executableAddress());
1896
bool m_makeJumpPatchable;
1901
#endif // ENABLE(ASSEMBLER)
1903
#endif // MacroAssemblerARMv7_h