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Viewing changes to src/amd/vulkan/nir/radv_nir_lower_io.c

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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Lines of Context:
src/amd/vulkan/nir/radv_nir_lower_io.c
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   NIR_PASS(progress, nir, nir_lower_array_deref_of_vec, mask,
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            nir_lower_direct_array_deref_of_vec_load | nir_lower_indirect_array_deref_of_vec_load |
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               nir_lower_direct_array_deref_of_vec_store |
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               nir_lower_indirect_array_deref_of_vec_store);
 
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               nir_lower_direct_array_deref_of_vec_store | nir_lower_indirect_array_deref_of_vec_store);
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   NIR_PASS(progress, nir, nir_lower_io_to_scalar_early, mask);
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   if (progress) {
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      /* Optimize the new vector code and then remove dead vars */
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         NIR_PASS(_, nir, nir_opt_copy_prop_vars);
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      NIR_PASS(_, nir, nir_opt_dce);
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      NIR_PASS(_, nir, nir_remove_dead_variables,
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               nir_var_function_temp | nir_var_shader_in | nir_var_shader_out, NULL);
 
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      NIR_PASS(_, nir, nir_remove_dead_variables, nir_var_function_temp | nir_var_shader_in | nir_var_shader_out, NULL);
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   }
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}
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   if (nir->info.stage == MESA_SHADER_VERTEX) {
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      NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in, type_size_vec4, 0);
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      NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_vec4,
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               nir_lower_io_lower_64bit_to_32);
 
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      NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out, type_size_vec4, nir_lower_io_lower_64bit_to_32);
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   } else {
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      NIR_PASS(_, nir, nir_lower_io, nir_var_shader_in | nir_var_shader_out, type_size_vec4,
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               nir_lower_io_lower_64bit_to_32);
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                    info->vs.tcs_temp_only_input_mask);
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         return true;
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      } else if (info->vs.as_es) {
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         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, NULL,
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                    device->physical_device->rad_info.gfx_level, info->esgs_itemsize);
 
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         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, NULL, device->physical_device->rad_info.gfx_level,
 
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                    info->esgs_itemsize);
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         return true;
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      }
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   } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
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      NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, NULL, info->vs.tcs_in_out_eq);
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      NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, NULL,
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                 device->physical_device->rad_info.gfx_level, info->tcs.tes_reads_tess_factors,
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                 info->tcs.tes_inputs_read, info->tcs.tes_patch_inputs_read,
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                 info->tcs.num_linked_outputs, info->tcs.num_linked_patch_outputs, info->wave_size,
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                 false, false, true);
 
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      NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, NULL, device->physical_device->rad_info.gfx_level,
 
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                 info->tcs.tes_reads_tess_factors, info->tcs.tes_inputs_read, info->tcs.tes_patch_inputs_read,
 
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                 info->tcs.num_linked_outputs, info->tcs.num_linked_patch_outputs, info->wave_size, false, false, true);
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      return true;
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   } else if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
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      NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, NULL);
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      if (info->tes.as_es) {
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         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, NULL,
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                    device->physical_device->rad_info.gfx_level, info->esgs_itemsize);
 
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         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, NULL, device->physical_device->rad_info.gfx_level,
 
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                    info->esgs_itemsize);
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      }
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      return true;
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   } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {
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      NIR_PASS_V(nir, ac_nir_lower_gs_inputs_to_mem, NULL,
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                 device->physical_device->rad_info.gfx_level, false);
 
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      NIR_PASS_V(nir, ac_nir_lower_gs_inputs_to_mem, NULL, device->physical_device->rad_info.gfx_level, false);
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      return true;
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   } else if (nir->info.stage == MESA_SHADER_TASK) {
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      ac_nir_lower_task_outputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES,
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                                       device->physical_device->task_info.num_entries);
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      return true;
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   } else if (nir->info.stage == MESA_SHADER_MESH) {
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      ac_nir_lower_mesh_inputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES,
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                                      device->physical_device->task_info.num_entries);
 
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      ac_nir_lower_mesh_inputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES, device->physical_device->task_info.num_entries);
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      return true;
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   }
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