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Viewing changes to src/intel/compiler/brw_nir_clamp_per_vertex_loads.c

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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src/intel/compiler/brw_nir_clamp_per_vertex_loads.c
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/*
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 * Limit input per vertex input accesses. This is useful for the tesselation stages.
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 * On Gfx12.5+ out of bound accesses generate hangs.
 
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 *
 
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 * This pass operates on derefs, it must be called before shader inputs are
 
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 * lowered.
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 */
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#include "brw_nir.h"
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#include "compiler/nir/nir_builder.h"
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static bool
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lower_instr(nir_builder *b, nir_instr *instr, void *cb_data)
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{
 
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#include "compiler/nir/nir_deref.h"
 
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static bool
 
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clamp_per_vertex_loads_instr(nir_builder *b, nir_instr *instr, void *cb_data)
 
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{
 
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   if (instr->type != nir_instr_type_intrinsic)
 
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      return false;
 
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   nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
 
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   if (intrin->intrinsic != nir_intrinsic_load_deref)
 
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      return false;
 
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   nir_deref_instr *deref = nir_instr_as_deref(intrin->src[0].ssa->parent_instr);
 
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   nir_variable *var = nir_deref_instr_get_variable(deref);
 
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   if (var == NULL || (var->data.mode & nir_var_shader_in) == 0)
 
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      return false;
 
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   nir_deref_path path;
 
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   nir_deref_path_init(&path, deref, cb_data);
 
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   bool progress = false;
 
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   for (unsigned i = 0; path.path[i]; i++) {
 
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      if (path.path[i]->deref_type != nir_deref_type_array)
 
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         continue;
 
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      b->cursor = nir_before_instr(&path.path[i]->instr);
 
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      nir_instr_rewrite_src_ssa(&path.path[i]->instr,
 
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                                &path.path[i]->arr.index,
 
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                                nir_umin(b,
 
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                                         path.path[i]->arr.index.ssa,
 
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                                         nir_iadd_imm(b, nir_load_patch_vertices_in(b), -1)));
 
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      progress = true;
 
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      break;
 
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   }
 
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   nir_deref_path_finish(&path);
 
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   return progress;
 
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}
 
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bool
 
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brw_nir_clamp_per_vertex_loads(nir_shader *shader)
 
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{
 
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   void *mem_ctx = ralloc_context(NULL);
 
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   bool ret = nir_shader_instructions_pass(shader, clamp_per_vertex_loads_instr,
 
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                                           nir_metadata_block_index |
 
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                                           nir_metadata_dominance,
 
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                                           mem_ctx);
 
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   ralloc_free(mem_ctx);
 
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   return ret;
 
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}
 
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static bool
 
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lower_patch_vertices_instr(nir_builder *b, nir_instr *instr, void *cb_data)
 
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{
 
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   if (instr->type != nir_instr_type_intrinsic)
 
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      return false;
 
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   nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
 
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   if (intrin->intrinsic != nir_intrinsic_load_patch_vertices_in)
 
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      return false;
 
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   unsigned *input_vertices = cb_data;
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   if (instr->type != nir_instr_type_intrinsic)
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      return false;
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   nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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   if (intrin->intrinsic != nir_intrinsic_load_per_vertex_input)
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      return false;
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   b->cursor = nir_before_instr(instr);
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   nir_instr_rewrite_src_ssa(instr,
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                             &intrin->src[0],
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                             nir_imin(b, intrin->src[0].ssa,
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                                         nir_imm_int(b, *input_vertices - 1)));
 
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   nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_imm_int(b, *input_vertices));
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   return true;
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}
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bool
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brw_nir_clamp_per_vertex_loads(nir_shader *shader,
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                               unsigned input_vertices)
 
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brw_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertices)
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{
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   return nir_shader_instructions_pass(shader, lower_instr,
 
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   return nir_shader_instructions_pass(shader, lower_patch_vertices_instr,
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                                       nir_metadata_block_index |
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                                       nir_metadata_dominance,
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                                       &input_vertices);