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Viewing changes to src/freedreno/vulkan/tu_cmd_buffer.h

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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src/freedreno/vulkan/tu_cmd_buffer.h
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   TU_DRAW_STATE_DESC_SETS,
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   TU_DRAW_STATE_DESC_SETS_LOAD,
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   TU_DRAW_STATE_VS_PARAMS,
 
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   TU_DRAW_STATE_FS_PARAMS,
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   TU_DRAW_STATE_INPUT_ATTACHMENTS_GMEM,
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   TU_DRAW_STATE_INPUT_ATTACHMENTS_SYSMEM,
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   TU_DRAW_STATE_LRZ_AND_DEPTH_PLANE,
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enum tu_cmd_dirty_bits
55
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{
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   TU_CMD_DIRTY_VERTEX_BUFFERS = BIT(0),
57
 
   TU_CMD_DIRTY_VB_STRIDE = BIT(1),
58
 
   TU_CMD_DIRTY_RAST = BIT(2),
59
 
   TU_CMD_DIRTY_RB_DEPTH_CNTL = BIT(3),
60
 
   TU_CMD_DIRTY_RB_STENCIL_CNTL = BIT(4),
61
 
   TU_CMD_DIRTY_DESC_SETS = BIT(5),
62
 
   TU_CMD_DIRTY_COMPUTE_DESC_SETS = BIT(6),
63
 
   TU_CMD_DIRTY_SHADER_CONSTS = BIT(7),
64
 
   TU_CMD_DIRTY_LRZ = BIT(8),
65
 
   TU_CMD_DIRTY_VS_PARAMS = BIT(9),
66
 
   TU_CMD_DIRTY_PC_RASTER_CNTL = BIT(10),
67
 
   TU_CMD_DIRTY_VIEWPORTS = BIT(11),
68
 
   TU_CMD_DIRTY_BLEND = BIT(12),
69
 
   TU_CMD_DIRTY_PATCH_CONTROL_POINTS = BIT(13),
 
58
   TU_CMD_DIRTY_DESC_SETS = BIT(1),
 
59
   TU_CMD_DIRTY_COMPUTE_DESC_SETS = BIT(2),
 
60
   TU_CMD_DIRTY_SHADER_CONSTS = BIT(3),
 
61
   TU_CMD_DIRTY_LRZ = BIT(4),
 
62
   TU_CMD_DIRTY_VS_PARAMS = BIT(5),
 
63
   TU_CMD_DIRTY_TESS_PARAMS = BIT(6),
 
64
   TU_CMD_DIRTY_SUBPASS = BIT(7),
 
65
   TU_CMD_DIRTY_FDM = BIT(8),
 
66
   TU_CMD_DIRTY_PER_VIEW_VIEWPORT = BIT(9),
 
67
   TU_CMD_DIRTY_PIPELINE = BIT(10),
70
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   /* all draw states were disabled and need to be re-enabled: */
71
 
   TU_CMD_DIRTY_DRAW_STATE = BIT(14)
 
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   TU_CMD_DIRTY_DRAW_STATE = BIT(11)
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};
73
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/* There are only three cache domains we have to care about: the CCU, or
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   uint32_t draw_id;
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};
266
264
 
267
 
struct tu_primitive_params {
 
265
struct tu_tess_params {
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   bool valid;
269
 
   bool primitive_restart;
270
 
   bool provoking_vtx_last;
271
 
   bool tess_upper_left_domain_origin;
 
267
   enum a6xx_tess_output output_upper_left, output_lower_left;
 
268
   enum a6xx_tess_spacing spacing;
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};
273
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274
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/* This should be for state that is set inside a renderpass and used at
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   bool has_prim_generated_query_in_rp;
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   bool disable_gmem;
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   bool sysmem_single_prim_mode;
 
283
   bool shared_viewport;
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287
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   /* Track whether conditional predicate for COND_REG_EXEC is changed in draw_cs */
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   bool draw_cs_writes_to_cond_pred;
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{
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   uint32_t dirty;
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411
 
   struct tu_pipeline *pipeline;
412
 
   struct tu_pipeline *compute_pipeline;
 
409
   struct tu_graphics_pipeline *pipeline;
 
410
   struct tu_compute_pipeline *compute_pipeline;
413
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414
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   struct tu_render_pass_state rp;
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416
 
   /* Vertex buffers, viewports, and scissors
 
414
   struct vk_render_pass_state vk_rp;
 
415
   struct vk_vertex_input_state vi;
 
416
   struct vk_sample_locations_state sl;
 
417
 
 
418
   struct tu_bandwidth bandwidth;
 
419
 
 
420
   /* Vertex buffers
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    * the states for these can be updated partially, so we need to save these
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    * to be able to emit a complete draw state
419
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    */
420
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   struct {
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      uint64_t base;
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      uint32_t size;
423
 
      uint32_t stride;
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   } vb[MAX_VBS];
425
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426
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   uint32_t max_vbs_bound;
427
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428
 
   VkViewport viewport[MAX_VIEWPORTS];
429
 
   VkRect2D scissor[MAX_SCISSORS];
430
 
   uint32_t max_viewport, max_scissor;
431
 
 
432
 
   /* for dynamic states that can't be emitted directly */
433
 
   uint32_t dynamic_stencil_mask;
434
 
   uint32_t dynamic_stencil_wrmask;
435
 
   uint32_t dynamic_stencil_ref;
436
 
   bool stencil_front_write;
437
 
   bool stencil_back_write;
438
 
 
439
 
   uint32_t gras_su_cntl, gras_cl_cntl, rb_depth_cntl, rb_stencil_cntl;
440
 
   uint32_t pc_raster_cntl, vpc_unknown_9107;
441
 
   enum a6xx_polygon_mode polygon_mode;
442
 
   uint32_t rb_mrt_control[MAX_RTS], rb_mrt_blend_control[MAX_RTS];
443
 
   uint32_t rb_mrt_control_rop;
444
 
   uint32_t rb_blend_cntl, sp_blend_cntl;
445
 
   uint32_t pipeline_color_write_enable, blend_enable;
446
 
   uint32_t color_write_enable;
447
 
   bool logic_op_enabled;
448
 
   bool rop_reads_dst;
449
 
   bool alpha_to_coverage;
450
 
   enum pc_di_primtype primtype;
451
 
   bool primitive_restart_enable;
452
 
   bool tess_upper_left_domain_origin;
453
 
   bool provoking_vertex_last;
 
431
   bool per_view_viewport;
 
432
   bool pipeline_has_fdm;
454
433
 
455
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   /* saved states to re-emit in TU_CMD_DIRTY_DRAW_STATE case */
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   struct tu_draw_state dynamic_state[TU_DYNAMIC_STATE_COUNT];
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   struct tu_draw_state msaa;
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462
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   struct tu_draw_state vs_params;
 
442
   struct tu_draw_state fs_params;
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   /* Index buffer */
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   uint64_t index_va;
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   bool tessfactor_addr_set;
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   bool predication_active;
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   enum a5xx_line_mode line_mode;
519
 
   VkSampleCountFlagBits samples;
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   bool msaa_disable;
521
 
   bool z_negative_one_to_one;
522
 
 
523
 
   unsigned patch_control_points;
 
499
   bool blend_reads_dest;
 
500
   bool stencil_front_write;
 
501
   bool stencil_back_write;
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502
 
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   /* VK_QUERY_PIPELINE_STATISTIC_CLIPPING_INVOCATIONS_BIT and
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    * VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT are allowed to run simultaniously,
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   struct tu_vs_params last_vs_params;
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520
 
543
 
   struct tu_primitive_params last_prim_params;
 
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   struct tu_tess_params tess_params;
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   uint64_t descriptor_buffer_iova[MAX_SETS];
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};
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   struct list_head renderpass_autotune_results;
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   struct tu_autotune_results_buffer* autotune_buffer;
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   void *patchpoints_ctx;
 
540
   struct util_dynarray fdm_bin_patchpoints;
 
541
 
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   VkCommandBufferUsageFlags usage_flags;
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563
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   VkQueryPipelineStatisticFlags inherited_pipeline_statistics;
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   struct tu_descriptor_state descriptors[MAX_BIND_POINTS];
573
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574
 
   struct tu_render_pass_attachment dynamic_rp_attachments[2 * (MAX_RTS + 1)];
 
555
   struct tu_render_pass_attachment dynamic_rp_attachments[2 * (MAX_RTS + 1) + 1];
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   struct tu_subpass_attachment dynamic_color_attachments[MAX_RTS];
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   struct tu_subpass_attachment dynamic_resolve_attachments[MAX_RTS + 1];
577
 
   const struct tu_image_view *dynamic_attachments[2 * (MAX_RTS + 1)];
 
558
   const struct tu_image_view *dynamic_attachments[2 * (MAX_RTS + 1) + 1];
578
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579
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   struct tu_render_pass dynamic_pass;
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   struct tu_subpass dynamic_subpass;
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      struct u_trace_iterator trace_renderpass_start, trace_renderpass_end;
603
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604
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      struct tu_render_pass_state state;
 
586
 
 
587
      struct util_dynarray fdm_bin_patchpoints;
 
588
      void *patchpoints_ctx;
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   } pre_chain;
606
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607
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   uint32_t vsc_draw_strm_pitch;
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VkResult tu_cmd_buffer_begin(struct tu_cmd_buffer *cmd_buffer,
641
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                             const VkCommandBufferBeginInfo *pBeginInfo);
642
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627
void
 
628
tu_emit_cache_flush(struct tu_cmd_buffer *cmd_buffer);
 
629
 
643
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void tu_emit_cache_flush_renderpass(struct tu_cmd_buffer *cmd_buffer);
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void tu_emit_cache_flush_ccu(struct tu_cmd_buffer *cmd_buffer,
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void
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update_stencil_mask(uint32_t *value, VkStencilFaceFlags face, uint32_t mask);
693
680
 
 
681
typedef void (*tu_fdm_bin_apply_t)(struct tu_cs *cs, void *data, VkRect2D bin,
 
682
                                   unsigned views, VkExtent2D *frag_areas);
 
683
 
 
684
struct tu_fdm_bin_patchpoint {
 
685
   uint64_t iova;
 
686
   uint32_t size;
 
687
   void *data;
 
688
   tu_fdm_bin_apply_t apply;
 
689
};
 
690
 
 
691
static inline void
 
692
_tu_create_fdm_bin_patchpoint(struct tu_cmd_buffer *cmd,
 
693
                              struct tu_cs *cs,
 
694
                              unsigned size,
 
695
                              tu_fdm_bin_apply_t apply,
 
696
                              void *state,
 
697
                              unsigned state_size)
 
698
{
 
699
   void *data = ralloc_size(cmd->patchpoints_ctx, state_size);
 
700
   memcpy(data, state, state_size);
 
701
   assert(cs->writeable);
 
702
   tu_cs_reserve_space(cs, size);
 
703
   struct tu_fdm_bin_patchpoint patch = {
 
704
      .iova = tu_cs_get_cur_iova(cs),
 
705
      .size = size,
 
706
      .data = data,
 
707
      .apply = apply,
 
708
   };
 
709
 
 
710
   /* Apply the "default" setup where there is no scaling. This is used if
 
711
    * sysmem is required, and uses up the dwords that have been reserved.
 
712
    */
 
713
   unsigned num_views = MAX2(cmd->state.pass->num_views, 1);
 
714
   VkExtent2D unscaled_frag_areas[num_views];
 
715
   for (unsigned i = 0; i < num_views; i++) {
 
716
      unscaled_frag_areas[i] = (VkExtent2D) { 1, 1 };
 
717
   }
 
718
   apply(cs, state, (VkRect2D) {
 
719
         { 0, 0 },
 
720
         { MAX_VIEWPORT_SIZE, MAX_VIEWPORT_SIZE },
 
721
        }, num_views, unscaled_frag_areas);
 
722
   assert(tu_cs_get_cur_iova(cs) == patch.iova + patch.size * sizeof(uint32_t));
 
723
 
 
724
   util_dynarray_append(&cmd->fdm_bin_patchpoints,
 
725
                        struct tu_fdm_bin_patchpoint,
 
726
                        patch);
 
727
}
 
728
 
 
729
#define tu_create_fdm_bin_patchpoint(cmd, cs, size, apply, state) \
 
730
   _tu_create_fdm_bin_patchpoint(cmd, cs, size, apply, &state, sizeof(state))
 
731
 
694
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#endif /* TU_CMD_BUFFER_H */