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Viewing changes to src/gallium/drivers/r600/r600_pipe_common.c

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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src/gallium/drivers/r600/r600_pipe_common.c
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#include "r600_pipe_common.h"
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#include "r600_cs.h"
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#include "evergreen_compute.h"
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#include "tgsi/tgsi_parse.h"
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#include "util/list.h"
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#include "util/u_draw_quad.h"
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#include "util/u_memory.h"
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#include "util/format/u_format_s3tc.h"
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#include "util/u_upload_mgr.h"
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#include "util/os_time.h"
 
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#include "util/hex.h"
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#include "vl/vl_decoder.h"
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#include "vl/vl_video_buffer.h"
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#include "radeon_video.h"
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{
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        struct r600_common_context *rctx = (struct r600_common_context *)ctx;
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        return rctx->ws->ctx_query_reset_status(rctx->ctx, false, NULL);
 
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        return rctx->ws->ctx_query_reset_status(rctx->ctx, false, NULL, NULL);
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}
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static void r600_set_debug_callback(struct pipe_context *ctx,
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        { "tes", DBG_TES, "Print tessellation evaluation shaders" },
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        { "preoptir", DBG_PREOPT_IR, "Print the LLVM IR before initial optimizations" },
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        { "checkir", DBG_CHECK_IR, "Enable additional sanity checks on shader IR" },
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        { "use_tgsi", DBG_USE_TGSI, "Take TGSI directly instead of using NIR-to-TGSI"},
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        { "testdma", DBG_TEST_DMA, "Invoke SDMA tests and exit." },
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        { "testvmfaultcp", DBG_TEST_VMFAULT_CP, "Invoke a CP VM fault test and exit." },
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                return;
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        _mesa_sha1_final(&ctx, sha1);
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        disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
 
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        mesa_bytes_to_hex(cache_id, sha1, 20);
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        /* These flags affect shader compilation. */
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        uint64_t shader_debug_flags =
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                rscreen->debug_flags & DBG_USE_TGSI;
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        rscreen->disk_shader_cache =
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                disk_cache_create(r600_get_family_name(rscreen),
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                                  cache_id,
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                                  shader_debug_flags);
 
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                                  cache_id, 0);
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}
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static struct disk_cache *r600_get_disk_shader_cache(struct pipe_screen *pscreen)
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                }
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                return sizeof(uint32_t);
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        case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 
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        case PIPE_COMPUTE_CAP_MAX_SUBGROUPS:
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                break; /* unused */
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        case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 
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        case PIPE_COMPUTE_CAP_SUBGROUP_SIZES:
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                if (ret) {
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                        uint32_t *subgroup_size = ret;
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                        *subgroup_size = r600_wavefront_size(rscreen->family);
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                        return false;
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                /* Recompute the timeout after waiting. */
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                if (timeout && timeout != PIPE_TIMEOUT_INFINITE) {
 
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                if (timeout && timeout != OS_TIMEOUT_INFINITE) {
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                        int64_t time = os_time_get_nano();
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                        timeout = abs_timeout > time ? abs_timeout - time : 0;
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                }
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                        return false;
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                /* Recompute the timeout after all that. */
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                if (timeout && timeout != PIPE_TIMEOUT_INFINITE) {
 
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                if (timeout && timeout != OS_TIMEOUT_INFINITE) {
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                        int64_t time = os_time_get_nano();
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                        timeout = abs_timeout > time ? abs_timeout - time : 0;
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                }
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                .lower_cs_local_index_to_id = true,
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                .lower_uniforms_to_ubo = true,
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                .lower_image_offset_to_range_base = 1,
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                .vectorize_tess_levels = 1
 
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                .vectorize_tess_levels = 1,
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        };
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        rscreen->nir_options = nir_options;
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        if (rscreen->info.family < CHIP_CEDAR)
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                rscreen->nir_options.force_indirect_unrolling_sampler = true;
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   if (rscreen->info.gfx_level >= EVERGREEN) {
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      rscreen->nir_options.lower_bitfield_extract = true;
 
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        if (rscreen->info.gfx_level >= EVERGREEN) {
 
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                rscreen->nir_options.lower_bitfield_extract = true;
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                rscreen->nir_options.lower_bitfield_insert_to_bitfield_select = true;
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   }
 
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        }
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        if (rscreen->info.gfx_level < EVERGREEN) {
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                /* Pre-EG doesn't have these ALU ops */
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                rscreen->nir_options.lower_bit_count = true;
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                rscreen->nir_options.lower_bitfield_reverse = true;
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      rscreen->nir_options.lower_bitfield_insert_to_shifts = true;
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      rscreen->nir_options.lower_bitfield_extract_to_shifts = true;
 
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                rscreen->nir_options.lower_bitfield_insert_to_shifts = true;
 
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                rscreen->nir_options.lower_bitfield_extract_to_shifts = true;
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        }
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        if (rscreen->info.gfx_level < CAYMAN) {
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                        nir_lower_dtrunc;
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        }
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        if (rscreen->debug_flags & DBG_USE_TGSI) {
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                rscreen->nir_options.lower_fpow = false;
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                /* TGSI is vector, and NIR-to-TGSI doesn't like it when the
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                 * input vars have been scalarized.
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                 */
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                rscreen->nir_options.lower_to_scalar = false;
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                /* NIR-to-TGSI can't do fused integer csel, and it can't just
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                 * override the flag and get the code lowered back when we ask
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                 * it to handle it.
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                 */
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                rscreen->nir_options.has_fused_comp_and_csel = false;
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                /* r600 has a bitfield_select and bitfield_extract opcode
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                 * (called bfi/bfe), but TGSI's BFI/BFE isn't that.
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                 */
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                rscreen->nir_options.lower_bitfield_extract = false;
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                rscreen->nir_options.lower_bitfield_insert_to_bitfield_select = false;
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                /* TGSI's ifind is reversed from ours, keep it the TGSI way. */
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                rscreen->nir_options.lower_find_msb_to_reverse = false;
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        } else {
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      rscreen->nir_options.has_fmulz = true;
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   }
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        rscreen->nir_options_fs = rscreen->nir_options;
 
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        rscreen->nir_options_fs = rscreen->nir_options;
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        rscreen->nir_options_fs.lower_all_io_to_temps = true;
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        return true;