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Viewing changes to src/intel/dev/intel_device_info.h

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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Lines of Context:
src/intel/dev/intel_device_info.h
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   INTEL_PLATFORM_GROUP_START(DG2, INTEL_PLATFORM_DG2_G10),
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   INTEL_PLATFORM_DG2_G11,
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   INTEL_PLATFORM_GROUP_END(DG2, INTEL_PLATFORM_DG2_G12),
 
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   INTEL_PLATFORM_GROUP_START(ATSM, INTEL_PLATFORM_ATSM_G10),
 
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   INTEL_PLATFORM_GROUP_END(ATSM, INTEL_PLATFORM_ATSM_G11),
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   INTEL_PLATFORM_GROUP_START(MTL, INTEL_PLATFORM_MTL_M),
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   INTEL_PLATFORM_GROUP_END(MTL, INTEL_PLATFORM_MTL_P),
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};
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   (((platform) >= INTEL_PLATFORM_ ## platform_range ## _START) && \
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    ((platform) <= INTEL_PLATFORM_ ## platform_range ## _END))
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#define intel_device_info_is_atsm(devinfo) \
 
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   intel_platform_in_range((devinfo)->platform, ATSM)
 
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#define intel_device_info_is_dg2(devinfo) \
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   intel_platform_in_range((devinfo)->platform, DG2)
 
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   (intel_platform_in_range((devinfo)->platform, DG2) || \
 
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    intel_platform_in_range((devinfo)->platform, ATSM))
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#define intel_device_info_is_mtl(devinfo) \
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   intel_platform_in_range((devinfo)->platform, MTL)
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   bool has_mmap_offset;
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   bool has_userptr_probe;
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   bool has_context_isolation;
 
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   bool has_set_pat_uapi;
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   /**
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    * \name Intel hardware quirks
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      } sram, vram;
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   } mem;
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   struct {
 
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      uint8_t coherent;
 
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      uint8_t scanout;
 
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      uint8_t writeback;
 
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   } pat;
 
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   BITSET_DECLARE(workarounds, INTEL_WA_NUM);
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   /** @} */
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};
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#ifdef GFX_VERx10
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#define intel_needs_workaround(devinfo, id)         \
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   INTEL_WA_ ## id ## _GFX_VER &&                              \
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   BITSET_TEST(devinfo->workarounds, INTEL_WA_##id)
 
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   (INTEL_WA_ ## id ## _GFX_VER &&                              \
 
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    BITSET_TEST(devinfo->workarounds, INTEL_WA_##id))
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#else
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#define intel_needs_workaround(devinfo, id) \
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   BITSET_TEST(devinfo->workarounds, INTEL_WA_##id)