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Viewing changes to src/compiler/nir/nir_lower_alu_width.c

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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src/compiler/nir/nir_lower_alu_width.c
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nir_alu_ssa_dest_init(nir_alu_instr *alu, unsigned num_components,
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                      unsigned bit_size)
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{
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   nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components,
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                     bit_size, NULL);
 
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   nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, bit_size);
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   alu->dest.write_mask = (1 << num_components) - 1;
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}
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   case nir_op_vec4:
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   case nir_op_vec3:
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   case nir_op_vec2:
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   case nir_op_cube_face_coord_amd:
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   case nir_op_cube_face_index_amd:
 
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   case nir_op_cube_amd:
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      /* We don't need to scalarize these ops, they're the ones generated to
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       * group up outputs into a value that can be SSAed.
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       */