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Viewing changes to src/asahi/lib/agx_nir_lower_vbo.c

  • Committer: mmach
  • Date: 2023-11-02 21:31:35 UTC
  • Revision ID: netbit73@gmail.com-20231102213135-18d4tzh7tj0uz752
2023-11-02 22:11:57

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src/asahi/lib/agx_nir_lower_vbo.c
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 */
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#include "agx_nir_lower_vbo.h"
 
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#include "asahi/compiler/agx_internal_formats.h"
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#include "compiler/nir/nir_builder.h"
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#include "compiler/nir/nir_format_convert.h"
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#include "util/u_math.h"
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   unsigned stride_el = stride / interchange_align;
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   unsigned offset_el = offset / interchange_align;
 
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   unsigned shift = 0;
 
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   /* Try to use the small shift on the load itself when possible. This can save
 
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    * an instruction. Shifts are only available for regular interchange formats,
 
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    * i.e. the set of formats that support masking.
 
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    */
 
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   if (offset_el == 0 && (stride_el == 2 || stride_el == 4) &&
 
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       agx_internal_format_supports_mask(interchange_format)) {
 
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      shift = util_logbase2(stride_el);
 
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      stride_el = 1;
 
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   }
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   nir_ssa_def *stride_offset_el =
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      nir_iadd_imm(b, nir_imul_imm(b, el, stride_el), offset_el);
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   /* Load the raw vector */
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   nir_ssa_def *memory = nir_load_constant_agx(
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      b, interchange_comps, interchange_register_size, base, stride_offset_el,
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      .format = interchange_format);
 
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      .format = interchange_format, .base = shift);
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   unsigned dest_size = nir_dest_bit_size(intr->dest);
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