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* Copyright © 2022 Intel Corporation
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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#include "nir_builder.h"
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/* This pass updates the block index in the resource_intel intrinsics if the
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* array index is constant.
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* This pass must be run before anv_nir_compute_push_layout().
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update_resource_intel_block(nir_builder *b, nir_instr *instr, UNUSED void *data)
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if (instr->type != nir_instr_type_intrinsic)
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic != nir_intrinsic_resource_intel)
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/* If the array index in the descriptor binding is not const, we won't be
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* able to turn this load_ubo into a push constant.
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* Also if not pushable, set the block to 0xffffffff.
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* Otherwise we need to update the block index by adding the array index so
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* that when anv_nir_compute_push_layout() uses the block value it uses the
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* right surface in the array of the binding.
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if (!nir_src_is_const(intrin->src[2]) ||
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!(nir_intrinsic_resource_access_intel(intrin) &
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nir_resource_intel_pushable)) {
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nir_intrinsic_set_resource_block_intel(intrin, 0xffffffff);
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nir_intrinsic_set_resource_access_intel(
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nir_intrinsic_resource_access_intel(intrin) &
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~nir_resource_intel_pushable);
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nir_intrinsic_set_resource_block_intel(
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nir_intrinsic_resource_block_intel(intrin) +
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nir_src_as_uint(intrin->src[2]));
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anv_nir_update_resource_intel_block(nir_shader *shader)
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return nir_shader_instructions_pass(shader, update_resource_intel_block,
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intrinsic_dont_need_rewrite(nir_intrinsic_instr *instr)
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switch (instr->intrinsic) {
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case nir_intrinsic_load_ubo:
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case nir_intrinsic_load_ssbo:
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_image_load:
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case nir_intrinsic_image_store:
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case nir_intrinsic_image_atomic:
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case nir_intrinsic_image_atomic_swap:
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case nir_intrinsic_image_size:
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case nir_intrinsic_image_load_raw_intel:
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case nir_intrinsic_image_store_raw_intel:
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case nir_intrinsic_image_samples:
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case nir_intrinsic_bindless_image_load:
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case nir_intrinsic_bindless_image_store:
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case nir_intrinsic_bindless_image_atomic:
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case nir_intrinsic_bindless_image_atomic_swap:
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case nir_intrinsic_bindless_image_size:
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struct lower_resource_state {
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enum anv_descriptor_set_layout_type desc_type;
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const struct anv_physical_device *device;
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/* This pass lower resource_intel surface_index source, combining the
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* descriptor set offset with the surface offset in the descriptor set.
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* This pass must be run after anv_nir_compute_push_layout() because we want
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* the push constant selection to tell if the surface offset is constant. Once
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* combined the constant detection does not work anymore.
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lower_resource_intel(nir_builder *b, nir_instr *instr, void *data)
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if (instr->type != nir_instr_type_intrinsic)
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic != nir_intrinsic_resource_intel)
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const bool is_bindless =
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(nir_intrinsic_resource_access_intel(intrin) &
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nir_resource_intel_bindless) != 0;
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const bool is_sampler =
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(nir_intrinsic_resource_access_intel(intrin) &
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nir_resource_intel_sampler) != 0;
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const struct lower_resource_state *state = data;
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b->cursor = nir_before_instr(instr);
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nir_ssa_def *set_offset = intrin->src[0].ssa;
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nir_ssa_def *binding_offset = intrin->src[1].ssa;
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/* When using indirect descriptor, the surface handles are loaded from the
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* descriptor buffer and do not need any offset.
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if (state->desc_type == ANV_PIPELINE_DESCRIPTOR_SET_LAYOUT_TYPE_DIRECT) {
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if (!state->device->uses_ex_bso) {
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/* We're trying to reduce the number of instructions in the shaders
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* to compute surface handles. The assumption is that we're using
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* more surface handles than sampler handles (UBO, SSBO, images,
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* etc...) so it's worth optimizing that case.
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* Surface handles in the extended descriptor message have to be
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* shifted left by 6 prior to ex_bso (bits 31:12 in extended
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* descriptor, match bits 25:6 of the surface handle). We have to
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* combine 2 parts in the shader to build the final surface handle,
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* base offset of the descriptor set (in the push constant, located
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* in resource_intel::src[0]) and the relative descriptor offset
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* (resource_intel::src[1]).
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* For convenience, up to here, resource_intel::src[1] is in bytes.
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* We now have to shift it left by 6 to match the shifted left by 6
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* done for the push constant value provided in
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* resource_intel::src[0]. That way the shader can just do a single
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* ADD and get the surface handle.
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* Samplers have a 4Gb heap and in the message they're in bits 31:6
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* of the component 3 of the sampler message header. But since we
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* push only a single offset for the base offset of the descriptor
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* set, resource_intel::src[0] has to be shifted right by 6 (bringing
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set_offset = nir_ushr_imm(b, set_offset, 6);
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binding_offset = nir_ishl_imm(b, binding_offset, 6);
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nir_instr_rewrite_src_ssa(instr, &intrin->src[1],
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nir_iadd(b, set_offset, binding_offset));
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/* Now unused values : set offset, array index */
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nir_instr_rewrite_src_ssa(instr, &intrin->src[0], nir_imm_int(b, 0xdeaddeed));
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nir_instr_rewrite_src_ssa(instr, &intrin->src[2], nir_imm_int(b, 0xdeaddeed));
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anv_nir_lower_resource_intel(nir_shader *shader,
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const struct anv_physical_device *device,
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enum anv_descriptor_set_layout_type desc_type)
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struct lower_resource_state state = {
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.desc_type = desc_type,
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return nir_shader_instructions_pass(shader, lower_resource_intel,
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nir_metadata_block_index |
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nir_metadata_dominance,
added
removed
src/intel/vulkan/anv_nir_lower_resource_intel.c
