2
* PKUnity Multi-Media Card and Security Digital Card (MMC/SD) Registers
5
* Clock Control Reg SDC_CCR
7
#define SDC_CCR (PKUNITY_SDC_BASE + 0x0000)
9
* Software Reset Reg SDC_SRR
11
#define SDC_SRR (PKUNITY_SDC_BASE + 0x0004)
13
* Argument Reg SDC_ARGUMENT
15
#define SDC_ARGUMENT (PKUNITY_SDC_BASE + 0x0008)
17
* Command Reg SDC_COMMAND
19
#define SDC_COMMAND (PKUNITY_SDC_BASE + 0x000C)
21
* Block Size Reg SDC_BLOCKSIZE
23
#define SDC_BLOCKSIZE (PKUNITY_SDC_BASE + 0x0010)
25
* Block Cound Reg SDC_BLOCKCOUNT
27
#define SDC_BLOCKCOUNT (PKUNITY_SDC_BASE + 0x0014)
29
* Transfer Mode Reg SDC_TMR
31
#define SDC_TMR (PKUNITY_SDC_BASE + 0x0018)
33
* Response Reg. 0 SDC_RES0
35
#define SDC_RES0 (PKUNITY_SDC_BASE + 0x001C)
37
* Response Reg. 1 SDC_RES1
39
#define SDC_RES1 (PKUNITY_SDC_BASE + 0x0020)
41
* Response Reg. 2 SDC_RES2
43
#define SDC_RES2 (PKUNITY_SDC_BASE + 0x0024)
45
* Response Reg. 3 SDC_RES3
47
#define SDC_RES3 (PKUNITY_SDC_BASE + 0x0028)
49
* Read Timeout Control Reg SDC_RTCR
51
#define SDC_RTCR (PKUNITY_SDC_BASE + 0x002C)
53
* Interrupt Status Reg SDC_ISR
55
#define SDC_ISR (PKUNITY_SDC_BASE + 0x0030)
57
* Interrupt Status Mask Reg SDC_ISMR
59
#define SDC_ISMR (PKUNITY_SDC_BASE + 0x0034)
63
#define SDC_RXFIFO (PKUNITY_SDC_BASE + 0x0038)
67
#define SDC_TXFIFO (PKUNITY_SDC_BASE + 0x003C)
70
* SD Clock Enable SDC_CCR_CLKEN
72
#define SDC_CCR_CLKEN FIELD(1, 1, 2)
74
* [15:8] SDC_CCR_PDIV(v)
76
#define SDC_CCR_PDIV(v) FIELD((v), 8, 8)
79
* Software reset enable SDC_SRR_ENABLE
81
#define SDC_SRR_ENABLE FIELD(0, 1, 0)
83
* Software reset disable SDC_SRR_DISABLE
85
#define SDC_SRR_DISABLE FIELD(1, 1, 0)
88
* Response type SDC_COMMAND_RESTYPE_MASK
90
#define SDC_COMMAND_RESTYPE_MASK FMASK(2, 0)
92
* No response SDC_COMMAND_RESTYPE_NONE
94
#define SDC_COMMAND_RESTYPE_NONE FIELD(0, 2, 0)
96
* 136-bit long response SDC_COMMAND_RESTYPE_LONG
98
#define SDC_COMMAND_RESTYPE_LONG FIELD(1, 2, 0)
100
* 48-bit short response SDC_COMMAND_RESTYPE_SHORT
102
#define SDC_COMMAND_RESTYPE_SHORT FIELD(2, 2, 0)
104
* 48-bit short and test if busy response SDC_COMMAND_RESTYPE_SHORTBUSY
106
#define SDC_COMMAND_RESTYPE_SHORTBUSY FIELD(3, 2, 0)
108
* data ready SDC_COMMAND_DATAREADY
110
#define SDC_COMMAND_DATAREADY FIELD(1, 1, 2)
111
#define SDC_COMMAND_CMDEN FIELD(1, 1, 3)
113
* [10:5] SDC_COMMAND_CMDINDEX(v)
115
#define SDC_COMMAND_CMDINDEX(v) FIELD((v), 6, 5)
118
* [10:0] SDC_BLOCKSIZE_BSMASK(v)
120
#define SDC_BLOCKSIZE_BSMASK(v) FIELD((v), 11, 0)
122
* [11:0] SDC_BLOCKCOUNT_BCMASK(v)
124
#define SDC_BLOCKCOUNT_BCMASK(v) FIELD((v), 12, 0)
127
* Data Width 1bit SDC_TMR_WTH_1BIT
129
#define SDC_TMR_WTH_1BIT FIELD(0, 1, 0)
131
* Data Width 4bit SDC_TMR_WTH_4BIT
133
#define SDC_TMR_WTH_4BIT FIELD(1, 1, 0)
135
* Read SDC_TMR_DIR_READ
137
#define SDC_TMR_DIR_READ FIELD(0, 1, 1)
139
* Write SDC_TMR_DIR_WRITE
141
#define SDC_TMR_DIR_WRITE FIELD(1, 1, 1)
143
#define SDC_IR_MASK FMASK(13, 0)
144
#define SDC_IR_RESTIMEOUT FIELD(1, 1, 0)
145
#define SDC_IR_WRITECRC FIELD(1, 1, 1)
146
#define SDC_IR_READCRC FIELD(1, 1, 2)
147
#define SDC_IR_TXFIFOREAD FIELD(1, 1, 3)
148
#define SDC_IR_RXFIFOWRITE FIELD(1, 1, 4)
149
#define SDC_IR_READTIMEOUT FIELD(1, 1, 5)
150
#define SDC_IR_DATACOMPLETE FIELD(1, 1, 6)
151
#define SDC_IR_CMDCOMPLETE FIELD(1, 1, 7)
152
#define SDC_IR_RXFIFOFULL FIELD(1, 1, 8)
153
#define SDC_IR_RXFIFOEMPTY FIELD(1, 1, 9)
154
#define SDC_IR_TXFIFOFULL FIELD(1, 1, 10)
155
#define SDC_IR_TXFIFOEMPTY FIELD(1, 1, 11)
156
#define SDC_IR_ENDCMDWITHRES FIELD(1, 1, 12)