85
89
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
86
90
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
87
91
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
88
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
89
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
90
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
91
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
92
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
92
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
93
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
94
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
95
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
96
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
97
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
98
{PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
93
99
{PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
94
100
PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
109
115
{0x3249103C, "Smart Array P812", &SA5_access},
110
116
{0x324a103C, "Smart Array P712m", &SA5_access},
111
117
{0x324b103C, "Smart Array P711m", &SA5_access},
112
{0x3250103C, "Smart Array", &SA5_access},
113
{0x3250113C, "Smart Array", &SA5_access},
114
{0x3250123C, "Smart Array", &SA5_access},
115
{0x3250133C, "Smart Array", &SA5_access},
116
{0x3250143C, "Smart Array", &SA5_access},
118
{0x3350103C, "Smart Array", &SA5_access},
119
{0x3351103C, "Smart Array", &SA5_access},
120
{0x3352103C, "Smart Array", &SA5_access},
121
{0x3353103C, "Smart Array", &SA5_access},
122
{0x3354103C, "Smart Array", &SA5_access},
123
{0x3355103C, "Smart Array", &SA5_access},
124
{0x3356103C, "Smart Array", &SA5_access},
117
125
{0xFFFF103C, "Unknown Smart Array", &SA5_access},
147
155
static int hpsa_slave_alloc(struct scsi_device *sdev);
148
156
static void hpsa_slave_destroy(struct scsi_device *sdev);
150
static ssize_t raid_level_show(struct device *dev,
151
struct device_attribute *attr, char *buf);
152
static ssize_t lunid_show(struct device *dev,
153
struct device_attribute *attr, char *buf);
154
static ssize_t unique_id_show(struct device *dev,
155
struct device_attribute *attr, char *buf);
156
static ssize_t host_show_firmware_revision(struct device *dev,
157
struct device_attribute *attr, char *buf);
158
158
static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
159
static ssize_t host_store_rescan(struct device *dev,
160
struct device_attribute *attr, const char *buf, size_t count);
161
159
static int check_for_unit_attention(struct ctlr_info *h,
162
160
struct CommandList *c);
163
161
static void check_ioctl_unit_attention(struct ctlr_info *h,
173
171
static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
174
172
unsigned long *memory_bar);
175
173
static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
177
static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
178
static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
179
static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
180
static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
181
static DEVICE_ATTR(firmware_revision, S_IRUGO,
182
host_show_firmware_revision, NULL);
184
static struct device_attribute *hpsa_sdev_attrs[] = {
185
&dev_attr_raid_level,
191
static struct device_attribute *hpsa_shost_attrs[] = {
193
&dev_attr_firmware_revision,
197
static struct scsi_host_template hpsa_driver_template = {
198
.module = THIS_MODULE,
201
.queuecommand = hpsa_scsi_queue_command,
202
.scan_start = hpsa_scan_start,
203
.scan_finished = hpsa_scan_finished,
204
.change_queue_depth = hpsa_change_queue_depth,
206
.use_clustering = ENABLE_CLUSTERING,
207
.eh_device_reset_handler = hpsa_eh_device_reset_handler,
209
.slave_alloc = hpsa_slave_alloc,
210
.slave_destroy = hpsa_slave_destroy,
212
.compat_ioctl = hpsa_compat_ioctl,
214
.sdev_attrs = hpsa_sdev_attrs,
215
.shost_attrs = hpsa_shost_attrs,
174
static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
175
void __iomem *vaddr, int wait_for_ready);
176
#define BOARD_NOT_READY 0
177
#define BOARD_READY 1
218
179
static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
291
252
fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
294
/* Enqueuing and dequeuing functions for cmdlists. */
295
static inline void addQ(struct hlist_head *list, struct CommandList *c)
297
hlist_add_head(&c->list, list);
300
static inline u32 next_command(struct ctlr_info *h)
304
if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
305
return h->access.command_completed(h);
307
if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
308
a = *(h->reply_pool_head); /* Next cmd in ring buffer */
309
(h->reply_pool_head)++;
310
h->commands_outstanding--;
314
/* Check for wraparound */
315
if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
316
h->reply_pool_head = h->reply_pool;
317
h->reply_pool_wraparound ^= 1;
322
/* set_performant_mode: Modify the tag for cciss performant
323
* set bit 0 for pull model, bits 3-1 for block fetch
326
static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
328
if (likely(h->transMethod == CFGTBL_Trans_Performant))
329
c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
332
static void enqueue_cmd_and_start_io(struct ctlr_info *h,
333
struct CommandList *c)
337
set_performant_mode(h, c);
338
spin_lock_irqsave(&h->lock, flags);
342
spin_unlock_irqrestore(&h->lock, flags);
345
static inline void removeQ(struct CommandList *c)
347
if (WARN_ON(hlist_unhashed(&c->list)))
349
hlist_del_init(&c->list);
352
static inline int is_hba_lunid(unsigned char scsi3addr[])
354
return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
255
static ssize_t host_show_commands_outstanding(struct device *dev,
256
struct device_attribute *attr, char *buf)
258
struct Scsi_Host *shost = class_to_shost(dev);
259
struct ctlr_info *h = shost_to_hba(shost);
261
return snprintf(buf, 20, "%d\n", h->commands_outstanding);
264
static ssize_t host_show_transport_mode(struct device *dev,
265
struct device_attribute *attr, char *buf)
268
struct Scsi_Host *shost = class_to_shost(dev);
270
h = shost_to_hba(shost);
271
return snprintf(buf, 20, "%s\n",
272
h->transMethod & CFGTBL_Trans_Performant ?
273
"performant" : "simple");
276
/* List of controllers which cannot be reset on kexec with reset_devices */
277
static u32 unresettable_controller[] = {
278
0x324a103C, /* Smart Array P712m */
279
0x324b103C, /* SmartArray P711m */
280
0x3223103C, /* Smart Array P800 */
281
0x3234103C, /* Smart Array P400 */
282
0x3235103C, /* Smart Array P400i */
283
0x3211103C, /* Smart Array E200i */
284
0x3212103C, /* Smart Array E200 */
285
0x3213103C, /* Smart Array E200i */
286
0x3214103C, /* Smart Array E200i */
287
0x3215103C, /* Smart Array E200i */
288
0x3237103C, /* Smart Array E500 */
289
0x323D103C, /* Smart Array P700m */
290
0x409C0E11, /* Smart Array 6400 */
291
0x409D0E11, /* Smart Array 6400 EM */
294
static int ctlr_is_resettable(struct ctlr_info *h)
298
for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
299
if (unresettable_controller[i] == h->board_id)
304
static ssize_t host_show_resettable(struct device *dev,
305
struct device_attribute *attr, char *buf)
308
struct Scsi_Host *shost = class_to_shost(dev);
310
h = shost_to_hba(shost);
311
return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h));
357
314
static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
459
407
sn[12], sn[13], sn[14], sn[15]);
410
static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
411
static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
412
static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
413
static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
414
static DEVICE_ATTR(firmware_revision, S_IRUGO,
415
host_show_firmware_revision, NULL);
416
static DEVICE_ATTR(commands_outstanding, S_IRUGO,
417
host_show_commands_outstanding, NULL);
418
static DEVICE_ATTR(transport_mode, S_IRUGO,
419
host_show_transport_mode, NULL);
420
static DEVICE_ATTR(resettable, S_IRUGO,
421
host_show_resettable, NULL);
423
static struct device_attribute *hpsa_sdev_attrs[] = {
424
&dev_attr_raid_level,
430
static struct device_attribute *hpsa_shost_attrs[] = {
432
&dev_attr_firmware_revision,
433
&dev_attr_commands_outstanding,
434
&dev_attr_transport_mode,
435
&dev_attr_resettable,
439
static struct scsi_host_template hpsa_driver_template = {
440
.module = THIS_MODULE,
443
.queuecommand = hpsa_scsi_queue_command,
444
.scan_start = hpsa_scan_start,
445
.scan_finished = hpsa_scan_finished,
446
.change_queue_depth = hpsa_change_queue_depth,
448
.use_clustering = ENABLE_CLUSTERING,
449
.eh_device_reset_handler = hpsa_eh_device_reset_handler,
451
.slave_alloc = hpsa_slave_alloc,
452
.slave_destroy = hpsa_slave_destroy,
454
.compat_ioctl = hpsa_compat_ioctl,
456
.sdev_attrs = hpsa_sdev_attrs,
457
.shost_attrs = hpsa_shost_attrs,
461
/* Enqueuing and dequeuing functions for cmdlists. */
462
static inline void addQ(struct list_head *list, struct CommandList *c)
464
list_add_tail(&c->list, list);
467
static inline u32 next_command(struct ctlr_info *h)
471
if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
472
return h->access.command_completed(h);
474
if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
475
a = *(h->reply_pool_head); /* Next cmd in ring buffer */
476
(h->reply_pool_head)++;
477
h->commands_outstanding--;
481
/* Check for wraparound */
482
if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
483
h->reply_pool_head = h->reply_pool;
484
h->reply_pool_wraparound ^= 1;
489
/* set_performant_mode: Modify the tag for cciss performant
490
* set bit 0 for pull model, bits 3-1 for block fetch
493
static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
495
if (likely(h->transMethod & CFGTBL_Trans_Performant))
496
c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
499
static void enqueue_cmd_and_start_io(struct ctlr_info *h,
500
struct CommandList *c)
504
set_performant_mode(h, c);
505
spin_lock_irqsave(&h->lock, flags);
509
spin_unlock_irqrestore(&h->lock, flags);
512
static inline void removeQ(struct CommandList *c)
514
if (WARN_ON(list_empty(&c->list)))
516
list_del_init(&c->list);
519
static inline int is_hba_lunid(unsigned char scsi3addr[])
521
return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
524
static inline int is_scsi_rev_5(struct ctlr_info *h)
526
if (!h->hba_inquiry_data)
528
if ((h->hba_inquiry_data[2] & 0x07) == 5)
462
533
static int hpsa_find_target_lun(struct ctlr_info *h,
463
534
unsigned char scsi3addr[], int bus, int *target, int *lun)
2433
2513
buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2434
2514
if (buff == NULL)
2435
2515
return -EFAULT;
2437
if (iocommand.Request.Type.Direction == XFER_WRITE) {
2438
/* Copy the data into the buffer we created */
2439
if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
2516
if (iocommand.Request.Type.Direction == XFER_WRITE) {
2517
/* Copy the data into the buffer we created */
2518
if (copy_from_user(buff, iocommand.buf,
2519
iocommand.buf_size)) {
2524
memset(buff, 0, iocommand.buf_size);
2444
memset(buff, 0, iocommand.buf_size);
2445
2527
c = cmd_special_alloc(h);
2446
2528
if (c == NULL) {
2868
2944
static inline u32 hpsa_tag_contains_index(u32 tag)
2870
#define DIRECT_LOOKUP_BIT 0x10
2871
2946
return tag & DIRECT_LOOKUP_BIT;
2874
2949
static inline u32 hpsa_tag_to_index(u32 tag)
2876
#define DIRECT_LOOKUP_SHIFT 5
2877
2951
return tag >> DIRECT_LOOKUP_SHIFT;
2880
static inline u32 hpsa_tag_discard_error_bits(u32 tag)
2955
static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
2882
#define HPSA_ERROR_BITS 0x03
2883
return tag & ~HPSA_ERROR_BITS;
2957
#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
2958
#define HPSA_SIMPLE_ERROR_BITS 0x03
2959
if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
2960
return tag & ~HPSA_SIMPLE_ERROR_BITS;
2961
return tag & ~HPSA_PERF_ERROR_BITS;
2886
2964
/* process completion of an indexed ("direct lookup") command */
3055
3135
#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
3056
3136
#define hpsa_noop(p) hpsa_message(p, 3, 0)
3058
static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
3060
/* the #defines are stolen from drivers/pci/msi.h. */
3061
#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
3062
#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
3067
pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
3069
pci_read_config_word(pdev, msi_control_reg(pos), &control);
3070
if (control & PCI_MSI_FLAGS_ENABLE) {
3071
dev_info(&pdev->dev, "resetting MSI\n");
3072
pci_write_config_word(pdev, msi_control_reg(pos),
3073
control & ~PCI_MSI_FLAGS_ENABLE);
3077
pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3079
pci_read_config_word(pdev, msi_control_reg(pos), &control);
3080
if (control & PCI_MSIX_FLAGS_ENABLE) {
3081
dev_info(&pdev->dev, "resetting MSI-X\n");
3082
pci_write_config_word(pdev, msi_control_reg(pos),
3083
control & ~PCI_MSIX_FLAGS_ENABLE);
3090
3138
static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3091
3139
void * __iomem vaddr, bool use_doorbell)
3162
3210
* pci_set_power_state(pci_dev, PCI_D0);
3163
3211
* pci_restore_state(pci_dev);
3165
* but we can't use these nice canned kernel routines on
3166
* kexec, because they also check the MSI/MSI-X state in PCI
3167
* configuration space and do the wrong thing when it is
3168
* set/cleared. Also, the pci_save/restore_state functions
3169
* violate the ordering requirements for restoring the
3170
* configuration space from the CCISS document (see the
3171
* comment below). So we roll our own ....
3173
3213
* For controllers newer than the P600, the pci power state
3174
3214
* method of resetting doesn't work so we have another way
3175
3215
* using the doorbell register.
3182
3222
* likely not be happy. Just forbid resetting this conjoined mess.
3183
3223
* The 640x isn't really supported by hpsa anyway.
3185
hpsa_lookup_board_id(pdev, &board_id);
3225
rc = hpsa_lookup_board_id(pdev, &board_id);
3227
dev_warn(&pdev->dev, "Not resetting device.\n");
3186
3230
if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
3187
3231
return -ENOTSUPP;
3189
for (i = 0; i < 32; i++)
3190
pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
3233
/* Save the PCI command register */
3234
pci_read_config_word(pdev, 4, &command_register);
3235
/* Turn the board off. This is so that later pci_restore_state()
3236
* won't turn the board on before the rest of config space is ready.
3238
pci_disable_device(pdev);
3239
pci_save_state(pdev);
3193
3241
/* find the first memory BAR, so we can find the cfg table */
3194
3242
rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3214
3262
misc_fw_support = readl(&cfgtable->misc_fw_support);
3215
3263
use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3217
/* The doorbell reset seems to cause lockups on some Smart
3218
* Arrays (e.g. P410, P410i, maybe others). Until this is
3219
* fixed or at least isolated, avoid the doorbell reset.
3223
3265
rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3225
3267
goto unmap_cfgtable;
3227
/* Restore the PCI configuration space. The Open CISS
3228
* Specification says, "Restore the PCI Configuration
3229
* Registers, offsets 00h through 60h. It is important to
3230
* restore the command register, 16-bits at offset 04h,
3231
* last. Do not restore the configuration status register,
3232
* 16-bits at offset 06h." Note that the offset is 2*i.
3234
for (i = 0; i < 32; i++) {
3235
if (i == 2 || i == 3)
3237
pci_write_config_word(pdev, 2*i, saved_config_space[i]);
3269
pci_restore_state(pdev);
3270
rc = pci_enable_device(pdev);
3272
dev_warn(&pdev->dev, "failed to enable device.\n");
3273
goto unmap_cfgtable;
3240
pci_write_config_word(pdev, 4, saved_config_space[2]);
3275
pci_write_config_word(pdev, 4, command_register);
3242
3277
/* Some devices (notably the HP Smart Array 5i Controller)
3243
3278
need a little pause here */
3244
3279
msleep(HPSA_POST_RESET_PAUSE_MSECS);
3281
/* Wait for board to become not ready, then ready. */
3282
dev_info(&pdev->dev, "Waiting for board to become ready.\n");
3283
rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3285
dev_warn(&pdev->dev,
3286
"failed waiting for board to become not ready\n");
3287
rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3289
dev_warn(&pdev->dev,
3290
"failed waiting for board to become ready\n");
3291
goto unmap_cfgtable;
3293
dev_info(&pdev->dev, "board ready.\n");
3246
3295
/* Controller should be in simple mode at this point. If it's not,
3247
3296
* It means we're on one of those controllers which doesn't support
3248
3297
* the doorbell reset method and on which the PCI power management reset
3249
3298
* method doesn't work (P800, for example.)
3250
* In those cases, pretend the reset worked and hope for the best.
3299
* In those cases, don't try to proceed, as it generally doesn't work.
3252
3301
active_transport = readl(&cfgtable->TransportActive);
3253
3302
if (active_transport & PERFORMANT_MODE) {
3254
3303
dev_warn(&pdev->dev, "Unable to successfully reset controller,"
3255
" proceeding anyway.\n");
3304
" Ignoring controller.\n");
3259
3308
unmap_cfgtable:
3438
3487
return -ENODEV;
3441
static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
3490
static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3491
void __iomem *vaddr, int wait_for_ready)
3444
3494
u32 scratchpad;
3496
iterations = HPSA_BOARD_READY_ITERATIONS;
3498
iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
3446
for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
3447
scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
3448
if (scratchpad == HPSA_FIRMWARE_READY)
3500
for (i = 0; i < iterations; i++) {
3501
scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3502
if (wait_for_ready) {
3503
if (scratchpad == HPSA_FIRMWARE_READY)
3506
if (scratchpad != HPSA_FIRMWARE_READY)
3450
3509
msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3452
dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
3511
dev_warn(&pdev->dev, "board not ready, timed out.\n");
3453
3512
return -ENODEV;
3571
3635
static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
3639
unsigned long flags;
3575
3641
/* under certain very rare conditions, this can take awhile.
3576
3642
* (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3577
3643
* as we enter this code.)
3579
3645
for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3580
if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3646
spin_lock_irqsave(&h->lock, flags);
3647
doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3648
spin_unlock_irqrestore(&h->lock, flags);
3649
if (!(doorbell_value & CFGTBL_ChangeReq))
3582
3651
/* delay and try again */
3652
usleep_range(10000, 20000);
3777
3848
h->access.set_intr_mask(h, HPSA_INTR_OFF);
3779
3850
if (h->msix_vector || h->msi_vector)
3780
rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
3851
rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_msi,
3781
3852
IRQF_DISABLED, h->devname, h);
3783
rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
3854
rc = request_irq(h->intr[h->intr_mode], do_hpsa_intr_intx,
3784
3855
IRQF_DISABLED, h->devname, h);
3786
3857
dev_err(&pdev->dev, "unable to get irq %d for %s\n",
3787
h->intr[PERF_MODE_INT], h->devname);
3858
h->intr[h->intr_mode], h->devname);
3791
3862
dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3792
3863
h->devname, pdev->device,
3793
h->intr[PERF_MODE_INT], dac ? "" : " not");
3864
h->intr[h->intr_mode], dac ? "" : " not");
3795
3866
h->cmd_pool_bits =
3796
3867
kmalloc(((h->nr_cmds + BITS_PER_LONG -