227
228
dev->caps.stat_rate_support = dev_cap->stat_rate_support;
228
229
dev->caps.udp_rss = dev_cap->udp_rss;
229
230
dev->caps.loopback_support = dev_cap->loopback_support;
231
dev->caps.vep_uc_steering = dev_cap->vep_uc_steering;
232
dev->caps.vep_mc_steering = dev_cap->vep_mc_steering;
233
dev->caps.wol = dev_cap->wol;
230
234
dev->caps.max_gso_sz = dev_cap->max_gso_sz;
232
236
dev->caps.log_num_macs = log_num_mac;
718
722
mlx4_free_icm(dev, priv->fw.aux_icm, 0);
725
static int map_bf_area(struct mlx4_dev *dev)
727
struct mlx4_priv *priv = mlx4_priv(dev);
728
resource_size_t bf_start;
729
resource_size_t bf_len;
732
bf_start = pci_resource_start(dev->pdev, 2) + (dev->caps.num_uars << PAGE_SHIFT);
733
bf_len = pci_resource_len(dev->pdev, 2) - (dev->caps.num_uars << PAGE_SHIFT);
734
priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len);
735
if (!priv->bf_mapping)
741
static void unmap_bf_area(struct mlx4_dev *dev)
743
if (mlx4_priv(dev)->bf_mapping)
744
io_mapping_free(mlx4_priv(dev)->bf_mapping);
721
747
static void mlx4_close_hca(struct mlx4_dev *dev)
723
750
mlx4_CLOSE_HCA(dev, 0);
724
751
mlx4_free_icms(dev);
725
752
mlx4_UNMAP_FA(dev);
772
799
goto err_stop_fw;
802
if (map_bf_area(dev))
803
mlx4_dbg(dev, "Failed to map blue flame area\n");
775
805
init_hca.log_uar_sz = ilog2(dev->caps.num_uars);
777
807
err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size);
915
946
for (port = 1; port <= dev->caps.num_ports; port++) {
947
enum mlx4_port_type port_type = 0;
948
mlx4_SENSE_PORT(dev, port, &port_type);
950
dev->caps.port_type[port] = port_type;
916
951
ib_port_default_caps = 0;
917
952
err = mlx4_get_port_ib_caps(dev, port, &ib_port_default_caps);
970
1006
struct mlx4_priv *priv = mlx4_priv(dev);
971
1007
struct msix_entry *entries;
1008
int nreq = min_t(int, dev->caps.num_ports *
1009
min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT)
1010
+ MSIX_LEGACY_SZ, MAX_MSIX);
977
1015
nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs,
978
num_possible_cpus() + 1);
979
1017
entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL);
1001
dev->caps.num_comp_vectors = nreq - 1;
1040
MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) {
1041
/*Working in legacy mode , all EQ's shared*/
1042
dev->caps.comp_pool = 0;
1043
dev->caps.num_comp_vectors = nreq - 1;
1045
dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ;
1046
dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1;
1002
1048
for (i = 0; i < nreq; ++i)
1003
1049
priv->eq_table.eq[i].irq = entries[i].vector;
1049
1096
device_remove_file(&info->dev->pdev->dev, &info->port_attr);
1099
static int mlx4_init_steering(struct mlx4_dev *dev)
1101
struct mlx4_priv *priv = mlx4_priv(dev);
1102
int num_entries = dev->caps.num_ports;
1105
priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL);
1109
for (i = 0; i < num_entries; i++) {
1110
for (j = 0; j < MLX4_NUM_STEERS; j++) {
1111
INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]);
1112
INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]);
1114
INIT_LIST_HEAD(&priv->steer[i].high_prios);
1119
static void mlx4_clear_steering(struct mlx4_dev *dev)
1121
struct mlx4_priv *priv = mlx4_priv(dev);
1122
struct mlx4_steer_index *entry, *tmp_entry;
1123
struct mlx4_promisc_qp *pqp, *tmp_pqp;
1124
int num_entries = dev->caps.num_ports;
1127
for (i = 0; i < num_entries; i++) {
1128
for (j = 0; j < MLX4_NUM_STEERS; j++) {
1129
list_for_each_entry_safe(pqp, tmp_pqp,
1130
&priv->steer[i].promisc_qps[j],
1132
list_del(&pqp->list);
1135
list_for_each_entry_safe(entry, tmp_entry,
1136
&priv->steer[i].steer_entries[j],
1138
list_del(&entry->list);
1139
list_for_each_entry_safe(pqp, tmp_pqp,
1142
list_del(&pqp->list);
1052
1152
static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1054
1154
struct mlx4_priv *priv;
1212
/* Allow large DMA segments, up to the firmware limit of 1 GB */
1213
dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024);
1112
1215
priv = kzalloc(sizeof *priv, GFP_KERNEL);
1114
1217
dev_err(&pdev->dev, "Device struct alloc failed, "
1127
1230
INIT_LIST_HEAD(&priv->pgdir_list);
1128
1231
mutex_init(&priv->pgdir_mutex);
1233
pci_read_config_byte(pdev, PCI_REVISION_ID, &dev->rev_id);
1235
INIT_LIST_HEAD(&priv->bf_list);
1236
mutex_init(&priv->bf_mutex);
1131
1239
* Now reset the HCA before we touch the PCI capabilities or
1132
1240
* attempt a firmware command, since a boot ROM may have left
1152
1260
goto err_close;
1262
priv->msix_ctl.pool_bm = 0;
1263
spin_lock_init(&priv->msix_ctl.pool_lock);
1154
1265
mlx4_enable_msi_x(dev);
1267
err = mlx4_init_steering(dev);
1156
1271
err = mlx4_setup_hca(dev);
1157
1272
if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X)) {
1158
1273
dev->flags &= ~MLX4_FLAG_MSI_X;