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#ifndef _MBX_SH_H
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#define _MBX_SH_H
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#define MBX_CLASS_MSK 0xFC00 /* Class bits are 10 thru 15 */
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#define MBX_VALUE_MSK 0x03FF /* Value is 0 thru 9 */
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#define MBX_DEH_CLASS 0x0000 /* DEH owns Mbx INTR */
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#define MBX_DDMA_CLASS 0x0400 /* DSP-DMA link drvr chnls owns INTR */
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#define MBX_PCPY_CLASS 0x0800 /* PROC-COPY " */
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#define MBX_ZCPY_CLASS 0x1000 /* ZERO-COPY " */
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#define MBX_PM_CLASS 0x2000 /* Power Management */
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#define MBX_DBG_CLASS 0x4000 /* For debugging purpose */
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#define MBX_DEH_USERS_BASE 0x100 /* 256 */
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#define MBX_DEH_LIMIT 0x3FF /* 1023 */
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#define MBX_DEH_RESET 0x101 /* DSP RESET (DEH) */
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#define MBX_DEH_EMMU 0X103 /*DSP MMU FAULT RECOVERY */
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* Link driver command/status codes.
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#define MBX_DDMA_NUMCHNLBITS 5 /* # chnl Id: # bits available */
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#define MBX_DDMA_CHNLSHIFT 0 /* # of bits to shift */
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#define MBX_DDMA_CHNLMSK 0x01F /* bits 0 thru 4 */
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#define MBX_DDMA_NUMBUFBITS 5 /* buffer index: # of bits avail */
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#define MBX_DDMA_BUFSHIFT (MBX_DDMA_NUMCHNLBITS + MBX_DDMA_CHNLSHIFT)
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#define MBX_DDMA_BUFMSK 0x3E0 /* bits 5 thru 9 */
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#define MBX_ZCPY_NUMCHNLBITS 5 /* # chnl Id: # bits available */
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#define MBX_ZCPY_CHNLSHIFT 0 /* # of bits to shift */
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#define MBX_ZCPY_CHNLMSK 0x01F /* bits 0 thru 4 */
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/* Power Management Commands */
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#define MBX_PM_DSPIDLE (MBX_PM_CLASS + 0x0)
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#define MBX_PM_DSPWAKEUP (MBX_PM_CLASS + 0x1)
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#define MBX_PM_EMERGENCYSLEEP (MBX_PM_CLASS + 0x2)
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#define MBX_PM_SLEEPUNTILRESTART (MBX_PM_CLASS + 0x3)
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#define MBX_PM_DSPGLOBALIDLE_OFF (MBX_PM_CLASS + 0x4)
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#define MBX_PM_DSPGLOBALIDLE_ON (MBX_PM_CLASS + 0x5)
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#define MBX_PM_SETPOINT_PRENOTIFY (MBX_PM_CLASS + 0x6)
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#define MBX_PM_SETPOINT_POSTNOTIFY (MBX_PM_CLASS + 0x7)
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#define MBX_PM_DSPRETN (MBX_PM_CLASS + 0x8)
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#define MBX_PM_DSPRETENTION (MBX_PM_CLASS + 0x8)
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#define MBX_PM_DSPHIBERNATE (MBX_PM_CLASS + 0x9)
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#define MBX_PM_HIBERNATE_EN (MBX_PM_CLASS + 0xA)
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#define MBX_PM_OPP_REQ (MBX_PM_CLASS + 0xB)
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#define MBX_PM_OPP_CHG (MBX_PM_CLASS + 0xC)
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#define MBX_PM_TYPE_MASK 0x0300
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#define MBX_PM_TYPE_PWR_CHNG 0x0100
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#define MBX_PM_TYPE_OPP_PRECHNG 0x0200
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#define MBX_PM_TYPE_OPP_POSTCHNG 0x0300
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#define MBX_PM_TYPE_OPP_MASK 0x0300
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#define MBX_PM_OPP_PRECHNG (MBX_PM_CLASS | MBX_PM_TYPE_OPP_PRECHNG)
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#define MBX_PM_OPP_CHNG(OPP) (MBX_PM_CLASS | MBX_PM_TYPE_OPP_PRECHNG | (OPP))
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#define MBX_PM_RET (MBX_PM_CLASS | MBX_PM_TYPE_PWR_CHNG | 0x0006)
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#define MBX_PM_HIB (MBX_PM_CLASS | MBX_PM_TYPE_PWR_CHNG | 0x0002)
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#define MBX_PM_OPP1 0
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#define MBX_PM_OPP2 1
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#define MBX_PM_OPP3 2
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#define MBX_PM_OPP4 3
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/* Bridge Debug Commands */
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#define MBX_DBG_SYSPRINTF (MBX_DBG_CLASS + 0x0)