~ubuntu-branches/ubuntu/lucid/sdlmame/lucid

« back to all changes in this revision

Viewing changes to src/emu/cpu/i8085/i8085.c

  • Committer: Bazaar Package Importer
  • Author(s): Cesare Falco
  • Date: 2009-11-03 17:10:15 UTC
  • mfrom: (1.1.5 upstream)
  • Revision ID: james.westby@ubuntu.com-20091103171015-6hop4ory5lxnumpn
Tags: 0.135-0ubuntu1
* New upstream release - Closes (LP: #403212)
* debian/watch: unstable releases are no longer detected
* mame.ini: added the cheat subdirectories to cheatpath so zipped
  cheatfiles will be searched too
* renamed crsshair subdirectory to crosshair to reflect upstream change
* mame.ini: renamed references to crosshair subdirectory (see above)

Show diffs side-by-side

added added

removed removed

Lines of Context:
120
120
 *
121
121
 * - Flag setting fix for some instructions and cycle count update
122
122
 *
 
123
 * August 2009, hap
 
124
 *
 
125
 * - removed DAA table
 
126
 * - fixed accidental double memory reads due to macro overuse
 
127
 * - fixed cycle deduction on unconditional CALL / RET
 
128
 * - added cycle tables and cleaned up big switch source layout (1 tab = 4 spaces)
 
129
 * - removed HLT cycle eating (earlier, HLT after EI could theoretically fail)
 
130
 * - fixed parity flag on add/sub/cmp
 
131
 * - renamed temp register XX to official name WZ
 
132
 * - renamed flags from Z80 style S Z Y H X V N C  to  S Z X5 H X3 P V C, and
 
133
 *   fixed X5 / V flags where accidentally broken due to flag names confusion
 
134
 *
 
135
 * 21-Aug-2009, Curt Coder
 
136
 *
 
137
 * - added 8080A variant
 
138
 * - refactored callbacks to use devcb
 
139
 *
123
140
 *****************************************************************************/
124
141
 
125
142
#include "debugger.h"
126
143
#include "i8085.h"
127
144
#include "i8085cpu.h"
128
 
#include "i8085daa.h"
129
145
 
130
146
#define VERBOSE 0
131
147
 
144
160
struct _i8085_state
145
161
{
146
162
        i8085_config            config;
 
163
 
 
164
        devcb_resolved_write8           out_status_func;
 
165
        devcb_resolved_write_line       out_inte_func;
 
166
        devcb_resolved_read_line        in_sid_func;
 
167
        devcb_resolved_write_line       out_sod_func;
 
168
 
147
169
        int                             cputype;                /* 0 8080, 1 8085A */
148
 
        PAIR                            PC,SP,AF,BC,DE,HL,XX;
 
170
        PAIR                            PC,SP,AF,BC,DE,HL,WZ;
149
171
        UINT8                           HALT;
150
172
        UINT8                           IM;                     /* interrupt mask (8085A only) */
151
173
        UINT8                           STATUS;                 /* status word */
227
249
    STATIC TABLES
228
250
***************************************************************************/
229
251
 
 
252
/* cycles lookup */
 
253
static const UINT8 lut_cycles_8080[256]={
 
254
/*      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  */
 
255
/* 0 */ 4, 10,7, 5, 5, 5, 7, 4, 4, 10,7, 5, 5, 5, 7, 4,
 
256
/* 1 */ 4, 10,7, 5, 5, 5, 7, 4, 4, 10,7, 5, 5, 5, 7, 4,
 
257
/* 2 */ 4, 10,16,5, 5, 5, 7, 4, 4, 10,16,5, 5, 5, 7, 4,
 
258
/* 3 */ 4, 10,13,5, 10,10,10,4, 4, 10,13,5, 5, 5, 7, 4,
 
259
/* 4 */ 5, 5, 5, 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 7, 5,
 
260
/* 5 */ 5, 5, 5, 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 7, 5,
 
261
/* 6 */ 5, 5, 5, 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 7, 5,
 
262
/* 7 */ 7, 7, 7, 7, 7, 7, 7, 7, 5, 5, 5, 5, 5, 5, 7, 5,
 
263
/* 8 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
264
/* 9 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
265
/* A */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
266
/* B */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
267
/* C */ 5, 10,10,10,11,11,7, 11,5, 10,10,10,11,11,7, 11,
 
268
/* D */ 5, 10,10,10,11,11,7, 11,5, 10,10,10,11,11,7, 11,
 
269
/* E */ 5, 10,10,18,11,11,7, 11,5, 5, 10,5, 11,11,7, 11,
 
270
/* F */ 5, 10,10,4, 11,11,7, 11,5, 5, 10,4, 11,11,7, 11 };
 
271
static const UINT8 lut_cycles_8085[256]={
 
272
/*      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  */
 
273
/* 0 */ 4, 10,7, 6, 4, 4, 7, 4, 10,10,7, 6, 4, 4, 7, 4,
 
274
/* 1 */ 7, 10,7, 6, 4, 4, 7, 4, 10,10,7, 6, 4, 4, 7, 4,
 
275
/* 2 */ 7, 10,16,6, 4, 4, 7, 4, 10,10,16,6, 4, 4, 7, 4,
 
276
/* 3 */ 7, 10,13,6, 10,10,10,4, 10,10,13,6, 4, 4, 7, 4,
 
277
/* 4 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
278
/* 5 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
279
/* 6 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
280
/* 7 */ 7, 7, 7, 7, 7, 7, 5, 7, 4, 4, 4, 4, 4, 4, 7, 4,
 
281
/* 8 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
282
/* 9 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
283
/* A */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
284
/* B */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
 
285
/* C */ 6, 10,10,10,11,12,7, 12,6, 10,10,12,11,11,7, 12,
 
286
/* D */ 6, 10,10,10,11,12,7, 12,6, 10,10,10,11,10,7, 12,
 
287
/* E */ 6, 10,10,16,11,12,7, 12,6, 6, 10,5, 11,10,7, 12,
 
288
/* F */ 6, 10,10,4, 11,12,7, 12,6, 6, 10,4, 11,10,7, 12 };
 
289
 
 
290
/* special cases (partially taken care of elsewhere):
 
291
               base c    taken?   not taken?
 
292
M_RET  8080    5         +6(11)   -0            (conditional)
 
293
M_RET  8085    6         +6(12)   -0            (conditional)
 
294
M_JMP  8080    10        +0       -0
 
295
M_JMP  8085    10        +0       -3(7)
 
296
M_CALL 8080    11        +6(17)   -0
 
297
M_CALL 8085    11        +7(18)   -2(9)
 
298
 
 
299
*/
 
300
static UINT8 lut_cycles[256];
 
301
 
 
302
/* flags lookup */
230
303
static UINT8 ZS[256];
231
304
static UINT8 ZSP[256];
232
305
 
259
332
        if (state != 0 && cpustate->sod_state == 0)
260
333
        {
261
334
                cpustate->sod_state = 1;
262
 
                if (cpustate->config.sod != NULL)
263
 
                        (*cpustate->config.sod)(cpustate->device, 1);
 
335
                devcb_call_write_line(&cpustate->out_sod_func, cpustate->sod_state);
264
336
        }
265
337
        else if (state == 0 && cpustate->sod_state != 0)
266
338
        {
267
339
                cpustate->sod_state = 0;
268
 
                if (cpustate->config.sod != NULL)
269
 
                        (*cpustate->config.sod)(cpustate->device, 0);
 
340
                devcb_call_write_line(&cpustate->out_sod_func, cpustate->sod_state);
270
341
        }
271
342
}
272
343
 
276
347
        if (state != 0 && (cpustate->IM & IM_IE) == 0)
277
348
        {
278
349
                cpustate->IM |= IM_IE;
279
 
                if (cpustate->config.inte != NULL)
280
 
                        (*cpustate->config.inte)(cpustate->device, 1);
 
350
                devcb_call_write_line(&cpustate->out_inte_func, 1);
281
351
        }
282
352
        else if (state == 0 && (cpustate->IM & IM_IE) != 0)
283
353
        {
284
354
                cpustate->IM &= ~IM_IE;
285
 
                if (cpustate->config.inte != NULL)
286
 
                        (*cpustate->config.inte)(cpustate->device, 0);
 
355
                devcb_call_write_line(&cpustate->out_inte_func, 0);
287
356
        }
288
357
}
289
358
 
290
359
 
291
360
INLINE void set_status(i8085_state *cpustate, UINT8 status)
292
361
{
293
 
        if (status != cpustate->STATUS && cpustate->config.status != NULL)
294
 
                (*cpustate->config.status)(cpustate->device, status);
 
362
        if (status != cpustate->STATUS)
 
363
                devcb_call_write8(&cpustate->out_status_func, 0, status);
 
364
 
295
365
        cpustate->STATUS = status;
296
366
}
297
367
 
299
369
INLINE UINT8 get_rim_value(i8085_state *cpustate)
300
370
{
301
371
        UINT8 result = cpustate->IM;
 
372
        int sid = devcb_call_read_line(&cpustate->in_sid_func);
302
373
 
303
374
        /* copy live RST5.5 and RST6.5 states */
304
375
        result &= ~(IM_I65 | IM_I55);
305
 
        if (cpustate->irq_state[I8085_RST65_LINE] && !(cpustate->IM & IM_M65))
306
 
                result |= IM_I65;
307
 
        if (cpustate->irq_state[I8085_RST55_LINE] && !(cpustate->IM & IM_M55))
308
 
                result |= IM_I55;
 
376
        if (cpustate->irq_state[I8085_RST65_LINE]) result |= IM_I65;
 
377
        if (cpustate->irq_state[I8085_RST55_LINE]) result |= IM_I55;
309
378
 
310
379
        /* fetch the SID bit if we have a callback */
311
 
        if (cpustate->config.sid != NULL)
312
 
                result = (result & 0x7f) | ((*cpustate->config.sid)(cpustate->device) ? 0x80 : 0);
 
380
        result = (result & 0x7f) | (sid ? 0x80 : 0);
 
381
 
313
382
        return result;
314
383
}
315
384
 
451
520
                        case 0xcd0000:  /* CALL nnnn */
452
521
                                cpustate->icount -= 7;
453
522
                                M_PUSH(PC);
454
 
 
455
523
                        case 0xc30000:  /* JMP  nnnn */
456
524
                                cpustate->icount -= 10;
457
525
                                cpustate->PC.d = vector & 0xffff;
468
536
 
469
537
static void execute_one(i8085_state *cpustate, int opcode)
470
538
{
 
539
        cpustate->icount -= lut_cycles[opcode];
 
540
 
471
541
        switch (opcode)
472
542
        {
473
 
                case 0x00: cpustate->icount -= 4;       /* NOP  */
474
 
                        /* no op */
475
 
                        break;
476
 
                case 0x01: cpustate->icount -= 10;      /* LXI  B,nnnn */
477
 
                        cpustate->BC.w.l = ARG16(cpustate);
478
 
                        break;
479
 
                case 0x02: cpustate->icount -= 7;       /* STAX B */
480
 
                        WM(cpustate, cpustate->BC.d, cpustate->AF.b.h);
481
 
                        break;
482
 
                case 0x03: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* INX  B */
483
 
                        cpustate->BC.w.l++;
484
 
                        if (IS_8085(cpustate))
485
 
                        {
486
 
                                if (cpustate->BC.w.l == 0x0000) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
487
 
                        }
488
 
                        break;
489
 
                case 0x04: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  B */
490
 
                        M_INR(cpustate->BC.b.h);
491
 
                        break;
492
 
                case 0x05: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  B */
493
 
                        M_DCR(cpustate->BC.b.h);
494
 
                        break;
495
 
                case 0x06: cpustate->icount -= 7;       /* MVI  B,nn */
496
 
                        M_MVI(cpustate->BC.b.h);
497
 
                        break;
498
 
                case 0x07: cpustate->icount -= 4;       /* RLC  */
499
 
                        M_RLC;
500
 
                        break;
501
 
 
502
 
                case 0x08:
503
 
                        if (IS_8085(cpustate)) {
504
 
                                cpustate->icount -= 10;         /* DSUB */
505
 
                                M_DSUB(cpustate);
506
 
                        } else {
507
 
                                cpustate->icount -= 4;          /* NOP undocumented */
508
 
                        }
509
 
                        break;
510
 
                case 0x09: cpustate->icount -= 10;      /* DAD  B */
511
 
                        M_DAD(BC);
512
 
                        break;
513
 
                case 0x0a: cpustate->icount -= 7;       /* LDAX B */
514
 
                        cpustate->AF.b.h = RM(cpustate, cpustate->BC.d);
515
 
                        break;
516
 
                case 0x0b: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* DCX  B */
517
 
                        cpustate->BC.w.l--;
518
 
                        if (IS_8085(cpustate))
519
 
                        {
520
 
                                if (cpustate->BC.w.l == 0xffff) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
521
 
                        }
522
 
                        break;
523
 
                case 0x0c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  C */
524
 
                        M_INR(cpustate->BC.b.l);
525
 
                        break;
526
 
                case 0x0d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  C */
527
 
                        M_DCR(cpustate->BC.b.l);
528
 
                        break;
529
 
                case 0x0e: cpustate->icount -= 7;       /* MVI  C,nn */
530
 
                        M_MVI(cpustate->BC.b.l);
531
 
                        break;
532
 
                case 0x0f: cpustate->icount -= 4;       /* RRC  */
533
 
                        M_RRC;
534
 
                        break;
535
 
 
536
 
                case 0x10:
537
 
                        if (IS_8085(cpustate)) {
538
 
                                cpustate->icount -= 7;          /* ASRH */
539
 
                                cpustate->AF.b.l = (cpustate->AF.b.l & ~CF) | (cpustate->HL.b.l & CF);
540
 
                                cpustate->HL.w.l = (cpustate->HL.w.l >> 1);
541
 
                        } else {
542
 
                                cpustate->icount -= 4;          /* NOP undocumented */
543
 
                        }
544
 
                        break;
545
 
                case 0x11: cpustate->icount -= 10;      /* LXI  D,nnnn */
546
 
                        cpustate->DE.w.l = ARG16(cpustate);
547
 
                        break;
548
 
                case 0x12: cpustate->icount -= 7;       /* STAX D */
549
 
                        WM(cpustate, cpustate->DE.d, cpustate->AF.b.h);
550
 
                        break;
551
 
                case 0x13: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* INX  D */
552
 
                        cpustate->DE.w.l++;
553
 
                        if (IS_8085(cpustate))
554
 
                        {
555
 
                                if (cpustate->DE.w.l == 0x0000) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
556
 
                        }
557
 
                        break;
558
 
                case 0x14: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  D */
559
 
                        M_INR(cpustate->DE.b.h);
560
 
                        break;
561
 
                case 0x15: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  D */
562
 
                        M_DCR(cpustate->DE.b.h);
563
 
                        break;
564
 
                case 0x16: cpustate->icount -= 7;       /* MVI  D,nn */
565
 
                        M_MVI(cpustate->DE.b.h);
566
 
                        break;
567
 
                case 0x17: cpustate->icount -= 4;       /* RAL  */
568
 
                        M_RAL;
569
 
                        break;
570
 
 
571
 
                case 0x18:
572
 
                        if (IS_8085(cpustate)) {
573
 
                                cpustate->icount -= 10;         /* RLDE */
574
 
                                cpustate->AF.b.l = (cpustate->AF.b.l & ~(CF | VF)) | (cpustate->DE.b.h >> 7);
575
 
                                cpustate->DE.w.l = (cpustate->DE.w.l << 1) | (cpustate->DE.w.l >> 15);
576
 
                                if (0 != (((cpustate->DE.w.l >> 15) ^ cpustate->AF.b.l) & CF))
577
 
                                        cpustate->AF.b.l |= VF;
578
 
                        } else {
579
 
                                cpustate->icount -= 4;          /* NOP undocumented */
580
 
                        }
581
 
                        break;
582
 
                case 0x19: cpustate->icount -= 10;      /* DAD  D */
583
 
                        M_DAD(DE);
584
 
                        break;
585
 
                case 0x1a: cpustate->icount -= 7;       /* LDAX D */
586
 
                        cpustate->AF.b.h = RM(cpustate, cpustate->DE.d);
587
 
                        break;
588
 
                case 0x1b: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* DCX  D */
589
 
                        cpustate->DE.w.l--;
590
 
                        if (IS_8085(cpustate))
591
 
                        {
592
 
                                if (cpustate->DE.w.l == 0xffff) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
593
 
                        }
594
 
                        break;
595
 
                case 0x1c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  E */
596
 
                        M_INR(cpustate->DE.b.l);
597
 
                        break;
598
 
                case 0x1d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  E */
599
 
                        M_DCR(cpustate->DE.b.l);
600
 
                        break;
601
 
                case 0x1e: cpustate->icount -= 7;       /* MVI  E,nn */
602
 
                        M_MVI(cpustate->DE.b.l);
603
 
                        break;
604
 
                case 0x1f: cpustate->icount -= 4;       /* RAR  */
605
 
                        M_RAR;
606
 
                        break;
607
 
 
608
 
                case 0x20:
609
 
                        if (IS_8085(cpustate)) {
610
 
                                cpustate->icount -= 7;          /* RIM  */
611
 
                                cpustate->AF.b.h = get_rim_value(cpustate);
612
 
 
613
 
                                /* if we have remembered state from taking a TRAP, fix up the IE flag here */
614
 
                                if (cpustate->trap_im_copy & 0x80)
615
 
                                        cpustate->AF.b.h = (cpustate->AF.b.h & ~IM_IE) | (cpustate->trap_im_copy & IM_IE);
616
 
                                cpustate->trap_im_copy = 0;
617
 
                        } else {
618
 
                                cpustate->icount -= 4;          /* NOP undocumented */
619
 
                        }
620
 
                        break;
621
 
                case 0x21: cpustate->icount -= 10;      /* LXI  H,nnnn */
622
 
                        cpustate->HL.w.l = ARG16(cpustate);
623
 
                        break;
624
 
                case 0x22: cpustate->icount -= 16;      /* SHLD nnnn */
625
 
                        cpustate->XX.w.l = ARG16(cpustate);
626
 
                        WM(cpustate, cpustate->XX.d, cpustate->HL.b.l);
627
 
                        cpustate->XX.w.l++;
628
 
                        WM(cpustate, cpustate->XX.d, cpustate->HL.b.h);
629
 
                        break;
630
 
                case 0x23: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* INX  H */
631
 
                        cpustate->HL.w.l++;
632
 
                        if (IS_8085(cpustate))
633
 
                        {
634
 
                                if (cpustate->HL.w.l == 0x0000) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
635
 
                        }
636
 
                        break;
637
 
                case 0x24: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  H */
638
 
                        M_INR(cpustate->HL.b.h);
639
 
                        break;
640
 
                case 0x25: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  H */
641
 
                        M_DCR(cpustate->HL.b.h);
642
 
                        break;
643
 
                case 0x26: cpustate->icount -= 7;       /* MVI  H,nn */
644
 
                        M_MVI(cpustate->HL.b.h);
645
 
                        break;
646
 
                case 0x27: cpustate->icount -= 4;       /* DAA  */
647
 
                        cpustate->XX.d = cpustate->AF.b.h;
648
 
                        if (cpustate->AF.b.l & CF) cpustate->XX.d |= 0x100;
649
 
                        if (cpustate->AF.b.l & HF) cpustate->XX.d |= 0x200;
650
 
                        if (cpustate->AF.b.l & NF) cpustate->XX.d |= 0x400;
651
 
                        cpustate->AF.w.l = DAA[cpustate->XX.d];
652
 
                        if (IS_8080(cpustate))
653
 
                        {
654
 
                                cpustate->AF.b.l &= 0xd5; // Ignore not used flags
655
 
                        }
656
 
                        break;
657
 
 
658
 
                case 0x28:
659
 
                        if (IS_8085(cpustate)) {
660
 
                                cpustate->icount -= 10;         /* LDEH nn */
661
 
                                cpustate->XX.d = ARG(cpustate);
662
 
                                cpustate->DE.d = (cpustate->HL.d + cpustate->XX.d) & 0xffff;
663
 
                        } else {
664
 
                                cpustate->icount -= 4;          /* NOP undocumented */
665
 
                        }
666
 
                        break;
667
 
                case 0x29: cpustate->icount -= 10;      /* DAD  H */
668
 
                        M_DAD(HL);
669
 
                        break;
670
 
                case 0x2a: cpustate->icount -= 16;      /* LHLD nnnn */
671
 
                        cpustate->XX.d = ARG16(cpustate);
672
 
                        cpustate->HL.b.l = RM(cpustate, cpustate->XX.d);
673
 
                        cpustate->XX.w.l++;
674
 
                        cpustate->HL.b.h = RM(cpustate, cpustate->XX.d);
675
 
                        break;
676
 
                case 0x2b: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* DCX  H */
677
 
                        cpustate->HL.w.l--;
678
 
                        if (IS_8085(cpustate))
679
 
                        {
680
 
                                if (cpustate->HL.w.l == 0xffff) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
681
 
                        }
682
 
                        break;
683
 
                case 0x2c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  L */
684
 
                        M_INR(cpustate->HL.b.l);
685
 
                        break;
686
 
                case 0x2d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  L */
687
 
                        M_DCR(cpustate->HL.b.l);
688
 
                        break;
689
 
                case 0x2e: cpustate->icount -= 7;       /* MVI  L,nn */
690
 
                        M_MVI(cpustate->HL.b.l);
691
 
                        break;
692
 
                case 0x2f: cpustate->icount -= 4;       /* CMA  */
693
 
                        if (IS_8085(cpustate))
694
 
                        {
695
 
                                cpustate->AF.b.h ^= 0xff;
696
 
                                cpustate->AF.b.l |= HF + NF;
697
 
                        }
698
 
                        else
699
 
                        {
700
 
                                cpustate->AF.b.h ^= 0xff;       /* 8080 */
701
 
                        }
702
 
                        break;
703
 
 
704
 
                case 0x30:
705
 
                        if (IS_8085(cpustate))
706
 
                        {
707
 
                                cpustate->icount -= 7;          /* SIM  */
708
 
 
709
 
                                /* if bit 3 is set, bits 0-2 become the new masks */
710
 
                                if (cpustate->AF.b.h & 0x08)
711
 
                                {
712
 
                                        cpustate->IM &= ~(IM_M55 | IM_M65 | IM_M75 | IM_I55 | IM_I65);
713
 
                                        cpustate->IM |= cpustate->AF.b.h & (IM_M55 | IM_M65 | IM_M75);
714
 
 
715
 
                                        /* update live state based on the new masks */
716
 
                                        if ((cpustate->IM & IM_M55) == 0 && cpustate->irq_state[I8085_RST55_LINE])
717
 
                                                cpustate->IM |= IM_I55;
718
 
                                        if ((cpustate->IM & IM_M65) == 0 && cpustate->irq_state[I8085_RST65_LINE])
719
 
                                                cpustate->IM |= IM_I65;
720
 
                                }
721
 
 
722
 
                                /* bit if 4 is set, the 7.5 flip-flop is cleared */
723
 
                                if (cpustate->AF.b.h & 0x10)
724
 
                                        cpustate->IM &= ~IM_I75;
725
 
 
726
 
                                /* if bit 6 is set, then bit 7 is the new SOD state */
727
 
                                if (cpustate->AF.b.h & 0x40)
728
 
                                        set_sod(cpustate, cpustate->AF.b.h >> 7);
729
 
 
730
 
                                /* check for revealed interrupts */
731
 
                                check_for_interrupts(cpustate);
732
 
                        } else {
733
 
                                cpustate->icount -= 4;          /* NOP undocumented */
734
 
                        }
735
 
                        break;
736
 
 
737
 
                case 0x31: cpustate->icount -= 10;      /* LXI SP,nnnn */
738
 
                        cpustate->SP.w.l = ARG16(cpustate);
739
 
                        break;
740
 
                case 0x32: cpustate->icount -= 13;      /* STAX nnnn */
741
 
                        cpustate->XX.d = ARG16(cpustate);
742
 
                        WM(cpustate, cpustate->XX.d, cpustate->AF.b.h);
743
 
                        break;
744
 
                case 0x33: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* INX  SP */
745
 
                        cpustate->SP.w.l++;
746
 
                        if (IS_8085(cpustate))
747
 
                        {
748
 
                                if (cpustate->SP.w.l == 0x0000) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
749
 
                        }
750
 
                        break;
751
 
                case 0x34: cpustate->icount -= 10;      /* INR  M */
752
 
                        cpustate->XX.b.l = RM(cpustate, cpustate->HL.d);
753
 
                        M_INR(cpustate->XX.b.l);
754
 
                        WM(cpustate, cpustate->HL.d, cpustate->XX.b.l);
755
 
                        break;
756
 
                case 0x35: cpustate->icount -= 10;      /* DCR  M */
757
 
                        cpustate->XX.b.l = RM(cpustate, cpustate->HL.d);
758
 
                        M_DCR(cpustate->XX.b.l);
759
 
                        WM(cpustate, cpustate->HL.d, cpustate->XX.b.l);
760
 
                        break;
761
 
                case 0x36: cpustate->icount -= 10;      /* MVI  M,nn */
762
 
                        cpustate->XX.b.l = ARG(cpustate);
763
 
                        WM(cpustate, cpustate->HL.d, cpustate->XX.b.l);
764
 
                        break;
765
 
                case 0x37: cpustate->icount -= 4;       /* STC  */
766
 
                        cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | CF;
767
 
                        break;
768
 
 
769
 
                case 0x38:
770
 
                        if (IS_8085(cpustate)) {
771
 
                                cpustate->icount -= 10;         /* LDES nn */
772
 
                                cpustate->XX.d = ARG(cpustate);
773
 
                                cpustate->DE.d = (cpustate->SP.d + cpustate->XX.d) & 0xffff;
774
 
                        } else {
775
 
                                cpustate->icount -= 4;          /* NOP undocumented */
776
 
                        }
777
 
                        break;
778
 
                case 0x39: cpustate->icount -= 10;      /* DAD SP */
779
 
                        M_DAD(SP);
780
 
                        break;
781
 
                case 0x3a: cpustate->icount -= 13;      /* LDAX nnnn */
782
 
                        cpustate->XX.d = ARG16(cpustate);
783
 
                        cpustate->AF.b.h = RM(cpustate, cpustate->XX.d);
784
 
                        break;
785
 
                case 0x3b: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* DCX  SP */
786
 
                        cpustate->SP.w.l--;
787
 
                        if (IS_8085(cpustate))
788
 
                        {
789
 
                                if (cpustate->SP.w.l == 0xffff) cpustate->AF.b.l |= XF; else cpustate->AF.b.l &= ~XF;
790
 
                        }
791
 
                        break;
792
 
                case 0x3c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* INR  A */
793
 
                        M_INR(cpustate->AF.b.h);
794
 
                        break;
795
 
                case 0x3d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* DCR  A */
796
 
                        M_DCR(cpustate->AF.b.h);
797
 
                        break;
798
 
                case 0x3e: cpustate->icount -= 7;       /* MVI  A,nn */
799
 
                        M_MVI(cpustate->AF.b.h);
800
 
                        break;
801
 
                case 0x3f: cpustate->icount -= 4;       /* CMC  */
802
 
                        cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | ((cpustate->AF.b.l & CF)==1 ? 0 : 1);
803
 
                        break;
804
 
 
805
 
                case 0x40: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,B */
806
 
                        /* no op */
807
 
                        break;
808
 
                case 0x41: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,C */
809
 
                        cpustate->BC.b.h = cpustate->BC.b.l;
810
 
                        break;
811
 
                case 0x42: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,D */
812
 
                        cpustate->BC.b.h = cpustate->DE.b.h;
813
 
                        break;
814
 
                case 0x43: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,E */
815
 
                        cpustate->BC.b.h = cpustate->DE.b.l;
816
 
                        break;
817
 
                case 0x44: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,H */
818
 
                        cpustate->BC.b.h = cpustate->HL.b.h;
819
 
                        break;
820
 
                case 0x45: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,L */
821
 
                        cpustate->BC.b.h = cpustate->HL.b.l;
822
 
                        break;
823
 
                case 0x46: cpustate->icount -= 7;       /* MOV  B,M */
824
 
                        cpustate->BC.b.h = RM(cpustate, cpustate->HL.d);
825
 
                        break;
826
 
                case 0x47: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  B,A */
827
 
                        cpustate->BC.b.h = cpustate->AF.b.h;
828
 
                        break;
829
 
 
830
 
                case 0x48: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,B */
831
 
                        cpustate->BC.b.l = cpustate->BC.b.h;
832
 
                        break;
833
 
                case 0x49: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,C */
834
 
                        /* no op */
835
 
                        break;
836
 
                case 0x4a: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,D */
837
 
                        cpustate->BC.b.l = cpustate->DE.b.h;
838
 
                        break;
839
 
                case 0x4b: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,E */
840
 
                        cpustate->BC.b.l = cpustate->DE.b.l;
841
 
                        break;
842
 
                case 0x4c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,H */
843
 
                        cpustate->BC.b.l = cpustate->HL.b.h;
844
 
                        break;
845
 
                case 0x4d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,L */
846
 
                        cpustate->BC.b.l = cpustate->HL.b.l;
847
 
                        break;
848
 
                case 0x4e: cpustate->icount -= 7;       /* MOV  C,M */
849
 
                        cpustate->BC.b.l = RM(cpustate, cpustate->HL.d);
850
 
                        break;
851
 
                case 0x4f: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  C,A */
852
 
                        cpustate->BC.b.l = cpustate->AF.b.h;
853
 
                        break;
854
 
 
855
 
                case 0x50: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,B */
856
 
                        cpustate->DE.b.h = cpustate->BC.b.h;
857
 
                        break;
858
 
                case 0x51: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,C */
859
 
                        cpustate->DE.b.h = cpustate->BC.b.l;
860
 
                        break;
861
 
                case 0x52: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,D */
862
 
                        /* no op */
863
 
                        break;
864
 
                case 0x53: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,E */
865
 
                        cpustate->DE.b.h = cpustate->DE.b.l;
866
 
                        break;
867
 
                case 0x54: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,H */
868
 
                        cpustate->DE.b.h = cpustate->HL.b.h;
869
 
                        break;
870
 
                case 0x55: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,L */
871
 
                        cpustate->DE.b.h = cpustate->HL.b.l;
872
 
                        break;
873
 
                case 0x56: cpustate->icount -= 7;       /* MOV  D,M */
874
 
                        cpustate->DE.b.h = RM(cpustate, cpustate->HL.d);
875
 
                        break;
876
 
                case 0x57: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  D,A */
877
 
                        cpustate->DE.b.h = cpustate->AF.b.h;
878
 
                        break;
879
 
 
880
 
                case 0x58: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,B */
881
 
                        cpustate->DE.b.l = cpustate->BC.b.h;
882
 
                        break;
883
 
                case 0x59: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,C */
884
 
                        cpustate->DE.b.l = cpustate->BC.b.l;
885
 
                        break;
886
 
                case 0x5a: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,D */
887
 
                        cpustate->DE.b.l = cpustate->DE.b.h;
888
 
                        break;
889
 
                case 0x5b: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,E */
890
 
                        /* no op */
891
 
                        break;
892
 
                case 0x5c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,H */
893
 
                        cpustate->DE.b.l = cpustate->HL.b.h;
894
 
                        break;
895
 
                case 0x5d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,L */
896
 
                        cpustate->DE.b.l = cpustate->HL.b.l;
897
 
                        break;
898
 
                case 0x5e: cpustate->icount -= 7;       /* MOV  E,M */
899
 
                        cpustate->DE.b.l = RM(cpustate, cpustate->HL.d);
900
 
                        break;
901
 
                case 0x5f: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  E,A */
902
 
                        cpustate->DE.b.l = cpustate->AF.b.h;
903
 
                        break;
904
 
 
905
 
                case 0x60: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,B */
906
 
                        cpustate->HL.b.h = cpustate->BC.b.h;
907
 
                        break;
908
 
                case 0x61: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,C */
909
 
                        cpustate->HL.b.h = cpustate->BC.b.l;
910
 
                        break;
911
 
                case 0x62: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,D */
912
 
                        cpustate->HL.b.h = cpustate->DE.b.h;
913
 
                        break;
914
 
                case 0x63: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,E */
915
 
                        cpustate->HL.b.h = cpustate->DE.b.l;
916
 
                        break;
917
 
                case 0x64: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,H */
918
 
                        /* no op */
919
 
                        break;
920
 
                case 0x65: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,L */
921
 
                        cpustate->HL.b.h = cpustate->HL.b.l;
922
 
                        break;
923
 
                case 0x66: cpustate->icount -= 7;       /* MOV  H,M */
924
 
                        cpustate->HL.b.h = RM(cpustate, cpustate->HL.d);
925
 
                        break;
926
 
                case 0x67: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  H,A */
927
 
                        cpustate->HL.b.h = cpustate->AF.b.h;
928
 
                        break;
929
 
 
930
 
                case 0x68: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,B */
931
 
                        cpustate->HL.b.l = cpustate->BC.b.h;
932
 
                        break;
933
 
                case 0x69: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,C */
934
 
                        cpustate->HL.b.l = cpustate->BC.b.l;
935
 
                        break;
936
 
                case 0x6a: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,D */
937
 
                        cpustate->HL.b.l = cpustate->DE.b.h;
938
 
                        break;
939
 
                case 0x6b: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,E */
940
 
                        cpustate->HL.b.l = cpustate->DE.b.l;
941
 
                        break;
942
 
                case 0x6c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,H */
943
 
                        cpustate->HL.b.l = cpustate->HL.b.h;
944
 
                        break;
945
 
                case 0x6d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,L */
946
 
                        /* no op */
947
 
                        break;
948
 
                case 0x6e: cpustate->icount -= 7;       /* MOV  L,M */
949
 
                        cpustate->HL.b.l = RM(cpustate, cpustate->HL.d);
950
 
                        break;
951
 
                case 0x6f: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  L,A */
952
 
                        cpustate->HL.b.l = cpustate->AF.b.h;
953
 
                        break;
954
 
 
955
 
                case 0x70: cpustate->icount -= 7;       /* MOV  M,B */
956
 
                        WM(cpustate, cpustate->HL.d, cpustate->BC.b.h);
957
 
                        break;
958
 
                case 0x71: cpustate->icount -= 7;       /* MOV  M,C */
959
 
                        WM(cpustate, cpustate->HL.d, cpustate->BC.b.l);
960
 
                        break;
961
 
                case 0x72: cpustate->icount -= 7;       /* MOV  M,D */
962
 
                        WM(cpustate, cpustate->HL.d, cpustate->DE.b.h);
963
 
                        break;
964
 
                case 0x73: cpustate->icount -= 7;       /* MOV  M,E */
965
 
                        WM(cpustate, cpustate->HL.d, cpustate->DE.b.l);
966
 
                        break;
967
 
                case 0x74: cpustate->icount -= 7;       /* MOV  M,H */
968
 
                        WM(cpustate, cpustate->HL.d, cpustate->HL.b.h);
969
 
                        break;
970
 
                case 0x75: cpustate->icount -= 7;       /* MOV  M,L */
971
 
                        WM(cpustate, cpustate->HL.d, cpustate->HL.b.l);
972
 
                        break;
973
 
                case 0x76: cpustate->icount -= IS_8085(cpustate) ? 5 : 7;       /* HLT */
974
 
                        cpustate->PC.w.l--;
975
 
                        cpustate->HALT = 1;
976
 
                        set_status(cpustate, 0x8a); // halt acknowledge
977
 
                        if (cpustate->icount > 0) cpustate->icount = 0;
978
 
                        break;
979
 
                case 0x77: cpustate->icount -= 7;       /* MOV  M,A */
980
 
                        WM(cpustate, cpustate->HL.d, cpustate->AF.b.h);
981
 
                        break;
982
 
 
983
 
                case 0x78: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,B */
984
 
                        cpustate->AF.b.h = cpustate->BC.b.h;
985
 
                        break;
986
 
                case 0x79: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,C */
987
 
                        cpustate->AF.b.h = cpustate->BC.b.l;
988
 
                        break;
989
 
                case 0x7a: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,D */
990
 
                        cpustate->AF.b.h = cpustate->DE.b.h;
991
 
                        break;
992
 
                case 0x7b: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,E */
993
 
                        cpustate->AF.b.h = cpustate->DE.b.l;
994
 
                        break;
995
 
                case 0x7c: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,H */
996
 
                        cpustate->AF.b.h = cpustate->HL.b.h;
997
 
                        break;
998
 
                case 0x7d: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,L */
999
 
                        cpustate->AF.b.h = cpustate->HL.b.l;
1000
 
                        break;
1001
 
                case 0x7e: cpustate->icount -= 7;       /* MOV  A,M */
1002
 
                        cpustate->AF.b.h = RM(cpustate, cpustate->HL.d);
1003
 
                        break;
1004
 
                case 0x7f: cpustate->icount -= IS_8085(cpustate) ? 4 : 5;       /* MOV  A,A */
1005
 
                        /* no op */
1006
 
                        break;
1007
 
 
1008
 
                case 0x80: cpustate->icount -= 4;       /* ADD  B */
1009
 
                        M_ADD(cpustate->BC.b.h);
1010
 
                        break;
1011
 
                case 0x81: cpustate->icount -= 4;       /* ADD  C */
1012
 
                        M_ADD(cpustate->BC.b.l);
1013
 
                        break;
1014
 
                case 0x82: cpustate->icount -= 4;       /* ADD  D */
1015
 
                        M_ADD(cpustate->DE.b.h);
1016
 
                        break;
1017
 
                case 0x83: cpustate->icount -= 4;       /* ADD  E */
1018
 
                        M_ADD(cpustate->DE.b.l);
1019
 
                        break;
1020
 
                case 0x84: cpustate->icount -= 4;       /* ADD  H */
1021
 
                        M_ADD(cpustate->HL.b.h);
1022
 
                        break;
1023
 
                case 0x85: cpustate->icount -= 4;       /* ADD  L */
1024
 
                        M_ADD(cpustate->HL.b.l);
1025
 
                        break;
1026
 
                case 0x86: cpustate->icount -= 7;       /* ADD  M */
1027
 
                        M_ADD(RM(cpustate, cpustate->HL.d));
1028
 
                        break;
1029
 
                case 0x87: cpustate->icount -= 4;       /* ADD  A */
1030
 
                        M_ADD(cpustate->AF.b.h);
1031
 
                        break;
1032
 
 
1033
 
                case 0x88: cpustate->icount -= 4;       /* ADC  B */
1034
 
                        M_ADC(cpustate->BC.b.h);
1035
 
                        break;
1036
 
                case 0x89: cpustate->icount -= 4;       /* ADC  C */
1037
 
                        M_ADC(cpustate->BC.b.l);
1038
 
                        break;
1039
 
                case 0x8a: cpustate->icount -= 4;       /* ADC  D */
1040
 
                        M_ADC(cpustate->DE.b.h);
1041
 
                        break;
1042
 
                case 0x8b: cpustate->icount -= 4;       /* ADC  E */
1043
 
                        M_ADC(cpustate->DE.b.l);
1044
 
                        break;
1045
 
                case 0x8c: cpustate->icount -= 4;       /* ADC  H */
1046
 
                        M_ADC(cpustate->HL.b.h);
1047
 
                        break;
1048
 
                case 0x8d: cpustate->icount -= 4;       /* ADC  L */
1049
 
                        M_ADC(cpustate->HL.b.l);
1050
 
                        break;
1051
 
                case 0x8e: cpustate->icount -= 7;       /* ADC  M */
1052
 
                        M_ADC(RM(cpustate, cpustate->HL.d));
1053
 
                        break;
1054
 
                case 0x8f: cpustate->icount -= 4;       /* ADC  A */
1055
 
                        M_ADC(cpustate->AF.b.h);
1056
 
                        break;
1057
 
 
1058
 
                case 0x90: cpustate->icount -= 4;       /* SUB  B */
1059
 
                        M_SUB(cpustate->BC.b.h);
1060
 
                        break;
1061
 
                case 0x91: cpustate->icount -= 4;       /* SUB  C */
1062
 
                        M_SUB(cpustate->BC.b.l);
1063
 
                        break;
1064
 
                case 0x92: cpustate->icount -= 4;       /* SUB  D */
1065
 
                        M_SUB(cpustate->DE.b.h);
1066
 
                        break;
1067
 
                case 0x93: cpustate->icount -= 4;       /* SUB  E */
1068
 
                        M_SUB(cpustate->DE.b.l);
1069
 
                        break;
1070
 
                case 0x94: cpustate->icount -= 4;       /* SUB  H */
1071
 
                        M_SUB(cpustate->HL.b.h);
1072
 
                        break;
1073
 
                case 0x95: cpustate->icount -= 4;       /* SUB  L */
1074
 
                        M_SUB(cpustate->HL.b.l);
1075
 
                        break;
1076
 
                case 0x96: cpustate->icount -= 7;       /* SUB  M */
1077
 
                        M_SUB(RM(cpustate, cpustate->HL.d));
1078
 
                        break;
1079
 
                case 0x97: cpustate->icount -= 4;       /* SUB  A */
1080
 
                        M_SUB(cpustate->AF.b.h);
1081
 
                        break;
1082
 
 
1083
 
                case 0x98: cpustate->icount -= 4;       /* SBB  B */
1084
 
                        M_SBB(cpustate->BC.b.h);
1085
 
                        break;
1086
 
                case 0x99: cpustate->icount -= 4;       /* SBB  C */
1087
 
                        M_SBB(cpustate->BC.b.l);
1088
 
                        break;
1089
 
                case 0x9a: cpustate->icount -= 4;       /* SBB  D */
1090
 
                        M_SBB(cpustate->DE.b.h);
1091
 
                        break;
1092
 
                case 0x9b: cpustate->icount -= 4;       /* SBB  E */
1093
 
                        M_SBB(cpustate->DE.b.l);
1094
 
                        break;
1095
 
                case 0x9c: cpustate->icount -= 4;       /* SBB  H */
1096
 
                        M_SBB(cpustate->HL.b.h);
1097
 
                        break;
1098
 
                case 0x9d: cpustate->icount -= 4;       /* SBB  L */
1099
 
                        M_SBB(cpustate->HL.b.l);
1100
 
                        break;
1101
 
                case 0x9e: cpustate->icount -= 7;       /* SBB  M */
1102
 
                        M_SBB(RM(cpustate, cpustate->HL.d));
1103
 
                        break;
1104
 
                case 0x9f: cpustate->icount -= 4;       /* SBB  A */
1105
 
                        M_SBB(cpustate->AF.b.h);
1106
 
                        break;
1107
 
 
1108
 
                case 0xa0: cpustate->icount -= 4;       /* ANA  B */
1109
 
                        M_ANA(cpustate->BC.b.h);
1110
 
                        break;
1111
 
                case 0xa1: cpustate->icount -= 4;       /* ANA  C */
1112
 
                        M_ANA(cpustate->BC.b.l);
1113
 
                        break;
1114
 
                case 0xa2: cpustate->icount -= 4;       /* ANA  D */
1115
 
                        M_ANA(cpustate->DE.b.h);
1116
 
                        break;
1117
 
                case 0xa3: cpustate->icount -= 4;       /* ANA  E */
1118
 
                        M_ANA(cpustate->DE.b.l);
1119
 
                        break;
1120
 
                case 0xa4: cpustate->icount -= 4;       /* ANA  H */
1121
 
                        M_ANA(cpustate->HL.b.h);
1122
 
                        break;
1123
 
                case 0xa5: cpustate->icount -= 4;       /* ANA  L */
1124
 
                        M_ANA(cpustate->HL.b.l);
1125
 
                        break;
1126
 
                case 0xa6: cpustate->icount -= 7;       /* ANA  M */
1127
 
                        M_ANA(RM(cpustate, cpustate->HL.d));
1128
 
                        break;
1129
 
                case 0xa7: cpustate->icount -= 4;       /* ANA  A */
1130
 
                        M_ANA(cpustate->AF.b.h);
1131
 
                        break;
1132
 
 
1133
 
                case 0xa8: cpustate->icount -= 4;       /* XRA  B */
1134
 
                        M_XRA(cpustate->BC.b.h);
1135
 
                        break;
1136
 
                case 0xa9: cpustate->icount -= 4;       /* XRA  C */
1137
 
                        M_XRA(cpustate->BC.b.l);
1138
 
                        break;
1139
 
                case 0xaa: cpustate->icount -= 4;       /* XRA  D */
1140
 
                        M_XRA(cpustate->DE.b.h);
1141
 
                        break;
1142
 
                case 0xab: cpustate->icount -= 4;       /* XRA  E */
1143
 
                        M_XRA(cpustate->DE.b.l);
1144
 
                        break;
1145
 
                case 0xac: cpustate->icount -= 4;       /* XRA  H */
1146
 
                        M_XRA(cpustate->HL.b.h);
1147
 
                        break;
1148
 
                case 0xad: cpustate->icount -= 4;       /* XRA  L */
1149
 
                        M_XRA(cpustate->HL.b.l);
1150
 
                        break;
1151
 
                case 0xae: cpustate->icount -= 7;       /* XRA  M */
1152
 
                        M_XRA(RM(cpustate, cpustate->HL.d));
1153
 
                        break;
1154
 
                case 0xaf: cpustate->icount -= 4;       /* XRA  A */
1155
 
                        M_XRA(cpustate->AF.b.h);
1156
 
                        break;
1157
 
 
1158
 
                case 0xb0: cpustate->icount -= 4;       /* ORA  B */
1159
 
                        M_ORA(cpustate->BC.b.h);
1160
 
                        break;
1161
 
                case 0xb1: cpustate->icount -= 4;       /* ORA  C */
1162
 
                        M_ORA(cpustate->BC.b.l);
1163
 
                        break;
1164
 
                case 0xb2: cpustate->icount -= 4;       /* ORA  D */
1165
 
                        M_ORA(cpustate->DE.b.h);
1166
 
                        break;
1167
 
                case 0xb3: cpustate->icount -= 4;       /* ORA  E */
1168
 
                        M_ORA(cpustate->DE.b.l);
1169
 
                        break;
1170
 
                case 0xb4: cpustate->icount -= 4;       /* ORA  H */
1171
 
                        M_ORA(cpustate->HL.b.h);
1172
 
                        break;
1173
 
                case 0xb5: cpustate->icount -= 4;       /* ORA  L */
1174
 
                        M_ORA(cpustate->HL.b.l);
1175
 
                        break;
1176
 
                case 0xb6: cpustate->icount -= 7;       /* ORA  M */
1177
 
                        M_ORA(RM(cpustate, cpustate->HL.d));
1178
 
                        break;
1179
 
                case 0xb7: cpustate->icount -= 4;       /* ORA  A */
1180
 
                        M_ORA(cpustate->AF.b.h);
1181
 
                        break;
1182
 
 
1183
 
                case 0xb8: cpustate->icount -= 4;       /* CMP  B */
1184
 
                        M_CMP(cpustate->BC.b.h);
1185
 
                        break;
1186
 
                case 0xb9: cpustate->icount -= 4;       /* CMP  C */
1187
 
                        M_CMP(cpustate->BC.b.l);
1188
 
                        break;
1189
 
                case 0xba: cpustate->icount -= 4;       /* CMP  D */
1190
 
                        M_CMP(cpustate->DE.b.h);
1191
 
                        break;
1192
 
                case 0xbb: cpustate->icount -= 4;       /* CMP  E */
1193
 
                        M_CMP(cpustate->DE.b.l);
1194
 
                        break;
1195
 
                case 0xbc: cpustate->icount -= 4;       /* CMP  H */
1196
 
                        M_CMP(cpustate->HL.b.h);
1197
 
                        break;
1198
 
                case 0xbd: cpustate->icount -= 4;       /* CMP  L */
1199
 
                        M_CMP(cpustate->HL.b.l);
1200
 
                        break;
1201
 
                case 0xbe: cpustate->icount -= 7;       /* CMP  M */
1202
 
                        M_CMP(RM(cpustate, cpustate->HL.d));
1203
 
                        break;
1204
 
                case 0xbf: cpustate->icount -= 4;       /* CMP  A */
1205
 
                        M_CMP(cpustate->AF.b.h);
1206
 
                        break;
1207
 
 
1208
 
                case 0xc0: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RNZ  */
1209
 
                        M_RET( !(cpustate->AF.b.l & ZF) );
1210
 
                        break;
1211
 
                case 0xc1: cpustate->icount -= 10;      /* POP  B */
1212
 
                        M_POP(BC);
1213
 
                        break;
1214
 
                case 0xc2: cpustate->icount -= 10;      /* JNZ  nnnn */
1215
 
                        M_JMP( !(cpustate->AF.b.l & ZF) );
1216
 
                        break;
1217
 
                case 0xc3: cpustate->icount -= 10;      /* JMP  nnnn */
1218
 
                        M_JMP(1);
1219
 
                        break;
1220
 
                case 0xc4: cpustate->icount -= 11;      /* CNZ  nnnn */
1221
 
                        M_CALL( !(cpustate->AF.b.l & ZF) );
1222
 
                        break;
1223
 
                case 0xc5: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* PUSH B */
1224
 
                        M_PUSH(BC);
1225
 
                        break;
1226
 
                case 0xc6: cpustate->icount -= 7;       /* ADI  nn */
1227
 
                        cpustate->XX.b.l = ARG(cpustate);
1228
 
                        M_ADD(cpustate->XX.b.l);
1229
 
                                break;
1230
 
                case 0xc7: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  0 */
1231
 
                        M_RST(0);
1232
 
                        break;
1233
 
 
1234
 
                case 0xc8: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RZ   */
1235
 
                        M_RET( cpustate->AF.b.l & ZF );
1236
 
                        break;
1237
 
                case 0xc9: cpustate->icount -= 10;      /* RET  */
1238
 
                        M_RET(1);
1239
 
                        break;
1240
 
                case 0xca: cpustate->icount -= 10;      /* JZ   nnnn */
1241
 
                        M_JMP( cpustate->AF.b.l & ZF );
1242
 
                        break;
1243
 
                case 0xcb:
1244
 
                        if (IS_8085(cpustate)) {
1245
 
                                if (cpustate->AF.b.l & VF) {
1246
 
                                        cpustate->icount -= 12;
1247
 
                                        M_RST(8);                       /* call 0x40 */
1248
 
                                } else {
1249
 
                                        cpustate->icount -= 6;  /* RST  V */
1250
 
                                }
1251
 
                        } else {
1252
 
                                cpustate->icount -= 10; /* JMP  nnnn undocumented*/
1253
 
                                M_JMP(1);
1254
 
                        }
1255
 
                        break;
1256
 
                case 0xcc: cpustate->icount -= 11;      /* CZ   nnnn */
1257
 
                        M_CALL( cpustate->AF.b.l & ZF );
1258
 
                        break;
1259
 
                case 0xcd: cpustate->icount -= 17;      /* CALL nnnn */
1260
 
                        M_CALL(1);
1261
 
                        break;
1262
 
                case 0xce: cpustate->icount -= 7;       /* ACI  nn */
1263
 
                        cpustate->XX.b.l = ARG(cpustate);
1264
 
                        M_ADC(cpustate->XX.b.l);
1265
 
                        break;
1266
 
                case 0xcf: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  1 */
1267
 
                        M_RST(1);
1268
 
                        break;
1269
 
 
1270
 
                case 0xd0: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RNC  */
1271
 
                        M_RET( !(cpustate->AF.b.l & CF) );
1272
 
                        break;
1273
 
                case 0xd1: cpustate->icount -= 10;      /* POP  D */
1274
 
                        M_POP(DE);
1275
 
                        break;
1276
 
                case 0xd2: cpustate->icount -= 10;      /* JNC  nnnn */
1277
 
                        M_JMP( !(cpustate->AF.b.l & CF) );
1278
 
                        break;
1279
 
                case 0xd3: cpustate->icount -= 10;      /* OUT  nn */
1280
 
                        M_OUT;
1281
 
                        break;
1282
 
                case 0xd4: cpustate->icount -= 11;      /* CNC  nnnn */
1283
 
                        M_CALL( !(cpustate->AF.b.l & CF) );
1284
 
                        break;
1285
 
                case 0xd5: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* PUSH D */
1286
 
                        M_PUSH(DE);
1287
 
                        break;
1288
 
                case 0xd6: cpustate->icount -= 7;       /* SUI  nn */
1289
 
                        cpustate->XX.b.l = ARG(cpustate);
1290
 
                        M_SUB(cpustate->XX.b.l);
1291
 
                        break;
1292
 
                case 0xd7: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  2 */
1293
 
                        M_RST(2);
1294
 
                        break;
1295
 
 
1296
 
                case 0xd8: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RC   */
1297
 
                        M_RET( cpustate->AF.b.l & CF );
1298
 
                        break;
1299
 
                case 0xd9:
1300
 
                        if (IS_8085(cpustate)) {
1301
 
                                cpustate->icount -= 10;         /* SHLX */
1302
 
                                cpustate->XX.w.l = cpustate->DE.w.l;
1303
 
                                WM(cpustate, cpustate->XX.d, cpustate->HL.b.l);
1304
 
                                cpustate->XX.w.l++;
1305
 
                                WM(cpustate, cpustate->XX.d, cpustate->HL.b.h);
1306
 
                        } else {
1307
 
                                cpustate->icount -= 10; /* RET undocumented */
1308
 
                                M_RET(1);
1309
 
                        }
1310
 
                        break;
1311
 
                case 0xda: cpustate->icount -= 10;      /* JC   nnnn */
1312
 
                        M_JMP( cpustate->AF.b.l & CF );
1313
 
                        break;
1314
 
                case 0xdb: cpustate->icount -= 10;      /* IN   nn */
1315
 
                        M_IN;
1316
 
                        break;
1317
 
                case 0xdc: cpustate->icount -= 11;      /* CC   nnnn */
1318
 
                        M_CALL( cpustate->AF.b.l & CF );
1319
 
                        break;
1320
 
                case 0xdd:
1321
 
                        if (IS_8085(cpustate)) {
1322
 
                                cpustate->icount -= 7;          /* JNX  nnnn */
1323
 
                                M_JMP( !(cpustate->AF.b.l & XF) );
1324
 
                        } else {
1325
 
                                cpustate->icount -= 17; /* CALL nnnn undocumented */
1326
 
                                M_CALL(1);
1327
 
                        }
1328
 
                        break;
1329
 
                case 0xde: cpustate->icount -= 7;       /* SBI  nn */
1330
 
                        cpustate->XX.b.l = ARG(cpustate);
1331
 
                        M_SBB(cpustate->XX.b.l);
1332
 
                        break;
1333
 
                case 0xdf: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  3 */
1334
 
                        M_RST(3);
1335
 
                        break;
1336
 
 
1337
 
                case 0xe0: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RPO    */
1338
 
                        M_RET( !(cpustate->AF.b.l & VF) );
1339
 
                        break;
1340
 
                case 0xe1: cpustate->icount -= 10;      /* POP  H */
1341
 
                        M_POP(HL);
1342
 
                        break;
1343
 
                case 0xe2: cpustate->icount -= 10;      /* JPO  nnnn */
1344
 
                        M_JMP( !(cpustate->AF.b.l & VF) );
1345
 
                        break;
1346
 
                case 0xe3: cpustate->icount -= IS_8085(cpustate) ? 16 : 18;     /* XTHL */
1347
 
                        M_POP(XX);
1348
 
                        M_PUSH(HL);
1349
 
                        cpustate->HL.d = cpustate->XX.d;
1350
 
                        break;
1351
 
                case 0xe4: cpustate->icount -= 11;      /* CPO  nnnn */
1352
 
                        M_CALL( !(cpustate->AF.b.l & VF) );
1353
 
                        break;
1354
 
                case 0xe5: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* PUSH H */
1355
 
                        M_PUSH(HL);
1356
 
                        break;
1357
 
                case 0xe6: cpustate->icount -= 7;       /* ANI  nn */
1358
 
                        cpustate->XX.b.l = ARG(cpustate);
1359
 
                        M_ANA(cpustate->XX.b.l);
1360
 
                        break;
1361
 
                case 0xe7: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  4 */
1362
 
                        M_RST(4);
1363
 
                        break;
1364
 
 
1365
 
                case 0xe8: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RPE  */
1366
 
                        M_RET( cpustate->AF.b.l & VF );
1367
 
                        break;
1368
 
                case 0xe9: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* PCHL */
1369
 
                        cpustate->PC.d = cpustate->HL.w.l;
1370
 
                        break;
1371
 
                case 0xea: cpustate->icount -= 10;      /* JPE  nnnn */
1372
 
                        M_JMP( cpustate->AF.b.l & VF );
1373
 
                        break;
1374
 
                case 0xeb: cpustate->icount -= 5;       /* XCHG */
1375
 
                        cpustate->XX.d = cpustate->DE.d;
1376
 
                        cpustate->DE.d = cpustate->HL.d;
1377
 
                        cpustate->HL.d = cpustate->XX.d;
1378
 
                        break;
1379
 
                case 0xec: cpustate->icount -= 11;      /* CPE  nnnn */
1380
 
                        M_CALL( cpustate->AF.b.l & VF );
1381
 
                        break;
1382
 
                case 0xed:
1383
 
                        if (IS_8085(cpustate)) {
1384
 
                                cpustate->icount -= 10;         /* LHLX */
1385
 
                                cpustate->XX.w.l = cpustate->DE.w.l;
1386
 
                                cpustate->HL.b.l = RM(cpustate, cpustate->XX.d);
1387
 
                                cpustate->XX.w.l++;
1388
 
                                cpustate->HL.b.h = RM(cpustate, cpustate->XX.d);
1389
 
                        } else {
1390
 
                                cpustate->icount -= 17; /* CALL nnnn undocumented */
1391
 
                                M_CALL(1);
1392
 
                        }
1393
 
                        break;
1394
 
                case 0xee: cpustate->icount -= 7;       /* XRI  nn */
1395
 
                        cpustate->XX.b.l = ARG(cpustate);
1396
 
                        M_XRA(cpustate->XX.b.l);
1397
 
                        break;
1398
 
                case 0xef: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  5 */
1399
 
                        M_RST(5);
1400
 
                        break;
1401
 
 
1402
 
                case 0xf0: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RP   */
1403
 
                        M_RET( !(cpustate->AF.b.l&SF) );
1404
 
                        break;
1405
 
                case 0xf1: cpustate->icount -= 10;      /* POP  A */
1406
 
                        M_POP(AF);
1407
 
                        break;
1408
 
                case 0xf2: cpustate->icount -= 10;      /* JP   nnnn */
1409
 
                        M_JMP( !(cpustate->AF.b.l & SF) );
1410
 
                        break;
1411
 
                case 0xf3: cpustate->icount -= 4;       /* DI   */
1412
 
                        /* remove interrupt enable */
1413
 
                        set_inte(cpustate, 0);
1414
 
                        break;
1415
 
                case 0xf4: cpustate->icount -= 11;      /* CP   nnnn */
1416
 
                        M_CALL( !(cpustate->AF.b.l & SF) );
1417
 
                        break;
1418
 
                case 0xf5: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* PUSH A */
1419
 
                        M_PUSH(AF);
1420
 
                        break;
1421
 
                case 0xf6: cpustate->icount -= 7;       /* ORI  nn */
1422
 
                        cpustate->XX.b.l = ARG(cpustate);
1423
 
                        M_ORA(cpustate->XX.b.l);
1424
 
                        break;
1425
 
                case 0xf7: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  6 */
1426
 
                        M_RST(6);
1427
 
                        break;
1428
 
 
1429
 
                case 0xf8: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* RM   */
1430
 
                        M_RET( cpustate->AF.b.l & SF );
1431
 
                        break;
1432
 
                case 0xf9: cpustate->icount -= IS_8085(cpustate) ? 6 : 5;       /* SPHL */
1433
 
                        cpustate->SP.d = cpustate->HL.d;
1434
 
                        break;
1435
 
                case 0xfa: cpustate->icount -= 10;      /* JM   nnnn */
1436
 
                        M_JMP( cpustate->AF.b.l & SF );
1437
 
                        break;
1438
 
                case 0xfb: cpustate->icount -= 4;       /* EI */
1439
 
                        /* set interrupt enable */
1440
 
                        set_inte(cpustate, 1);
1441
 
                        cpustate->after_ei = 2;
1442
 
                        break;
1443
 
                case 0xfc: cpustate->icount -= 11;      /* CM   nnnn */
1444
 
                        M_CALL( cpustate->AF.b.l & SF );
1445
 
                        break;
1446
 
                case 0xfd:
1447
 
                        if (IS_8085(cpustate)) {
1448
 
                                cpustate->icount -= 7;          /* JX   nnnn */
1449
 
                                M_JMP( cpustate->AF.b.l & XF );
1450
 
                        } else {
1451
 
                                cpustate->icount -= 17; /* CALL nnnn undocumented */
1452
 
                                M_CALL(1);
1453
 
                        }
1454
 
                        break;
1455
 
                case 0xfe: cpustate->icount -= 7;       /* CPI  nn */
1456
 
                        cpustate->XX.b.l = ARG(cpustate);
1457
 
                        M_CMP(cpustate->XX.b.l);
1458
 
                        break;
1459
 
                case 0xff: cpustate->icount -= IS_8085(cpustate) ? 12 : 11;     /* RST  7 */
1460
 
                        M_RST(7);
1461
 
                        break;
 
543
                case 0x00:                                                                                                              break;  /* NOP  */
 
544
                case 0x01:      cpustate->BC.w.l = ARG16(cpustate);                                     break;  /* LXI  B,nnnn */
 
545
                case 0x02:      WM(cpustate, cpustate->BC.d, cpustate->AF.b.h);         break;  /* STAX B */
 
546
                case 0x03:      cpustate->BC.w.l++;                                                                                     /* INX  B */
 
547
                                        if (IS_8085(cpustate)) { if (cpustate->BC.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
548
                                        break;
 
549
                case 0x04:      M_INR(cpustate->BC.b.h);                                                        break;  /* INR  B */
 
550
                case 0x05:      M_DCR(cpustate->BC.b.h);                                                        break;  /* DCR  B */
 
551
                case 0x06:      M_MVI(cpustate->BC.b.h);                                                        break;  /* MVI  B,nn */
 
552
                case 0x07:      M_RLC;                                                                                          break;  /* RLC  */
 
553
 
 
554
                case 0x08:      if (IS_8085(cpustate)) { M_DSUB(cpustate); }                            /* DSUB */
 
555
                                        /* else { ; } */                                                                                        /* NOP  undocumented */
 
556
                                        break;
 
557
                case 0x09:      M_DAD(BC);                                                                                      break;  /* DAD  B */
 
558
                case 0x0a:      cpustate->AF.b.h = RM(cpustate, cpustate->BC.d);        break;  /* LDAX B */
 
559
                case 0x0b:      cpustate->BC.w.l--;                                                                                     /* DCX  B */
 
560
                                        if (IS_8085(cpustate)) { if (cpustate->BC.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
561
                                        break;
 
562
                case 0x0c:      M_INR(cpustate->BC.b.l);                                                        break;  /* INR  C */
 
563
                case 0x0d:      M_DCR(cpustate->BC.b.l);                                                        break;  /* DCR  C */
 
564
                case 0x0e:      M_MVI(cpustate->BC.b.l);                                                        break;  /* MVI  C,nn */
 
565
                case 0x0f:      M_RRC;                                                                                          break;  /* RRC  */
 
566
 
 
567
                case 0x10:      if (IS_8085(cpustate)) {                                                                        /* ASRH */
 
568
                                                cpustate->AF.b.l = (cpustate->AF.b.l & ~CF) | (cpustate->HL.b.l & CF);
 
569
                                                cpustate->HL.w.l = (cpustate->HL.w.l >> 1);
 
570
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
571
                                        break;
 
572
                case 0x11:      cpustate->DE.w.l = ARG16(cpustate);                                     break;  /* LXI  D,nnnn */
 
573
                case 0x12:      WM(cpustate, cpustate->DE.d, cpustate->AF.b.h);         break;  /* STAX D */
 
574
                case 0x13:      cpustate->DE.w.l++;                                                                                     /* INX  D */
 
575
                                        if (IS_8085(cpustate)) { if (cpustate->DE.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
576
                                        break;
 
577
                case 0x14:      M_INR(cpustate->DE.b.h);                                                        break;  /* INR  D */
 
578
                case 0x15:      M_DCR(cpustate->DE.b.h);                                                        break;  /* DCR  D */
 
579
                case 0x16:      M_MVI(cpustate->DE.b.h);                                                        break;  /* MVI  D,nn */
 
580
                case 0x17:      M_RAL;                                                                                          break;  /* RAL  */
 
581
 
 
582
                case 0x18:      if (IS_8085(cpustate)) {                                                                        /* RLDE */
 
583
                                                cpustate->AF.b.l = (cpustate->AF.b.l & ~(CF | VF)) | (cpustate->DE.b.h >> 7);
 
584
                                                cpustate->DE.w.l = (cpustate->DE.w.l << 1) | (cpustate->DE.w.l >> 15);
 
585
                                                if (0 != (((cpustate->DE.w.l >> 15) ^ cpustate->AF.b.l) & CF)) cpustate->AF.b.l |= VF;
 
586
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
587
                                        break;
 
588
                case 0x19:      M_DAD(DE);                                                                                      break;  /* DAD  D */
 
589
                case 0x1a:      cpustate->AF.b.h = RM(cpustate, cpustate->DE.d);        break;  /* LDAX D */
 
590
                case 0x1b:      cpustate->DE.w.l--;                                                                                     /* DCX  D */
 
591
                                        if (IS_8085(cpustate)) { if (cpustate->DE.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
592
                                        break;
 
593
                case 0x1c:      M_INR(cpustate->DE.b.l);                                                        break;  /* INR  E */
 
594
                case 0x1d:      M_DCR(cpustate->DE.b.l);                                                        break;  /* DCR  E */
 
595
                case 0x1e:      M_MVI(cpustate->DE.b.l);                                                        break;  /* MVI  E,nn */
 
596
                case 0x1f:      M_RAR;                                                                                          break;  /* RAR  */
 
597
 
 
598
                case 0x20:      if (IS_8085(cpustate)) {                                                                        /* RIM  */
 
599
                                                cpustate->AF.b.h = get_rim_value(cpustate);
 
600
 
 
601
                                                /* if we have remembered state from taking a TRAP, fix up the IE flag here */
 
602
                                                if (cpustate->trap_im_copy & 0x80) cpustate->AF.b.h = (cpustate->AF.b.h & ~IM_IE) | (cpustate->trap_im_copy & IM_IE);
 
603
                                                cpustate->trap_im_copy = 0;
 
604
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
605
                                        break;
 
606
                case 0x21:      cpustate->HL.w.l = ARG16(cpustate);                                     break;  /* LXI  H,nnnn */
 
607
                case 0x22:      cpustate->WZ.w.l = ARG16(cpustate);                                                     /* SHLD nnnn */
 
608
                                        WM(cpustate, cpustate->WZ.d, cpustate->HL.b.l); cpustate->WZ.w.l++;
 
609
                                        WM(cpustate, cpustate->WZ.d, cpustate->HL.b.h);
 
610
                                        break;
 
611
                case 0x23:      cpustate->HL.w.l++;                                                                                     /* INX  H */
 
612
                                        if (IS_8085(cpustate)) { if (cpustate->HL.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
613
                                        break;
 
614
                case 0x24:      M_INR(cpustate->HL.b.h);                                                        break;  /* INR  H */
 
615
                case 0x25:      M_DCR(cpustate->HL.b.h);                                                        break;  /* DCR  H */
 
616
                case 0x26:      M_MVI(cpustate->HL.b.h);                                                        break;  /* MVI  H,nn */
 
617
                case 0x27:      cpustate->WZ.b.h = cpustate->AF.b.h;                                            /* DAA  */
 
618
                                        if (cpustate->AF.b.l&VF) {
 
619
                                                if ((cpustate->AF.b.l&HF) | ((cpustate->AF.b.h&0xf)>9)) cpustate->WZ.b.h-=6;
 
620
                                                if ((cpustate->AF.b.l&CF) | (cpustate->AF.b.h>0x99)) cpustate->WZ.b.h-=0x60;
 
621
                                        }
 
622
                                        else {
 
623
                                                if ((cpustate->AF.b.l&HF) | ((cpustate->AF.b.h&0xf)>9)) cpustate->WZ.b.h+=6;
 
624
                                                if ((cpustate->AF.b.l&CF) | (cpustate->AF.b.h>0x99)) cpustate->WZ.b.h+=0x60;
 
625
                                        }
 
626
 
 
627
                                        cpustate->AF.b.l=(cpustate->AF.b.l&3) | (cpustate->AF.b.h&0x28) | (cpustate->AF.b.h>0x99) | ((cpustate->AF.b.h^cpustate->WZ.b.h)&0x10) | ZSP[cpustate->WZ.b.h];
 
628
                                        cpustate->AF.b.h=cpustate->WZ.b.h;
 
629
 
 
630
                                        if (IS_8080(cpustate)) cpustate->AF.b.l &= 0xd5; // Ignore not used flags
 
631
                                        break;
 
632
 
 
633
                case 0x28:      if (IS_8085(cpustate)) {                                                                        /* LDEH nn */
 
634
                                                cpustate->WZ.d = ARG(cpustate);
 
635
                                                cpustate->DE.d = (cpustate->HL.d + cpustate->WZ.d) & 0xffff;
 
636
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
637
                                        break;
 
638
                case 0x29:      M_DAD(HL);                                                                                      break;  /* DAD  H */
 
639
                case 0x2a:      cpustate->WZ.d = ARG16(cpustate);                                                       /* LHLD nnnn */
 
640
                                        cpustate->HL.b.l = RM(cpustate, cpustate->WZ.d); cpustate->WZ.w.l++;
 
641
                                        cpustate->HL.b.h = RM(cpustate, cpustate->WZ.d);
 
642
                                        break;
 
643
                case 0x2b:      cpustate->HL.w.l--;                                                                                     /* DCX  H */
 
644
                                        if (IS_8085(cpustate)) { if (cpustate->HL.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
645
                                        break;
 
646
                case 0x2c:      M_INR(cpustate->HL.b.l);                                                        break;  /* INR  L */
 
647
                case 0x2d:      M_DCR(cpustate->HL.b.l);                                                        break;  /* DCR  L */
 
648
                case 0x2e:      M_MVI(cpustate->HL.b.l);                                                        break;  /* MVI  L,nn */
 
649
                case 0x2f:      cpustate->AF.b.h ^= 0xff;                                                                       /* CMA  */
 
650
                                        if (IS_8085(cpustate)) cpustate->AF.b.l |= HF | VF;
 
651
                                        break;
 
652
 
 
653
                case 0x30:      if (IS_8085(cpustate)) {                                                                        /* SIM  */
 
654
                                                /* if bit 3 is set, bits 0-2 become the new masks */
 
655
                                                if (cpustate->AF.b.h & 0x08) {
 
656
                                                        cpustate->IM &= ~(IM_M55 | IM_M65 | IM_M75 | IM_I55 | IM_I65);
 
657
                                                        cpustate->IM |= cpustate->AF.b.h & (IM_M55 | IM_M65 | IM_M75);
 
658
 
 
659
                                                        /* update live state based on the new masks */
 
660
                                                        if ((cpustate->IM & IM_M55) == 0 && cpustate->irq_state[I8085_RST55_LINE]) cpustate->IM |= IM_I55;
 
661
                                                        if ((cpustate->IM & IM_M65) == 0 && cpustate->irq_state[I8085_RST65_LINE]) cpustate->IM |= IM_I65;
 
662
                                                }
 
663
 
 
664
                                                /* bit if 4 is set, the 7.5 flip-flop is cleared */
 
665
                                                if (cpustate->AF.b.h & 0x10) cpustate->IM &= ~IM_I75;
 
666
 
 
667
                                                /* if bit 6 is set, then bit 7 is the new SOD state */
 
668
                                                if (cpustate->AF.b.h & 0x40) set_sod(cpustate, cpustate->AF.b.h >> 7);
 
669
 
 
670
                                                /* check for revealed interrupts */
 
671
                                                check_for_interrupts(cpustate);
 
672
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
673
                                        break;
 
674
                case 0x31:      cpustate->SP.w.l = ARG16(cpustate);                                     break;  /* LXI  SP,nnnn */
 
675
                case 0x32:      cpustate->WZ.d = ARG16(cpustate);                                                       /* STAX nnnn */
 
676
                                        WM(cpustate, cpustate->WZ.d, cpustate->AF.b.h);
 
677
                                        break;
 
678
                case 0x33:      cpustate->SP.w.l++;                                                                                     /* INX  SP */
 
679
                                        if (IS_8085(cpustate)) { if (cpustate->SP.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
680
                                        break;
 
681
                case 0x34:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d);                        /* INR  M */
 
682
                                        M_INR(cpustate->WZ.b.l);
 
683
                                        WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
 
684
                                        break;
 
685
                case 0x35:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d);                        /* DCR  M */
 
686
                                        M_DCR(cpustate->WZ.b.l);
 
687
                                        WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
 
688
                                        break;
 
689
                case 0x36:      cpustate->WZ.b.l = ARG(cpustate);                                                       /* MVI  M,nn */
 
690
                                        WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
 
691
                                        break;
 
692
                case 0x37:      cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | CF;      break;  /* STC  */
 
693
 
 
694
                case 0x38:      if (IS_8085(cpustate)) {                                                                        /* LDES nn */
 
695
                                                cpustate->WZ.d = ARG(cpustate);
 
696
                                                cpustate->DE.d = (cpustate->SP.d + cpustate->WZ.d) & 0xffff;
 
697
                                        } /* else { ; } */                                                                                      /* NOP  undocumented */
 
698
                                        break;
 
699
                case 0x39:      M_DAD(SP);                                                                                      break;  /* DAD  SP */
 
700
                case 0x3a:      cpustate->WZ.d = ARG16(cpustate);                                                       /* LDAX nnnn */
 
701
                                        cpustate->AF.b.h = RM(cpustate, cpustate->WZ.d);
 
702
                                        break;
 
703
                case 0x3b:      cpustate->SP.w.l--;                                                                                     /* DCX  SP */
 
704
                                        if (IS_8085(cpustate)) { if (cpustate->SP.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
 
705
                                        break;
 
706
                case 0x3c:      M_INR(cpustate->AF.b.h);                                                        break;  /* INR  A */
 
707
                case 0x3d:      M_DCR(cpustate->AF.b.h);                                                        break;  /* DCR  A */
 
708
                case 0x3e:      M_MVI(cpustate->AF.b.h);                                                        break;  /* MVI  A,nn */
 
709
                case 0x3f:      cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (~cpustate->AF.b.l & CF); break; /* CMC  */
 
710
 
 
711
                case 0x40:                                                                                                              break;  /* MOV  B,B */
 
712
                case 0x41:      cpustate->BC.b.h = cpustate->BC.b.l;                            break;  /* MOV  B,C */
 
713
                case 0x42:      cpustate->BC.b.h = cpustate->DE.b.h;                            break;  /* MOV  B,D */
 
714
                case 0x43:      cpustate->BC.b.h = cpustate->DE.b.l;                            break;  /* MOV  B,E */
 
715
                case 0x44:      cpustate->BC.b.h = cpustate->HL.b.h;                            break;  /* MOV  B,H */
 
716
                case 0x45:      cpustate->BC.b.h = cpustate->HL.b.l;                            break;  /* MOV  B,L */
 
717
                case 0x46:      cpustate->BC.b.h = RM(cpustate, cpustate->HL.d);        break;  /* MOV  B,M */
 
718
                case 0x47:      cpustate->BC.b.h = cpustate->AF.b.h;                            break;  /* MOV  B,A */
 
719
 
 
720
                case 0x48:      cpustate->BC.b.l = cpustate->BC.b.h;                            break;  /* MOV  C,B */
 
721
                case 0x49:                                                                                                              break;  /* MOV  C,C */
 
722
                case 0x4a:      cpustate->BC.b.l = cpustate->DE.b.h;                            break;  /* MOV  C,D */
 
723
                case 0x4b:      cpustate->BC.b.l = cpustate->DE.b.l;                            break;  /* MOV  C,E */
 
724
                case 0x4c:      cpustate->BC.b.l = cpustate->HL.b.h;                            break;  /* MOV  C,H */
 
725
                case 0x4d:      cpustate->BC.b.l = cpustate->HL.b.l;                            break;  /* MOV  C,L */
 
726
                case 0x4e:      cpustate->BC.b.l = RM(cpustate, cpustate->HL.d);        break;  /* MOV  C,M */
 
727
                case 0x4f:      cpustate->BC.b.l = cpustate->AF.b.h;                            break;  /* MOV  C,A */
 
728
 
 
729
                case 0x50:      cpustate->DE.b.h = cpustate->BC.b.h;                            break;  /* MOV  D,B */
 
730
                case 0x51:      cpustate->DE.b.h = cpustate->BC.b.l;                            break;  /* MOV  D,C */
 
731
                case 0x52:                                                                                                              break;  /* MOV  D,D */
 
732
                case 0x53:      cpustate->DE.b.h = cpustate->DE.b.l;                            break;  /* MOV  D,E */
 
733
                case 0x54:      cpustate->DE.b.h = cpustate->HL.b.h;                            break;  /* MOV  D,H */
 
734
                case 0x55:      cpustate->DE.b.h = cpustate->HL.b.l;                            break;  /* MOV  D,L */
 
735
                case 0x56:      cpustate->DE.b.h = RM(cpustate, cpustate->HL.d);        break;  /* MOV  D,M */
 
736
                case 0x57:      cpustate->DE.b.h = cpustate->AF.b.h;                            break;  /* MOV  D,A */
 
737
 
 
738
                case 0x58:      cpustate->DE.b.l = cpustate->BC.b.h;                            break;  /* MOV  E,B */
 
739
                case 0x59:      cpustate->DE.b.l = cpustate->BC.b.l;                            break;  /* MOV  E,C */
 
740
                case 0x5a:      cpustate->DE.b.l = cpustate->DE.b.h;                            break;  /* MOV  E,D */
 
741
                case 0x5b:                                                                                                              break;  /* MOV  E,E */
 
742
                case 0x5c:      cpustate->DE.b.l = cpustate->HL.b.h;                            break;  /* MOV  E,H */
 
743
                case 0x5d:      cpustate->DE.b.l = cpustate->HL.b.l;                            break;  /* MOV  E,L */
 
744
                case 0x5e:      cpustate->DE.b.l = RM(cpustate, cpustate->HL.d);        break;  /* MOV  E,M */
 
745
                case 0x5f:      cpustate->DE.b.l = cpustate->AF.b.h;                            break;  /* MOV  E,A */
 
746
 
 
747
                case 0x60:      cpustate->HL.b.h = cpustate->BC.b.h;                            break;  /* MOV  H,B */
 
748
                case 0x61:      cpustate->HL.b.h = cpustate->BC.b.l;                            break;  /* MOV  H,C */
 
749
                case 0x62:      cpustate->HL.b.h = cpustate->DE.b.h;                            break;  /* MOV  H,D */
 
750
                case 0x63:      cpustate->HL.b.h = cpustate->DE.b.l;                            break;  /* MOV  H,E */
 
751
                case 0x64:                                                                                                              break;  /* MOV  H,H */
 
752
                case 0x65:      cpustate->HL.b.h = cpustate->HL.b.l;                            break;  /* MOV  H,L */
 
753
                case 0x66:      cpustate->HL.b.h = RM(cpustate, cpustate->HL.d);        break;  /* MOV  H,M */
 
754
                case 0x67:      cpustate->HL.b.h = cpustate->AF.b.h;                            break;  /* MOV  H,A */
 
755
 
 
756
                case 0x68:      cpustate->HL.b.l = cpustate->BC.b.h;                            break;  /* MOV  L,B */
 
757
                case 0x69:      cpustate->HL.b.l = cpustate->BC.b.l;                            break;  /* MOV  L,C */
 
758
                case 0x6a:      cpustate->HL.b.l = cpustate->DE.b.h;                            break;  /* MOV  L,D */
 
759
                case 0x6b:      cpustate->HL.b.l = cpustate->DE.b.l;                            break;  /* MOV  L,E */
 
760
                case 0x6c:      cpustate->HL.b.l = cpustate->HL.b.h;                            break;  /* MOV  L,H */
 
761
                case 0x6d:                                                                                                              break;  /* MOV  L,L */
 
762
                case 0x6e:      cpustate->HL.b.l = RM(cpustate, cpustate->HL.d);        break;  /* MOV  L,M */
 
763
                case 0x6f:      cpustate->HL.b.l = cpustate->AF.b.h;                            break;  /* MOV  L,A */
 
764
 
 
765
                case 0x70:      WM(cpustate, cpustate->HL.d, cpustate->BC.b.h);         break;  /* MOV  M,B */
 
766
                case 0x71:      WM(cpustate, cpustate->HL.d, cpustate->BC.b.l);         break;  /* MOV  M,C */
 
767
                case 0x72:      WM(cpustate, cpustate->HL.d, cpustate->DE.b.h);         break;  /* MOV  M,D */
 
768
                case 0x73:      WM(cpustate, cpustate->HL.d, cpustate->DE.b.l);         break;  /* MOV  M,E */
 
769
                case 0x74:      WM(cpustate, cpustate->HL.d, cpustate->HL.b.h);         break;  /* MOV  M,H */
 
770
                case 0x75:      WM(cpustate, cpustate->HL.d, cpustate->HL.b.l);         break;  /* MOV  M,L */
 
771
                case 0x76:      cpustate->PC.w.l--; cpustate->HALT = 1;                                         /* HLT */
 
772
                                        set_status(cpustate, 0x8a); // halt acknowledge
 
773
                                        break;
 
774
                case 0x77:      WM(cpustate, cpustate->HL.d, cpustate->AF.b.h);         break;  /* MOV  M,A */
 
775
 
 
776
                case 0x78:      cpustate->AF.b.h = cpustate->BC.b.h;                            break;  /* MOV  A,B */
 
777
                case 0x79:      cpustate->AF.b.h = cpustate->BC.b.l;                            break;  /* MOV  A,C */
 
778
                case 0x7a:      cpustate->AF.b.h = cpustate->DE.b.h;                            break;  /* MOV  A,D */
 
779
                case 0x7b:      cpustate->AF.b.h = cpustate->DE.b.l;                            break;  /* MOV  A,E */
 
780
                case 0x7c:      cpustate->AF.b.h = cpustate->HL.b.h;                            break;  /* MOV  A,H */
 
781
                case 0x7d:      cpustate->AF.b.h = cpustate->HL.b.l;                            break;  /* MOV  A,L */
 
782
                case 0x7e:      cpustate->AF.b.h = RM(cpustate, cpustate->HL.d);        break;  /* MOV  A,M */
 
783
                case 0x7f:                                                                                                              break;  /* MOV  A,A */
 
784
 
 
785
                case 0x80:      M_ADD(cpustate->BC.b.h);                                                        break;  /* ADD  B */
 
786
                case 0x81:      M_ADD(cpustate->BC.b.l);                                                        break;  /* ADD  C */
 
787
                case 0x82:      M_ADD(cpustate->DE.b.h);                                                        break;  /* ADD  D */
 
788
                case 0x83:      M_ADD(cpustate->DE.b.l);                                                        break;  /* ADD  E */
 
789
                case 0x84:      M_ADD(cpustate->HL.b.h);                                                        break;  /* ADD  H */
 
790
                case 0x85:      M_ADD(cpustate->HL.b.l);                                                        break;  /* ADD  L */
 
791
                case 0x86:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADD(cpustate->WZ.b.l); break; /* ADD  M */
 
792
                case 0x87:      M_ADD(cpustate->AF.b.h);                                                        break;  /* ADD  A */
 
793
 
 
794
                case 0x88:      M_ADC(cpustate->BC.b.h);                                                        break;  /* ADC  B */
 
795
                case 0x89:      M_ADC(cpustate->BC.b.l);                                                        break;  /* ADC  C */
 
796
                case 0x8a:      M_ADC(cpustate->DE.b.h);                                                        break;  /* ADC  D */
 
797
                case 0x8b:      M_ADC(cpustate->DE.b.l);                                                        break;  /* ADC  E */
 
798
                case 0x8c:      M_ADC(cpustate->HL.b.h);                                                        break;  /* ADC  H */
 
799
                case 0x8d:      M_ADC(cpustate->HL.b.l);                                                        break;  /* ADC  L */
 
800
                case 0x8e:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADC(cpustate->WZ.b.l); break; /* ADC  M */
 
801
                case 0x8f:      M_ADC(cpustate->AF.b.h);                                                        break;  /* ADC  A */
 
802
 
 
803
                case 0x90:      M_SUB(cpustate->BC.b.h);                                                        break;  /* SUB  B */
 
804
                case 0x91:      M_SUB(cpustate->BC.b.l);                                                        break;  /* SUB  C */
 
805
                case 0x92:      M_SUB(cpustate->DE.b.h);                                                        break;  /* SUB  D */
 
806
                case 0x93:      M_SUB(cpustate->DE.b.l);                                                        break;  /* SUB  E */
 
807
                case 0x94:      M_SUB(cpustate->HL.b.h);                                                        break;  /* SUB  H */
 
808
                case 0x95:      M_SUB(cpustate->HL.b.l);                                                        break;  /* SUB  L */
 
809
                case 0x96:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SUB(cpustate->WZ.b.l); break; /* SUB  M */
 
810
                case 0x97:      M_SUB(cpustate->AF.b.h);                                                        break;  /* SUB  A */
 
811
 
 
812
                case 0x98:      M_SBB(cpustate->BC.b.h);                                                        break;  /* SBB  B */
 
813
                case 0x99:      M_SBB(cpustate->BC.b.l);                                                        break;  /* SBB  C */
 
814
                case 0x9a:      M_SBB(cpustate->DE.b.h);                                                        break;  /* SBB  D */
 
815
                case 0x9b:      M_SBB(cpustate->DE.b.l);                                                        break;  /* SBB  E */
 
816
                case 0x9c:      M_SBB(cpustate->HL.b.h);                                                        break;  /* SBB  H */
 
817
                case 0x9d:      M_SBB(cpustate->HL.b.l);                                                        break;  /* SBB  L */
 
818
                case 0x9e:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SBB(cpustate->WZ.b.l); break; /* SBB  M */
 
819
                case 0x9f:      M_SBB(cpustate->AF.b.h);                                                        break;  /* SBB  A */
 
820
 
 
821
                case 0xa0:      M_ANA(cpustate->BC.b.h);                                                        break;  /* ANA  B */
 
822
                case 0xa1:      M_ANA(cpustate->BC.b.l);                                                        break;  /* ANA  C */
 
823
                case 0xa2:      M_ANA(cpustate->DE.b.h);                                                        break;  /* ANA  D */
 
824
                case 0xa3:      M_ANA(cpustate->DE.b.l);                                                        break;  /* ANA  E */
 
825
                case 0xa4:      M_ANA(cpustate->HL.b.h);                                                        break;  /* ANA  H */
 
826
                case 0xa5:      M_ANA(cpustate->HL.b.l);                                                        break;  /* ANA  L */
 
827
                case 0xa6:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ANA(cpustate->WZ.b.l); break; /* ANA  M */
 
828
                case 0xa7:      M_ANA(cpustate->AF.b.h);                                                        break;  /* ANA  A */
 
829
 
 
830
                case 0xa8:      M_XRA(cpustate->BC.b.h);                                                        break;  /* XRA  B */
 
831
                case 0xa9:      M_XRA(cpustate->BC.b.l);                                                        break;  /* XRA  C */
 
832
                case 0xaa:      M_XRA(cpustate->DE.b.h);                                                        break;  /* XRA  D */
 
833
                case 0xab:      M_XRA(cpustate->DE.b.l);                                                        break;  /* XRA  E */
 
834
                case 0xac:      M_XRA(cpustate->HL.b.h);                                                        break;  /* XRA  H */
 
835
                case 0xad:      M_XRA(cpustate->HL.b.l);                                                        break;  /* XRA  L */
 
836
                case 0xae:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_XRA(cpustate->WZ.b.l); break; /* XRA  M */
 
837
                case 0xaf:      M_XRA(cpustate->AF.b.h);                                                        break;  /* XRA  A */
 
838
 
 
839
                case 0xb0:      M_ORA(cpustate->BC.b.h);                                                        break;  /* ORA  B */
 
840
                case 0xb1:      M_ORA(cpustate->BC.b.l);                                                        break;  /* ORA  C */
 
841
                case 0xb2:      M_ORA(cpustate->DE.b.h);                                                        break;  /* ORA  D */
 
842
                case 0xb3:      M_ORA(cpustate->DE.b.l);                                                        break;  /* ORA  E */
 
843
                case 0xb4:      M_ORA(cpustate->HL.b.h);                                                        break;  /* ORA  H */
 
844
                case 0xb5:      M_ORA(cpustate->HL.b.l);                                                        break;  /* ORA  L */
 
845
                case 0xb6:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ORA(cpustate->WZ.b.l); break; /* ORA  M */
 
846
                case 0xb7:      M_ORA(cpustate->AF.b.h);                                                        break;  /* ORA  A */
 
847
 
 
848
                case 0xb8:      M_CMP(cpustate->BC.b.h);                                                        break;  /* CMP  B */
 
849
                case 0xb9:      M_CMP(cpustate->BC.b.l);                                                        break;  /* CMP  C */
 
850
                case 0xba:      M_CMP(cpustate->DE.b.h);                                                        break;  /* CMP  D */
 
851
                case 0xbb:      M_CMP(cpustate->DE.b.l);                                                        break;  /* CMP  E */
 
852
                case 0xbc:      M_CMP(cpustate->HL.b.h);                                                        break;  /* CMP  H */
 
853
                case 0xbd:      M_CMP(cpustate->HL.b.l);                                                        break;  /* CMP  L */
 
854
                case 0xbe:      cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_CMP(cpustate->WZ.b.l); break; /* CMP  M */
 
855
                case 0xbf:      M_CMP(cpustate->AF.b.h);                                                        break;  /* CMP  A */
 
856
 
 
857
                case 0xc0:      M_RET( !(cpustate->AF.b.l & ZF) );                                      break;  /* RNZ  */
 
858
                case 0xc1:      M_POP(BC);                                                                                      break;  /* POP  B */
 
859
                case 0xc2:      M_JMP( !(cpustate->AF.b.l & ZF) );                                      break;  /* JNZ  nnnn */
 
860
                case 0xc3:      M_JMP(1);                                                                                       break;  /* JMP  nnnn */
 
861
                case 0xc4:      M_CALL( !(cpustate->AF.b.l & ZF) );                                     break;  /* CNZ  nnnn */
 
862
                case 0xc5:      M_PUSH(BC);                                                                                     break;  /* PUSH B */
 
863
                case 0xc6:      cpustate->WZ.b.l = ARG(cpustate); M_ADD(cpustate->WZ.b.l); break; /* ADI  nn */
 
864
                case 0xc7:      M_RST(0);                                                                                       break;  /* RST  0 */
 
865
 
 
866
                case 0xc8:      M_RET( cpustate->AF.b.l & ZF );                                         break;  /* RZ   */
 
867
                case 0xc9:      M_POP(PC);                                                                                      break;  /* RET  */
 
868
                case 0xca:      M_JMP( cpustate->AF.b.l & ZF );                                         break;  /* JZ   nnnn */
 
869
                case 0xcb:      if (IS_8085(cpustate)) {                                                                        /* RST  V */
 
870
                                                if (cpustate->AF.b.l & VF) { M_RST(8); }
 
871
                                                else cpustate->icount += 6; // RST not taken
 
872
                                        } else { M_JMP(1); }                                                                            /* JMP  nnnn undocumented */
 
873
                                        break;
 
874
                case 0xcc:      M_CALL( cpustate->AF.b.l & ZF );                                        break;  /* CZ   nnnn */
 
875
                case 0xcd:      M_CALL(1);                                                                                      break;  /* CALL nnnn */
 
876
                case 0xce:      cpustate->WZ.b.l = ARG(cpustate); M_ADC(cpustate->WZ.b.l); break; /* ACI  nn */
 
877
                case 0xcf:      M_RST(1);                                                                                       break;  /* RST  1 */
 
878
 
 
879
                case 0xd0:      M_RET( !(cpustate->AF.b.l & CF) );                                      break;  /* RNC  */
 
880
                case 0xd1:      M_POP(DE);                                                                                      break;  /* POP  D */
 
881
                case 0xd2:      M_JMP( !(cpustate->AF.b.l & CF) );                                      break;  /* JNC  nnnn */
 
882
                case 0xd3:      M_OUT;                                                                                          break;  /* OUT  nn */
 
883
                case 0xd4:      M_CALL( !(cpustate->AF.b.l & CF) );                                     break;  /* CNC  nnnn */
 
884
                case 0xd5:      M_PUSH(DE);                                                                                     break;  /* PUSH D */
 
885
                case 0xd6:      cpustate->WZ.b.l = ARG(cpustate); M_SUB(cpustate->WZ.b.l); break; /* SUI  nn */
 
886
                case 0xd7:      M_RST(2);                                                                                       break;  /* RST  2 */
 
887
 
 
888
                case 0xd8:      M_RET( cpustate->AF.b.l & CF );                                         break;  /* RC   */
 
889
                case 0xd9:      if (IS_8085(cpustate)) {                                                                        /* SHLX */
 
890
                                                cpustate->WZ.w.l = cpustate->DE.w.l;
 
891
                                                WM(cpustate, cpustate->WZ.d, cpustate->HL.b.l); cpustate->WZ.w.l++;
 
892
                                                WM(cpustate, cpustate->WZ.d, cpustate->HL.b.h);
 
893
                                        } else { M_POP(PC); }                                                                           /* RET  undocumented */
 
894
                                        break;
 
895
                case 0xda:      M_JMP( cpustate->AF.b.l & CF );                                         break;  /* JC   nnnn */
 
896
                case 0xdb:      M_IN;                                                                                           break;  /* IN   nn */
 
897
                case 0xdc:      M_CALL( cpustate->AF.b.l & CF );                                        break;  /* CC   nnnn */
 
898
                case 0xdd:      if (IS_8085(cpustate)) { M_JMP( !(cpustate->AF.b.l & X5F) ); } /* JNX  nnnn */
 
899
                                        else { M_CALL(1); }                                                                                     /* CALL nnnn undocumented */
 
900
                                        break;
 
901
                case 0xde:      cpustate->WZ.b.l = ARG(cpustate); M_SBB(cpustate->WZ.b.l); break; /* SBI  nn */
 
902
                case 0xdf:      M_RST(3);                                                                                       break;  /* RST  3 */
 
903
 
 
904
                case 0xe0:      M_RET( !(cpustate->AF.b.l & PF) );                                      break;  /* RPO    */
 
905
                case 0xe1:      M_POP(HL);                                                                                      break;  /* POP  H */
 
906
                case 0xe2:      M_JMP( !(cpustate->AF.b.l & PF) );                                      break;  /* JPO  nnnn */
 
907
                case 0xe3:      M_POP(WZ); M_PUSH(HL);                                                                          /* XTHL */
 
908
                                        cpustate->HL.d = cpustate->WZ.d;
 
909
                                        break;
 
910
                case 0xe4:      M_CALL( !(cpustate->AF.b.l & PF) );                                     break;  /* CPO  nnnn */
 
911
                case 0xe5:      M_PUSH(HL);                                                                                     break;  /* PUSH H */
 
912
                case 0xe6:      cpustate->WZ.b.l = ARG(cpustate); M_ANA(cpustate->WZ.b.l); break; /* ANI  nn */
 
913
                case 0xe7:      M_RST(4);                                                                                       break;  /* RST  4 */
 
914
 
 
915
                case 0xe8:      M_RET( cpustate->AF.b.l & PF );                                         break;  /* RPE  */
 
916
                case 0xe9:      cpustate->PC.d = cpustate->HL.w.l;                                      break;  /* PCHL */
 
917
                case 0xea:      M_JMP( cpustate->AF.b.l & PF );                                         break;  /* JPE  nnnn */
 
918
                case 0xeb:      cpustate->WZ.d = cpustate->DE.d;                                                        /* XCHG */
 
919
                                        cpustate->DE.d = cpustate->HL.d;
 
920
                                        cpustate->HL.d = cpustate->WZ.d;
 
921
                                        break;
 
922
                case 0xec:      M_CALL( cpustate->AF.b.l & PF );                                        break;  /* CPE  nnnn */
 
923
                case 0xed:      if (IS_8085(cpustate)) {                                                                        /* LHLX */
 
924
                                                cpustate->WZ.w.l = cpustate->DE.w.l;
 
925
                                                cpustate->HL.b.l = RM(cpustate, cpustate->WZ.d); cpustate->WZ.w.l++;
 
926
                                                cpustate->HL.b.h = RM(cpustate, cpustate->WZ.d);
 
927
                                        } else { M_CALL(1); }                                                                           /* CALL nnnn undocumented */
 
928
                                        break;
 
929
                case 0xee:      cpustate->WZ.b.l = ARG(cpustate); M_XRA(cpustate->WZ.b.l); break; /* XRI  nn */
 
930
                case 0xef:      M_RST(5);                                                                                       break;  /* RST  5 */
 
931
 
 
932
                case 0xf0:      M_RET( !(cpustate->AF.b.l&SF) );                                        break;  /* RP   */
 
933
                case 0xf1:      M_POP(AF);                                                                                      break;  /* POP  A */
 
934
                case 0xf2:      M_JMP( !(cpustate->AF.b.l & SF) );                                      break;  /* JP   nnnn */
 
935
                case 0xf3:      set_inte(cpustate, 0);                                                          break;  /* DI   */
 
936
                case 0xf4:      M_CALL( !(cpustate->AF.b.l & SF) );                                     break;  /* CP   nnnn */
 
937
                case 0xf5:      M_PUSH(AF);                                                                                     break;  /* PUSH A */
 
938
                case 0xf6:      cpustate->WZ.b.l = ARG(cpustate); M_ORA(cpustate->WZ.b.l); break; /* ORI  nn */
 
939
                case 0xf7:      M_RST(6);                                                                                       break;  /* RST  6 */
 
940
 
 
941
                case 0xf8:      M_RET( cpustate->AF.b.l & SF );                                         break;  /* RM   */
 
942
                case 0xf9:      cpustate->SP.d = cpustate->HL.d;                                        break;  /* SPHL */
 
943
                case 0xfa:      M_JMP( cpustate->AF.b.l & SF );                                         break;  /* JM   nnnn */
 
944
                case 0xfb:      set_inte(cpustate, 1); cpustate->after_ei = 2;          break;  /* EI */
 
945
                case 0xfc:      M_CALL( cpustate->AF.b.l & SF );                                        break;  /* CM   nnnn */
 
946
                case 0xfd:      if (IS_8085(cpustate)) { M_JMP( cpustate->AF.b.l & X5F ); }     /* JX   nnnn */
 
947
                                        else { M_CALL(1); }                                                                                     /* CALL nnnn undocumented */
 
948
                                        break;
 
949
                case 0xfe:      cpustate->WZ.b.l = ARG(cpustate); M_CMP(cpustate->WZ.b.l); break; /* CPI  nn */
 
950
                case 0xff:      M_RST(7);                                                                                       break;  /* RST  7 */
1462
951
        }
1463
952
}
1464
953
 
1500
989
    CORE INITIALIZATION
1501
990
***************************************************************************/
1502
991
 
1503
 
static void init_tables (void)
 
992
static void init_tables (int type)
1504
993
{
1505
994
        UINT8 zs;
1506
995
        int i, p;
1507
996
        for (i = 0; i < 256; i++)
1508
997
        {
 
998
                /* cycles */
 
999
                lut_cycles[i] = type?lut_cycles_8085[i]:lut_cycles_8080[i];
 
1000
 
 
1001
                /* flags */
1509
1002
                zs = 0;
1510
1003
                if (i==0) zs |= ZF;
1511
1004
                if (i&128) zs |= SF;
1519
1012
                if (i&64) ++p;
1520
1013
                if (i&128) ++p;
1521
1014
                ZS[i] = zs;
1522
 
                ZSP[i] = zs | ((p&1) ? 0 : VF);
 
1015
                ZSP[i] = zs | ((p&1) ? 0 : PF);
1523
1016
        }
1524
1017
}
1525
1018
 
1528
1021
{
1529
1022
        i8085_state *cpustate = get_safe_token(device);
1530
1023
 
1531
 
        init_tables();
 
1024
        init_tables(type);
1532
1025
 
1533
1026
        /* set up the state table */
1534
1027
        cpustate->state = state_table_template;
1544
1037
        cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
1545
1038
        cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
1546
1039
 
 
1040
        /* resolve callbacks */
 
1041
        devcb_resolve_write8(&cpustate->out_status_func, &cpustate->config.out_status_func, device);
 
1042
        devcb_resolve_write_line(&cpustate->out_inte_func, &cpustate->config.out_inte_func, device);
 
1043
        devcb_resolve_read_line(&cpustate->in_sid_func, &cpustate->config.in_sid_func, device);
 
1044
        devcb_resolve_write_line(&cpustate->out_sod_func, &cpustate->config.out_sod_func, device);
 
1045
 
 
1046
        /* register for state saving */
1547
1047
        state_save_register_device_item(device, 0, cpustate->PC.w.l);
1548
1048
        state_save_register_device_item(device, 0, cpustate->SP.w.l);
1549
1049
        state_save_register_device_item(device, 0, cpustate->AF.w.l);
1632
1132
        switch (entry->index)
1633
1133
        {
1634
1134
                case I8085_SID:
 
1135
                        {
 
1136
                        int sid = devcb_call_read_line(&cpustate->in_sid_func);
 
1137
 
1635
1138
                        cpustate->ietemp = ((cpustate->IM & IM_SID) != 0);
1636
 
                        if (cpustate->config.sid != NULL)
1637
 
                                cpustate->ietemp = ((*cpustate->config.sid)(cpustate->device) != 0);
 
1139
                        cpustate->ietemp = (sid != 0);
 
1140
                        }
1638
1141
                        break;
1639
1142
 
1640
1143
                case I8085_INTE:
1710
1213
                case CPUINFO_INT_CONTEXT_SIZE:                                  info->i = sizeof(i8085_state);                  break;
1711
1214
                case CPUINFO_INT_INPUT_LINES:                                   info->i = 4;                                                    break;
1712
1215
                case CPUINFO_INT_DEFAULT_IRQ_VECTOR:                    info->i = 0xff;                                                 break;
1713
 
                case CPUINFO_INT_ENDIANNESS:                                    info->i = ENDIANNESS_LITTLE;                    break;
 
1216
                case DEVINFO_INT_ENDIANNESS:                                    info->i = ENDIANNESS_LITTLE;                    break;
1714
1217
                case CPUINFO_INT_CLOCK_MULTIPLIER:                              info->i = 1;                                                    break;
1715
1218
                case CPUINFO_INT_CLOCK_DIVIDER:                                 info->i = 2;                                                    break;
1716
1219
                case CPUINFO_INT_MIN_INSTRUCTION_BYTES:                 info->i = 1;                                                    break;
1739
1242
                case CPUINFO_PTR_STATE_TABLE:                                   info->state_table = &cpustate->state;   break;
1740
1243
 
1741
1244
                /* --- the following bits of info are returned as NULL-terminated strings --- */
1742
 
                case CPUINFO_STR_NAME:                                                  strcpy(info->s, "8085A");                               break;
1743
 
                case CPUINFO_STR_CORE_FAMILY:                                   strcpy(info->s, "Intel 8080");                  break;
1744
 
                case CPUINFO_STR_CORE_VERSION:                                  strcpy(info->s, "1.1");                                 break;
1745
 
                case CPUINFO_STR_CORE_FILE:                                             strcpy(info->s, __FILE__);                              break;
1746
 
                case CPUINFO_STR_CORE_CREDITS:                                  strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
 
1245
                case DEVINFO_STR_NAME:                                                  strcpy(info->s, "8085A");                               break;
 
1246
                case DEVINFO_STR_FAMILY:                                                strcpy(info->s, "MCS-85");                              break;
 
1247
                case DEVINFO_STR_VERSION:                                               strcpy(info->s, "1.1");                                 break;
 
1248
                case DEVINFO_STR_SOURCE_FILE:                                   strcpy(info->s, __FILE__);                              break;
 
1249
                case DEVINFO_STR_CREDITS:                                               strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
1747
1250
 
1748
1251
                case CPUINFO_STR_FLAGS:
1749
1252
                        sprintf(info->s, "%c%c%c%c%c%c%c%c",
1750
1253
                                cpustate->AF.b.l & 0x80 ? 'S':'.',
1751
1254
                                cpustate->AF.b.l & 0x40 ? 'Z':'.',
1752
 
                                cpustate->AF.b.l & 0x20 ? '?':'.',
 
1255
                                cpustate->AF.b.l & 0x20 ? 'X':'.', // X5
1753
1256
                                cpustate->AF.b.l & 0x10 ? 'H':'.',
1754
1257
                                cpustate->AF.b.l & 0x08 ? '?':'.',
1755
1258
                                cpustate->AF.b.l & 0x04 ? 'P':'.',
1756
 
                                cpustate->AF.b.l & 0x02 ? 'N':'.',
 
1259
                                cpustate->AF.b.l & 0x02 ? 'V':'.',
1757
1260
                                cpustate->AF.b.l & 0x01 ? 'C':'.');
1758
1261
                        break;
1759
1262
        }
1776
1279
                case CPUINFO_FCT_INIT:                  info->init = CPU_INIT_NAME(i8080);                                              break;
1777
1280
 
1778
1281
                /* --- the following bits of info are returned as NULL-terminated strings --- */
1779
 
                case CPUINFO_STR_NAME:                                                  strcpy(info->s, "8080");                                break;
 
1282
                case DEVINFO_STR_NAME:                                                  strcpy(info->s, "8080");                                break;
 
1283
                case DEVINFO_STR_FAMILY:                                                strcpy(info->s, "MCS-80");                              break;
 
1284
 
 
1285
                default:                                                                                CPU_GET_INFO_CALL(i8085); break;
 
1286
        }
 
1287
}
 
1288
 
 
1289
 
 
1290
/***************************************************************************
 
1291
    8080A-SPECIFIC GET INFO
 
1292
***************************************************************************/
 
1293
 
 
1294
CPU_GET_INFO( i8080a )
 
1295
{
 
1296
        switch (state)
 
1297
        {
 
1298
                /* --- the following bits of info are returned as 64-bit signed integers --- */
 
1299
                case CPUINFO_INT_CLOCK_DIVIDER:                                 info->i = 1;                                                    break;
 
1300
                case CPUINFO_INT_INPUT_LINES:                                   info->i = 1;                                                    break;
 
1301
 
 
1302
                /* --- the following bits of info are returned as pointers to functions --- */
 
1303
                case CPUINFO_FCT_INIT:                  info->init = CPU_INIT_NAME(i8080);                                              break;
 
1304
 
 
1305
                /* --- the following bits of info are returned as NULL-terminated strings --- */
 
1306
                case DEVINFO_STR_NAME:                                                  strcpy(info->s, "8080A");                               break;
 
1307
                case DEVINFO_STR_FAMILY:                                                strcpy(info->s, "MCS-80");                              break;
1780
1308
 
1781
1309
                default:                                                                                CPU_GET_INFO_CALL(i8085); break;
1782
1310
        }